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GET /api/patches/116606/?format=api
{ "id": 116606, "url": "https://patches.dpdk.org/api/patches/116606/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1663806460-45162-11-git-send-email-nicolas.chautru@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1663806460-45162-11-git-send-email-nicolas.chautru@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1663806460-45162-11-git-send-email-nicolas.chautru@intel.com", "date": "2022-09-22T00:27:36", "name": "[v4,10/14] baseband/acc: add support for FFT operations", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "81a7b35f07cab92ac4964a85ba70a2fe07e63936", "submitter": { "id": 1314, "url": "https://patches.dpdk.org/api/people/1314/?format=api", "name": "Chautru, Nicolas", "email": "nicolas.chautru@intel.com" }, "delegate": { "id": 6690, "url": "https://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1663806460-45162-11-git-send-email-nicolas.chautru@intel.com/mbox/", "series": [ { "id": 24763, "url": "https://patches.dpdk.org/api/series/24763/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=24763", "date": "2022-09-22T00:27:27", "name": "[v4,01/14] baseband/acc100: remove unused registers", "version": 4, "mbox": "https://patches.dpdk.org/series/24763/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/116606/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/116606/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 122E5A0540;\n\tThu, 22 Sep 2022 02:29:39 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 5AB3542BAF;\n\tThu, 22 Sep 2022 02:28:25 +0200 (CEST)", "from mga12.intel.com (mga12.intel.com [192.55.52.136])\n by mails.dpdk.org (Postfix) with ESMTP id 920DA40E0F\n for <dev@dpdk.org>; Thu, 22 Sep 2022 02:28:15 +0200 (CEST)", "from orsmga007.jf.intel.com ([10.7.209.58])\n by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 21 Sep 2022 17:28:15 -0700", "from unknown (HELO icx-npg-scs1-cp1.localdomain) ([10.233.180.245])\n by orsmga007.jf.intel.com with ESMTP; 21 Sep 2022 17:28:14 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1663806495; x=1695342495;\n h=from:to:cc:subject:date:message-id:in-reply-to: references;\n bh=bwarOvOVx9a7654xgu9MNaFsqbhKUWmS8FmmZ15ubN0=;\n b=bK08BDbUnFOCdRYCuvDKKWj3leHDC/ewk8AI2LQhQlLSGZt56Sesxc+w\n G0FZOMNrvc5LSokv+J4YNKDh4jXaxNnFcVTSSarI85bZkuKNjYoDgkeDf\n xtk0UQvQMqLGOBpke85Nv54tlrtn5bwTPaFazw1BshLCBB7F2NyRy9E91\n Hlhhw78h3pFNOejhscD2OgePax1P6rilqq1LpDLZruCT5+uRcSI+dwswy\n vs/bHOHGUsomyCnyD1N0D/oZzv4KjdCS1/ztcrm521Gea/AH67hcJzcWw\n aqvtAKKUHBMn1Y3ssI4uzPN3FGHmdVIrEPDgT7JRALrTyVjK3UdYy5s8h Q==;", "X-IronPort-AV": [ "E=McAfee;i=\"6500,9779,10477\"; a=\"279883415\"", "E=Sophos;i=\"5.93,334,1654585200\"; d=\"scan'208\";a=\"279883415\"", "E=Sophos;i=\"5.93,334,1654585200\"; d=\"scan'208\";a=\"615010981\"" ], "X-ExtLoop1": "1", "From": "Nic Chautru <nicolas.chautru@intel.com>", "To": "dev@dpdk.org,\n\tthomas@monjalon.net", "Cc": "maxime.coquelin@redhat.com, trix@redhat.com, mdr@ashroe.eu,\n bruce.richardson@intel.com, hemant.agrawal@nxp.com,\n david.marchand@redhat.com, stephen@networkplumber.org,\n hernan.vargas@intel.com, Nic Chautru <nicolas.chautru@intel.com>", "Subject": "[PATCH v4 10/14] baseband/acc: add support for FFT operations", "Date": "Wed, 21 Sep 2022 17:27:36 -0700", "Message-Id": "<1663806460-45162-11-git-send-email-nicolas.chautru@intel.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1663806460-45162-1-git-send-email-nicolas.chautru@intel.com>", "References": "<1663806460-45162-1-git-send-email-nicolas.chautru@intel.com>", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add functions and capability for FFT processing\n\nSigned-off-by: Nic Chautru <nicolas.chautru@intel.com>\n---\n drivers/baseband/acc/rte_acc200_pmd.c | 251 +++++++++++++++++++++++++++++++++-\n 1 file changed, 249 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/baseband/acc/rte_acc200_pmd.c b/drivers/baseband/acc/rte_acc200_pmd.c\nindex 35ea0fe..fa23b6e 100644\n--- a/drivers/baseband/acc/rte_acc200_pmd.c\n+++ b/drivers/baseband/acc/rte_acc200_pmd.c\n@@ -717,6 +717,21 @@\n \t\t\t.num_buffers_soft_out = 0,\n \t\t\t}\n \t\t},\n+\t\t{\n+\t\t\t.type\t= RTE_BBDEV_OP_FFT,\n+\t\t\t.cap.fft = {\n+\t\t\t\t.capability_flags =\n+\t\t\t\t\t\tRTE_BBDEV_FFT_WINDOWING |\n+\t\t\t\t\t\tRTE_BBDEV_FFT_CS_ADJUSTMENT |\n+\t\t\t\t\t\tRTE_BBDEV_FFT_DFT_BYPASS |\n+\t\t\t\t\t\tRTE_BBDEV_FFT_IDFT_BYPASS |\n+\t\t\t\t\t\tRTE_BBDEV_FFT_WINDOWING_BYPASS,\n+\t\t\t\t.num_buffers_src =\n+\t\t\t\t\t\tRTE_BBDEV_LDPC_MAX_CODE_BLOCKS,\n+\t\t\t\t.num_buffers_dst =\n+\t\t\t\t\t\tRTE_BBDEV_LDPC_MAX_CODE_BLOCKS,\n+\t\t\t}\n+\t\t},\n \t\tRTE_BBDEV_END_OF_CAPABILITIES_LIST()\n \t};\n \n@@ -739,12 +754,13 @@\n \t\t\td->acc_conf.q_ul_5g.num_qgroups;\n \tdev_info->num_queues[RTE_BBDEV_OP_LDPC_ENC] = d->acc_conf.q_dl_5g.num_aqs_per_groups *\n \t\t\td->acc_conf.q_dl_5g.num_qgroups;\n-\tdev_info->num_queues[RTE_BBDEV_OP_FFT] = 0;\n+\tdev_info->num_queues[RTE_BBDEV_OP_FFT] = d->acc_conf.q_fft.num_aqs_per_groups *\n+\t\t\td->acc_conf.q_fft.num_qgroups;\n \tdev_info->queue_priority[RTE_BBDEV_OP_TURBO_DEC] = d->acc_conf.q_ul_4g.num_qgroups;\n \tdev_info->queue_priority[RTE_BBDEV_OP_TURBO_ENC] = d->acc_conf.q_dl_4g.num_qgroups;\n \tdev_info->queue_priority[RTE_BBDEV_OP_LDPC_DEC] = d->acc_conf.q_ul_5g.num_qgroups;\n \tdev_info->queue_priority[RTE_BBDEV_OP_LDPC_ENC] = d->acc_conf.q_dl_5g.num_qgroups;\n-\tdev_info->queue_priority[RTE_BBDEV_OP_FFT] = 0;\n+\tdev_info->queue_priority[RTE_BBDEV_OP_FFT] = d->acc_conf.q_fft.num_qgroups;\n \tdev_info->max_num_queues = 0;\n \tfor (i = RTE_BBDEV_OP_NONE; i <= RTE_BBDEV_OP_FFT; i++)\n \t\tdev_info->max_num_queues += dev_info->num_queues[i];\n@@ -3034,6 +3050,235 @@\n \treturn i;\n }\n \n+/* Fill in a frame control word for FFT processing. */\n+static inline void\n+acc200_fcw_fft_fill(struct rte_bbdev_fft_op *op, struct acc_fcw_fft *fcw)\n+{\n+\tfcw->in_frame_size = op->fft.input_sequence_size;\n+\tfcw->leading_pad_size = op->fft.input_leading_padding;\n+\tfcw->out_frame_size = op->fft.output_sequence_size;\n+\tfcw->leading_depad_size = op->fft.output_leading_depadding;\n+\tfcw->cs_window_sel = op->fft.window_index[0] +\n+\t\t\t(op->fft.window_index[1] << 8) +\n+\t\t\t(op->fft.window_index[2] << 16) +\n+\t\t\t(op->fft.window_index[3] << 24);\n+\tfcw->cs_window_sel2 = op->fft.window_index[4] +\n+\t\t\t(op->fft.window_index[5] << 8);\n+\tfcw->cs_enable_bmap = op->fft.cs_bitmap;\n+\tfcw->num_antennas = op->fft.num_antennas_log2;\n+\tfcw->idft_size = op->fft.idft_log2;\n+\tfcw->dft_size = op->fft.dft_log2;\n+\tfcw->cs_offset = op->fft.cs_time_adjustment;\n+\tfcw->idft_shift = op->fft.idft_shift;\n+\tfcw->dft_shift = op->fft.dft_shift;\n+\tfcw->cs_multiplier = op->fft.ncs_reciprocal;\n+\tif (check_bit(op->fft.op_flags,\n+\t\t\tRTE_BBDEV_FFT_IDFT_BYPASS)) {\n+\t\tif (check_bit(op->fft.op_flags,\n+\t\t\t\tRTE_BBDEV_FFT_WINDOWING_BYPASS))\n+\t\t\tfcw->bypass = 2;\n+\t\telse\n+\t\t\tfcw->bypass = 1;\n+\t} else if (check_bit(op->fft.op_flags,\n+\t\t\tRTE_BBDEV_FFT_DFT_BYPASS))\n+\t\tfcw->bypass = 3;\n+\telse\n+\t\tfcw->bypass = 0;\n+}\n+\n+static inline int\n+acc200_dma_desc_fft_fill(struct rte_bbdev_fft_op *op,\n+\t\tstruct acc_dma_req_desc *desc,\n+\t\tstruct rte_mbuf *input, struct rte_mbuf *output,\n+\t\tuint32_t *in_offset, uint32_t *out_offset)\n+{\n+\t/* FCW already done */\n+\tacc_header_init(desc);\n+\tdesc->data_ptrs[1].address =\n+\t\t\trte_pktmbuf_iova_offset(input, *in_offset);\n+\tdesc->data_ptrs[1].blen = op->fft.input_sequence_size * 4;\n+\tdesc->data_ptrs[1].blkid = ACC_DMA_BLKID_IN;\n+\tdesc->data_ptrs[1].last = 1;\n+\tdesc->data_ptrs[1].dma_ext = 0;\n+\tdesc->data_ptrs[2].address =\n+\t\t\trte_pktmbuf_iova_offset(output, *out_offset);\n+\tdesc->data_ptrs[2].blen = op->fft.output_sequence_size * 4;\n+\tdesc->data_ptrs[2].blkid = ACC_DMA_BLKID_OUT_HARD;\n+\tdesc->data_ptrs[2].last = 1;\n+\tdesc->data_ptrs[2].dma_ext = 0;\n+\tdesc->m2dlen = 2;\n+\tdesc->d2mlen = 1;\n+\tdesc->ib_ant_offset = op->fft.input_sequence_size;\n+\tdesc->num_ant = op->fft.num_antennas_log2 - 3;\n+\tint num_cs = 0, i;\n+\tfor (i = 0; i < 12; i++)\n+\t\tif (check_bit(op->fft.cs_bitmap, 1 << i))\n+\t\t\tnum_cs++;\n+\tdesc->num_cs = num_cs;\n+\tdesc->ob_cyc_offset = op->fft.output_sequence_size;\n+\tdesc->ob_ant_offset = op->fft.output_sequence_size * num_cs;\n+\tdesc->op_addr = op;\n+\treturn 0;\n+}\n+\n+\n+/** Enqueue one FFT operation for ACC200 device*/\n+static inline int\n+enqueue_fft_one_op(struct acc_queue *q, struct rte_bbdev_fft_op *op,\n+\t\tuint16_t total_enqueued_cbs)\n+{\n+\tunion acc_dma_desc *desc;\n+\tuint16_t desc_idx = ((q->sw_ring_head + total_enqueued_cbs)\n+\t\t\t& q->sw_ring_wrap_mask);\n+\tdesc = q->ring_addr + desc_idx;\n+\tstruct rte_mbuf *input, *output;\n+\tuint32_t in_offset, out_offset;\n+\tinput = op->fft.base_input.data;\n+\toutput = op->fft.base_output.data;\n+\tin_offset = op->fft.base_input.offset;\n+\tout_offset = op->fft.base_output.offset;\n+#ifdef RTE_LIBRTE_BBDEV_DEBUG\n+\tif (unlikely(input == NULL)) {\n+\t\trte_bbdev_log(ERR, \"Invalid mbuf pointer\");\n+\t\treturn -EFAULT;\n+\t}\n+#endif\n+\tstruct acc_fcw_fft *fcw;\n+\tfcw = &desc->req.fcw_fft;\n+\tacc200_fcw_fft_fill(op, fcw);\n+\tacc200_dma_desc_fft_fill(op, &desc->req, input, output,\n+\t\t\t&in_offset, &out_offset);\n+#ifdef RTE_LIBRTE_BBDEV_DEBUG\n+\trte_memdump(stderr, \"FCW\", &desc->req.fcw_fft,\n+\t\t\tsizeof(desc->req.fcw_fft));\n+\trte_memdump(stderr, \"Req Desc.\", desc, sizeof(*desc));\n+#endif\n+\treturn 1;\n+}\n+\n+/* Enqueue decode operations for ACC200 device. */\n+static uint16_t\n+acc200_enqueue_fft(struct rte_bbdev_queue_data *q_data,\n+\t\tstruct rte_bbdev_fft_op **ops, uint16_t num)\n+{\n+\tint32_t aq_avail = acc_aq_avail(q_data, num);\n+\tif (unlikely((aq_avail <= 0) || (num == 0)))\n+\t\treturn 0;\n+\tstruct acc_queue *q = q_data->queue_private;\n+\tint32_t avail = acc_ring_avail_enq(q);\n+\tuint16_t i;\n+\tunion acc_dma_desc *desc;\n+\tint ret;\n+\tfor (i = 0; i < num; ++i) {\n+\t\t/* Check if there are available space for further processing */\n+\t\tif (unlikely(avail < 1))\n+\t\t\tbreak;\n+\t\tavail -= 1;\n+\t\tret = enqueue_fft_one_op(q, ops[i], i);\n+\t\tif (ret < 0)\n+\t\t\tbreak;\n+\t}\n+\n+\tif (unlikely(i == 0))\n+\t\treturn 0; /* Nothing to enqueue */\n+\n+\t/* Set SDone in last CB in enqueued ops for CB mode*/\n+\tdesc = q->ring_addr + ((q->sw_ring_head + i - 1)\n+\t\t\t& q->sw_ring_wrap_mask);\n+\n+\tdesc->req.sdone_enable = 1;\n+\tdesc->req.irq_enable = q->irq_enable;\n+\tacc_dma_enqueue(q, i, &q_data->queue_stats);\n+\n+\t/* Update stats */\n+\tq_data->queue_stats.enqueued_count += i;\n+\tq_data->queue_stats.enqueue_err_count += num - i;\n+\treturn i;\n+}\n+\n+\n+/* Dequeue one FFT operations from ACC200 device */\n+static inline int\n+dequeue_fft_one_op(struct rte_bbdev_queue_data *q_data,\n+\t\tstruct acc_queue *q, struct rte_bbdev_fft_op **ref_op,\n+\t\tuint16_t dequeued_cbs, uint32_t *aq_dequeued)\n+{\n+\tunion acc_dma_desc *desc, atom_desc;\n+\tunion acc_dma_rsp_desc rsp;\n+\tstruct rte_bbdev_fft_op *op;\n+\n+\tdesc = q->ring_addr + ((q->sw_ring_tail + dequeued_cbs)\n+\t\t\t& q->sw_ring_wrap_mask);\n+\tatom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc,\n+\t\t\t__ATOMIC_RELAXED);\n+\n+\t/* Check fdone bit */\n+\tif (!(atom_desc.rsp.val & ACC_FDONE))\n+\t\treturn -1;\n+\n+\trsp.val = atom_desc.rsp.val;\n+#ifdef RTE_LIBRTE_BBDEV_DEBUG\n+\trte_memdump(stderr, \"Resp\", &desc->rsp.val,\n+\t\t\tsizeof(desc->rsp.val));\n+#endif\n+\t/* Dequeue */\n+\top = desc->req.op_addr;\n+\n+\t/* Clearing status, it will be set based on response */\n+\top->status = 0;\n+\top->status |= rsp.input_err << RTE_BBDEV_DATA_ERROR;\n+\top->status |= rsp.dma_err << RTE_BBDEV_DRV_ERROR;\n+\top->status |= rsp.fcw_err << RTE_BBDEV_DRV_ERROR;\n+\tif (op->status != 0)\n+\t\tq_data->queue_stats.dequeue_err_count++;\n+\n+\t/* Check if this is the last desc in batch (Atomic Queue) */\n+\tif (desc->req.last_desc_in_batch) {\n+\t\t(*aq_dequeued)++;\n+\t\tdesc->req.last_desc_in_batch = 0;\n+\t}\n+\tdesc->rsp.val = ACC_DMA_DESC_TYPE;\n+\tdesc->rsp.add_info_0 = 0;\n+\t*ref_op = op;\n+\t/* One CB (op) was successfully dequeued */\n+\treturn 1;\n+}\n+\n+\n+/* Dequeue FFT operations from ACC200 device. */\n+static uint16_t\n+acc200_dequeue_fft(struct rte_bbdev_queue_data *q_data,\n+\t\tstruct rte_bbdev_fft_op **ops, uint16_t num)\n+{\n+\tstruct acc_queue *q = q_data->queue_private;\n+\tuint16_t dequeue_num, i, dequeued_cbs = 0;\n+\tuint32_t avail = acc_ring_avail_deq(q);\n+\tuint32_t aq_dequeued = 0;\n+\tint ret;\n+\n+#ifdef RTE_LIBRTE_BBDEV_DEBUG\n+\tif (unlikely(ops == 0 && q == NULL))\n+\t\treturn 0;\n+#endif\n+\n+\tdequeue_num = RTE_MIN(avail, num);\n+\n+\tfor (i = 0; i < dequeue_num; ++i) {\n+\t\tret = dequeue_fft_one_op(\n+\t\t\t\tq_data, q, &ops[i], dequeued_cbs,\n+\t\t\t\t&aq_dequeued);\n+\t\tif (ret <= 0)\n+\t\t\tbreak;\n+\t\tdequeued_cbs += ret;\n+\t}\n+\n+\tq->aq_dequeued += aq_dequeued;\n+\tq->sw_ring_tail += dequeued_cbs;\n+\t/* Update enqueue stats */\n+\tq_data->queue_stats.dequeued_count += i;\n+\treturn i;\n+}\n+\n /* Initialization Function */\n static void\n acc200_bbdev_init(struct rte_bbdev *dev, struct rte_pci_driver *drv)\n@@ -3049,6 +3294,8 @@\n \tdev->enqueue_ldpc_dec_ops = acc200_enqueue_ldpc_dec;\n \tdev->dequeue_ldpc_enc_ops = acc200_dequeue_ldpc_enc;\n \tdev->dequeue_ldpc_dec_ops = acc200_dequeue_ldpc_dec;\n+\tdev->enqueue_fft_ops = acc200_enqueue_fft;\n+\tdev->dequeue_fft_ops = acc200_dequeue_fft;\n \n \t((struct acc_device *) dev->data->dev_private)->pf_device =\n \t\t\t!strcmp(drv->driver.name,\n", "prefixes": [ "v4", "10/14" ] }