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GET /api/patches/114/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 114,
    "url": "https://patches.dpdk.org/api/patches/114/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1406876916-24869-2-git-send-email-jingjing.wu@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1406876916-24869-2-git-send-email-jingjing.wu@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1406876916-24869-2-git-send-email-jingjing.wu@intel.com",
    "date": "2014-08-01T07:08:31",
    "name": "[dpdk-dev,1/6] i40e: flow director resource reserve and initialize on i40e",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "a7b5c3f5c3adeffdfa08108583c442b4aa2ab324",
    "submitter": {
        "id": 47,
        "url": "https://patches.dpdk.org/api/people/47/?format=api",
        "name": "Jingjing Wu",
        "email": "jingjing.wu@intel.com"
    },
    "delegate": null,
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1406876916-24869-2-git-send-email-jingjing.wu@intel.com/mbox/",
    "series": [],
    "comments": "https://patches.dpdk.org/api/patches/114/comments/",
    "check": "pending",
    "checks": "https://patches.dpdk.org/api/patches/114/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<wujingji@shecgisg004.sh.intel.com>",
        "Received": [
            "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby dpdk.org (Postfix) with ESMTP id 34205B370\n\tfor <dev@dpdk.org>; Fri,  1 Aug 2014 09:06:49 +0200 (CEST)",
            "from orsmga002.jf.intel.com ([10.7.209.21])\n\tby orsmga102.jf.intel.com with ESMTP; 01 Aug 2014 00:03:06 -0700",
            "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby orsmga002.jf.intel.com with ESMTP; 01 Aug 2014 00:08:49 -0700",
            "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id s7178muV014882;\n\tFri, 1 Aug 2014 15:08:48 +0800",
            "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid s7178ini025033; Fri, 1 Aug 2014 15:08:46 +0800",
            "(from wujingji@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id s7178iVu025029; \n\tFri, 1 Aug 2014 15:08:44 +0800"
        ],
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.01,778,1400050800\"; d=\"scan'208\";a=\"582081512\"",
        "From": "Jingjing Wu <jingjing.wu@intel.com>",
        "To": "dev@dpdk.org",
        "Date": "Fri,  1 Aug 2014 15:08:31 +0800",
        "Message-Id": "<1406876916-24869-2-git-send-email-jingjing.wu@intel.com>",
        "X-Mailer": "git-send-email 1.7.0.7",
        "In-Reply-To": "<1406876916-24869-1-git-send-email-jingjing.wu@intel.com>",
        "References": "<1406876916-24869-1-git-send-email-jingjing.wu@intel.com>",
        "Subject": "[dpdk-dev] [PATCH 1/6] i40e: flow director resource reserve and\n\tinitialize on i40e",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "X-List-Received-Date": "Fri, 01 Aug 2014 07:06:50 -0000"
    },
    "content": "flow director resource reserve and initialize on i40e, it includes\n - queue initialization and switch on and vsi creation during setup\n - queue vsi for flow director release during close\n\n\nSigned-off-by: jingjing.wu <jingjing.wu@intel.com>\n---\n lib/librte_pmd_i40e/Makefile      |   1 +\n lib/librte_pmd_i40e/i40e_ethdev.c |  40 +++++++++--\n lib/librte_pmd_i40e/i40e_ethdev.h |  22 ++++++-\n lib/librte_pmd_i40e/i40e_fdir.c   | 135 ++++++++++++++++++++++++++++++++++++++\n lib/librte_pmd_i40e/i40e_rxtx.c   | 127 +++++++++++++++++++++++++++++++++++\n 5 files changed, 318 insertions(+), 7 deletions(-)\n create mode 100644 lib/librte_pmd_i40e/i40e_fdir.c",
    "diff": "diff --git a/lib/librte_pmd_i40e/Makefile b/lib/librte_pmd_i40e/Makefile\nindex 4b31675..6537654 100644\n--- a/lib/librte_pmd_i40e/Makefile\n+++ b/lib/librte_pmd_i40e/Makefile\n@@ -87,6 +87,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e_ethdev.c\n SRCS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e_rxtx.c\n SRCS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e_ethdev_vf.c\n SRCS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e_pf.c\n+SRCS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e_fdir.c\n # this lib depends upon:\n DEPDIRS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += lib/librte_eal lib/librte_ether\n DEPDIRS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += lib/librte_mempool lib/librte_mbuf\ndiff --git a/lib/librte_pmd_i40e/i40e_ethdev.c b/lib/librte_pmd_i40e/i40e_ethdev.c\nindex 9ed31b5..47125c7 100644\n--- a/lib/librte_pmd_i40e/i40e_ethdev.c\n+++ b/lib/librte_pmd_i40e/i40e_ethdev.c\n@@ -516,6 +516,7 @@ eth_i40e_dev_init(__rte_unused struct eth_driver *eth_drv,\n \n err_setup_pf_switch:\n \trte_free(pf->main_vsi);\n+\ti40e_fdir_teardown(pf);\n err_get_mac_addr:\n err_configure_lan_hmc:\n \t(void)i40e_shutdown_lan_hmc(hw);\n@@ -728,6 +729,7 @@ i40e_dev_close(struct rte_eth_dev *dev)\n \n \t/* release all the existing VSIs and VEBs */\n \ti40e_vsi_release(pf->main_vsi);\n+\ti40e_fdir_teardown(pf);\n \n \t/* shutdown the adminq */\n \ti40e_aq_queue_shutdown(hw, true);\n@@ -2262,7 +2264,11 @@ i40e_vsi_release(struct i40e_vsi *vsi)\n \tTAILQ_FOREACH(f, &vsi->mac_list, next)\n \t\trte_free(f);\n \n-\tif (vsi->type != I40E_VSI_MAIN) {\n+\t/*\n+\t * For FDIR vsi, there is not actual HW VSI needed, no need to\n+\t * call adminq and removing fromtailq.\n+\t */\n+\tif (vsi->type != I40E_VSI_MAIN && vsi->type != I40E_VSI_FDIR) {\n \t\t/* Remove vsi from parent's sibling list */\n \t\tif (vsi->parent_vsi == NULL || vsi->parent_vsi->veb == NULL) {\n \t\t\tPMD_DRV_LOG(ERR, \"VSI's parent VSI is NULL\\n\");\n@@ -2379,7 +2385,8 @@ i40e_vsi_setup(struct i40e_pf *pf,\n \tstruct ether_addr broadcast =\n \t\t{.addr_bytes = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}};\n \n-\tif (type != I40E_VSI_MAIN && uplink_vsi == NULL) {\n+\tif (type != I40E_VSI_MAIN && type != I40E_VSI_FDIR &&\n+\t\tuplink_vsi == NULL) {\n \t\tPMD_DRV_LOG(ERR, \"VSI setup failed, \"\n \t\t\t\"VSI link shouldn't be NULL\\n\");\n \t\treturn NULL;\n@@ -2392,7 +2399,8 @@ i40e_vsi_setup(struct i40e_pf *pf,\n \t}\n \n \t/* If uplink vsi didn't setup VEB, create one first */\n-\tif (type != I40E_VSI_MAIN && uplink_vsi->veb == NULL) {\n+\tif (type != I40E_VSI_MAIN && type != I40E_VSI_FDIR &&\n+\t\tuplink_vsi->veb == NULL) {\n \t\tuplink_vsi->veb = i40e_veb_setup(pf, uplink_vsi);\n \n \t\tif (NULL == uplink_vsi->veb) {\n@@ -2420,6 +2428,9 @@ i40e_vsi_setup(struct i40e_pf *pf,\n \tcase I40E_VSI_SRIOV :\n \t\tvsi->nb_qps = pf->vf_nb_qps;\n \t\tbreak;\n+\tcase I40E_VSI_FDIR:\n+\t\tvsi->nb_qps = pf->fdir_nb_qps;\n+\t\tbreak;\n \tdefault:\n \t\tgoto fail_mem;\n \t}\n@@ -2432,7 +2443,7 @@ i40e_vsi_setup(struct i40e_pf *pf,\n \tvsi->base_queue = ret;\n \n \t/* VF has MSIX interrupt in VF range, don't allocate here */\n-\tif (type != I40E_VSI_SRIOV) {\n+\tif (type != I40E_VSI_SRIOV && type != I40E_VSI_FDIR) {\n \t\tret = i40e_res_pool_alloc(&pf->msix_pool, 1);\n \t\tif (ret < 0) {\n \t\t\tPMD_DRV_LOG(ERR, \"VSI %d get heap failed %d\", vsi->seid, ret);\n@@ -2561,8 +2572,16 @@ i40e_vsi_setup(struct i40e_pf *pf,\n \t\t * Since VSI is not created yet, only configure parameter,\n \t\t * will add vsi below.\n \t\t */\n-\t}\n-\telse {\n+\t} else if (type == I40E_VSI_FDIR) {\n+\t\tvsi->info.valid_sections = 0;\n+\t\tvsi->seid = 0;\n+\t\tvsi->vsi_id = 0;\n+\t\t/*\n+\t\t * No actual HW VSI needed, will return here without\n+\t\t * calling adminq and adding to tailq.\n+\t\t */\n+\t\treturn vsi;\n+\t} else {\n \t\tPMD_DRV_LOG(ERR, \"VSI: Not support other type VSI yet\\n\");\n \t\tgoto fail_msix_alloc;\n \t}\n@@ -2749,6 +2768,13 @@ i40e_pf_setup(struct i40e_pf *pf)\n \t\treturn ret;\n \t}\n \n+\tif (pf->flags & I40E_FLAG_FDIR) {\n+\t\tret = i40e_fdir_setup(pf);\n+\t\tif (ret != I40E_SUCCESS) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Failed to setup flow director\\n\");\n+\t\t\tpf->flags &= ~I40E_FLAG_FDIR;\n+\t\t}\n+\t}\n \t/* VSI setup */\n \tvsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, NULL, 0);\n \tif (!vsi) {\n@@ -2762,6 +2788,8 @@ i40e_pf_setup(struct i40e_pf *pf)\n \t/* Configure filter control */\n \tmemset(&settings, 0, sizeof(settings));\n \tsettings.hash_lut_size = I40E_HASH_LUT_SIZE_128;\n+\tif (pf->flags & I40E_FLAG_FDIR)\n+\t\tsettings.enable_fdir = TRUE;\n \t/* Enable ethtype and macvlan filters */\n \tsettings.enable_ethtype = TRUE;\n \tsettings.enable_macvlan = TRUE;\ndiff --git a/lib/librte_pmd_i40e/i40e_ethdev.h b/lib/librte_pmd_i40e/i40e_ethdev.h\nindex 64deef2..c2c7fa9 100644\n--- a/lib/librte_pmd_i40e/i40e_ethdev.h\n+++ b/lib/librte_pmd_i40e/i40e_ethdev.h\n@@ -46,11 +46,12 @@\n /* number of VSIs and queue default setting */\n #define I40E_MAX_QP_NUM_PER_VF    16\n #define I40E_DEFAULT_QP_NUM_VMDQ  64\n-#define I40E_DEFAULT_QP_NUM_FDIR  64\n+#define I40E_DEFAULT_QP_NUM_FDIR  1\n #define I40E_UINT32_BIT_SIZE      (CHAR_BIT * sizeof(uint32_t))\n #define I40E_VFTA_SIZE            (4096 / I40E_UINT32_BIT_SIZE)\n /* Default TC traffic in case DCB is not enabled */\n #define I40E_DEFAULT_TCMAP        0x1\n+#define I40E_FDIR_QUEUE_ID        0\n \n /* i40e flags */\n #define I40E_FLAG_RSS                   (1ULL << 0)\n@@ -189,6 +190,16 @@ struct i40e_pf_vf {\n };\n \n /*\n+ *  A structure used to define fields of a FDIR related info.\n+ */\n+struct i40e_fdir_info {\n+\tstruct i40e_vsi *fdir_vsi;     /* pointer to fdir VSI structure */\n+\tuint16_t match_counter_index;  /* Statistic counter index used for fdir*/\n+\tstruct i40e_tx_queue *txq;\n+\tstruct i40e_rx_queue *rxq;\n+};\n+\n+/*\n  * Structure to store private data specific for PF instance.\n  */\n struct i40e_pf {\n@@ -216,6 +227,7 @@ struct i40e_pf {\n \tuint16_t vmdq_nb_qps; /* The number of queue pairs of VMDq */\n \tuint16_t vf_nb_qps; /* The number of queue pairs of VF */\n \tuint16_t fdir_nb_qps; /* The number of queue pairs of Flow Director */\n+\tstruct i40e_fdir_info fdir; /* flow director info */\n };\n \n enum pending_msg {\n@@ -312,6 +324,14 @@ void i40e_vsi_queues_unbind_intr(struct i40e_vsi *vsi);\n int i40e_vsi_vlan_pvid_set(struct i40e_vsi *vsi,\n \t\t\t\tstruct i40e_vsi_vlan_pvid_info *info);\n int i40e_vsi_config_vlan_stripping(struct i40e_vsi *vsi, bool on);\n+enum i40e_status_code\n+i40e_fdir_setup_tx_resources(struct i40e_pf *pf,\n+\t\t\t\t    unsigned int socket_id);\n+enum i40e_status_code\n+i40e_fdir_setup_rx_resources(struct i40e_pf *pf,\n+\t\t\t\t    unsigned int socket_id);\n+int i40e_fdir_setup(struct i40e_pf *pf);\n+void i40e_fdir_teardown(struct i40e_pf *pf);\n \n /* I40E_DEV_PRIVATE_TO */\n #define I40E_DEV_PRIVATE_TO_PF(adapter) \\\ndiff --git a/lib/librte_pmd_i40e/i40e_fdir.c b/lib/librte_pmd_i40e/i40e_fdir.c\nnew file mode 100644\nindex 0000000..ecb4a95\n--- /dev/null\n+++ b/lib/librte_pmd_i40e/i40e_fdir.c\n@@ -0,0 +1,135 @@\n+/*-\n+ *   BSD LICENSE\n+ *\n+ *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.\n+ *   All rights reserved.\n+ *\n+ *   Redistribution and use in source and binary forms, with or without\n+ *   modification, are permitted provided that the following conditions\n+ *   are met:\n+ *\n+ *     * Redistributions of source code must retain the above copyright\n+ *       notice, this list of conditions and the following disclaimer.\n+ *     * Redistributions in binary form must reproduce the above copyright\n+ *       notice, this list of conditions and the following disclaimer in\n+ *       the documentation and/or other materials provided with the\n+ *       distribution.\n+ *     * Neither the name of Intel Corporation nor the names of its\n+ *       contributors may be used to endorse or promote products derived\n+ *       from this software without specific prior written permission.\n+ *\n+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ *   \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+#include <sys/queue.h>\n+#include <stdio.h>\n+#include <errno.h>\n+#include <stdint.h>\n+#include <string.h>\n+#include <unistd.h>\n+#include <stdarg.h>\n+\n+#include <rte_ether.h>\n+#include <rte_ethdev.h>\n+#include <rte_log.h>\n+#include <rte_mbuf.h>\n+\n+#include \"i40e_logs.h\"\n+#include \"i40e/i40e_type.h\"\n+#include \"i40e_ethdev.h\"\n+#include \"i40e_rxtx.h\"\n+\n+#define I40E_COUNTER_PF           2\n+#define I40E_COUNTER_INDEX_FDIR(pf_id)   (0 + (pf_id) * I40E_COUNTER_PF)\n+\n+/*\n+ * i40e_fdir_setup - reserve and initialize the Flow Director resources\n+ * @pf: board private structure\n+ **/\n+int\n+i40e_fdir_setup(struct i40e_pf *pf)\n+{\n+\tstruct i40e_hw *hw = I40E_PF_TO_HW(pf);\n+\tstruct i40e_vsi *vsi;\n+\tint err = I40E_SUCCESS;\n+\n+\tPMD_DRV_LOG(INFO, \"FDIR HW Capabilities, guaranteed = %u,\"\n+\t\t\t\"best_effort = %u.\\n\",\n+\t\t\thw->func_caps.fd_filters_guaranteed,\n+\t\t\thw->func_caps.fd_filters_best_effort);\n+\n+\t/* find existing or make new FDIR VSI */\n+\tvsi = pf->fdir.fdir_vsi;\n+\tif (!vsi) {\n+\t\tvsi = i40e_vsi_setup(pf, I40E_VSI_FDIR, NULL, 0);\n+\t\tif (!vsi) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Couldn't create FDIR VSI\\n\");\n+\t\t\treturn I40E_ERR_NO_AVAILABLE_VSI;\n+\t\t}\n+\t\tpf->fdir.fdir_vsi = vsi;\n+\t}\n+\t/*dev queue setup*/\n+\terr = i40e_fdir_setup_tx_resources(pf, 0);\n+\tif (err) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to setup fdir TX resources\\n\");\n+\t\tgoto fail_setup_tx;\n+\t}\n+\terr = i40e_fdir_setup_rx_resources(pf, 0);\n+\tif (err) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to setup fdir TX resources\\n\");\n+\t\tgoto fail_setup_rx;\n+\t}\n+\n+\terr = i40e_tx_queue_init(pf->fdir.txq);\n+\tif (err) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to do fdir TX initialization\\n\");\n+\t\tgoto fail_mem;\n+\t}\n+\n+\t/* need switch on before dev start*/\n+\terr = i40e_switch_tx_queue(hw, vsi->base_queue + I40E_FDIR_QUEUE_ID, TRUE);\n+\tif (err) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to do fdir TX initialization\\n\");\n+\t\tgoto fail_mem;\n+\t}\n+\tpf->fdir.match_counter_index = I40E_COUNTER_INDEX_FDIR(hw->pf_id);\n+\treturn I40E_SUCCESS;\n+\n+fail_mem:\n+\ti40e_dev_rx_queue_release(pf->fdir.rxq);\n+fail_setup_rx:\n+\ti40e_dev_tx_queue_release(pf->fdir.txq);\n+fail_setup_tx:\n+\ti40e_vsi_release(vsi);\n+\treturn err;\n+}\n+\n+\n+/*\n+ * i40e_fdir_teardown - release the Flow Director resources\n+ * @pf: board private structure\n+ */\n+void\n+i40e_fdir_teardown(struct i40e_pf *pf)\n+{\n+\tstruct i40e_vsi *vsi;\n+\n+\tvsi = pf->fdir.fdir_vsi;\n+\ti40e_dev_rx_queue_release(pf->fdir.rxq);\n+\tpf->fdir.rxq = NULL;\n+\ti40e_dev_tx_queue_release(pf->fdir.txq);\n+\tpf->fdir.txq = NULL;\n+\ti40e_vsi_release(vsi);\n+\tpf->fdir.fdir_vsi = NULL;\n+\treturn;\n+}\ndiff --git a/lib/librte_pmd_i40e/i40e_rxtx.c b/lib/librte_pmd_i40e/i40e_rxtx.c\nindex 83b9462..ad60d20 100644\n--- a/lib/librte_pmd_i40e/i40e_rxtx.c\n+++ b/lib/librte_pmd_i40e/i40e_rxtx.c\n@@ -1978,6 +1978,8 @@ i40e_tx_queue_init(struct i40e_tx_queue *txq)\n \ttx_ctx.base = txq->tx_ring_phys_addr / I40E_QUEUE_BASE_ADDR_UNIT;\n \ttx_ctx.qlen = txq->nb_tx_desc;\n \ttx_ctx.rdylist = rte_le_to_cpu_16(vsi->info.qs_handle[0]);\n+\tif (vsi->type == I40E_VSI_FDIR)\n+\t\ttx_ctx.fd_ena = TRUE;\n \n \terr = i40e_clear_lan_tx_queue_context(hw, pf_q);\n \tif (err != I40E_SUCCESS) {\n@@ -2201,3 +2203,128 @@ i40e_dev_clear_queues(struct rte_eth_dev *dev)\n \t\ti40e_reset_rx_queue(dev->data->rx_queues[i]);\n \t}\n }\n+\n+enum i40e_status_code\n+i40e_fdir_setup_tx_resources(struct i40e_pf *pf,\n+\t\t\t\t    unsigned int socket_id)\n+{\n+\tstruct i40e_tx_queue *txq;\n+\tconst struct rte_memzone *tz = NULL;\n+\tuint32_t ring_size;\n+\tstruct rte_eth_dev *dev = pf->adapter->eth_dev;\n+\n+#define I40E_FDIR_NUM_TX_DESC  I40E_MIN_RING_DESC\n+\tif (!pf) {\n+\t\tPMD_DRV_LOG(ERR, \"PF is not available\");\n+\t\treturn I40E_ERR_BAD_PTR;\n+\t}\n+\n+\t/* Allocate the TX queue data structure. */\n+\ttxq = rte_zmalloc_socket(\"i40e fdir tx queue\",\n+\t\t\t\t  sizeof(struct i40e_tx_queue),\n+\t\t\t\t  CACHE_LINE_SIZE,\n+\t\t\t\t  socket_id);\n+\tif (!txq) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to allocate memory for \"\n+\t\t\t\t\t\"tx queue structure\\n\");\n+\t\treturn I40E_ERR_NO_MEMORY;\n+\t}\n+\n+\t/* Allocate TX hardware ring descriptors. */\n+\tring_size = sizeof(struct i40e_tx_desc) * I40E_FDIR_NUM_TX_DESC;\n+\tring_size = RTE_ALIGN(ring_size, I40E_DMA_MEM_ALIGN);\n+\n+\ttz = i40e_ring_dma_zone_reserve(dev,\n+\t\t\t\t\t\"fdir_tx_ring\",\n+\t\t\t\t\tI40E_FDIR_QUEUE_ID,\n+\t\t\t\t\tring_size,\n+\t\t\t\t\tsocket_id);\n+\tif (!tz) {\n+\t\ti40e_dev_tx_queue_release(txq);\n+\t\tPMD_DRV_LOG(ERR, \"Failed to reserve DMA memory for TX\\n\");\n+\t\treturn I40E_ERR_NO_MEMORY;\n+\t}\n+\n+\ttxq->nb_tx_desc = I40E_FDIR_NUM_TX_DESC;\n+\ttxq->queue_id = I40E_FDIR_QUEUE_ID;\n+\ttxq->reg_idx = pf->fdir.fdir_vsi->base_queue + I40E_FDIR_QUEUE_ID;\n+\ttxq->vsi = pf->fdir.fdir_vsi;\n+\n+#ifdef RTE_LIBRTE_XEN_DOM0\n+\ttxq->tx_ring_phys_addr = rte_mem_phy2mch(tz->memseg_id, tz->phys_addr);\n+#else\n+\ttxq->tx_ring_phys_addr = (uint64_t)tz->phys_addr;\n+#endif\n+\ttxq->tx_ring = (struct i40e_tx_desc *)tz->addr;\n+\t/*\n+\t * don't need to allocate software ring and reset for the fdir\n+\t * program queue just set the queue has been configured.\n+\t */\n+\ttxq->q_set = TRUE;\n+\tpf->fdir.txq = txq;\n+\n+\treturn I40E_SUCCESS;\n+}\n+\n+enum i40e_status_code\n+i40e_fdir_setup_rx_resources(struct i40e_pf *pf,\n+\t\t\t\t    unsigned int socket_id)\n+{\n+\tstruct i40e_rx_queue *rxq;\n+\tconst struct rte_memzone *rz = NULL;\n+\tuint32_t ring_size;\n+\tstruct rte_eth_dev *dev = pf->adapter->eth_dev;\n+\n+#define I40E_FDIR_NUM_RX_DESC  I40E_MIN_RING_DESC\n+\tif (!pf) {\n+\t\tPMD_DRV_LOG(ERR, \"PF is not available\");\n+\t\treturn I40E_ERR_BAD_PTR;\n+\t}\n+\n+\t/* Allocate the TX queue data structure. */\n+\trxq = rte_zmalloc_socket(\"i40e fdir rx queue\",\n+\t\t\t\t  sizeof(struct i40e_rx_queue),\n+\t\t\t\t  CACHE_LINE_SIZE,\n+\t\t\t\t  socket_id);\n+\tif (!rxq) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to allocate memory for \"\n+\t\t\t\t\t\"rx queue structure\\n\");\n+\t\treturn I40E_ERR_NO_MEMORY;\n+\t}\n+\n+\t/* Allocate TX hardware ring descriptors. */\n+\tring_size = sizeof(union i40e_rx_desc) * I40E_FDIR_NUM_RX_DESC;\n+\tring_size = RTE_ALIGN(ring_size, I40E_DMA_MEM_ALIGN);\n+\n+\trz = i40e_ring_dma_zone_reserve(dev,\n+\t\t\t\t\t\"fdir_rx_ring\",\n+\t\t\t\t\tI40E_FDIR_QUEUE_ID,\n+\t\t\t\t\tring_size,\n+\t\t\t\t\tsocket_id);\n+\tif (!rz) {\n+\t\ti40e_dev_rx_queue_release(rxq);\n+\t\tPMD_DRV_LOG(ERR, \"Failed to reserve DMA memory for RX\\n\");\n+\t\treturn I40E_ERR_NO_MEMORY;\n+\t}\n+\n+\trxq->nb_rx_desc = I40E_FDIR_NUM_RX_DESC;\n+\trxq->queue_id = I40E_FDIR_QUEUE_ID;\n+\trxq->reg_idx = pf->fdir.fdir_vsi->base_queue + I40E_FDIR_QUEUE_ID;\n+\trxq->vsi = pf->fdir.fdir_vsi;\n+\n+#ifdef RTE_LIBRTE_XEN_DOM0\n+\trxq->rx_ring_phys_addr = rte_mem_phy2mch(rz->memseg_id, rz->phys_addr);\n+#else\n+\trxq->rx_ring_phys_addr = (uint64_t)rz->phys_addr;\n+#endif\n+\trxq->rx_ring = (union i40e_rx_desc *)rz->addr;\n+\n+\t/*\n+\t * Don't need to allocate software ring and reset for the fdir\n+\t * rx queue, just set the queue has been configured.\n+\t */\n+\trxq->q_set = TRUE;\n+\tpf->fdir.rxq = rxq;\n+\n+\treturn I40E_SUCCESS;\n+}\n",
    "prefixes": [
        "dpdk-dev",
        "1/6"
    ]
}