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GET /api/patches/112879/?format=api
{ "id": 112879, "url": "https://patches.dpdk.org/api/patches/112879/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20220616093417.27843-1-getelson@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220616093417.27843-1-getelson@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220616093417.27843-1-getelson@nvidia.com", "date": "2022-06-16T09:34:16", "name": "[1/2] net: fix GTP PSC headers", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "bc279e206c436e9816311bf0fdab8b892676dfa2", "submitter": { "id": 1882, "url": "https://patches.dpdk.org/api/people/1882/?format=api", "name": "Gregory Etelson", "email": "getelson@nvidia.com" }, "delegate": { "id": 3961, "url": "https://patches.dpdk.org/api/users/3961/?format=api", "username": "arybchenko", "first_name": "Andrew", "last_name": "Rybchenko", "email": "andrew.rybchenko@oktetlabs.ru" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20220616093417.27843-1-getelson@nvidia.com/mbox/", "series": [ { "id": 23567, "url": "https://patches.dpdk.org/api/series/23567/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=23567", "date": "2022-06-16T09:34:16", "name": "[1/2] net: fix GTP PSC headers", "version": 1, "mbox": "https://patches.dpdk.org/series/23567/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/112879/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/112879/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 379AFA00BE;\n\tThu, 16 Jun 2022 11:34:54 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 2956B42C06;\n\tThu, 16 Jun 2022 11:34:54 +0200 (CEST)", "from NAM12-MW2-obe.outbound.protection.outlook.com\n (mail-mw2nam12on2077.outbound.protection.outlook.com [40.107.244.77])\n by mails.dpdk.org (Postfix) with ESMTP id 00CB94003C;\n Thu, 16 Jun 2022 11:34:51 +0200 (CEST)", "from DM6PR06CA0063.namprd06.prod.outlook.com (2603:10b6:5:54::40) by\n CH2PR12MB3831.namprd12.prod.outlook.com (2603:10b6:610:29::13) with\n Microsoft\n SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.20.5332.16; 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helo=mail.nvidia.com; pr=C", "From": "Gregory Etelson <getelson@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "<getelson@nvidia.com>, <matan@nvidia.com>, <rasland@nvidia.com>,\n <stable@dpdk.org>, Viacheslav Ovsiienko <viacheslavo@nvidia.com>, \"Olivier\n Matz\" <olivier.matz@6wind.com>, Ferruh Yigit <ferruh.yigit@intel.com>", "Subject": "[PATCH 1/2] net: fix GTP PSC headers", "Date": "Thu, 16 Jun 2022 12:34:16 +0300", "Message-ID": "<20220616093417.27843-1-getelson@nvidia.com>", "X-Mailer": "git-send-email 2.34.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.231.35]", "X-ClientProxiedBy": "rnnvmail203.nvidia.com (10.129.68.9) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "a70ff99c-17d9-42ef-9d4c-08da4f7b74dc", "X-MS-TrafficTypeDiagnostic": "CH2PR12MB3831:EE_", "X-Microsoft-Antispam-PRVS": "\n <CH2PR12MB383106F0C828EB999B9A8158A5AC9@CH2PR12MB3831.namprd12.prod.outlook.com>", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n XaS8hNIXdU++vQejPnIJxVmG7oQGDW7sEc60Kk2ayhdfOGhYSzGsljxjpWDyXE7TjfKzE5L4aAxKvmgD1emG6ThS15vXvQQpa/wvvJc1GZaJ/o+jTrCzmkU2QbGJtQYLMutLK8DsFKp4TmzI3dsicwPgsiPqNqujMuPbWPPdzlLKQoho9YhGMp2zcetEBgqysbnDmlx3+kwE5gIneW6KfU637vRTnwliTrcQUFmw2XVH3XTOWWuDspilhUih1y7S61vTuyuaAKUOXLZ5lmhjT3xjOY227GM4Ay80GOGJ9Ro8ADrOOzYRBoTpCgCZLVa/svPqKTtMG751vg1/6KAC2fLHVgBkHS50rvlSaXjFdSsOdXEFop2ciZ9Hj6L4IdQ/pwMPEqowkEJFMKi/VCK1Dd9pVx5qSNryhiMX9E7VsRcPMP20OP0dehNpRa8Y3j5lX8gb7w2LCLy30ZL4HbfRbxrgALMNOsRzXkid+PFcJU9QFfRrk7cEdLCdIAu1QMYgS1dAfzRLRNvCpsD0PRd/nkihyBVv+JGtUT3M3WsN7dHO7H1GOlMWL6DvJjLQQvUVjcTcZXksmq/JsBDORvdRj5d6JX60UM69tS+Ih6ozN4Nb2PrLcPltxzRngJjMAX4SceMwLKmMAwa1vO9jE1ILQEPYBcUGgZqPhMKmzObaE9yREodY28GRVDSO80a2lVLFmeV0ZGkzwQcrQjqP2WuNNQ==", "X-Forefront-Antispam-Report": "CIP:12.22.5.236; CTRY:US; LANG:en; SCL:1; SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:ErrorRetry; CAT:NONE;\n SFS:(13230016)(4636009)(40470700004)(46966006)(36840700001)(40460700003)(36756003)(36860700001)(81166007)(47076005)(316002)(356005)(86362001)(83380400001)(26005)(336012)(7696005)(16526019)(6286002)(1076003)(2616005)(426003)(508600001)(186003)(54906003)(6666004)(8936002)(6916009)(2906002)(55016003)(70206006)(70586007)(82310400005)(4326008)(8676002)(5660300002)(36900700001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "16 Jun 2022 09:34:48.5283 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n a70ff99c-17d9-42ef-9d4c-08da4f7b74dc", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.236];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DM6NAM11FT027.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CH2PR12MB3831", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Fix bitmap fields order in little endian section of GTP PSC headers.\n\nFixes: e8ca1479cdc4 (\"net: add extension header for GTP PSC\")\n\ncc: stable@dpdk.org\nSigned-off-by: Gregory Etelson <getelson@nvidia.com>\nReviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>\n---\n lib/net/rte_gtp.h | 17 +++++++++--------\n 1 file changed, 9 insertions(+), 8 deletions(-)", "diff": "diff --git a/lib/net/rte_gtp.h b/lib/net/rte_gtp.h\nindex dca940c2c5..9849872366 100644\n--- a/lib/net/rte_gtp.h\n+++ b/lib/net/rte_gtp.h\n@@ -75,11 +75,11 @@ struct rte_gtp_psc_generic_hdr {\n \tuint8_t spare:2;\t/**< type specific spare bits */\n \tuint8_t qfi:6;\t\t/**< Qos Flow Identifier */\n #else\n-\tuint8_t qfi:6;\t\t/**< Qos Flow Identifier */\n-\tuint8_t spare:2;\t/**< type specific spare bits */\n \tuint8_t pad:3;\t\t/**< type specific pad bits */\n \tuint8_t qmp:1;\t\t/**< Qos Monitoring Packet */\n \tuint8_t type:4;\t\t/**< PDU type */\n+\tuint8_t qfi:6;\t\t/**< Qos Flow Identifier */\n+\tuint8_t spare:2;\t/**< type specific spare bits */\n #endif\n \tuint8_t data[0];\t/**< variable length data fields */\n } __rte_packed;\n@@ -100,12 +100,13 @@ struct rte_gtp_psc_type0_hdr {\n \tuint8_t rqi:1;\t\t/**< Reflective Qos Indicator */\n \tuint8_t qfi:6;\t\t/**< Qos Flow Identifier */\n #else\n-\tuint8_t qfi:6;\t\t/**< Qos Flow Identifier */\n-\tuint8_t rqi:1;\t\t/**< Reflective Qos Indicator */\n-\tuint8_t ppp:1;\t\t/**< Paging policy presence */\n \tuint8_t spare_dl1:2;\t/**< spare down link bits */\n \tuint8_t snp:1;\t\t/**< Sequence number presence */\n+\tuint8_t qmp:1;\t\t/**< Qos Monitoring Packet */\n \tuint8_t type:4;\t\t/**< PDU type */\n+\tuint8_t qfi:6;\t\t/**< Qos Flow Identifier */\n+\tuint8_t rqi:1;\t\t/**< Reflective Qos Indicator */\n+\tuint8_t ppp:1;\t\t/**< Paging policy presence */\n #endif\n \tuint8_t data[0];\t/**< variable length data fields */\n } __rte_packed;\n@@ -127,14 +128,14 @@ struct rte_gtp_psc_type1_hdr {\n \tuint8_t spare_ul2:1;\t/**< spare up link bits */\n \tuint8_t qfi:6;\t\t/**< Qos Flow Identifier */\n #else\n-\tuint8_t qfi:6;\t\t/**< Qos Flow Identifier */\n-\tuint8_t spare_ul2:1;\t/**< spare up link bits */\n-\tuint8_t n_delay_ind:1;\t/**< N3/N9 delay result presence */\n \tuint8_t snp:1;\t\t/**< Sequence number presence ul */\n \tuint8_t ul_delay_ind:1;\t/**< ul delay result presence */\n \tuint8_t dl_delay_ind:1;\t/**< dl delay result presence */\n \tuint8_t qmp:1;\t\t/**< Qos Monitoring Packet */\n \tuint8_t type:4;\t\t/**< PDU type */\n+\tuint8_t qfi:6;\t\t/**< Qos Flow Identifier */\n+\tuint8_t spare_ul2:1;\t/**< spare up link bits */\n+\tuint8_t n_delay_ind:1;\t/**< N3/N9 delay result presence */\n #endif\n \tuint8_t data[0];\t/**< variable length data fields */\n } __rte_packed;\n", "prefixes": [ "1/2" ] }