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GET /api/patches/112648/?format=api
{ "id": 112648, "url": "https://patches.dpdk.org/api/patches/112648/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20220610162944.99526-1-kevinx.liu@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220610162944.99526-1-kevinx.liu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220610162944.99526-1-kevinx.liu@intel.com", "date": "2022-06-10T16:29:44", "name": "[v7] net/i40e: add outer VLAN processing", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "55445d64d34167203c2ea56b156032633c688094", "submitter": { "id": 2440, "url": "https://patches.dpdk.org/api/people/2440/?format=api", "name": "Kevin Liu", "email": "kevinx.liu@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20220610162944.99526-1-kevinx.liu@intel.com/mbox/", "series": [ { "id": 23464, "url": "https://patches.dpdk.org/api/series/23464/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=23464", "date": "2022-06-10T16:29:44", "name": "[v7] net/i40e: add outer VLAN processing", "version": 7, "mbox": "https://patches.dpdk.org/series/23464/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/112648/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/112648/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 20E7AA0553;\n\tFri, 10 Jun 2022 10:30:47 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id B68C84069C;\n\tFri, 10 Jun 2022 10:30:46 +0200 (CEST)", "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n by mails.dpdk.org (Postfix) with ESMTP id 3D85440689\n for <dev@dpdk.org>; Fri, 10 Jun 2022 10:30:44 +0200 (CEST)", "from fmsmga008.fm.intel.com ([10.253.24.58])\n by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 10 Jun 2022 01:30:40 -0700", "from intel-cd-odc-kevin.cd.intel.com ([10.240.178.191])\n by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 10 Jun 2022 01:30:37 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1654849844; x=1686385844;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=N9/LP57TyZHUUJJioi3AFYGVqfgzNLaG9nSiEKbKWHY=;\n b=glfMt8VAlzsq3MDcFKYu+FtPzLfquRmiXcIBMw2M6UuKY1D8Bbrg2aHt\n ozLdAsW2iYccc7i+Sd6DqDKRdZqxasEk59rTVGBwNdfbCXLhzwbtfoG3J\n BPskSJUc6LRB9PLwDEqhCjn9wDwiBPg0sAhMVE23z+PmQ3OC8wkpc4iH2\n 1OozzD2R29X5Us5Z28OmaRaj1tXMYoRnIq4GFmBQ77LTcAeGWnjoMxVF8\n yVcWTREfPas0AlBw96Vke1nX8dKSCYi/FD3KyrIPMZS+R0APj4ce8FRPk\n IZti5I99aaj+nY8nkqiroA/BSXF6bYVgIUB3nzXaR2RLPq0e27VAc6erX Q==;", "X-IronPort-AV": [ "E=McAfee;i=\"6400,9594,10373\"; a=\"276334862\"", "E=Sophos;i=\"5.91,288,1647327600\"; d=\"scan'208\";a=\"276334862\"", "E=Sophos;i=\"5.91,288,1647327600\"; d=\"scan'208\";a=\"638019080\"" ], "From": "Kevin Liu <kevinx.liu@intel.com>", "To": "dev@dpdk.org", "Cc": "Yuying.Zhang@intel.com, beilei.xing@intel.com, stevex.yang@intel.com,\n Robin Zhang <robinx.zhang@intel.com>, Kevin Liu <kevinx.liu@intel.com>", "Subject": "[PATCH v7] net/i40e: add outer VLAN processing", "Date": "Fri, 10 Jun 2022 16:29:44 +0000", "Message-Id": "<20220610162944.99526-1-kevinx.liu@intel.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20220610155216.81289-1-kevinx.liu@intel.com>", "References": "<20220610155216.81289-1-kevinx.liu@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Robin Zhang <robinx.zhang@intel.com>\n\nOuter VLAN processing is supported after firmware v8.4, kernel driver\nalso change the default behavior to support this feature. To align with\nkernel driver, add support for outer VLAN processing in DPDK.\n\nBut it is forbidden for firmware to change the Inner/Outer VLAN\nconfiguration while there are MAC/VLAN filters in the switch table.\nTherefore, we need to clear the MAC table before setting config,\nand then restore the MAC table after setting.\n\nThis will not impact on an old firmware.\n\nSigned-off-by: Robin Zhang <robinx.zhang@intel.com>\nSigned-off-by: Kevin Liu <kevinx.liu@intel.com>\n---\n drivers/net/i40e/i40e_ethdev.c | 94 ++++++++++++++++++++++++++++++++--\n drivers/net/i40e/i40e_ethdev.h | 3 ++\n 2 files changed, 92 insertions(+), 5 deletions(-)", "diff": "diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c\nindex 755786dc10..4cae163cb9 100644\n--- a/drivers/net/i40e/i40e_ethdev.c\n+++ b/drivers/net/i40e/i40e_ethdev.c\n@@ -2575,6 +2575,7 @@ i40e_dev_close(struct rte_eth_dev *dev)\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n \tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n+\tstruct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;\n \tstruct i40e_filter_control_settings settings;\n \tstruct rte_flow *p_flow;\n \tuint32_t reg;\n@@ -2587,6 +2588,18 @@ i40e_dev_close(struct rte_eth_dev *dev)\n \tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n \t\treturn 0;\n \n+\t/*\n+\t * It is a workaround, if the double VLAN is disabled when\n+\t * the program exits, an abnormal error will occur on the\n+\t * NIC. Need to enable double VLAN when dev is closed.\n+\t */\n+\tif (pf->fw8_3gt) {\n+\t\tif (!(rxmode->offloads & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND)) {\n+\t\t\trxmode->offloads |= RTE_ETH_RX_OFFLOAD_VLAN_EXTEND;\n+\t\t\ti40e_vlan_offload_set(dev, RTE_ETH_VLAN_EXTEND_MASK);\n+\t\t}\n+\t}\n+\n \tret = rte_eth_switch_domain_free(pf->switch_domain_id);\n \tif (ret)\n \t\tPMD_INIT_LOG(WARNING, \"failed to free switch domain: %d\", ret);\n@@ -3909,6 +3922,7 @@ i40e_vlan_tpid_set(struct rte_eth_dev *dev,\n \tstruct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n \tint qinq = dev->data->dev_conf.rxmode.offloads &\n \t\t RTE_ETH_RX_OFFLOAD_VLAN_EXTEND;\n+\tu16 sw_flags = 0, valid_flags = 0;\n \tint ret = 0;\n \n \tif ((vlan_type != RTE_ETH_VLAN_TYPE_INNER &&\n@@ -3927,15 +3941,32 @@ i40e_vlan_tpid_set(struct rte_eth_dev *dev,\n \t/* 802.1ad frames ability is added in NVM API 1.7*/\n \tif (hw->flags & I40E_HW_FLAG_802_1AD_CAPABLE) {\n \t\tif (qinq) {\n+\t\t\tif (pf->fw8_3gt) {\n+\t\t\t\tsw_flags = I40E_AQ_SET_SWITCH_CFG_OUTER_VLAN;\n+\t\t\t\tvalid_flags = I40E_AQ_SET_SWITCH_CFG_OUTER_VLAN;\n+\t\t\t}\n \t\t\tif (vlan_type == RTE_ETH_VLAN_TYPE_OUTER)\n \t\t\t\thw->first_tag = rte_cpu_to_le_16(tpid);\n \t\t\telse if (vlan_type == RTE_ETH_VLAN_TYPE_INNER)\n \t\t\t\thw->second_tag = rte_cpu_to_le_16(tpid);\n \t\t} else {\n-\t\t\tif (vlan_type == RTE_ETH_VLAN_TYPE_OUTER)\n-\t\t\t\thw->second_tag = rte_cpu_to_le_16(tpid);\n+\t\t\t/*\n+\t\t\t * If tpid is equal to 0x88A8, indicates that the\n+\t\t\t * disable double VLAN operation is in progress.\n+\t\t\t * Need set switch configuration back to default.\n+\t\t\t */\n+\t\t\tif (pf->fw8_3gt && tpid == RTE_ETHER_TYPE_QINQ) {\n+\t\t\t\tsw_flags = 0;\n+\t\t\t\tvalid_flags = I40E_AQ_SET_SWITCH_CFG_OUTER_VLAN;\n+\t\t\t\tif (vlan_type == RTE_ETH_VLAN_TYPE_OUTER)\n+\t\t\t\t\thw->first_tag = rte_cpu_to_le_16(tpid);\n+\t\t\t} else {\n+\t\t\t\tif (vlan_type == RTE_ETH_VLAN_TYPE_OUTER)\n+\t\t\t\t\thw->second_tag = rte_cpu_to_le_16(tpid);\n+\t\t\t}\n \t\t}\n-\t\tret = i40e_aq_set_switch_config(hw, 0, 0, 0, NULL);\n+\t\tret = i40e_aq_set_switch_config(hw, sw_flags,\n+\t\t\t\t\t\tvalid_flags, 0, NULL);\n \t\tif (ret != I40E_SUCCESS) {\n \t\t\tPMD_DRV_LOG(ERR,\n \t\t\t\t \"Set switch config failed aq_err: %d\",\n@@ -3987,8 +4018,13 @@ static int\n i40e_vlan_offload_set(struct rte_eth_dev *dev, int mask)\n {\n \tstruct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n+\tstruct i40e_mac_filter_info *mac_filter;\n \tstruct i40e_vsi *vsi = pf->main_vsi;\n \tstruct rte_eth_rxmode *rxmode;\n+\tstruct i40e_mac_filter *f;\n+\tint i, num;\n+\tvoid *temp;\n+\tint ret;\n \n \trxmode = &dev->data->dev_conf.rxmode;\n \tif (mask & RTE_ETH_VLAN_FILTER_MASK) {\n@@ -4007,6 +4043,33 @@ i40e_vlan_offload_set(struct rte_eth_dev *dev, int mask)\n \t}\n \n \tif (mask & RTE_ETH_VLAN_EXTEND_MASK) {\n+\t\ti = 0;\n+\t\tnum = vsi->mac_num;\n+\t\tmac_filter = rte_zmalloc(\"mac_filter_info_data\",\n+\t\t\t\t num * sizeof(*mac_filter), 0);\n+\t\tif (mac_filter == NULL) {\n+\t\t\tPMD_DRV_LOG(ERR, \"failed to allocate memory\");\n+\t\t\treturn I40E_ERR_NO_MEMORY;\n+\t\t}\n+\n+\t\t/*\n+\t\t * Outer VLAN processing is supported after firmware v8.4, kernel driver\n+\t\t * also change the default behavior to support this feature. To align with\n+\t\t * kernel driver, set switch config in 'i40e_vlan_tpie_set' to support for\n+\t\t * outer VLAN processing. But it is forbidden for firmware to change the\n+\t\t * Inner/Outer VLAN configuration while there are MAC/VLAN filters in the\n+\t\t * switch table. Therefore, we need to clear the MAC table before setting\n+\t\t * config, and then restore the MAC table after setting. This feature is\n+\t\t * recommended to be used in firmware v8.6.\n+\t\t */\n+\t\t/* Remove all existing mac */\n+\t\tRTE_TAILQ_FOREACH_SAFE(f, &vsi->mac_list, next, temp) {\n+\t\t\tmac_filter[i] = f->mac_info;\n+\t\t\tret = i40e_vsi_delete_mac(vsi, &f->mac_info.mac_addr);\n+\t\t\tif (ret)\n+\t\t\t\tPMD_DRV_LOG(ERR, \"i40e vsi delete mac fail.\");\n+\t\t\ti++;\n+\t\t}\n \t\tif (rxmode->offloads & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND) {\n \t\t\ti40e_vsi_config_double_vlan(vsi, TRUE);\n \t\t\t/* Set global registers with default ethertype. */\n@@ -4014,9 +4077,19 @@ i40e_vlan_offload_set(struct rte_eth_dev *dev, int mask)\n \t\t\t\t\t RTE_ETHER_TYPE_VLAN);\n \t\t\ti40e_vlan_tpid_set(dev, RTE_ETH_VLAN_TYPE_INNER,\n \t\t\t\t\t RTE_ETHER_TYPE_VLAN);\n-\t\t}\n-\t\telse\n+\t\t} else {\n+\t\t\tif (pf->fw8_3gt)\n+\t\t\t\ti40e_vlan_tpid_set(dev, RTE_ETH_VLAN_TYPE_OUTER,\n+\t\t\t\t\t RTE_ETHER_TYPE_QINQ);\n \t\t\ti40e_vsi_config_double_vlan(vsi, FALSE);\n+\t\t}\n+\t\t/* Restore all mac */\n+\t\tfor (i = 0; i < num; i++) {\n+\t\t\tret = i40e_vsi_add_mac(vsi, &mac_filter[i]);\n+\t\t\tif (ret)\n+\t\t\t\tPMD_DRV_LOG(ERR, \"i40e vsi add mac fail.\");\n+\t\t}\n+\t\trte_free(mac_filter);\n \t}\n \n \tif (mask & RTE_ETH_QINQ_STRIP_MASK) {\n@@ -4846,6 +4919,17 @@ i40e_pf_parameter_init(struct rte_eth_dev *dev)\n \t\treturn -EINVAL;\n \t}\n \n+\t/**\n+\t * Enable outer VLAN processing if firmware version is greater\n+\t * than v8.3\n+\t */\n+\tif (hw->aq.fw_maj_ver > 8 ||\n+\t (hw->aq.fw_maj_ver == 8 && hw->aq.fw_min_ver > 3)) {\n+\t\tpf->fw8_3gt = true;\n+\t} else {\n+\t\tpf->fw8_3gt = false;\n+\t}\n+\n \treturn 0;\n }\n \ndiff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h\nindex a1ebdc093c..fe943a45ff 100644\n--- a/drivers/net/i40e/i40e_ethdev.h\n+++ b/drivers/net/i40e/i40e_ethdev.h\n@@ -1188,6 +1188,9 @@ struct i40e_pf {\n \t/* Switch Domain Id */\n \tuint16_t switch_domain_id;\n \n+\t/* When firmware > 8.3, the enable flag for outer VLAN processing */\n+\tbool fw8_3gt;\n+\n \tstruct i40e_vf_msg_cfg vf_msg_cfg;\n \tuint64_t prev_rx_bytes;\n \tuint64_t prev_tx_bytes;\n", "prefixes": [ "v7" ] }