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GET /api/patches/111152/?format=api
{ "id": 111152, "url": "https://patches.dpdk.org/api/patches/111152/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/0bdc8e88eacf7b41e27691b564350853577363e9.1652610489.git.sthotton@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<0bdc8e88eacf7b41e27691b564350853577363e9.1652610489.git.sthotton@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/0bdc8e88eacf7b41e27691b564350853577363e9.1652610489.git.sthotton@marvell.com", "date": "2022-05-15T10:30:42", "name": "event/cnxk: flush event queues over multiple pass", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "7d6a3bcb5545f5f8eea44c91b40e0de124ea38b1", "submitter": { "id": 2049, "url": "https://patches.dpdk.org/api/people/2049/?format=api", "name": "Shijith Thotton", "email": "sthotton@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/0bdc8e88eacf7b41e27691b564350853577363e9.1652610489.git.sthotton@marvell.com/mbox/", "series": [ { "id": 22937, "url": "https://patches.dpdk.org/api/series/22937/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=22937", "date": "2022-05-15T10:30:42", "name": "event/cnxk: flush event queues over multiple pass", "version": 1, "mbox": "https://patches.dpdk.org/series/22937/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/111152/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/111152/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id BB889A00BE;\n\tSun, 15 May 2022 12:30:52 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 64ECB40A79;\n\tSun, 15 May 2022 12:30:52 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 8FF7640143\n for <dev@dpdk.org>; Sun, 15 May 2022 12:30:51 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id\n 24F6rFnS032118\n for <dev@dpdk.org>; Sun, 15 May 2022 03:30:50 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3g2bxsjhy2-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Sun, 15 May 2022 03:30:50 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Sun, 15 May 2022 03:30:48 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Sun, 15 May 2022 03:30:48 -0700", "from localhost.localdomain (unknown [10.28.34.29])\n by maili.marvell.com (Postfix) with ESMTP id 63C583F707B;\n Sun, 15 May 2022 03:30:47 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : mime-version : content-transfer-encoding :\n content-type; s=pfpt0220; bh=dl3ltaGowfgMyP1KVa10IHlnlOabZDDB0DrLIMWWIiQ=;\n b=Dspg24Pw8mQgq099+pYNHtXdGaV0MVSNPyuOQmfJOL5vLdk/VHfzqEPvV/2dR3/hCsNi\n DjC3xuoO9oR1JIAu0cSvBILLs85wzFQ+czAgjnjHkD2G33J7FTKpOtMEsyySotYqv1lW\n YGYHGE+GlR9mgrO6HXWae63gBVnnH8MZlhxhfZr5wn+P7c9e8Fp2K9XfrrRqPpslGEYb\n wKVdozUtBpl/U1a2VaKgnBPY9ZuGgRbe7G7rhEuQKu9sQ5aWgKiWN1X+gvvRpSSofJCr\n 919MUoK61TszGIXVO9CKHWLLYABL93hXUlkd5PMDboAobPxf8jkLbTkpq7DM0EIQsIxi JQ==", "From": "Shijith Thotton <sthotton@marvell.com>", "To": "<dev@dpdk.org>, <jerinj@marvell.com>", "CC": "Shijith Thotton <sthotton@marvell.com>, <pbhagavatula@marvell.com>", "Subject": "[PATCH] event/cnxk: flush event queues over multiple pass", "Date": "Sun, 15 May 2022 16:00:42 +0530", "Message-ID": "\n <0bdc8e88eacf7b41e27691b564350853577363e9.1652610489.git.sthotton@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "yrpPJ9sYPLLC4jiJAYJnw7FUb2a2YTo2", "X-Proofpoint-GUID": "yrpPJ9sYPLLC4jiJAYJnw7FUb2a2YTo2", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514\n definitions=2022-05-15_05,2022-05-13_01,2022-02-23_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "If an event queue flush does not complete after a fixed number of tries,\nremaining queues are flushed before retrying the one with incomplete\nflush.\n\nSigned-off-by: Shijith Thotton <sthotton@marvell.com>\n---\n drivers/event/cnxk/cn10k_eventdev.c | 10 +++++++++-\n drivers/event/cnxk/cn9k_eventdev.c | 10 +++++++++-\n drivers/event/cnxk/cnxk_eventdev.c | 31 ++++++++++++++++++++++-------\n drivers/event/cnxk/cnxk_eventdev.h | 5 +++--\n 4 files changed, 45 insertions(+), 11 deletions(-)", "diff": "diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c\nindex 9b4d2895ec..6cdfc14d79 100644\n--- a/drivers/event/cnxk/cn10k_eventdev.c\n+++ b/drivers/event/cnxk/cn10k_eventdev.c\n@@ -108,10 +108,11 @@ cn10k_sso_hws_release(void *arg, void *hws)\n \tmemset(ws, 0, sizeof(*ws));\n }\n \n-static void\n+static int\n cn10k_sso_hws_flush_events(void *hws, uint8_t queue_id, uintptr_t base,\n \t\t\t cnxk_handle_event_t fn, void *arg)\n {\n+\tuint64_t retry = CNXK_SSO_FLUSH_RETRY_MAX;\n \tstruct cn10k_sso_hws *ws = hws;\n \tuint64_t cq_ds_cnt = 1;\n \tuint64_t aq_cnt = 1;\n@@ -140,6 +141,8 @@ cn10k_sso_hws_flush_events(void *hws, uint8_t queue_id, uintptr_t base,\n \t\t\tcnxk_sso_hws_swtag_flush(\n \t\t\t\tws->base + SSOW_LF_GWS_WQE0,\n \t\t\t\tws->base + SSOW_LF_GWS_OP_SWTAG_FLUSH);\n+\t\telse if (retry-- == 0)\n+\t\t\tbreak;\n \t\tdo {\n \t\t\tval = plt_read64(ws->base + SSOW_LF_GWS_PENDSTATE);\n \t\t} while (val & BIT_ULL(56));\n@@ -150,8 +153,13 @@ cn10k_sso_hws_flush_events(void *hws, uint8_t queue_id, uintptr_t base,\n \t\tcq_ds_cnt &= 0x3FFF3FFF0000;\n \t}\n \n+\tif (aq_cnt || cq_ds_cnt || ds_cnt)\n+\t\treturn -EAGAIN;\n+\n \tplt_write64(0, ws->base + SSOW_LF_GWS_OP_GWC_INVAL);\n \trte_mb();\n+\n+\treturn 0;\n }\n \n static void\ndiff --git a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c\nindex 4bba477dd1..db41f41358 100644\n--- a/drivers/event/cnxk/cn9k_eventdev.c\n+++ b/drivers/event/cnxk/cn9k_eventdev.c\n@@ -117,11 +117,12 @@ cn9k_sso_hws_release(void *arg, void *hws)\n \t}\n }\n \n-static void\n+static int\n cn9k_sso_hws_flush_events(void *hws, uint8_t queue_id, uintptr_t base,\n \t\t\t cnxk_handle_event_t fn, void *arg)\n {\n \tstruct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(arg);\n+\tuint64_t retry = CNXK_SSO_FLUSH_RETRY_MAX;\n \tstruct cn9k_sso_hws_dual *dws;\n \tstruct cn9k_sso_hws *ws;\n \tuint64_t cq_ds_cnt = 1;\n@@ -159,6 +160,8 @@ cn9k_sso_hws_flush_events(void *hws, uint8_t queue_id, uintptr_t base,\n \t\t\tcnxk_sso_hws_swtag_flush(\n \t\t\t\tws_base + SSOW_LF_GWS_TAG,\n \t\t\t\tws_base + SSOW_LF_GWS_OP_SWTAG_FLUSH);\n+\t\telse if (retry-- == 0)\n+\t\t\tbreak;\n \t\tdo {\n \t\t\tval = plt_read64(ws_base + SSOW_LF_GWS_PENDSTATE);\n \t\t} while (val & BIT_ULL(56));\n@@ -169,7 +172,12 @@ cn9k_sso_hws_flush_events(void *hws, uint8_t queue_id, uintptr_t base,\n \t\tcq_ds_cnt &= 0x3FFF3FFF0000;\n \t}\n \n+\tif (aq_cnt || cq_ds_cnt || ds_cnt)\n+\t\treturn -EAGAIN;\n+\n \tplt_write64(0, ws_base + SSOW_LF_GWS_OP_GWC_INVAL);\n+\n+\treturn 0;\n }\n \n static void\ndiff --git a/drivers/event/cnxk/cnxk_eventdev.c b/drivers/event/cnxk/cnxk_eventdev.c\nindex be021d86c9..91235ed9f3 100644\n--- a/drivers/event/cnxk/cnxk_eventdev.c\n+++ b/drivers/event/cnxk/cnxk_eventdev.c\n@@ -385,9 +385,10 @@ static void\n cnxk_sso_cleanup(struct rte_eventdev *event_dev, cnxk_sso_hws_reset_t reset_fn,\n \t\t cnxk_sso_hws_flush_t flush_fn, uint8_t enable)\n {\n+\tuint8_t pend_list[RTE_EVENT_MAX_QUEUES_PER_DEV], pend_cnt, new_pcnt;\n \tstruct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);\n \tuintptr_t hwgrp_base;\n-\tuint16_t i;\n+\tuint8_t queue_id, i;\n \tvoid *ws;\n \n \tfor (i = 0; i < dev->nb_event_ports; i++) {\n@@ -396,14 +397,30 @@ cnxk_sso_cleanup(struct rte_eventdev *event_dev, cnxk_sso_hws_reset_t reset_fn,\n \t}\n \n \trte_mb();\n+\n+\t/* Consume all the events through HWS0 */\n \tws = event_dev->data->ports[0];\n \n-\tfor (i = 0; i < dev->nb_event_queues; i++) {\n-\t\t/* Consume all the events through HWS0 */\n-\t\thwgrp_base = roc_sso_hwgrp_base_get(&dev->sso, i);\n-\t\tflush_fn(ws, i, hwgrp_base, cnxk_handle_event, event_dev);\n-\t\t/* Enable/Disable SSO GGRP */\n-\t\tplt_write64(enable, hwgrp_base + SSO_LF_GGRP_QCTL);\n+\t/* Starting list of queues to flush */\n+\tpend_cnt = dev->nb_event_queues;\n+\tfor (i = 0; i < dev->nb_event_queues; i++)\n+\t\tpend_list[i] = i;\n+\n+\twhile (pend_cnt) {\n+\t\tnew_pcnt = 0;\n+\t\tfor (i = 0; i < pend_cnt; i++) {\n+\t\t\tqueue_id = pend_list[i];\n+\t\t\thwgrp_base =\n+\t\t\t\troc_sso_hwgrp_base_get(&dev->sso, queue_id);\n+\t\t\tif (flush_fn(ws, queue_id, hwgrp_base,\n+\t\t\t\t cnxk_handle_event, event_dev)) {\n+\t\t\t\tpend_list[new_pcnt++] = queue_id;\n+\t\t\t\tcontinue;\n+\t\t\t}\n+\t\t\t/* Enable/Disable SSO GGRP */\n+\t\t\tplt_write64(enable, hwgrp_base + SSO_LF_GGRP_QCTL);\n+\t\t}\n+\t\tpend_cnt = new_pcnt;\n \t}\n }\n \ndiff --git a/drivers/event/cnxk/cnxk_eventdev.h b/drivers/event/cnxk/cnxk_eventdev.h\nindex 5564746e6d..a490829a8a 100644\n--- a/drivers/event/cnxk/cnxk_eventdev.h\n+++ b/drivers/event/cnxk/cnxk_eventdev.h\n@@ -54,6 +54,7 @@\n #define CN10K_GW_MODE_PREF 1\n #define CN10K_GW_MODE_PREF_WFE 2\n \n+#define CNXK_SSO_FLUSH_RETRY_MAX 0xfff\n #define CNXK_VALID_DEV_OR_ERR_RET(dev, drv_name) \\\n \tdo { \\\n \t\tif (strncmp(dev->driver->name, drv_name, strlen(drv_name))) \\\n@@ -69,8 +70,8 @@ typedef int (*cnxk_sso_unlink_t)(void *dev, void *ws, uint16_t *map,\n \t\t\t\t uint16_t nb_link);\n typedef void (*cnxk_handle_event_t)(void *arg, struct rte_event ev);\n typedef void (*cnxk_sso_hws_reset_t)(void *arg, void *ws);\n-typedef void (*cnxk_sso_hws_flush_t)(void *ws, uint8_t queue_id, uintptr_t base,\n-\t\t\t\t cnxk_handle_event_t fn, void *arg);\n+typedef int (*cnxk_sso_hws_flush_t)(void *ws, uint8_t queue_id, uintptr_t base,\n+\t\t\t\t cnxk_handle_event_t fn, void *arg);\n \n struct cnxk_sso_qos {\n \tuint16_t queue;\n", "prefixes": [] }