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GET /api/patches/111023/?format=api
{ "id": 111023, "url": "https://patches.dpdk.org/api/patches/111023/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20220511090218.3019859-1-yuying.zhang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220511090218.3019859-1-yuying.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220511090218.3019859-1-yuying.zhang@intel.com", "date": "2022-05-11T09:02:18", "name": "[v1] net/ice/base: support source interface FLG of switch filter", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "5ea77c8ac038b5f20382322f46eb8562bd579e8d", "submitter": { "id": 1844, "url": "https://patches.dpdk.org/api/people/1844/?format=api", "name": "Zhang, Yuying", "email": "yuying.zhang@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20220511090218.3019859-1-yuying.zhang@intel.com/mbox/", "series": [ { "id": 22887, "url": "https://patches.dpdk.org/api/series/22887/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=22887", "date": "2022-05-11T09:02:18", "name": "[v1] net/ice/base: support source interface FLG of switch filter", "version": 1, "mbox": "https://patches.dpdk.org/series/22887/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/111023/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/111023/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3123EA0032;\n\tWed, 11 May 2022 11:03:28 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 0E206410EE;\n\tWed, 11 May 2022 11:03:28 +0200 (CEST)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n by mails.dpdk.org (Postfix) with ESMTP id 0C21940042\n for <dev@dpdk.org>; Wed, 11 May 2022 11:03:25 +0200 (CEST)", "from orsmga005.jf.intel.com ([10.7.209.41])\n by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 May 2022 02:03:24 -0700", "from dpdk-yuyingzh-icelake.sh.intel.com ([10.67.116.229])\n by orsmga005.jf.intel.com with ESMTP; 11 May 2022 02:03:23 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1652259806; x=1683795806;\n h=from:to:cc:subject:date:message-id:mime-version:\n content-transfer-encoding;\n bh=62VbIsgclBIyX1MmdbetZzyEHU/vyPw3LQtkRFIHllc=;\n b=AVQY54c+W26lj4Wmg9tt6wTRUjpQxOnccWe4Z+leXoGmgrOLMMN/SWmt\n MnYzlyquPiUE0IkDSfUKNX8mjnrpibKeOhIp+bo1FwoCSF8AG7xdlC9pU\n a43GNc/LWUu+W70XV/V6utZlq+Ag5GI+Wbp4w2rhSfrjpgmT11/x3tnCk\n YJuiZWDoDlaZqZBYns5+MHOoSdEcc0MAcPAr9iGz0iNpcnL2httxBMFu1\n P4Urrt3wiVmyRykub8RhkdoxT0SBvkHicmXYGiF1GUnk1TedmS3kBRWQX\n LuvLIZi8GgUjg3ZDNSh2sT/y0S3hLwcgoQ0jVthcUJxj0U6gCF1rNdJjs w==;", "X-IronPort-AV": [ "E=McAfee;i=\"6400,9594,10343\"; a=\"269771505\"", "E=Sophos;i=\"5.91,216,1647327600\"; d=\"scan'208\";a=\"269771505\"", "E=Sophos;i=\"5.91,216,1647327600\"; d=\"scan'208\";a=\"739129507\"" ], "X-ExtLoop1": "1", "From": "Yuying Zhang <yuying.zhang@intel.com>", "To": "dev@dpdk.org,\n\tqi.z.zhang@intel.com,\n\tqiming.yang@intel.com", "Cc": "Yuying Zhang <yuying.zhang@intel.com>", "Subject": "[PATCH v1] net/ice/base: support source interface FLG of switch\n filter", "Date": "Wed, 11 May 2022 09:02:18 +0000", "Message-Id": "<20220511090218.3019859-1-yuying.zhang@intel.com>", "X-Mailer": "git-send-email 2.25.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "The tx/rx packets are dropped when creating drop any rule\nsince the recipe doesn't contain direction flag matching.\nThis patch enables the packet flag which represents\nthe direction of source interface to slove the issue.\n\nSigned-off-by: Yuying Zhang <yuying.zhang@intel.com>\n---\n drivers/net/ice/base/ice_protocol_type.h | 8 ++++++--\n drivers/net/ice/base/ice_switch.c | 19 +++++++++++++++++--\n 2 files changed, 23 insertions(+), 4 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h\nindex 0e6e5990be..32273ec87b 100644\n--- a/drivers/net/ice/base/ice_protocol_type.h\n+++ b/drivers/net/ice/base/ice_protocol_type.h\n@@ -54,6 +54,7 @@ enum ice_protocol_type {\n \tICE_GTP_NO_PAY,\n \tICE_VLAN_EX,\n \tICE_VLAN_IN,\n+\tICE_FLG,\n \tICE_PROTOCOL_LAST\n };\n \n@@ -218,9 +219,12 @@ enum ice_prot_id {\n #define ICE_META_DATA_ID_HW 255 /* this is used for tunnel type */\n \n #define ICE_MDID_SIZE 2\n-#define ICE_TUN_FLAG_MDID 21\n-#define ICE_TUN_FLAG_MDID_OFF (ICE_MDID_SIZE * ICE_TUN_FLAG_MDID)\n+#define ICE_TUN_FLAG_MDID1 20\n+#define ICE_TUN_FLAG_MDID2 21\n+#define ICE_TUN_FLAG_MDID_OFF1 (ICE_MDID_SIZE * ICE_TUN_FLAG_MDID1)\n+#define ICE_TUN_FLAG_MDID_OFF2 (ICE_MDID_SIZE * ICE_TUN_FLAG_MDID2)\n #define ICE_TUN_FLAG_MASK 0xFF\n+#define ICE_DIR_FLAG_MASK 0x10\n #define ICE_TUN_FLAG_VLAN_MASK 0x01\n #define ICE_TUN_FLAG_FV_IND 2\n \ndiff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c\nindex d4cc664ad7..afd26eff7e 100644\n--- a/drivers/net/ice/base/ice_switch.c\n+++ b/drivers/net/ice/base/ice_switch.c\n@@ -2303,7 +2303,7 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid,\n \t\t\tlkup_exts->field_mask[fv_word_idx] =\n \t\t\t\trg_entry->fv_mask[i];\n \t\t\tif (prot == ICE_META_DATA_ID_HW &&\n-\t\t\t off == ICE_TUN_FLAG_MDID_OFF)\n+\t\t\t off == ICE_TUN_FLAG_MDID_OFF2)\n \t\t\t\tvlan = true;\n \t\t\tfv_word_idx++;\n \t\t}\n@@ -6770,6 +6770,7 @@ static struct ice_protocol_entry ice_prot_id_tbl[ICE_PROTOCOL_LAST] = {\n \t{ ICE_GTP_NO_PAY,\tICE_UDP_ILOS_HW },\n \t{ ICE_VLAN_EX,\t\tICE_VLAN_OF_HW },\n \t{ ICE_VLAN_IN,\t\tICE_VLAN_OL_HW },\n+\t{ ICE_FLG,\t\tICE_META_DATA_ID_HW},\n };\n \n /**\n@@ -7508,6 +7509,10 @@ static bool ice_tun_type_match_word(enum ice_sw_tunnel_type tun_type, u16 *mask)\n \t\t*mask = ICE_TUN_FLAG_MASK;\n \t\treturn true;\n \n+\tcase ICE_SW_TUN_AND_NON_TUN:\n+\t\t*mask = ICE_DIR_FLAG_MASK;\n+\t\treturn true;\n+\n \tcase ICE_SW_TUN_GENEVE_VLAN:\n \tcase ICE_SW_TUN_VXLAN_VLAN:\n \t\t*mask = ICE_TUN_FLAG_MASK & ~ICE_TUN_FLAG_VLAN_MASK;\n@@ -7538,7 +7543,10 @@ ice_add_special_words(struct ice_adv_rule_info *rinfo,\n \t\t\tu8 word = lkup_exts->n_val_words++;\n \n \t\t\tlkup_exts->fv_words[word].prot_id = ICE_META_DATA_ID_HW;\n-\t\t\tlkup_exts->fv_words[word].off = ICE_TUN_FLAG_MDID_OFF;\n+\t\t\tif (rinfo->tun_type == ICE_SW_TUN_AND_NON_TUN)\n+\t\t\t\tlkup_exts->fv_words[word].off = ICE_TUN_FLAG_MDID_OFF1;\n+\t\t\telse\n+\t\t\t\tlkup_exts->fv_words[word].off = ICE_TUN_FLAG_MDID_OFF2;\n \t\t\tlkup_exts->field_mask[word] = mask;\n \t\t} else {\n \t\t\treturn ICE_ERR_MAX_LIMIT;\n@@ -7864,6 +7872,11 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,\n \t */\n \tice_get_compat_fv_bitmap(hw, rinfo, fv_bitmap);\n \n+\tif (rinfo->tun_type == ICE_SW_TUN_AND_NON_TUN) {\n+\t\tlkups[lkups_cnt].type = ICE_FLG;\n+\t\tlkups_cnt++;\n+\t}\n+\n \tstatus = ice_get_fv(hw, lkups, lkups_cnt, fv_bitmap, &rm->fv_list);\n \tif (status)\n \t\tgoto err_unroll;\n@@ -7888,6 +7901,7 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,\n \t/* Find offsets from the field vector. Pick the first one for all the\n \t * recipes.\n \t */\n+\n \tstatus = ice_fill_fv_word_index(hw, &rm->fv_list, &rm->rg_list);\n \tif (status)\n \t\tgoto err_unroll;\n@@ -8987,6 +9001,7 @@ ice_add_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,\n \t\t\t\t NULL);\n \tif (status)\n \t\tgoto err_ice_add_adv_rule;\n+\n \tadv_fltr = (struct ice_adv_fltr_mgmt_list_entry *)\n \t\tice_malloc(hw, sizeof(struct ice_adv_fltr_mgmt_list_entry));\n \tif (!adv_fltr) {\n", "prefixes": [ "v1" ] }