Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/109985/?format=api
{ "id": 109985, "url": "https://patches.dpdk.org/api/patches/109985/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20220421123054.22442-4-nipun.gupta@nxp.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220421123054.22442-4-nipun.gupta@nxp.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220421123054.22442-4-nipun.gupta@nxp.com", "date": "2022-04-21T12:30:51", "name": "[3/6] dma/dpaa2: support basic operations", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "353f3a6db8a1bf69f569b4b13fe94b5c07d230cd", "submitter": { "id": 471, "url": "https://patches.dpdk.org/api/people/471/?format=api", "name": "Nipun Gupta", "email": "nipun.gupta@nxp.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20220421123054.22442-4-nipun.gupta@nxp.com/mbox/", "series": [ { "id": 22591, "url": "https://patches.dpdk.org/api/series/22591/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=22591", "date": "2022-04-21T12:30:48", "name": "move DPAA2 QDMA driver freom raw to dma", "version": 1, "mbox": "https://patches.dpdk.org/series/22591/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/109985/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/109985/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id EE835A0093;\n\tThu, 21 Apr 2022 14:31:18 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 1E9FC427F9;\n\tThu, 21 Apr 2022 14:31:02 +0200 (CEST)", "from inva021.nxp.com (inva021.nxp.com [92.121.34.21])\n by mails.dpdk.org (Postfix) with ESMTP id 0FA1641140\n for <dev@dpdk.org>; Thu, 21 Apr 2022 14:30:59 +0200 (CEST)", "from inva021.nxp.com (localhost [127.0.0.1])\n by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id E21522007B7;\n Thu, 21 Apr 2022 14:30:58 +0200 (CEST)", "from aprdc01srsp001v.ap-rdc01.nxp.com\n (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16])\n by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 89D812007CF;\n Thu, 21 Apr 2022 14:30:58 +0200 (CEST)", "from lsv03274.swis.in-blr01.nxp.com (lsv03274.swis.in-blr01.nxp.com\n [92.120.147.114])\n by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 8BA1718002F4;\n Thu, 21 Apr 2022 20:30:57 +0800 (+08)" ], "From": "nipun.gupta@nxp.com", "To": "dev@dpdk.org", "Cc": "thomas@monjalon.net, g.singh@nxp.com, hemant.agrawal@nxp.com,\n gakhil@marvell.com, Nipun Gupta <nipun.gupta@nxp.com>", "Subject": "[PATCH 3/6] dma/dpaa2: support basic operations", "Date": "Thu, 21 Apr 2022 18:00:51 +0530", "Message-Id": "<20220421123054.22442-4-nipun.gupta@nxp.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20220421123054.22442-1-nipun.gupta@nxp.com>", "References": "<20220421123054.22442-1-nipun.gupta@nxp.com>", "X-Virus-Scanned": "ClamAV using ClamSMTP", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Nipun Gupta <nipun.gupta@nxp.com>\n\nThis patch support basic DMA operations which includes\ndevice capability and channel setup.\n\nSigned-off-by: Nipun Gupta <nipun.gupta@nxp.com>\n---\n drivers/dma/dpaa2/dpaa2_qdma.c | 182 +++++++++++++++++++++++++++++++++\n 1 file changed, 182 insertions(+)", "diff": "diff --git a/drivers/dma/dpaa2/dpaa2_qdma.c b/drivers/dma/dpaa2/dpaa2_qdma.c\nindex 9fa48ddfa4..785d8aea7b 100644\n--- a/drivers/dma/dpaa2/dpaa2_qdma.c\n+++ b/drivers/dma/dpaa2/dpaa2_qdma.c\n@@ -6,6 +6,7 @@\n #include <rte_fslmc.h>\n #include <rte_dmadev.h>\n #include <rte_dmadev_pmd.h>\n+#include <rte_kvargs.h>\n #include <mc/fsl_dpdmai.h>\n #include \"dpaa2_qdma.h\"\n #include \"dpaa2_qdma_logs.h\"\n@@ -15,6 +16,171 @@ int dpaa2_qdma_logtype;\n uint32_t dpaa2_coherent_no_alloc_cache;\n uint32_t dpaa2_coherent_alloc_cache;\n \n+static int\n+dpaa2_qdma_info_get(const struct rte_dma_dev *dev,\n+\t\t struct rte_dma_info *dev_info,\n+\t\t uint32_t info_sz)\n+{\n+\tRTE_SET_USED(dev);\n+\tRTE_SET_USED(info_sz);\n+\n+\tdev_info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM |\n+\t\t\t RTE_DMA_CAPA_MEM_TO_DEV |\n+\t\t\t RTE_DMA_CAPA_DEV_TO_DEV |\n+\t\t\t RTE_DMA_CAPA_DEV_TO_MEM |\n+\t\t\t RTE_DMA_CAPA_SILENT |\n+\t\t\t RTE_DMA_CAPA_OPS_COPY;\n+\tdev_info->max_vchans = DPAA2_QDMA_MAX_VHANS;\n+\tdev_info->max_desc = DPAA2_QDMA_MAX_DESC;\n+\tdev_info->min_desc = DPAA2_QDMA_MIN_DESC;\n+\n+\treturn 0;\n+}\n+\n+static int\n+dpaa2_qdma_configure(struct rte_dma_dev *dev,\n+\t\t const struct rte_dma_conf *dev_conf,\n+\t\t uint32_t conf_sz)\n+{\n+\tchar name[32]; /* RTE_MEMZONE_NAMESIZE = 32 */\n+\tstruct dpaa2_dpdmai_dev *dpdmai_dev = dev->data->dev_private;\n+\tstruct qdma_device *qdma_dev = dpdmai_dev->qdma_dev;\n+\n+\tDPAA2_QDMA_FUNC_TRACE();\n+\n+\tRTE_SET_USED(conf_sz);\n+\n+\t/* In case QDMA device is not in stopped state, return -EBUSY */\n+\tif (qdma_dev->state == 1) {\n+\t\tDPAA2_QDMA_ERR(\n+\t\t\t\"Device is in running state. Stop before config.\");\n+\t\treturn -1;\n+\t}\n+\n+\t/* Allocate Virtual Queues */\n+\tsprintf(name, \"qdma_%d_vq\", dev->data->dev_id);\n+\tqdma_dev->vqs = rte_malloc(name,\n+\t\t\t(sizeof(struct qdma_virt_queue) * dev_conf->nb_vchans),\n+\t\t\tRTE_CACHE_LINE_SIZE);\n+\tif (!qdma_dev->vqs) {\n+\t\tDPAA2_QDMA_ERR(\"qdma_virtual_queues allocation failed\");\n+\t\treturn -ENOMEM;\n+\t}\n+\tqdma_dev->num_vqs = dev_conf->nb_vchans;\n+\n+\treturn 0;\n+}\n+\n+static int\n+dpaa2_qdma_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan,\n+\t\t const struct rte_dma_vchan_conf *conf,\n+\t\t uint32_t conf_sz)\n+{\n+\tstruct dpaa2_dpdmai_dev *dpdmai_dev = dev->data->dev_private;\n+\tstruct qdma_device *qdma_dev = dpdmai_dev->qdma_dev;\n+\tuint32_t pool_size;\n+\tchar ring_name[32];\n+\tchar pool_name[64];\n+\tint fd_long_format = 1;\n+\tint sg_enable = 0;\n+\n+\tDPAA2_QDMA_FUNC_TRACE();\n+\n+\tRTE_SET_USED(conf_sz);\n+\n+\tif (qdma_dev->vqs[vchan].flags & DPAA2_QDMA_VQ_FD_SG_FORMAT)\n+\t\tsg_enable = 1;\n+\n+\tif (qdma_dev->vqs[vchan].flags & DPAA2_QDMA_VQ_FD_SHORT_FORMAT)\n+\t\tfd_long_format = 0;\n+\n+\tif (dev->data->dev_conf.enable_silent)\n+\t\tqdma_dev->vqs[vchan].flags |= DPAA2_QDMA_VQ_NO_RESPONSE;\n+\n+\tif (sg_enable) {\n+\t\tif (qdma_dev->num_vqs != 1) {\n+\t\t\tDPAA2_QDMA_ERR(\n+\t\t\t\t\"qDMA SG format only supports physical queue!\");\n+\t\t\treturn -ENODEV;\n+\t\t}\n+\t\tif (!fd_long_format) {\n+\t\t\tDPAA2_QDMA_ERR(\n+\t\t\t\t\"qDMA SG format only supports long FD format!\");\n+\t\t\treturn -ENODEV;\n+\t\t}\n+\t\tpool_size = QDMA_FLE_SG_POOL_SIZE;\n+\t} else {\n+\t\tpool_size = QDMA_FLE_SINGLE_POOL_SIZE;\n+\t}\n+\n+\tif (qdma_dev->num_vqs == 1)\n+\t\tqdma_dev->vqs[vchan].exclusive_hw_queue = 1;\n+\telse {\n+\t\t/* Allocate a Ring for Virtual Queue in VQ mode */\n+\t\tsnprintf(ring_name, sizeof(ring_name), \"status ring %d %d\",\n+\t\t\t dev->data->dev_id, vchan);\n+\t\tqdma_dev->vqs[vchan].status_ring = rte_ring_create(ring_name,\n+\t\t\tconf->nb_desc, rte_socket_id(), 0);\n+\t\tif (!qdma_dev->vqs[vchan].status_ring) {\n+\t\t\tDPAA2_QDMA_ERR(\"Status ring creation failed for vq\");\n+\t\t\treturn rte_errno;\n+\t\t}\n+\t}\n+\n+\tsnprintf(pool_name, sizeof(pool_name),\n+\t\t\"qdma_fle_pool_dev%d_qid%d\", dpdmai_dev->dpdmai_id, vchan);\n+\tqdma_dev->vqs[vchan].fle_pool = rte_mempool_create(pool_name,\n+\t\t\tconf->nb_desc, pool_size,\n+\t\t\tQDMA_FLE_CACHE_SIZE(conf->nb_desc), 0,\n+\t\t\tNULL, NULL, NULL, NULL, SOCKET_ID_ANY, 0);\n+\tif (!qdma_dev->vqs[vchan].fle_pool) {\n+\t\tDPAA2_QDMA_ERR(\"qdma_fle_pool create failed\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tsnprintf(pool_name, sizeof(pool_name),\n+\t\t\"qdma_job_pool_dev%d_qid%d\", dpdmai_dev->dpdmai_id, vchan);\n+\tqdma_dev->vqs[vchan].job_pool = rte_mempool_create(pool_name,\n+\t\t\tconf->nb_desc, pool_size,\n+\t\t\tQDMA_FLE_CACHE_SIZE(conf->nb_desc), 0,\n+\t\t\tNULL, NULL, NULL, NULL, SOCKET_ID_ANY, 0);\n+\tif (!qdma_dev->vqs[vchan].job_pool) {\n+\t\tDPAA2_QDMA_ERR(\"qdma_job_pool create failed\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tqdma_dev->vqs[vchan].dpdmai_dev = dpdmai_dev;\n+\tqdma_dev->vqs[vchan].nb_desc = conf->nb_desc;\n+\n+\treturn 0;\n+}\n+\n+static int\n+dpaa2_qdma_start(struct rte_dma_dev *dev)\n+{\n+\tstruct dpaa2_dpdmai_dev *dpdmai_dev = dev->data->dev_private;\n+\tstruct qdma_device *qdma_dev = dpdmai_dev->qdma_dev;\n+\n+\tDPAA2_QDMA_FUNC_TRACE();\n+\n+\tqdma_dev->state = 1;\n+\n+\treturn 0;\n+}\n+\n+static int\n+dpaa2_qdma_stop(struct rte_dma_dev *dev)\n+{\n+\tstruct dpaa2_dpdmai_dev *dpdmai_dev = dev->data->dev_private;\n+\tstruct qdma_device *qdma_dev = dpdmai_dev->qdma_dev;\n+\n+\tDPAA2_QDMA_FUNC_TRACE();\n+\n+\tqdma_dev->state = 0;\n+\n+\treturn 0;\n+}\n+\n static int\n dpaa2_qdma_reset(struct rte_dma_dev *dev)\n {\n@@ -55,7 +221,23 @@ dpaa2_qdma_reset(struct rte_dma_dev *dev)\n \treturn 0;\n }\n \n+static int\n+dpaa2_qdma_close(__rte_unused struct rte_dma_dev *dev)\n+{\n+\tDPAA2_QDMA_FUNC_TRACE();\n+\n+\tdpaa2_qdma_reset(dev);\n+\n+\treturn 0;\n+}\n+\n static struct rte_dma_dev_ops dpaa2_qdma_ops = {\n+\t.dev_info_get = dpaa2_qdma_info_get,\n+\t.dev_configure = dpaa2_qdma_configure,\n+\t.dev_start = dpaa2_qdma_start,\n+\t.dev_stop = dpaa2_qdma_stop,\n+\t.dev_close = dpaa2_qdma_close,\n+\t.vchan_setup = dpaa2_qdma_vchan_setup,\n };\n \n static int\n", "prefixes": [ "3/6" ] }