Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/109664/?format=api
{ "id": 109664, "url": "https://patches.dpdk.org/api/patches/109664/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20220413160932.2074781-31-kevinx.liu@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220413160932.2074781-31-kevinx.liu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220413160932.2074781-31-kevinx.liu@intel.com", "date": "2022-04-13T16:09:29", "name": "[v2,30/33] net/ice: add enable/disable queues for DCF large VF", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "d8041142b708be596896d57d74fd42be16e28243", "submitter": { "id": 2440, "url": "https://patches.dpdk.org/api/people/2440/?format=api", "name": "Kevin Liu", "email": "kevinx.liu@intel.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20220413160932.2074781-31-kevinx.liu@intel.com/mbox/", "series": [ { "id": 22497, "url": "https://patches.dpdk.org/api/series/22497/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=22497", "date": "2022-04-13T16:08:59", "name": "support full function of DCF", "version": 2, "mbox": "https://patches.dpdk.org/series/22497/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/109664/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/109664/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 24B3EA0508;\n\tWed, 13 Apr 2022 10:14:20 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 9C61642810;\n\tWed, 13 Apr 2022 10:12:03 +0200 (CEST)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by mails.dpdk.org (Postfix) with ESMTP id 0CAE14286E\n for <dev@dpdk.org>; Wed, 13 Apr 2022 10:12:01 +0200 (CEST)", "from orsmga006.jf.intel.com ([10.7.209.51])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 13 Apr 2022 01:12:00 -0700", "from intel-cd-odc-kevin.cd.intel.com ([10.240.178.195])\n by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 13 Apr 2022 01:11:58 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1649837522; x=1681373522;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=9he4SI3BOgx/8v3pcNkRUBde9SioYkxnwTjlp+0lFNY=;\n b=LLCBg1E0J/ajsLHRSXuFooAfxEC5ifOsi7Zgk5Aok+VnGa2hxxOy+NC1\n 8mAjr7KhqlNmfAFcJx9iyfxJygXnEudyRTEMhwpgyuWtW1wqJJMsmMPhQ\n x1LeUoqMTdYOqNxh+MFRBNOKRcazYQ8o05H8UJ+shoJpGEtJsQdqe+Cg3\n IAbtaY15VyqV2z2PEEzB9wVVZNEn2Pgcpl+CP1dishPTvGASvgxpOzVCB\n 6wrHOE9YEdybRG8dxuvHuwFYZqMIWMdQIZkTGxbAs7TuYfKopursbPqbR\n lUgGHSgys33Xt5Iv1i7IcQwbd+xV6jVLVhOjGDVxsa4I41vhXsqswWaIV Q==;", "X-IronPort-AV": [ "E=McAfee;i=\"6400,9594,10315\"; a=\"287630144\"", "E=Sophos;i=\"5.90,256,1643702400\"; d=\"scan'208\";a=\"287630144\"", "E=Sophos;i=\"5.90,256,1643702400\"; d=\"scan'208\";a=\"526847923\"" ], "From": "Kevin Liu <kevinx.liu@intel.com>", "To": "dev@dpdk.org", "Cc": "qiming.yang@intel.com, qi.z.zhang@intel.com, stevex.yang@intel.com,\n Kevin Liu <kevinx.liu@intel.com>", "Subject": "[PATCH v2 30/33] net/ice: add enable/disable queues for DCF large VF", "Date": "Wed, 13 Apr 2022 16:09:29 +0000", "Message-Id": "<20220413160932.2074781-31-kevinx.liu@intel.com>", "X-Mailer": "git-send-email 2.33.1", "In-Reply-To": "<20220413160932.2074781-1-kevinx.liu@intel.com>", "References": "<20220407105706.18889-1-kevinx.liu@intel.com>\n <20220413160932.2074781-1-kevinx.liu@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "The current virtchnl structure for enable/disable queues only supports\nmax 32 queue pairs. Use a new opcode and structure to indicate up to 256\nqueue pairs, in order to enable/disable queues in large VF case.\n\nSigned-off-by: Steve Yang <stevex.yang@intel.com>\nSigned-off-by: Kevin Liu <kevinx.liu@intel.com>\n---\n drivers/net/ice/ice_dcf.c | 99 +++++++++++++++++++++++++++++++-\n drivers/net/ice/ice_dcf.h | 5 ++\n drivers/net/ice/ice_dcf_ethdev.c | 26 +++++++--\n drivers/net/ice/ice_dcf_ethdev.h | 8 +--\n 4 files changed, 125 insertions(+), 13 deletions(-)", "diff": "diff --git a/drivers/net/ice/ice_dcf.c b/drivers/net/ice/ice_dcf.c\nindex 290f754049..23edfd09b1 100644\n--- a/drivers/net/ice/ice_dcf.c\n+++ b/drivers/net/ice/ice_dcf.c\n@@ -90,7 +90,6 @@ ice_dcf_recv_cmd_rsp_no_irq(struct ice_dcf_hw *hw, enum virtchnl_ops op,\n \t\t\t*rsp_msglen = event.msg_len;\n \n \t\treturn rte_le_to_cpu_32(event.desc.cookie_low);\n-\n again:\n \t\trte_delay_ms(ICE_DCF_ARQ_CHECK_TIME);\n \t} while (i++ < ICE_DCF_ARQ_MAX_RETRIES);\n@@ -896,7 +895,7 @@ ice_dcf_init_rss(struct ice_dcf_hw *hw)\n {\n \tstruct rte_eth_dev *dev = hw->eth_dev;\n \tstruct rte_eth_rss_conf *rss_conf;\n-\tuint8_t i, j, nb_q;\n+\tuint16_t i, j, nb_q;\n \tint ret;\n \n \trss_conf = &dev->data->dev_conf.rx_adv_conf.rss_conf;\n@@ -1075,6 +1074,12 @@ ice_dcf_request_queues(struct ice_dcf_hw *hw, uint16_t num)\n \t\treturn err;\n \t}\n \n+\t/* request queues succeeded, vf is resetting */\n+\tif (hw->resetting) {\n+\t\tPMD_DRV_LOG(INFO, \"vf is resetting\");\n+\t\treturn 0;\n+\t}\n+\n \t/* request additional queues failed, return available number */\n \tnum_queue_pairs = ((struct virtchnl_vf_res_request *)\n \t\t\t\targs.rsp_msgbuf)->num_queue_pairs;\n@@ -1185,7 +1190,8 @@ ice_dcf_config_irq_map_lv(struct ice_dcf_hw *hw,\n \targs.req_msg = (u8 *)map_info;\n \targs.req_msglen = len;\n \targs.rsp_msgbuf = hw->arq_buf;\n-\targs.req_msglen = ICE_DCF_AQ_BUF_SZ;\n+\targs.rsp_msglen = ICE_DCF_AQ_BUF_SZ;\n+\targs.rsp_buflen = ICE_DCF_AQ_BUF_SZ;\n \terr = ice_dcf_execute_virtchnl_cmd(hw, &args);\n \tif (err)\n \t\tPMD_DRV_LOG(ERR, \"fail to execute command OP_MAP_QUEUE_VECTOR\");\n@@ -1225,6 +1231,50 @@ ice_dcf_switch_queue(struct ice_dcf_hw *hw, uint16_t qid, bool rx, bool on)\n \treturn err;\n }\n \n+int\n+ice_dcf_switch_queue_lv(struct ice_dcf_hw *hw, uint16_t qid, bool rx, bool on)\n+{\n+\tstruct virtchnl_del_ena_dis_queues *queue_select;\n+\tstruct virtchnl_queue_chunk *queue_chunk;\n+\tstruct dcf_virtchnl_cmd args;\n+\tint err, len;\n+\n+\tlen = sizeof(struct virtchnl_del_ena_dis_queues);\n+\tqueue_select = rte_zmalloc(\"queue_select\", len, 0);\n+\tif (!queue_select)\n+\t\treturn -ENOMEM;\n+\n+\tqueue_chunk = queue_select->chunks.chunks;\n+\tqueue_select->chunks.num_chunks = 1;\n+\tqueue_select->vport_id = hw->vsi_res->vsi_id;\n+\n+\tif (rx) {\n+\t\tqueue_chunk->type = VIRTCHNL_QUEUE_TYPE_RX;\n+\t\tqueue_chunk->start_queue_id = qid;\n+\t\tqueue_chunk->num_queues = 1;\n+\t} else {\n+\t\tqueue_chunk->type = VIRTCHNL_QUEUE_TYPE_TX;\n+\t\tqueue_chunk->start_queue_id = qid;\n+\t\tqueue_chunk->num_queues = 1;\n+\t}\n+\n+\tif (on)\n+\t\targs.v_op = VIRTCHNL_OP_ENABLE_QUEUES_V2;\n+\telse\n+\t\targs.v_op = VIRTCHNL_OP_DISABLE_QUEUES_V2;\n+\targs.req_msg = (u8 *)queue_select;\n+\targs.req_msglen = len;\n+\targs.rsp_msgbuf = hw->arq_buf;\n+\targs.rsp_msglen = ICE_DCF_AQ_BUF_SZ;\n+\targs.rsp_buflen = ICE_DCF_AQ_BUF_SZ;\n+\terr = ice_dcf_execute_virtchnl_cmd(hw, &args);\n+\tif (err)\n+\t\tPMD_DRV_LOG(ERR, \"Failed to execute command of %s\",\n+\t\t\t on ? \"OP_ENABLE_QUEUES_V2\" : \"OP_DISABLE_QUEUES_V2\");\n+\trte_free(queue_select);\n+\treturn err;\n+}\n+\n int\n ice_dcf_disable_queues(struct ice_dcf_hw *hw)\n {\n@@ -1254,6 +1304,49 @@ ice_dcf_disable_queues(struct ice_dcf_hw *hw)\n \treturn err;\n }\n \n+int\n+ice_dcf_disable_queues_lv(struct ice_dcf_hw *hw)\n+{\n+\tstruct virtchnl_del_ena_dis_queues *queue_select;\n+\tstruct virtchnl_queue_chunk *queue_chunk;\n+\tstruct dcf_virtchnl_cmd args;\n+\tint err, len;\n+\n+\tlen = sizeof(struct virtchnl_del_ena_dis_queues) +\n+\t\t sizeof(struct virtchnl_queue_chunk) *\n+\t\t (ICE_DCF_RXTX_QUEUE_CHUNKS_NUM - 1);\n+\tqueue_select = rte_zmalloc(\"queue_select\", len, 0);\n+\tif (!queue_select)\n+\t\treturn -ENOMEM;\n+\n+\tqueue_chunk = queue_select->chunks.chunks;\n+\tqueue_select->chunks.num_chunks = ICE_DCF_RXTX_QUEUE_CHUNKS_NUM;\n+\tqueue_select->vport_id = hw->vsi_res->vsi_id;\n+\n+\tqueue_chunk[VIRTCHNL_QUEUE_TYPE_TX].type = VIRTCHNL_QUEUE_TYPE_TX;\n+\tqueue_chunk[VIRTCHNL_QUEUE_TYPE_TX].start_queue_id = 0;\n+\tqueue_chunk[VIRTCHNL_QUEUE_TYPE_TX].num_queues =\n+\t\t\t\t\thw->eth_dev->data->nb_tx_queues;\n+\n+\tqueue_chunk[VIRTCHNL_QUEUE_TYPE_RX].type = VIRTCHNL_QUEUE_TYPE_RX;\n+\tqueue_chunk[VIRTCHNL_QUEUE_TYPE_RX].start_queue_id = 0;\n+\tqueue_chunk[VIRTCHNL_QUEUE_TYPE_RX].num_queues =\n+\t\t\t\t\thw->eth_dev->data->nb_rx_queues;\n+\n+\targs.v_op = VIRTCHNL_OP_DISABLE_QUEUES_V2;\n+\targs.req_msg = (u8 *)queue_select;\n+\targs.req_msglen = len;\n+\targs.rsp_msgbuf = hw->arq_buf;\n+\targs.rsp_msglen = ICE_DCF_AQ_BUF_SZ;\n+\targs.rsp_buflen = ICE_DCF_AQ_BUF_SZ;\n+\terr = ice_dcf_execute_virtchnl_cmd(hw, &args);\n+\tif (err)\n+\t\tPMD_DRV_LOG(ERR,\n+\t\t\t \"Failed to execute command of OP_DISABLE_QUEUES_V2\");\n+\trte_free(queue_select);\n+\treturn err;\n+}\n+\n int\n ice_dcf_query_stats(struct ice_dcf_hw *hw,\n \t\t\t\t struct virtchnl_eth_stats *pstats)\ndiff --git a/drivers/net/ice/ice_dcf.h b/drivers/net/ice/ice_dcf.h\nindex ce57a687ab..78ab23aaa6 100644\n--- a/drivers/net/ice/ice_dcf.h\n+++ b/drivers/net/ice/ice_dcf.h\n@@ -15,6 +15,8 @@\n #include \"base/ice_type.h\"\n #include \"ice_logs.h\"\n \n+#define ICE_DCF_RXTX_QUEUE_CHUNKS_NUM 2\n+\n struct dcf_virtchnl_cmd {\n \tTAILQ_ENTRY(dcf_virtchnl_cmd) next;\n \n@@ -143,7 +145,10 @@ int ice_dcf_config_irq_map(struct ice_dcf_hw *hw);\n int ice_dcf_config_irq_map_lv(struct ice_dcf_hw *hw,\n \t\t\t uint16_t num, uint16_t index);\n int ice_dcf_switch_queue(struct ice_dcf_hw *hw, uint16_t qid, bool rx, bool on);\n+int ice_dcf_switch_queue_lv(struct ice_dcf_hw *hw,\n+\t\t\t uint16_t qid, bool rx, bool on);\n int ice_dcf_disable_queues(struct ice_dcf_hw *hw);\n+int ice_dcf_disable_queues_lv(struct ice_dcf_hw *hw);\n int ice_dcf_query_stats(struct ice_dcf_hw *hw,\n \t\t\tstruct virtchnl_eth_stats *pstats);\n int ice_dcf_add_del_all_mac_addr(struct ice_dcf_hw *hw,\ndiff --git a/drivers/net/ice/ice_dcf_ethdev.c b/drivers/net/ice/ice_dcf_ethdev.c\nindex 1ddba02ebb..e46c8405aa 100644\n--- a/drivers/net/ice/ice_dcf_ethdev.c\n+++ b/drivers/net/ice/ice_dcf_ethdev.c\n@@ -317,6 +317,7 @@ static int\n ice_dcf_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)\n {\n \tstruct ice_dcf_adapter *ad = dev->data->dev_private;\n+\tstruct ice_dcf_hw *dcf_hw = &ad->real_hw;\n \tstruct iavf_hw *hw = &ad->real_hw.avf;\n \tstruct ice_rx_queue *rxq;\n \tint err = 0;\n@@ -339,7 +340,11 @@ ice_dcf_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)\n \tIAVF_WRITE_FLUSH(hw);\n \n \t/* Ready to switch the queue on */\n-\terr = ice_dcf_switch_queue(&ad->real_hw, rx_queue_id, true, true);\n+\tif (!dcf_hw->lv_enabled)\n+\t\terr = ice_dcf_switch_queue(dcf_hw, rx_queue_id, true, true);\n+\telse\n+\t\terr = ice_dcf_switch_queue_lv(dcf_hw, rx_queue_id, true, true);\n+\n \tif (err) {\n \t\tPMD_DRV_LOG(ERR, \"Failed to switch RX queue %u on\",\n \t\t\t rx_queue_id);\n@@ -448,6 +453,7 @@ static int\n ice_dcf_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)\n {\n \tstruct ice_dcf_adapter *ad = dev->data->dev_private;\n+\tstruct ice_dcf_hw *dcf_hw = &ad->real_hw;\n \tstruct iavf_hw *hw = &ad->real_hw.avf;\n \tstruct ice_tx_queue *txq;\n \tint err = 0;\n@@ -463,7 +469,10 @@ ice_dcf_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)\n \tIAVF_WRITE_FLUSH(hw);\n \n \t/* Ready to switch the queue on */\n-\terr = ice_dcf_switch_queue(&ad->real_hw, tx_queue_id, false, true);\n+\tif (!dcf_hw->lv_enabled)\n+\t\terr = ice_dcf_switch_queue(dcf_hw, tx_queue_id, false, true);\n+\telse\n+\t\terr = ice_dcf_switch_queue_lv(dcf_hw, tx_queue_id, false, true);\n \n \tif (err) {\n \t\tPMD_DRV_LOG(ERR, \"Failed to switch TX queue %u on\",\n@@ -650,12 +659,17 @@ ice_dcf_stop_queues(struct rte_eth_dev *dev)\n \tstruct ice_dcf_hw *hw = &ad->real_hw;\n \tstruct ice_rx_queue *rxq;\n \tstruct ice_tx_queue *txq;\n-\tint ret, i;\n+\tint i;\n \n \t/* Stop All queues */\n-\tret = ice_dcf_disable_queues(hw);\n-\tif (ret)\n-\t\tPMD_DRV_LOG(WARNING, \"Fail to stop queues\");\n+\tif (!hw->lv_enabled) {\n+\t\tif (ice_dcf_disable_queues(hw))\n+\t\t\tPMD_DRV_LOG(WARNING, \"Fail to stop queues\");\n+\t} else {\n+\t\tif (ice_dcf_disable_queues_lv(hw))\n+\t\t\tPMD_DRV_LOG(WARNING,\n+\t\t\t\t \"Fail to stop queues for large VF\");\n+\t}\n \n \tfor (i = 0; i < dev->data->nb_tx_queues; i++) {\n \t\ttxq = dev->data->tx_queues[i];\ndiff --git a/drivers/net/ice/ice_dcf_ethdev.h b/drivers/net/ice/ice_dcf_ethdev.h\nindex 9ef524c97c..3f740e2c7b 100644\n--- a/drivers/net/ice/ice_dcf_ethdev.h\n+++ b/drivers/net/ice/ice_dcf_ethdev.h\n@@ -20,10 +20,10 @@\n #define ICE_DCF_ETH_OVERHEAD \\\n \t(RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + ICE_DCF_VLAN_TAG_SIZE * 2)\n #define ICE_DCF_ETH_MAX_LEN (RTE_ETHER_MTU + ICE_DCF_ETH_OVERHEAD)\n-#define ICE_DCF_MAX_NUM_QUEUES_DFLT 16\n-#define ICE_DCF_MAX_NUM_QUEUES_LV 256\n-#define ICE_DCF_CFG_Q_NUM_PER_BUF 32\n-#define ICE_DCF_IRQ_MAP_NUM_PER_BUF 128\n+#define ICE_DCF_MAX_NUM_QUEUES_DFLT 16\n+#define ICE_DCF_MAX_NUM_QUEUES_LV 256\n+#define ICE_DCF_CFG_Q_NUM_PER_BUF 32\n+#define ICE_DCF_IRQ_MAP_NUM_PER_BUF 128\n \n struct ice_dcf_queue {\n \tuint64_t dummy;\n", "prefixes": [ "v2", "30/33" ] }