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GET /api/patches/108056/?format=api
{ "id": 108056, "url": "https://patches.dpdk.org/api/patches/108056/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20220222193512.19292-5-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220222193512.19292-5-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220222193512.19292-5-ndabilpuram@marvell.com", "date": "2022-02-22T19:34:56", "name": "[v2,05/21] common/cnxk: use common SA init API for default options", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "68a40737a85ac4a4bbab9c3c2996bf9da4185f3e", "submitter": { "id": 1202, "url": "https://patches.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20220222193512.19292-5-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 21801, "url": "https://patches.dpdk.org/api/series/21801/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=21801", "date": "2022-02-22T19:34:52", "name": "[v2,01/21] common/cnxk: increase SMQ resource count", "version": 2, "mbox": "https://patches.dpdk.org/series/21801/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/108056/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/108056/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 0DBB6A034C;\n\tTue, 22 Feb 2022 20:35:52 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id E24A441160;\n\tTue, 22 Feb 2022 20:35:38 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 72A5841155\n for <dev@dpdk.org>; Tue, 22 Feb 2022 20:35:36 +0100 (CET)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id\n 21MIavgs019942;\n Tue, 22 Feb 2022 11:35:33 -0800", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3ecwaxar1r-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Tue, 22 Feb 2022 11:35:32 -0800", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Tue, 22 Feb 2022 11:35:31 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Tue, 22 Feb 2022 11:35:31 -0800", "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id F1DAE3F707B;\n Tue, 22 Feb 2022 11:35:27 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=Nbx06NVCE7OecLY+k5VwIiOuFHw3Iyc/V+4Q5CPwieY=;\n b=XkyKyYOIIZQJzeeJuhWhJtMRdbV1sZuhk8Akn0tWnDjhD+Ow7NFTx2aLkCPlRGDRbm48\n 8ppjFdMbx+2gHLXV8wYVsxTfN2t21mn7i4aQVjnlhaZcQiqo0SbJULBlD+ePdJ2z/ICx\n cYQ8XRT3wexIQmW1pQ3fOK8bN0Xgig2tAht3SGrd3rtMrZtbaDuFy4+z9UtePJHx0iBR\n X2dMAdS/YjmaDwx4Z/YVyuYVtDz7MGBrDHq+1plids8/ac74w1WdcL0toheUU/lPAMSH\n ZIb++UM6Hu7nkx/pmSbrdYJ2c0PIpmuzMcv+ct8gfbAzmEhpziIR5B9+64cAcQsoTnWJ qQ==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "<jerinj@marvell.com>, Nithin Dabilpuram <ndabilpuram@marvell.com>, \"Kiran\n Kumar K\" <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>,\n Satha Rao <skoteshwar@marvell.com>, Ray Kinsella <mdr@ashroe.eu>, \"Ankur\n Dwivedi\" <adwivedi@marvell.com>, Anoob Joseph <anoobj@marvell.com>,\n \"Tejasree Kondoj\" <ktejasree@marvell.com>", "CC": "<dev@dpdk.org>, Vidya Sagar Velumuri <vvelumuri@marvell.com>", "Subject": "[PATCH v2 05/21] common/cnxk: use common SA init API for default\n options", "Date": "Wed, 23 Feb 2022 01:04:56 +0530", "Message-ID": "<20220222193512.19292-5-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.8.4", "In-Reply-To": "<20220222193512.19292-1-ndabilpuram@marvell.com>", "References": "<20220207072932.22409-1-ndabilpuram@marvell.com>\n <20220222193512.19292-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-GUID": "YDxtCqQHpHh7Hu0Iv4egywS-k5VJv_sK", "X-Proofpoint-ORIG-GUID": "YDxtCqQHpHh7Hu0Iv4egywS-k5VJv_sK", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513\n definitions=2022-02-22_06,2022-02-21_02,2021-12-02_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Vidya Sagar Velumuri <vvelumuri@marvell.com>\n\nUse common SA init API before doing initialization based on\nparams. This is better so that all HW specific default values\nare at single place for lookaside and inline.\n\nSigned-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\n---\n drivers/common/cnxk/cnxk_security.c | 21 +++++++-----------\n drivers/common/cnxk/cnxk_security.h | 3 ++-\n drivers/common/cnxk/meson.build | 1 +\n drivers/common/cnxk/roc_ie_ot.c | 41 +++++++++++++++++++++++++++++++++++\n drivers/common/cnxk/roc_ie_ot.h | 11 ++++++----\n drivers/common/cnxk/roc_nix_inl.c | 31 ++------------------------\n drivers/common/cnxk/roc_nix_inl.h | 2 --\n drivers/common/cnxk/roc_nix_inl_dev.c | 2 +-\n drivers/common/cnxk/version.map | 4 ++--\n drivers/crypto/cnxk/cn10k_ipsec.c | 3 ++-\n drivers/net/cnxk/cn10k_ethdev_sec.c | 7 +++---\n 11 files changed, 70 insertions(+), 56 deletions(-)\n create mode 100644 drivers/common/cnxk/roc_ie_ot.c", "diff": "diff --git a/drivers/common/cnxk/cnxk_security.c b/drivers/common/cnxk/cnxk_security.c\nindex 6ddf589..d6006d3 100644\n--- a/drivers/common/cnxk/cnxk_security.c\n+++ b/drivers/common/cnxk/cnxk_security.c\n@@ -304,13 +304,17 @@ ot_ipsec_inb_tunnel_hdr_fill(struct roc_ot_ipsec_inb_sa *sa,\n int\n cnxk_ot_ipsec_inb_sa_fill(struct roc_ot_ipsec_inb_sa *sa,\n \t\t\t struct rte_security_ipsec_xform *ipsec_xfrm,\n-\t\t\t struct rte_crypto_sym_xform *crypto_xfrm)\n+\t\t\t struct rte_crypto_sym_xform *crypto_xfrm,\n+\t\t\t bool is_inline)\n {\n \tunion roc_ot_ipsec_sa_word2 w2;\n \tuint32_t replay_win_sz;\n \tsize_t offset;\n \tint rc;\n \n+\t/* Initialize the SA */\n+\troc_ot_ipsec_inb_sa_init(sa, is_inline);\n+\n \tw2.u64 = 0;\n \trc = ot_ipsec_sa_common_param_fill(&w2, sa->cipher_key, sa->w8.s.salt,\n \t\t\t\t\t sa->hmac_opad_ipad, ipsec_xfrm,\n@@ -335,13 +339,6 @@ cnxk_ot_ipsec_inb_sa_fill(struct roc_ot_ipsec_inb_sa *sa,\n \tif (rc)\n \t\treturn rc;\n \n-\t/* Default options for pkt_out and pkt_fmt are with\n-\t * second pass meta and no defrag.\n-\t */\n-\tsa->w0.s.pkt_format = ROC_IE_OT_SA_PKT_FMT_META;\n-\tsa->w0.s.pkt_output = ROC_IE_OT_SA_PKT_OUTPUT_HW_BASED_DEFRAG;\n-\tsa->w0.s.pkind = ROC_OT_CPT_META_PKIND;\n-\n \t/* ESN */\n \tsa->w2.s.esn_en = !!ipsec_xfrm->options.esn;\n \tif (ipsec_xfrm->options.udp_encap) {\n@@ -390,11 +387,6 @@ cnxk_ot_ipsec_inb_sa_fill(struct roc_ot_ipsec_inb_sa *sa,\n \t\tsa->w0.s.hard_life_dec = 1;\n \t}\n \n-\t/* There are two words of CPT_CTX_HW_S for ucode to skip */\n-\tsa->w0.s.ctx_hdr_size = 1;\n-\tsa->w0.s.aop_valid = 1;\n-\tsa->w0.s.et_ovrwr = 1;\n-\n \trte_wmb();\n \n \t/* Enable SA */\n@@ -412,6 +404,9 @@ cnxk_ot_ipsec_outb_sa_fill(struct roc_ot_ipsec_outb_sa *sa,\n \tsize_t offset;\n \tint rc;\n \n+\t/* Initialize the SA */\n+\troc_ot_ipsec_outb_sa_init(sa);\n+\n \tw2.u64 = 0;\n \trc = ot_ipsec_sa_common_param_fill(&w2, sa->cipher_key, sa->iv.s.salt,\n \t\t\t\t\t sa->hmac_opad_ipad, ipsec_xfrm,\ndiff --git a/drivers/common/cnxk/cnxk_security.h b/drivers/common/cnxk/cnxk_security.h\nindex db97887..02cdad2 100644\n--- a/drivers/common/cnxk/cnxk_security.h\n+++ b/drivers/common/cnxk/cnxk_security.h\n@@ -38,7 +38,8 @@ cnxk_ipsec_outb_roundup_byte(enum rte_crypto_cipher_algorithm c_algo,\n int __roc_api\n cnxk_ot_ipsec_inb_sa_fill(struct roc_ot_ipsec_inb_sa *sa,\n \t\t\t struct rte_security_ipsec_xform *ipsec_xfrm,\n-\t\t\t struct rte_crypto_sym_xform *crypto_xfrm);\n+\t\t\t struct rte_crypto_sym_xform *crypto_xfrm,\n+\t\t\t bool is_inline);\n int __roc_api\n cnxk_ot_ipsec_outb_sa_fill(struct roc_ot_ipsec_outb_sa *sa,\n \t\t\t struct rte_security_ipsec_xform *ipsec_xfrm,\ndiff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build\nindex f0721ef..2834846 100644\n--- a/drivers/common/cnxk/meson.build\n+++ b/drivers/common/cnxk/meson.build\n@@ -24,6 +24,7 @@ sources = files(\n 'roc_hash.c',\n 'roc_idev.c',\n 'roc_irq.c',\n+ 'roc_ie_ot.c',\n 'roc_mbox.c',\n 'roc_model.c',\n 'roc_nix.c',\ndiff --git a/drivers/common/cnxk/roc_ie_ot.c b/drivers/common/cnxk/roc_ie_ot.c\nnew file mode 100644\nindex 0000000..1ea7bfd\n--- /dev/null\n+++ b/drivers/common/cnxk/roc_ie_ot.c\n@@ -0,0 +1,41 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2022 Marvell.\n+ */\n+\n+#include \"roc_api.h\"\n+#include \"roc_priv.h\"\n+\n+void\n+roc_ot_ipsec_inb_sa_init(struct roc_ot_ipsec_inb_sa *sa, bool is_inline)\n+{\n+\tsize_t offset;\n+\n+\tmemset(sa, 0, sizeof(struct roc_ot_ipsec_inb_sa));\n+\n+\tif (is_inline) {\n+\t\tsa->w0.s.pkt_output = ROC_IE_OT_SA_PKT_OUTPUT_NO_FRAG;\n+\t\tsa->w0.s.pkt_format = ROC_IE_OT_SA_PKT_FMT_META;\n+\t\tsa->w0.s.pkind = ROC_IE_OT_CPT_PKIND;\n+\t\tsa->w0.s.et_ovrwr = 1;\n+\t}\n+\n+\toffset = offsetof(struct roc_ot_ipsec_inb_sa, ctx);\n+\tsa->w0.s.hw_ctx_off = offset / ROC_CTX_UNIT_8B;\n+\tsa->w0.s.ctx_push_size = sa->w0.s.hw_ctx_off + 1;\n+\tsa->w0.s.ctx_size = ROC_IE_OT_CTX_ILEN;\n+\tsa->w0.s.ctx_hdr_size = ROC_IE_OT_SA_CTX_HDR_SIZE;\n+\tsa->w0.s.aop_valid = 1;\n+}\n+\n+void\n+roc_ot_ipsec_outb_sa_init(struct roc_ot_ipsec_outb_sa *sa)\n+{\n+\tsize_t offset;\n+\n+\tmemset(sa, 0, sizeof(struct roc_ot_ipsec_outb_sa));\n+\n+\toffset = offsetof(struct roc_ot_ipsec_outb_sa, ctx);\n+\tsa->w0.s.ctx_push_size = (offset / ROC_CTX_UNIT_8B) + 1;\n+\tsa->w0.s.ctx_size = ROC_IE_OT_CTX_ILEN;\n+\tsa->w0.s.aop_valid = 1;\n+}\ndiff --git a/drivers/common/cnxk/roc_ie_ot.h b/drivers/common/cnxk/roc_ie_ot.h\nindex c502c79..b5d4f4a 100644\n--- a/drivers/common/cnxk/roc_ie_ot.h\n+++ b/drivers/common/cnxk/roc_ie_ot.h\n@@ -1,13 +1,10 @@\n /* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(C) 2021 Marvell.\n+ * Copyright(C) 2022 Marvell.\n */\n \n #ifndef __ROC_IE_OT_H__\n #define __ROC_IE_OT_H__\n \n-/* PKIND to be used for CPT Meta parsing */\n-#define ROC_OT_CPT_META_PKIND 58\n-\n /* CN10K IPSEC opcodes */\n #define ROC_IE_OT_MAJOR_OP_PROCESS_OUTBOUND_IPSEC 0x28UL\n #define ROC_IE_OT_MAJOR_OP_PROCESS_INBOUND_IPSEC 0x29UL\n@@ -16,6 +13,9 @@\n #define ROC_IE_OT_MINOR_OP_WRITE_SA 0x09UL\n \n #define ROC_IE_OT_CTX_ILEN 2\n+/* PKIND to be used for CPT Meta parsing */\n+#define ROC_IE_OT_CPT_PKIND\t 58\n+#define ROC_IE_OT_SA_CTX_HDR_SIZE 1\n \n enum roc_ie_ot_ucc_ipsec {\n \tROC_IE_OT_UCC_SUCCESS = 0x00,\n@@ -532,4 +532,7 @@ PLT_STATIC_ASSERT(offsetof(struct roc_ot_ipsec_outb_sa, hmac_opad_ipad) ==\n PLT_STATIC_ASSERT(offsetof(struct roc_ot_ipsec_outb_sa, ctx) ==\n \t\t 31 * sizeof(uint64_t));\n \n+void __roc_api roc_ot_ipsec_inb_sa_init(struct roc_ot_ipsec_inb_sa *sa,\n+\t\t\t\t\tbool is_inline);\n+void __roc_api roc_ot_ipsec_outb_sa_init(struct roc_ot_ipsec_outb_sa *sa);\n #endif /* __ROC_IE_OT_H__ */\ndiff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_nix_inl.c\nindex 356d11d..f57f1a4 100644\n--- a/drivers/common/cnxk/roc_nix_inl.c\n+++ b/drivers/common/cnxk/roc_nix_inl.c\n@@ -43,7 +43,7 @@ nix_inl_inb_sa_tbl_setup(struct roc_nix *roc_nix)\n \tif (roc_model_is_cn10k()) {\n \t\tfor (i = 0; i < ipsec_in_max_spi; i++) {\n \t\t\tsa = ((uint8_t *)nix->inb_sa_base) + (i * inb_sa_sz);\n-\t\t\troc_nix_inl_inb_sa_init(sa);\n+\t\t\troc_ot_ipsec_inb_sa_init(sa, true);\n \t\t}\n \t}\n \n@@ -401,7 +401,7 @@ roc_nix_inl_outb_init(struct roc_nix *roc_nix)\n \tif (roc_model_is_cn10k()) {\n \t\tfor (i = 0; i < roc_nix->ipsec_out_max_sa; i++) {\n \t\t\tsa = ((uint8_t *)sa_base) + (i * sa_sz);\n-\t\t\troc_nix_inl_outb_sa_init(sa);\n+\t\t\troc_ot_ipsec_outb_sa_init(sa);\n \t\t}\n \t}\n \tnix->outb_sa_base = sa_base;\n@@ -867,33 +867,6 @@ roc_nix_inl_ctx_write(struct roc_nix *roc_nix, void *sa_dptr, void *sa_cptr,\n }\n \n void\n-roc_nix_inl_inb_sa_init(struct roc_ot_ipsec_inb_sa *sa)\n-{\n-\tsize_t offset;\n-\n-\tmemset(sa, 0, sizeof(struct roc_ot_ipsec_inb_sa));\n-\n-\toffset = offsetof(struct roc_ot_ipsec_inb_sa, ctx);\n-\tsa->w0.s.hw_ctx_off = offset / ROC_CTX_UNIT_8B;\n-\tsa->w0.s.ctx_push_size = sa->w0.s.hw_ctx_off + 1;\n-\tsa->w0.s.ctx_size = ROC_IE_OT_CTX_ILEN;\n-\tsa->w0.s.aop_valid = 1;\n-}\n-\n-void\n-roc_nix_inl_outb_sa_init(struct roc_ot_ipsec_outb_sa *sa)\n-{\n-\tsize_t offset;\n-\n-\tmemset(sa, 0, sizeof(struct roc_ot_ipsec_outb_sa));\n-\n-\toffset = offsetof(struct roc_ot_ipsec_outb_sa, ctx);\n-\tsa->w0.s.ctx_push_size = (offset / ROC_CTX_UNIT_8B);\n-\tsa->w0.s.ctx_size = ROC_IE_OT_CTX_ILEN;\n-\tsa->w0.s.aop_valid = 1;\n-}\n-\n-void\n roc_nix_inl_dev_lock(void)\n {\n \tstruct idev_cfg *idev = idev_get_cfg();\ndiff --git a/drivers/common/cnxk/roc_nix_inl.h b/drivers/common/cnxk/roc_nix_inl.h\nindex ceeccab..224aaba 100644\n--- a/drivers/common/cnxk/roc_nix_inl.h\n+++ b/drivers/common/cnxk/roc_nix_inl.h\n@@ -171,7 +171,5 @@ int __roc_api roc_nix_inl_sa_sync(struct roc_nix *roc_nix, void *sa, bool inb,\n \t\t\t\t enum roc_nix_inl_sa_sync_op op);\n int __roc_api roc_nix_inl_ctx_write(struct roc_nix *roc_nix, void *sa_dptr,\n \t\t\t\t void *sa_cptr, bool inb, uint16_t sa_len);\n-void __roc_api roc_nix_inl_inb_sa_init(struct roc_ot_ipsec_inb_sa *sa);\n-void __roc_api roc_nix_inl_outb_sa_init(struct roc_ot_ipsec_outb_sa *sa);\n \n #endif /* _ROC_NIX_INL_H_ */\ndiff --git a/drivers/common/cnxk/roc_nix_inl_dev.c b/drivers/common/cnxk/roc_nix_inl_dev.c\nindex 12160e9..9dc0a62 100644\n--- a/drivers/common/cnxk/roc_nix_inl_dev.c\n+++ b/drivers/common/cnxk/roc_nix_inl_dev.c\n@@ -397,7 +397,7 @@ nix_inl_nix_setup(struct nix_inl_dev *inl_dev)\n \t\tfor (i = 0; i < ipsec_in_max_spi; i++) {\n \t\t\tsa = ((uint8_t *)inl_dev->inb_sa_base) +\n \t\t\t (i * inb_sa_sz);\n-\t\t\troc_nix_inl_inb_sa_init(sa);\n+\t\t\troc_ot_ipsec_inb_sa_init(sa, true);\n \t\t}\n \t}\n \t/* Setup device specific inb SA table */\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex 464df44..2ce6e2b 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -158,8 +158,6 @@ INTERNAL {\n \troc_nix_inl_sa_sync;\n \troc_nix_inl_ctx_write;\n \troc_nix_inl_dev_pffunc_get;\n-\troc_nix_inl_inb_sa_init;\n-\troc_nix_inl_outb_sa_init;\n \troc_nix_cpt_ctx_cache_sync;\n \troc_nix_is_lbk;\n \troc_nix_is_pf;\n@@ -324,6 +322,8 @@ INTERNAL {\n \troc_npc_mcam_read_counter;\n \troc_npc_profile_name_get;\n \troc_npc_validate_portid_action;\n+\troc_ot_ipsec_inb_sa_init;\n+\troc_ot_ipsec_outb_sa_init;\n \troc_plt_init;\n \troc_plt_init_cb_register;\n \troc_sso_dev_fini;\ndiff --git a/drivers/crypto/cnxk/cn10k_ipsec.c b/drivers/crypto/cnxk/cn10k_ipsec.c\nindex c95c57a..847e1d0 100644\n--- a/drivers/crypto/cnxk/cn10k_ipsec.c\n+++ b/drivers/crypto/cnxk/cn10k_ipsec.c\n@@ -180,7 +180,8 @@ cn10k_ipsec_inb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf,\n \t}\n \n \t/* Translate security parameters to SA */\n-\tret = cnxk_ot_ipsec_inb_sa_fill(sa_dptr, ipsec_xfrm, crypto_xfrm);\n+\tret = cnxk_ot_ipsec_inb_sa_fill(sa_dptr, ipsec_xfrm, crypto_xfrm,\n+\t\t\t\t\tfalse);\n \tif (ret) {\n \t\tplt_err(\"Could not fill inbound session parameters\");\n \t\tgoto sa_dptr_free;\ndiff --git a/drivers/net/cnxk/cn10k_ethdev_sec.c b/drivers/net/cnxk/cn10k_ethdev_sec.c\nindex 12cec0a..6fbf444 100644\n--- a/drivers/net/cnxk/cn10k_ethdev_sec.c\n+++ b/drivers/net/cnxk/cn10k_ethdev_sec.c\n@@ -319,7 +319,8 @@ cn10k_eth_sec_session_create(void *device,\n \t\tmemset(inb_sa_dptr, 0, sizeof(struct roc_ot_ipsec_inb_sa));\n \n \t\t/* Fill inbound sa params */\n-\t\trc = cnxk_ot_ipsec_inb_sa_fill(inb_sa_dptr, ipsec, crypto);\n+\t\trc = cnxk_ot_ipsec_inb_sa_fill(inb_sa_dptr, ipsec, crypto,\n+\t\t\t\t\t true);\n \t\tif (rc) {\n \t\t\tsnprintf(tbuf, sizeof(tbuf),\n \t\t\t\t \"Failed to init inbound sa, rc=%d\", rc);\n@@ -464,7 +465,7 @@ cn10k_eth_sec_session_destroy(void *device, struct rte_security_session *sess)\n \tif (eth_sec->inb) {\n \t\t/* Disable SA */\n \t\tsa_dptr = dev->inb.sa_dptr;\n-\t\troc_nix_inl_inb_sa_init(sa_dptr);\n+\t\troc_ot_ipsec_inb_sa_init(sa_dptr, true);\n \n \t\troc_nix_inl_ctx_write(&dev->nix, sa_dptr, eth_sec->sa,\n \t\t\t\t eth_sec->inb,\n@@ -474,7 +475,7 @@ cn10k_eth_sec_session_destroy(void *device, struct rte_security_session *sess)\n \t} else {\n \t\t/* Disable SA */\n \t\tsa_dptr = dev->outb.sa_dptr;\n-\t\troc_nix_inl_outb_sa_init(sa_dptr);\n+\t\troc_ot_ipsec_outb_sa_init(sa_dptr);\n \n \t\troc_nix_inl_ctx_write(&dev->nix, sa_dptr, eth_sec->sa,\n \t\t\t\t eth_sec->inb,\n", "prefixes": [ "v2", "05/21" ] }