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GET /api/patches/107889/?format=api
{ "id": 107889, "url": "https://patches.dpdk.org/api/patches/107889/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20220221092121.2145802-3-jiawenwu@trustnetic.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220221092121.2145802-3-jiawenwu@trustnetic.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220221092121.2145802-3-jiawenwu@trustnetic.com", "date": "2022-02-21T09:21:21", "name": "[2/2] net/txgbe: fix debug log", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "0ceaef2843bbbcb4714b17796656012c6a331bb8", "submitter": { "id": 1932, "url": "https://patches.dpdk.org/api/people/1932/?format=api", "name": "Jiawen Wu", "email": "jiawenwu@trustnetic.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20220221092121.2145802-3-jiawenwu@trustnetic.com/mbox/", "series": [ { "id": 21761, "url": "https://patches.dpdk.org/api/series/21761/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=21761", "date": "2022-02-21T09:21:19", "name": "Wangxun log fixes", "version": 1, "mbox": "https://patches.dpdk.org/series/21761/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/107889/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/107889/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 680ADA034E;\n\tMon, 21 Feb 2022 10:15:03 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 5E5414114B;\n\tMon, 21 Feb 2022 10:14:56 +0100 (CET)", "from smtpbg153.qq.com (smtpbg153.qq.com [13.245.218.24])\n by mails.dpdk.org (Postfix) with ESMTP id DFD694114B\n for <dev@dpdk.org>; Mon, 21 Feb 2022 10:14:53 +0100 (CET)", "from wxdbg.localdomain.com (unknown [183.129.236.74])\n by bizesmtp.qq.com (ESMTP) with\n id ; Mon, 21 Feb 2022 17:14:43 +0800 (CST)" ], "X-QQ-mid": "bizesmtp67t1645434884t056189d", "X-QQ-SSF": "01400000002000F0M000B00A0000000", "X-QQ-FEAT": "Lg5IqoGaTUjium7vTKrt0U9/z8GnKa72uIOa7UH+tymUB2+dozV2onqgNBl7+\n kX7kIdOn1xVxOQG6aTymNy8PmZT4L9bKKeGtdWGXd3RcC2EfA3Ifo488leDXeGPYE5cMJ84\n 31YXw211LJaw4V+ev2uazfeTi7s1025yUzfz5wzGEbIYewdcX33q25mSqg5pxZJvy5SE/lU\n S4eUIfKvQ12CWi8GycxEJQ/u893EBYr5qM0I837/Hd7M56KJf1HBNB5kgzVp1NZh9cZG7NB\n jLosowkHagSJ7Fs2YdKVKXfFh6bLVI513mk83Cu6jjrL1KlrSsXJGVpAvjnU6dGbYWSkaLA\n 4BHsuG4VRSmHIS3iaMNRwdFhp0ZPUq+ADiGgP2jr+TSnE65edQ=", "X-QQ-GoodBg": "2", "From": "Jiawen Wu <jiawenwu@trustnetic.com>", "To": "dev@dpdk.org", "Cc": "Jiawen Wu <jiawenwu@trustnetic.com>,\n\tstable@dpdk.org", "Subject": "[PATCH 2/2] net/txgbe: fix debug log", "Date": "Mon, 21 Feb 2022 17:21:21 +0800", "Message-Id": "<20220221092121.2145802-3-jiawenwu@trustnetic.com>", "X-Mailer": "git-send-email 2.27.0", "In-Reply-To": "<20220221092121.2145802-1-jiawenwu@trustnetic.com>", "References": "<20220221092121.2145802-1-jiawenwu@trustnetic.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-QQ-SENDSIZE": "520", "Feedback-ID": "bizesmtp:trustnetic.com:qybgforeign:qybgforeign5", "X-QQ-Bgrelay": "1", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Remove 'DEBUGFUNC' due to too many invalid debug log prints, unify the\nDEBUG level macros.\n\nFixes: 7dc117068a7c (\"net/txgbe: support probe and remove\")\nCc: stable@dpdk.org\n\nSigned-off-by: Jiawen Wu <jiawenwu@trustnetic.com>\n---\n drivers/net/txgbe/base/txgbe_eeprom.c | 37 ++---\n drivers/net/txgbe/base/txgbe_hw.c | 196 ++++++--------------------\n drivers/net/txgbe/base/txgbe_mbx.c | 38 -----\n drivers/net/txgbe/base/txgbe_mng.c | 21 +--\n drivers/net/txgbe/base/txgbe_phy.c | 84 ++---------\n drivers/net/txgbe/base/txgbe_vf.c | 12 +-\n drivers/net/txgbe/txgbe_logs.h | 7 +-\n 7 files changed, 74 insertions(+), 321 deletions(-)", "diff": "diff --git a/drivers/net/txgbe/base/txgbe_eeprom.c b/drivers/net/txgbe/base/txgbe_eeprom.c\nindex 72901cd0b0..1ec7ff7e0d 100644\n--- a/drivers/net/txgbe/base/txgbe_eeprom.c\n+++ b/drivers/net/txgbe/base/txgbe_eeprom.c\n@@ -21,8 +21,6 @@ s32 txgbe_init_eeprom_params(struct txgbe_hw *hw)\n \tu16 eeprom_size;\n \tint err = 0;\n \n-\tDEBUGFUNC(\"txgbe_init_eeprom_params\");\n-\n \tif (eeprom->type != txgbe_eeprom_unknown)\n \t\treturn 0;\n \n@@ -54,12 +52,12 @@ s32 txgbe_init_eeprom_params(struct txgbe_hw *hw)\n \n \terr = eeprom->read32(hw, TXGBE_SW_REGION_PTR << 1, &eeprom->sw_addr);\n \tif (err) {\n-\t\tDEBUGOUT(\"EEPROM read failed.\\n\");\n+\t\tDEBUGOUT(\"EEPROM read failed.\");\n \t\treturn err;\n \t}\n \n \tDEBUGOUT(\"eeprom params: type = %d, size = %d, address bits: \"\n-\t\t \"%d %d\\n\", eeprom->type, eeprom->word_size,\n+\t\t \"%d %d\", eeprom->type, eeprom->word_size,\n \t\t eeprom->address_bits, eeprom->sw_addr);\n \n \treturn 0;\n@@ -78,9 +76,6 @@ s32 txgbe_get_eeprom_semaphore(struct txgbe_hw *hw)\n \tu32 i;\n \tu32 swsm;\n \n-\tDEBUGFUNC(\"txgbe_get_eeprom_semaphore\");\n-\n-\n \t/* Get SMBI software semaphore between device drivers first */\n \tfor (i = 0; i < timeout; i++) {\n \t\t/*\n@@ -97,7 +92,7 @@ s32 txgbe_get_eeprom_semaphore(struct txgbe_hw *hw)\n \n \tif (i == timeout) {\n \t\tDEBUGOUT(\"Driver can't access the eeprom - SMBI Semaphore \"\n-\t\t\t \"not granted.\\n\");\n+\t\t\t \"not granted.\");\n \t\t/*\n \t\t * this release is particularly important because our attempts\n \t\t * above to get the semaphore may have succeeded, and if there\n@@ -140,13 +135,13 @@ s32 txgbe_get_eeprom_semaphore(struct txgbe_hw *hw)\n \t\t * was not granted because we don't have access to the EEPROM\n \t\t */\n \t\tif (i >= timeout) {\n-\t\t\tDEBUGOUT(\"SWESMBI Software EEPROM semaphore not granted.\\n\");\n+\t\t\tDEBUGOUT(\"SWESMBI Software EEPROM semaphore not granted.\");\n \t\t\ttxgbe_release_eeprom_semaphore(hw);\n \t\t\tstatus = TXGBE_ERR_EEPROM;\n \t\t}\n \t} else {\n \t\tDEBUGOUT(\"Software semaphore SMBI between device drivers \"\n-\t\t\t \"not granted.\\n\");\n+\t\t\t \"not granted.\");\n \t}\n \n \treturn status;\n@@ -160,8 +155,6 @@ s32 txgbe_get_eeprom_semaphore(struct txgbe_hw *hw)\n **/\n void txgbe_release_eeprom_semaphore(struct txgbe_hw *hw)\n {\n-\tDEBUGFUNC(\"txgbe_release_eeprom_semaphore\");\n-\n \twr32m(hw, TXGBE_MNGSWSYNC, TXGBE_MNGSWSYNC_REQ, 0);\n \twr32m(hw, TXGBE_SWSEM, TXGBE_SWSEM_PF, 0);\n \ttxgbe_flush(hw);\n@@ -290,8 +283,6 @@ s32 txgbe_ee_write16(struct txgbe_hw *hw, u32 offset,\n \tu32 addr = (offset << 1);\n \tint err;\n \n-\tDEBUGFUNC(\"\\n\");\n-\n \terr = hw->mac.acquire_swfw_sync(hw, mask);\n \tif (err)\n \t\treturn err;\n@@ -348,8 +339,6 @@ s32 txgbe_ee_writew_sw(struct txgbe_hw *hw, u32 offset,\n \tu32 addr = hw->rom.sw_addr + (offset << 1);\n \tint err;\n \n-\tDEBUGFUNC(\"\\n\");\n-\n \terr = hw->mac.acquire_swfw_sync(hw, mask);\n \tif (err)\n \t\treturn err;\n@@ -399,11 +388,9 @@ s32 txgbe_calc_eeprom_checksum(struct txgbe_hw *hw)\n \tint err;\n \tu16 buffer[BUFF_SIZE];\n \n-\tDEBUGFUNC(\"txgbe_calc_eeprom_checksum\");\n-\n \terr = hw->rom.readw_sw(hw, TXGBE_EEPROM_CHECKSUM, &read_checksum);\n \tif (err) {\n-\t\tDEBUGOUT(\"EEPROM read failed\\n\");\n+\t\tDEBUGOUT(\"EEPROM read failed\");\n \t\treturn err;\n \t}\n \n@@ -437,15 +424,13 @@ s32 txgbe_validate_eeprom_checksum(struct txgbe_hw *hw,\n \tu16 read_checksum = 0;\n \tint err;\n \n-\tDEBUGFUNC(\"txgbe_validate_eeprom_checksum\");\n-\n \t/* Read the first word from the EEPROM. If this times out or fails, do\n \t * not continue or we could be in for a very long wait while every\n \t * EEPROM read fails\n \t */\n \terr = hw->rom.read16(hw, 0, &checksum);\n \tif (err) {\n-\t\tDEBUGOUT(\"EEPROM read failed\\n\");\n+\t\tDEBUGOUT(\"EEPROM read failed\");\n \t\treturn err;\n \t}\n \n@@ -457,7 +442,7 @@ s32 txgbe_validate_eeprom_checksum(struct txgbe_hw *hw,\n \n \terr = hw->rom.readw_sw(hw, TXGBE_EEPROM_CHECKSUM, &read_checksum);\n \tif (err) {\n-\t\tDEBUGOUT(\"EEPROM read failed\\n\");\n+\t\tDEBUGOUT(\"EEPROM read failed\");\n \t\treturn err;\n \t}\n \n@@ -466,7 +451,7 @@ s32 txgbe_validate_eeprom_checksum(struct txgbe_hw *hw,\n \t */\n \tif (read_checksum != checksum) {\n \t\terr = TXGBE_ERR_EEPROM_CHECKSUM;\n-\t\tDEBUGOUT(\"EEPROM checksum error\\n\");\n+\t\tDEBUGOUT(\"EEPROM checksum error\");\n \t}\n \n \t/* If the user cares, return the calculated checksum */\n@@ -485,15 +470,13 @@ s32 txgbe_update_eeprom_checksum(struct txgbe_hw *hw)\n \ts32 status;\n \tu16 checksum;\n \n-\tDEBUGFUNC(\"txgbe_update_eeprom_checksum\");\n-\n \t/* Read the first word from the EEPROM. If this times out or fails, do\n \t * not continue or we could be in for a very long wait while every\n \t * EEPROM read fails\n \t */\n \tstatus = hw->rom.read16(hw, 0, &checksum);\n \tif (status) {\n-\t\tDEBUGOUT(\"EEPROM read failed\\n\");\n+\t\tDEBUGOUT(\"EEPROM read failed\");\n \t\treturn status;\n \t}\n \ndiff --git a/drivers/net/txgbe/base/txgbe_hw.c b/drivers/net/txgbe/base/txgbe_hw.c\nindex db8ffe61a4..eaec5b7f8c 100644\n--- a/drivers/net/txgbe/base/txgbe_hw.c\n+++ b/drivers/net/txgbe/base/txgbe_hw.c\n@@ -42,8 +42,6 @@ bool txgbe_device_supports_autoneg_fc(struct txgbe_hw *hw)\n \tu32 speed;\n \tbool link_up;\n \n-\tDEBUGFUNC(\"txgbe_device_supports_autoneg_fc\");\n-\n \tswitch (hw->phy.media_type) {\n \tcase txgbe_media_type_fiber_qsfp:\n \tcase txgbe_media_type_fiber:\n@@ -93,11 +91,9 @@ s32 txgbe_setup_fc(struct txgbe_hw *hw)\n \tu32 value = 0;\n \tu64 reg_bp = 0;\n \n-\tDEBUGFUNC(\"txgbe_setup_fc\");\n-\n \t/* Validate the requested mode */\n \tif (hw->fc.strict_ieee && hw->fc.requested_mode == txgbe_fc_rx_pause) {\n-\t\tDEBUGOUT(\"txgbe_fc_rx_pause not valid in strict IEEE mode\\n\");\n+\t\tDEBUGOUT(\"txgbe_fc_rx_pause not valid in strict IEEE mode\");\n \t\terr = TXGBE_ERR_INVALID_LINK_SETTINGS;\n \t\tgoto out;\n \t}\n@@ -149,7 +145,7 @@ s32 txgbe_setup_fc(struct txgbe_hw *hw)\n \t\t\tSR_AN_MMD_ADV_REG1_PAUSE_ASM;\n \t\tbreak;\n \tdefault:\n-\t\tDEBUGOUT(\"Flow control param set incorrectly\\n\");\n+\t\tDEBUGOUT(\"Flow control param set incorrectly\");\n \t\terr = TXGBE_ERR_CONFIG;\n \t\tgoto out;\n \t}\n@@ -180,7 +176,7 @@ s32 txgbe_setup_fc(struct txgbe_hw *hw)\n \t\t\t\t TXGBE_MD_DEV_AUTO_NEG, reg_cu);\n \t}\n \n-\tDEBUGOUT(\"Set up FC; reg = 0x%08X\\n\", reg);\n+\tDEBUGOUT(\"Set up FC; reg = 0x%08X\", reg);\n out:\n \treturn err;\n }\n@@ -199,8 +195,6 @@ s32 txgbe_start_hw(struct txgbe_hw *hw)\n \ts32 err;\n \tu16 device_caps;\n \n-\tDEBUGFUNC(\"txgbe_start_hw\");\n-\n \t/* Set the media type */\n \thw->phy.media_type = hw->phy.get_media_type(hw);\n \n@@ -213,7 +207,7 @@ s32 txgbe_start_hw(struct txgbe_hw *hw)\n \t/* Setup flow control */\n \terr = txgbe_setup_fc(hw);\n \tif (err != 0 && err != TXGBE_NOT_IMPLEMENTED) {\n-\t\tDEBUGOUT(\"Flow control setup failed, returning %d\\n\", err);\n+\t\tDEBUGOUT(\"Flow control setup failed, returning %d\", err);\n \t\treturn err;\n \t}\n \n@@ -275,8 +269,6 @@ s32 txgbe_init_hw(struct txgbe_hw *hw)\n {\n \ts32 status;\n \n-\tDEBUGFUNC(\"txgbe_init_hw\");\n-\n \t/* Get firmware version */\n \thw->phy.get_fw_version(hw, &hw->fw_version);\n \n@@ -288,7 +280,7 @@ s32 txgbe_init_hw(struct txgbe_hw *hw)\n \t}\n \n \tif (status != 0)\n-\t\tDEBUGOUT(\"Failed to initialize HW, STATUS = %d\\n\", status);\n+\t\tDEBUGOUT(\"Failed to initialize HW, STATUS = %d\", status);\n \n \treturn status;\n }\n@@ -304,8 +296,6 @@ s32 txgbe_clear_hw_cntrs(struct txgbe_hw *hw)\n {\n \tu16 i = 0;\n \n-\tDEBUGFUNC(\"txgbe_clear_hw_cntrs\");\n-\n \t/* QP Stats */\n \t/* don't write clear queue stats */\n \tfor (i = 0; i < TXGBE_MAX_QP; i++) {\n@@ -425,8 +415,6 @@ s32 txgbe_get_mac_addr(struct txgbe_hw *hw, u8 *mac_addr)\n \tu32 rar_low;\n \tu16 i;\n \n-\tDEBUGFUNC(\"txgbe_get_mac_addr\");\n-\n \twr32(hw, TXGBE_ETHADDRIDX, 0);\n \trar_high = rd32(hw, TXGBE_ETHADDRH);\n \trar_low = rd32(hw, TXGBE_ETHADDRL);\n@@ -452,8 +440,6 @@ void txgbe_set_lan_id_multi_port(struct txgbe_hw *hw)\n \tstruct txgbe_bus_info *bus = &hw->bus;\n \tu32 reg;\n \n-\tDEBUGFUNC(\"txgbe_set_lan_id_multi_port_pcie\");\n-\n \treg = rd32(hw, TXGBE_PORTSTAT);\n \tbus->lan_id = TXGBE_PORTSTAT_ID(reg);\n \n@@ -479,8 +465,6 @@ s32 txgbe_stop_hw(struct txgbe_hw *hw)\n \tu32 reg_val;\n \tu16 i;\n \n-\tDEBUGFUNC(\"txgbe_stop_hw\");\n-\n \t/*\n \t * Set the adapter_stopped flag so other driver functions stop touching\n \t * the hardware\n@@ -527,8 +511,6 @@ s32 txgbe_led_on(struct txgbe_hw *hw, u32 index)\n {\n \tu32 led_reg = rd32(hw, TXGBE_LEDCTL);\n \n-\tDEBUGFUNC(\"txgbe_led_on\");\n-\n \t/* To turn on the LED, set mode to ON. */\n \tled_reg |= index << TXGBE_LEDCTL_ORD_SHIFT;\n \tled_reg |= index;\n@@ -547,8 +529,6 @@ s32 txgbe_led_off(struct txgbe_hw *hw, u32 index)\n {\n \tu32 led_reg = rd32(hw, TXGBE_LEDCTL);\n \n-\tDEBUGFUNC(\"txgbe_led_off\");\n-\n \t/* To turn off the LED, set mode to OFF. */\n \tled_reg &= ~(index << TXGBE_LEDCTL_ORD_SHIFT);\n \tled_reg |= index;\n@@ -568,8 +548,6 @@ s32 txgbe_validate_mac_addr(u8 *mac_addr)\n {\n \ts32 status = 0;\n \n-\tDEBUGFUNC(\"txgbe_validate_mac_addr\");\n-\n \t/* Make sure it is not a multicast address */\n \tif (TXGBE_IS_MULTICAST(mac_addr)) {\n \t\tstatus = TXGBE_ERR_INVALID_MAC_ADDR;\n@@ -600,11 +578,9 @@ s32 txgbe_set_rar(struct txgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,\n \tu32 rar_low, rar_high;\n \tu32 rar_entries = hw->mac.num_rar_entries;\n \n-\tDEBUGFUNC(\"txgbe_set_rar\");\n-\n \t/* Make sure we are using a valid rar index range */\n \tif (index >= rar_entries) {\n-\t\tDEBUGOUT(\"RAR index %d is out of range.\\n\", index);\n+\t\tDEBUGOUT(\"RAR index %d is out of range.\", index);\n \t\treturn TXGBE_ERR_INVALID_ARGUMENT;\n \t}\n \n@@ -652,11 +628,9 @@ s32 txgbe_clear_rar(struct txgbe_hw *hw, u32 index)\n \tu32 rar_high;\n \tu32 rar_entries = hw->mac.num_rar_entries;\n \n-\tDEBUGFUNC(\"txgbe_clear_rar\");\n-\n \t/* Make sure we are using a valid rar index range */\n \tif (index >= rar_entries) {\n-\t\tDEBUGOUT(\"RAR index %d is out of range.\\n\", index);\n+\t\tDEBUGOUT(\"RAR index %d is out of range.\", index);\n \t\treturn TXGBE_ERR_INVALID_ARGUMENT;\n \t}\n \n@@ -692,8 +666,6 @@ s32 txgbe_init_rx_addrs(struct txgbe_hw *hw)\n \tu32 psrctl;\n \tu32 rar_entries = hw->mac.num_rar_entries;\n \n-\tDEBUGFUNC(\"txgbe_init_rx_addrs\");\n-\n \t/*\n \t * If the current mac address is valid, assume it is a software override\n \t * to the permanent address.\n@@ -704,18 +676,16 @@ s32 txgbe_init_rx_addrs(struct txgbe_hw *hw)\n \t\t/* Get the MAC address from the RAR0 for later reference */\n \t\thw->mac.get_mac_addr(hw, hw->mac.addr);\n \n-\t\tDEBUGOUT(\" Keeping Current RAR0 Addr =%.2X %.2X %.2X \",\n+\t\tDEBUGOUT(\" Keeping Current RAR0 Addr =%.2X %.2X %.2X %.2X %.2X %.2X\",\n \t\t\t hw->mac.addr[0], hw->mac.addr[1],\n-\t\t\t hw->mac.addr[2]);\n-\t\tDEBUGOUT(\"%.2X %.2X %.2X\\n\", hw->mac.addr[3],\n+\t\t\t hw->mac.addr[2], hw->mac.addr[3],\n \t\t\t hw->mac.addr[4], hw->mac.addr[5]);\n \t} else {\n \t\t/* Setup the receive address. */\n-\t\tDEBUGOUT(\"Overriding MAC Address in RAR[0]\\n\");\n-\t\tDEBUGOUT(\" New MAC Addr =%.2X %.2X %.2X \",\n+\t\tDEBUGOUT(\"Overriding MAC Address in RAR[0]\");\n+\t\tDEBUGOUT(\" New MAC Addr =%.2X %.2X %.2X %.2X %.2X %.2X\",\n \t\t\t hw->mac.addr[0], hw->mac.addr[1],\n-\t\t\t hw->mac.addr[2]);\n-\t\tDEBUGOUT(\"%.2X %.2X %.2X\\n\", hw->mac.addr[3],\n+\t\t\t hw->mac.addr[2], hw->mac.addr[3],\n \t\t\t hw->mac.addr[4], hw->mac.addr[5]);\n \n \t\thw->mac.set_rar(hw, 0, hw->mac.addr, 0, true);\n@@ -729,7 +699,7 @@ s32 txgbe_init_rx_addrs(struct txgbe_hw *hw)\n \thw->addr_ctrl.rar_used_count = 1;\n \n \t/* Zero out the other receive addresses. */\n-\tDEBUGOUT(\"Clearing RAR[1-%d]\\n\", rar_entries - 1);\n+\tDEBUGOUT(\"Clearing RAR[1-%d]\", rar_entries - 1);\n \tfor (i = 1; i < rar_entries; i++) {\n \t\twr32(hw, TXGBE_ETHADDRIDX, i);\n \t\twr32(hw, TXGBE_ETHADDRL, 0);\n@@ -743,7 +713,7 @@ s32 txgbe_init_rx_addrs(struct txgbe_hw *hw)\n \tpsrctl |= TXGBE_PSRCTL_ADHF12(hw->mac.mc_filter_type);\n \twr32(hw, TXGBE_PSRCTL, psrctl);\n \n-\tDEBUGOUT(\" Clearing MTA\\n\");\n+\tDEBUGOUT(\" Clearing MTA\");\n \tfor (i = 0; i < hw->mac.mcft_size; i++)\n \t\twr32(hw, TXGBE_MCADDRTBL(i), 0);\n \n@@ -768,8 +738,6 @@ static s32 txgbe_mta_vector(struct txgbe_hw *hw, u8 *mc_addr)\n {\n \tu32 vector = 0;\n \n-\tDEBUGFUNC(\"txgbe_mta_vector\");\n-\n \tswitch (hw->mac.mc_filter_type) {\n \tcase 0: /* use bits [47:36] of the address */\n \t\tvector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));\n@@ -784,7 +752,7 @@ static s32 txgbe_mta_vector(struct txgbe_hw *hw, u8 *mc_addr)\n \t\tvector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));\n \t\tbreak;\n \tdefault: /* Invalid mc_filter_type */\n-\t\tDEBUGOUT(\"MC filter type param set incorrectly\\n\");\n+\t\tDEBUGOUT(\"MC filter type param set incorrectly\");\n \t\tASSERT(0);\n \t\tbreak;\n \t}\n@@ -807,12 +775,10 @@ void txgbe_set_mta(struct txgbe_hw *hw, u8 *mc_addr)\n \tu32 vector_bit;\n \tu32 vector_reg;\n \n-\tDEBUGFUNC(\"txgbe_set_mta\");\n-\n \thw->addr_ctrl.mta_in_use++;\n \n \tvector = txgbe_mta_vector(hw, mc_addr);\n-\tDEBUGOUT(\" bit-vector = 0x%03X\\n\", vector);\n+\tDEBUGOUT(\" bit-vector = 0x%03X\", vector);\n \n \t/*\n \t * The MTA is a register array of 128 32-bit registers. It is treated\n@@ -846,8 +812,6 @@ s32 txgbe_update_mc_addr_list(struct txgbe_hw *hw, u8 *mc_addr_list,\n \tu32 i;\n \tu32 vmdq;\n \n-\tDEBUGFUNC(\"txgbe_update_mc_addr_list\");\n-\n \t/*\n \t * Set the new number of MC addresses that we are being requested to\n \t * use.\n@@ -857,13 +821,13 @@ s32 txgbe_update_mc_addr_list(struct txgbe_hw *hw, u8 *mc_addr_list,\n \n \t/* Clear mta_shadow */\n \tif (clear) {\n-\t\tDEBUGOUT(\" Clearing MTA\\n\");\n+\t\tDEBUGOUT(\" Clearing MTA\");\n \t\tmemset(&hw->mac.mta_shadow, 0, sizeof(hw->mac.mta_shadow));\n \t}\n \n \t/* Update mta_shadow */\n \tfor (i = 0; i < mc_addr_count; i++) {\n-\t\tDEBUGOUT(\" Adding the multicast addresses:\\n\");\n+\t\tDEBUGOUT(\" Adding the multicast addresses:\");\n \t\ttxgbe_set_mta(hw, next(hw, &mc_addr_list, &vmdq));\n \t}\n \n@@ -880,7 +844,7 @@ s32 txgbe_update_mc_addr_list(struct txgbe_hw *hw, u8 *mc_addr_list,\n \t\twr32(hw, TXGBE_PSRCTL, psrctl);\n \t}\n \n-\tDEBUGOUT(\"txgbe update mc addr list complete\\n\");\n+\tDEBUGOUT(\"txgbe update mc addr list complete\");\n \treturn 0;\n }\n \n@@ -898,8 +862,6 @@ s32 txgbe_fc_enable(struct txgbe_hw *hw)\n \tu32 fcrtl, fcrth;\n \tint i;\n \n-\tDEBUGFUNC(\"txgbe_fc_enable\");\n-\n \t/* Validate the water mark configuration */\n \tif (!hw->fc.pause_time) {\n \t\terr = TXGBE_ERR_INVALID_LINK_SETTINGS;\n@@ -912,7 +874,7 @@ s32 txgbe_fc_enable(struct txgbe_hw *hw)\n \t\t hw->fc.high_water[i]) {\n \t\t\tif (!hw->fc.low_water[i] ||\n \t\t\t hw->fc.low_water[i] >= hw->fc.high_water[i]) {\n-\t\t\t\tDEBUGOUT(\"Invalid water mark configuration\\n\");\n+\t\t\t\tDEBUGOUT(\"Invalid water mark configuration\");\n \t\t\t\terr = TXGBE_ERR_INVALID_LINK_SETTINGS;\n \t\t\t\tgoto out;\n \t\t\t}\n@@ -970,7 +932,7 @@ s32 txgbe_fc_enable(struct txgbe_hw *hw)\n \t\tfccfg_reg |= TXGBE_TXFCCFG_FC;\n \t\tbreak;\n \tdefault:\n-\t\tDEBUGOUT(\"Flow control param set incorrectly\\n\");\n+\t\tDEBUGOUT(\"Flow control param set incorrectly\");\n \t\terr = TXGBE_ERR_CONFIG;\n \t\tgoto out;\n \t}\n@@ -1032,7 +994,7 @@ s32 txgbe_negotiate_fc(struct txgbe_hw *hw, u32 adv_reg, u32 lp_reg,\n {\n \tif ((!(adv_reg)) || (!(lp_reg))) {\n \t\tDEBUGOUT(\"Local or link partner's advertised flow control \"\n-\t\t\t \"settings are NULL. Local: %x, link partner: %x\\n\",\n+\t\t\t \"settings are NULL. Local: %x, link partner: %x\",\n \t\t\t adv_reg, lp_reg);\n \t\treturn TXGBE_ERR_FC_NOT_NEGOTIATED;\n \t}\n@@ -1047,22 +1009,22 @@ s32 txgbe_negotiate_fc(struct txgbe_hw *hw, u32 adv_reg, u32 lp_reg,\n \t\t */\n \t\tif (hw->fc.requested_mode == txgbe_fc_full) {\n \t\t\thw->fc.current_mode = txgbe_fc_full;\n-\t\t\tDEBUGOUT(\"Flow Control = FULL.\\n\");\n+\t\t\tDEBUGOUT(\"Flow Control = FULL.\");\n \t\t} else {\n \t\t\thw->fc.current_mode = txgbe_fc_rx_pause;\n-\t\t\tDEBUGOUT(\"Flow Control=RX PAUSE frames only\\n\");\n+\t\t\tDEBUGOUT(\"Flow Control=RX PAUSE frames only\");\n \t\t}\n \t} else if (!(adv_reg & adv_sym) && (adv_reg & adv_asm) &&\n \t\t (lp_reg & lp_sym) && (lp_reg & lp_asm)) {\n \t\thw->fc.current_mode = txgbe_fc_tx_pause;\n-\t\tDEBUGOUT(\"Flow Control = TX PAUSE frames only.\\n\");\n+\t\tDEBUGOUT(\"Flow Control = TX PAUSE frames only.\");\n \t} else if ((adv_reg & adv_sym) && (adv_reg & adv_asm) &&\n \t\t !(lp_reg & lp_sym) && (lp_reg & lp_asm)) {\n \t\thw->fc.current_mode = txgbe_fc_rx_pause;\n-\t\tDEBUGOUT(\"Flow Control = RX PAUSE frames only.\\n\");\n+\t\tDEBUGOUT(\"Flow Control = RX PAUSE frames only.\");\n \t} else {\n \t\thw->fc.current_mode = txgbe_fc_none;\n-\t\tDEBUGOUT(\"Flow Control = NONE.\\n\");\n+\t\tDEBUGOUT(\"Flow Control = NONE.\");\n \t}\n \treturn 0;\n }\n@@ -1162,8 +1124,6 @@ void txgbe_fc_autoneg(struct txgbe_hw *hw)\n \tu32 speed;\n \tbool link_up;\n \n-\tDEBUGFUNC(\"txgbe_fc_autoneg\");\n-\n \t/*\n \t * AN should have completed when the cable was plugged in.\n \t * Look for reasons to bail out. Bail out if:\n@@ -1229,8 +1189,6 @@ s32 txgbe_acquire_swfw_sync(struct txgbe_hw *hw, u32 mask)\n \tu32 timeout = 200;\n \tu32 i;\n \n-\tDEBUGFUNC(\"txgbe_acquire_swfw_sync\");\n-\n \tfor (i = 0; i < timeout; i++) {\n \t\t/*\n \t\t * SW NVM semaphore bit is used for access to all\n@@ -1273,8 +1231,6 @@ void txgbe_release_swfw_sync(struct txgbe_hw *hw, u32 mask)\n \tu32 mngsem;\n \tu32 swmask = mask;\n \n-\tDEBUGFUNC(\"txgbe_release_swfw_sync\");\n-\n \ttxgbe_get_eeprom_semaphore(hw);\n \n \tmngsem = rd32(hw, TXGBE_MNGSEM);\n@@ -1298,8 +1254,6 @@ s32 txgbe_disable_sec_rx_path(struct txgbe_hw *hw)\n \tint i;\n \tu32 secrxreg;\n \n-\tDEBUGFUNC(\"txgbe_disable_sec_rx_path\");\n-\n \tsecrxreg = rd32(hw, TXGBE_SECRXCTL);\n \tsecrxreg |= TXGBE_SECRXCTL_XDSA;\n \twr32(hw, TXGBE_SECRXCTL, secrxreg);\n@@ -1315,7 +1269,7 @@ s32 txgbe_disable_sec_rx_path(struct txgbe_hw *hw)\n \t/* For informational purposes only */\n \tif (i >= TXGBE_MAX_SECRX_POLL)\n \t\tDEBUGOUT(\"Rx unit being enabled before security \"\n-\t\t\t \"path fully disabled. Continuing with init.\\n\");\n+\t\t\t \"path fully disabled. Continuing with init.\");\n \n \treturn 0;\n }\n@@ -1330,8 +1284,6 @@ s32 txgbe_enable_sec_rx_path(struct txgbe_hw *hw)\n {\n \tu32 secrxreg;\n \n-\tDEBUGFUNC(\"txgbe_enable_sec_rx_path\");\n-\n \tsecrxreg = rd32(hw, TXGBE_SECRXCTL);\n \tsecrxreg &= ~TXGBE_SECRXCTL_XDSA;\n \twr32(hw, TXGBE_SECRXCTL, secrxreg);\n@@ -1367,7 +1319,7 @@ int txgbe_disable_sec_tx_path(struct txgbe_hw *hw)\n \n \t/* For informational purposes only */\n \tif (i >= TXGBE_MAX_SECTX_POLL)\n-\t\tPMD_DRV_LOG(DEBUG, \"Tx unit being enabled before security \"\n+\t\tDEBUGOUT(\"Tx unit being enabled before security \"\n \t\t\t \"path fully disabled. Continuing with init.\");\n \n \treturn 0;\n@@ -1405,8 +1357,6 @@ static s32 txgbe_get_san_mac_addr_offset(struct txgbe_hw *hw,\n {\n \ts32 err;\n \n-\tDEBUGFUNC(\"txgbe_get_san_mac_addr_offset\");\n-\n \t/*\n \t * First read the EEPROM pointer to see if the MAC addresses are\n \t * available.\n@@ -1437,8 +1387,6 @@ s32 txgbe_get_san_mac_addr(struct txgbe_hw *hw, u8 *san_mac_addr)\n \tu8 i;\n \ts32 err;\n \n-\tDEBUGFUNC(\"txgbe_get_san_mac_addr\");\n-\n \t/*\n \t * First read the EEPROM pointer to see if the MAC addresses are\n \t * available. If they're not, no point in calling set_lan_id() here.\n@@ -1487,8 +1435,6 @@ s32 txgbe_set_san_mac_addr(struct txgbe_hw *hw, u8 *san_mac_addr)\n \tu16 san_mac_data, san_mac_offset;\n \tu8 i;\n \n-\tDEBUGFUNC(\"txgbe_set_san_mac_addr\");\n-\n \t/* Look for SAN mac address pointer. If not defined, return */\n \terr = txgbe_get_san_mac_addr_offset(hw, &san_mac_offset);\n \tif (err || san_mac_offset == 0 || san_mac_offset == 0xFFFF)\n@@ -1519,11 +1465,9 @@ s32 txgbe_clear_vmdq(struct txgbe_hw *hw, u32 rar, u32 vmdq)\n \tu32 mpsar_lo, mpsar_hi;\n \tu32 rar_entries = hw->mac.num_rar_entries;\n \n-\tDEBUGFUNC(\"txgbe_clear_vmdq\");\n-\n \t/* Make sure we are using a valid rar index range */\n \tif (rar >= rar_entries) {\n-\t\tDEBUGOUT(\"RAR index %d is out of range.\\n\", rar);\n+\t\tDEBUGOUT(\"RAR index %d is out of range.\", rar);\n \t\treturn TXGBE_ERR_INVALID_ARGUMENT;\n \t}\n \n@@ -1573,11 +1517,9 @@ s32 txgbe_set_vmdq(struct txgbe_hw *hw, u32 rar, u32 vmdq)\n \tu32 mpsar;\n \tu32 rar_entries = hw->mac.num_rar_entries;\n \n-\tDEBUGFUNC(\"txgbe_set_vmdq\");\n-\n \t/* Make sure we are using a valid rar index range */\n \tif (rar >= rar_entries) {\n-\t\tDEBUGOUT(\"RAR index %d is out of range.\\n\", rar);\n+\t\tDEBUGOUT(\"RAR index %d is out of range.\", rar);\n \t\treturn TXGBE_ERR_INVALID_ARGUMENT;\n \t}\n \n@@ -1602,8 +1544,7 @@ s32 txgbe_init_uta_tables(struct txgbe_hw *hw)\n {\n \tint i;\n \n-\tDEBUGFUNC(\"txgbe_init_uta_tables\");\n-\tDEBUGOUT(\" Clearing UTA\\n\");\n+\tDEBUGOUT(\" Clearing UTA\");\n \n \tfor (i = 0; i < 128; i++)\n \t\twr32(hw, TXGBE_UCADDRTBL(i), 0);\n@@ -1658,7 +1599,7 @@ s32 txgbe_find_vlvf_slot(struct txgbe_hw *hw, u32 vlan, bool vlvf_bypass)\n \t * slot we found during our search, else error.\n \t */\n \tif (!first_empty_slot)\n-\t\tDEBUGOUT(\"No space in VLVF.\\n\");\n+\t\tDEBUGOUT(\"No space in VLVF.\");\n \n \treturn first_empty_slot ? first_empty_slot : TXGBE_ERR_NO_SPACE;\n }\n@@ -1679,8 +1620,6 @@ s32 txgbe_set_vfta(struct txgbe_hw *hw, u32 vlan, u32 vind,\n \tu32 regidx, vfta_delta, vfta;\n \ts32 err;\n \n-\tDEBUGFUNC(\"txgbe_set_vfta\");\n-\n \tif (vlan > 4095 || vind > 63)\n \t\treturn TXGBE_ERR_PARAM;\n \n@@ -1748,8 +1687,6 @@ s32 txgbe_set_vlvf(struct txgbe_hw *hw, u32 vlan, u32 vind,\n \tu32 portctl;\n \ts32 vlvf_index;\n \n-\tDEBUGFUNC(\"txgbe_set_vlvf\");\n-\n \tif (vlan > 4095 || vind > 63)\n \t\treturn TXGBE_ERR_PARAM;\n \n@@ -1829,8 +1766,6 @@ s32 txgbe_clear_vfta(struct txgbe_hw *hw)\n {\n \tu32 offset;\n \n-\tDEBUGFUNC(\"txgbe_clear_vfta\");\n-\n \tfor (offset = 0; offset < hw->mac.vft_size; offset++)\n \t\twr32(hw, TXGBE_VLANTBL(offset), 0);\n \n@@ -1884,8 +1819,6 @@ s32 txgbe_check_mac_link(struct txgbe_hw *hw, u32 *speed,\n \tu32 links_reg, links_orig;\n \tu32 i;\n \n-\tDEBUGFUNC(\"txgbe_check_mac_link\");\n-\n \t/* If Crosstalk fix enabled do the sanity check of making sure\n \t * the SFP+ cage is full.\n \t */\n@@ -1916,7 +1849,7 @@ s32 txgbe_check_mac_link(struct txgbe_hw *hw, u32 *speed,\n \tlinks_reg = rd32(hw, TXGBE_PORTSTAT);\n \n \tif (links_orig != links_reg) {\n-\t\tDEBUGOUT(\"LINKS changed from %08X to %08X\\n\",\n+\t\tDEBUGOUT(\"LINKS changed from %08X to %08X\",\n \t\t\t links_orig, links_reg);\n \t}\n \n@@ -1971,8 +1904,6 @@ s32 txgbe_get_wwn_prefix(struct txgbe_hw *hw, u16 *wwnn_prefix,\n \tu16 offset, caps;\n \tu16 alt_san_mac_blk_offset;\n \n-\tDEBUGFUNC(\"txgbe_get_wwn_prefix\");\n-\n \t/* clear output first */\n \t*wwnn_prefix = 0xFFFF;\n \t*wwpn_prefix = 0xFFFF;\n@@ -2062,8 +1993,6 @@ void txgbe_set_ethertype_anti_spoofing(struct txgbe_hw *hw,\n **/\n s32 txgbe_get_device_caps(struct txgbe_hw *hw, u16 *device_caps)\n {\n-\tDEBUGFUNC(\"txgbe_get_device_caps\");\n-\n \thw->rom.readw_sw(hw, TXGBE_DEVICE_CAPS, device_caps);\n \n \treturn 0;\n@@ -2185,8 +2114,6 @@ s32 txgbe_get_thermal_sensor_data(struct txgbe_hw *hw)\n \ts64 tsv;\n \tu32 ts_stat;\n \n-\tDEBUGFUNC(\"txgbe_get_thermal_sensor_data\");\n-\n \t/* Only support thermal sensors attached to physical port 0 */\n \tif (hw->bus.lan_id != 0)\n \t\treturn TXGBE_NOT_IMPLEMENTED;\n@@ -2217,8 +2144,6 @@ s32 txgbe_init_thermal_sensor_thresh(struct txgbe_hw *hw)\n {\n \tstruct txgbe_thermal_sensor_data *data = &hw->mac.thermal_sensor_data;\n \n-\tDEBUGFUNC(\"txgbe_init_thermal_sensor_thresh\");\n-\n \tmemset(data, 0, sizeof(struct txgbe_thermal_sensor_data));\n \n \tif (hw->bus.lan_id != 0)\n@@ -2289,8 +2214,6 @@ s32 txgbe_setup_mac_link_multispeed_fiber(struct txgbe_hw *hw,\n \tu32 i = 0;\n \tbool autoneg, link_up = false;\n \n-\tDEBUGFUNC(\"txgbe_setup_mac_link_multispeed_fiber\");\n-\n \t/* Mask off requested but non-supported speeds */\n \tstatus = hw->mac.get_link_capabilities(hw, &link_speed, &autoneg);\n \tif (status != 0)\n@@ -2315,7 +2238,7 @@ s32 txgbe_setup_mac_link_multispeed_fiber(struct txgbe_hw *hw,\n \t\t\t/* QSFP module automatically detects MAC link speed */\n \t\t\tbreak;\n \t\tdefault:\n-\t\t\tDEBUGOUT(\"Unexpected media type.\\n\");\n+\t\t\tDEBUGOUT(\"Unexpected media type.\");\n \t\t\tbreak;\n \t\t}\n \n@@ -2365,7 +2288,7 @@ s32 txgbe_setup_mac_link_multispeed_fiber(struct txgbe_hw *hw,\n \t\t\t/* QSFP module automatically detects link speed */\n \t\t\tbreak;\n \t\tdefault:\n-\t\t\tDEBUGOUT(\"Unexpected media type.\\n\");\n+\t\t\tDEBUGOUT(\"Unexpected media type.\");\n \t\t\tbreak;\n \t\t}\n \n@@ -2431,8 +2354,6 @@ s32 txgbe_init_shared_code(struct txgbe_hw *hw)\n {\n \ts32 status;\n \n-\tDEBUGFUNC(\"txgbe_init_shared_code\");\n-\n \t/*\n \t * Set the mac type\n \t */\n@@ -2468,8 +2389,6 @@ s32 txgbe_set_mac_type(struct txgbe_hw *hw)\n {\n \ts32 err = 0;\n \n-\tDEBUGFUNC(\"txgbe_set_mac_type\");\n-\n \tif (hw->vendor_id != PCI_VENDOR_ID_WANGXUN) {\n \t\tDEBUGOUT(\"Unsupported vendor id: %x\", hw->vendor_id);\n \t\treturn TXGBE_ERR_DEVICE_NOT_SUPPORTED;\n@@ -2491,7 +2410,7 @@ s32 txgbe_set_mac_type(struct txgbe_hw *hw)\n \t\tbreak;\n \t}\n \n-\tDEBUGOUT(\"found mac: %d, returns: %d\\n\",\n+\tDEBUGOUT(\"found mac: %d, returns: %d\",\n \t\t hw->mac.type, err);\n \treturn err;\n }\n@@ -2500,8 +2419,6 @@ void txgbe_init_mac_link_ops(struct txgbe_hw *hw)\n {\n \tstruct txgbe_mac_info *mac = &hw->mac;\n \n-\tDEBUGFUNC(\"txgbe_init_mac_link_ops\");\n-\n \t/*\n \t * enable the laser control functions for SFP+ fiber\n \t * and MNG not enabled\n@@ -2544,8 +2461,6 @@ s32 txgbe_init_phy_raptor(struct txgbe_hw *hw)\n \tstruct txgbe_phy_info *phy = &hw->phy;\n \ts32 err = 0;\n \n-\tDEBUGFUNC(\"txgbe_init_phy_raptor\");\n-\n \tif ((hw->device_id & 0xFF) == TXGBE_DEV_ID_QSFP) {\n \t\t/* Store flag indicating I2C bus access control unit. */\n \t\thw->phy.qsfp_shared_i2c_bus = TRUE;\n@@ -2592,8 +2507,6 @@ s32 txgbe_setup_sfp_modules(struct txgbe_hw *hw)\n {\n \ts32 err = 0;\n \n-\tDEBUGFUNC(\"txgbe_setup_sfp_modules\");\n-\n \tif (hw->phy.sfp_type == txgbe_sfp_type_unknown)\n \t\treturn 0;\n \n@@ -2613,7 +2526,7 @@ s32 txgbe_setup_sfp_modules(struct txgbe_hw *hw)\n \tmsec_delay(hw->rom.semaphore_delay);\n \n \tif (err) {\n-\t\tDEBUGOUT(\"sfp module setup not complete\\n\");\n+\t\tDEBUGOUT(\"sfp module setup not complete\");\n \t\treturn TXGBE_ERR_SFP_SETUP_NOT_COMPLETE;\n \t}\n \n@@ -2711,8 +2624,6 @@ s32 txgbe_init_ops_pf(struct txgbe_hw *hw)\n \tstruct txgbe_rom_info *rom = &hw->rom;\n \tstruct txgbe_mbx_info *mbx = &hw->mbx;\n \n-\tDEBUGFUNC(\"txgbe_init_ops_pf\");\n-\n \t/* BUS */\n \tbus->set_lan_id = txgbe_set_lan_id_multi_port;\n \n@@ -2839,8 +2750,6 @@ s32 txgbe_get_link_capabilities_raptor(struct txgbe_hw *hw,\n \ts32 status = 0;\n \tu32 autoc = 0;\n \n-\tDEBUGFUNC(\"txgbe_get_link_capabilities_raptor\");\n-\n \t/* Check if 1G SFP module. */\n \tif (hw->phy.sfp_type == txgbe_sfp_type_1g_cu_core0 ||\n \t hw->phy.sfp_type == txgbe_sfp_type_1g_cu_core1 ||\n@@ -2944,8 +2853,6 @@ u32 txgbe_get_media_type_raptor(struct txgbe_hw *hw)\n {\n \tu32 media_type;\n \n-\tDEBUGFUNC(\"txgbe_get_media_type_raptor\");\n-\n \tif (hw->phy.ffe_set)\n \t\ttxgbe_bp_mode_set(hw);\n \n@@ -3004,8 +2911,6 @@ s32 txgbe_start_mac_link_raptor(struct txgbe_hw *hw,\n \ts32 status = 0;\n \tbool got_lock = false;\n \n-\tDEBUGFUNC(\"txgbe_start_mac_link_raptor\");\n-\n \tUNREFERENCED_PARAMETER(autoneg_wait_to_complete);\n \n \t/* reset_pipeline requires us to hold this lock as it writes to\n@@ -3095,8 +3000,6 @@ void txgbe_enable_tx_laser_multispeed_fiber(struct txgbe_hw *hw)\n **/\n void txgbe_flap_tx_laser_multispeed_fiber(struct txgbe_hw *hw)\n {\n-\tDEBUGFUNC(\"txgbe_flap_tx_laser_multispeed_fiber\");\n-\n \t/* Blocked by MNG FW so bail */\n \tif (txgbe_check_reset_blocked(hw))\n \t\treturn;\n@@ -3128,7 +3031,7 @@ void txgbe_set_hard_rate_select_speed(struct txgbe_hw *hw,\n \t\tesdp_reg &= ~(TXGBE_GPIOBIT_4 | TXGBE_GPIOBIT_5);\n \t\tbreak;\n \tdefault:\n-\t\tDEBUGOUT(\"Invalid fixed module speed\\n\");\n+\t\tDEBUGOUT(\"Invalid fixed module speed\");\n \t\treturn;\n \t}\n \n@@ -3154,8 +3057,6 @@ s32 txgbe_setup_mac_link_smartspeed(struct txgbe_hw *hw,\n \tbool link_up = false;\n \tu32 autoc_reg = rd32_epcs(hw, SR_AN_MMD_ADV_REG1);\n \n-\tDEBUGFUNC(\"txgbe_setup_mac_link_smartspeed\");\n-\n \t /* Set autoneg_advertised value based on input link speed */\n \thw->phy.autoneg_advertised = 0;\n \n@@ -3245,7 +3146,7 @@ s32 txgbe_setup_mac_link_smartspeed(struct txgbe_hw *hw,\n out:\n \tif (link_up && link_speed == TXGBE_LINK_SPEED_1GB_FULL)\n \t\tDEBUGOUT(\"Smartspeed has downgraded the link speed \"\n-\t\t\"from the maximum advertised\\n\");\n+\t\t\"from the maximum advertised\");\n \treturn status;\n }\n \n@@ -3271,7 +3172,6 @@ s32 txgbe_setup_mac_link(struct txgbe_hw *hw,\n \tu64 orig_autoc = 0;\n \tu32 link_capabilities = TXGBE_LINK_SPEED_UNKNOWN;\n \n-\tDEBUGFUNC(\"txgbe_setup_mac_link\");\n \tUNREFERENCED_PARAMETER(autoneg_wait_to_complete);\n \n \t/* Check to see if speed passed in is supported. */\n@@ -3358,8 +3258,6 @@ static s32 txgbe_setup_copper_link_raptor(struct txgbe_hw *hw,\n {\n \ts32 status;\n \n-\tDEBUGFUNC(\"txgbe_setup_copper_link_raptor\");\n-\n \t/* Setup the PHY according to input speed */\n \tstatus = hw->phy.setup_link_speed(hw, speed,\n \t\t\t\t\t autoneg_wait_to_complete);\n@@ -3468,8 +3366,6 @@ s32 txgbe_reset_hw(struct txgbe_hw *hw)\n \ts32 status;\n \tu32 autoc;\n \n-\tDEBUGFUNC(\"txgbe_reset_hw\");\n-\n \t/* Call adapter stop to disable tx/rx and clear interrupts */\n \tstatus = hw->mac.stop_hw(hw);\n \tif (status != 0)\n@@ -3625,15 +3521,13 @@ s32 txgbe_reinit_fdir_tables(struct txgbe_hw *hw)\n \tu32 fdircmd;\n \tfdirctrl &= ~TXGBE_FDIRCTL_INITDONE;\n \n-\tDEBUGFUNC(\"txgbe_reinit_fdir_tables\");\n-\n \t/*\n \t * Before starting reinitialization process,\n \t * FDIRPICMD.OP must be zero.\n \t */\n \terr = txgbe_fdir_check_cmd_complete(hw, &fdircmd);\n \tif (err) {\n-\t\tDEBUGOUT(\"Flow Director previous command did not complete, aborting table re-initialization.\\n\");\n+\t\tDEBUGOUT(\"Flow Director previous command did not complete, aborting table re-initialization.\");\n \t\treturn err;\n \t}\n \n@@ -3667,7 +3561,7 @@ s32 txgbe_reinit_fdir_tables(struct txgbe_hw *hw)\n \t\tmsec_delay(1);\n \t}\n \tif (i >= TXGBE_FDIR_INIT_DONE_POLL) {\n-\t\tDEBUGOUT(\"Flow Director Signature poll time exceeded!\\n\");\n+\t\tDEBUGOUT(\"Flow Director Signature poll time exceeded!\");\n \t\treturn TXGBE_ERR_FDIR_REINIT_FAILED;\n \t}\n \n@@ -3693,8 +3587,6 @@ s32 txgbe_start_hw_raptor(struct txgbe_hw *hw)\n {\n \ts32 err = 0;\n \n-\tDEBUGFUNC(\"txgbe_start_hw_raptor\");\n-\n \terr = txgbe_start_hw(hw);\n \tif (err != 0)\n \t\tgoto out;\n@@ -3719,8 +3611,6 @@ s32 txgbe_start_hw_raptor(struct txgbe_hw *hw)\n **/\n s32 txgbe_enable_rx_dma_raptor(struct txgbe_hw *hw, u32 regval)\n {\n-\tDEBUGFUNC(\"txgbe_enable_rx_dma_raptor\");\n-\n \t/*\n \t * Workaround silicon errata when enabling the Rx datapath.\n \t * If traffic is incoming before we enable the Rx unit, it could hang\n@@ -3753,8 +3643,6 @@ bool txgbe_verify_lesm_fw_enabled_raptor(struct txgbe_hw *hw)\n \tu16 fw_offset, fw_lesm_param_offset, fw_lesm_state;\n \ts32 status;\n \n-\tDEBUGFUNC(\"txgbe_verify_lesm_fw_enabled_raptor\");\n-\n \t/* get the offset to the Firmware Module block */\n \tstatus = hw->rom.read16(hw, TXGBE_FW_PTR, &fw_offset);\n \ndiff --git a/drivers/net/txgbe/base/txgbe_mbx.c b/drivers/net/txgbe/base/txgbe_mbx.c\nindex 4d64c6c3e9..7f2489a13f 100644\n--- a/drivers/net/txgbe/base/txgbe_mbx.c\n+++ b/drivers/net/txgbe/base/txgbe_mbx.c\n@@ -21,8 +21,6 @@ s32 txgbe_read_mbx(struct txgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)\n \tstruct txgbe_mbx_info *mbx = &hw->mbx;\n \ts32 ret_val = TXGBE_ERR_MBX;\n \n-\tDEBUGFUNC(\"txgbe_read_mbx\");\n-\n \t/* limit read to size of mailbox */\n \tif (size > mbx->size)\n \t\tsize = mbx->size;\n@@ -47,8 +45,6 @@ s32 txgbe_write_mbx(struct txgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)\n \tstruct txgbe_mbx_info *mbx = &hw->mbx;\n \ts32 ret_val = 0;\n \n-\tDEBUGFUNC(\"txgbe_write_mbx\");\n-\n \tif (size > mbx->size) {\n \t\tret_val = TXGBE_ERR_MBX;\n \t\tDEBUGOUT(\"Invalid mailbox message size %d\", size);\n@@ -71,8 +67,6 @@ s32 txgbe_check_for_msg(struct txgbe_hw *hw, u16 mbx_id)\n \tstruct txgbe_mbx_info *mbx = &hw->mbx;\n \ts32 ret_val = TXGBE_ERR_MBX;\n \n-\tDEBUGFUNC(\"txgbe_check_for_msg\");\n-\n \tif (mbx->check_for_msg)\n \t\tret_val = mbx->check_for_msg(hw, mbx_id);\n \n@@ -91,8 +85,6 @@ s32 txgbe_check_for_ack(struct txgbe_hw *hw, u16 mbx_id)\n \tstruct txgbe_mbx_info *mbx = &hw->mbx;\n \ts32 ret_val = TXGBE_ERR_MBX;\n \n-\tDEBUGFUNC(\"txgbe_check_for_ack\");\n-\n \tif (mbx->check_for_ack)\n \t\tret_val = mbx->check_for_ack(hw, mbx_id);\n \n@@ -111,8 +103,6 @@ s32 txgbe_check_for_rst(struct txgbe_hw *hw, u16 mbx_id)\n \tstruct txgbe_mbx_info *mbx = &hw->mbx;\n \ts32 ret_val = TXGBE_ERR_MBX;\n \n-\tDEBUGFUNC(\"txgbe_check_for_rst\");\n-\n \tif (mbx->check_for_rst)\n \t\tret_val = mbx->check_for_rst(hw, mbx_id);\n \n@@ -131,8 +121,6 @@ STATIC s32 txgbe_poll_for_msg(struct txgbe_hw *hw, u16 mbx_id)\n \tstruct txgbe_mbx_info *mbx = &hw->mbx;\n \tint countdown = mbx->timeout;\n \n-\tDEBUGFUNC(\"txgbe_poll_for_msg\");\n-\n \tif (!countdown || !mbx->check_for_msg)\n \t\tgoto out;\n \n@@ -162,8 +150,6 @@ STATIC s32 txgbe_poll_for_ack(struct txgbe_hw *hw, u16 mbx_id)\n \tstruct txgbe_mbx_info *mbx = &hw->mbx;\n \tint countdown = mbx->timeout;\n \n-\tDEBUGFUNC(\"txgbe_poll_for_ack\");\n-\n \tif (!countdown || !mbx->check_for_ack)\n \t\tgoto out;\n \n@@ -196,8 +182,6 @@ s32 txgbe_read_posted_mbx(struct txgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)\n \tstruct txgbe_mbx_info *mbx = &hw->mbx;\n \ts32 ret_val = TXGBE_ERR_MBX;\n \n-\tDEBUGFUNC(\"txgbe_read_posted_mbx\");\n-\n \tif (!mbx->read)\n \t\tgoto out;\n \n@@ -226,8 +210,6 @@ s32 txgbe_write_posted_mbx(struct txgbe_hw *hw, u32 *msg, u16 size,\n \tstruct txgbe_mbx_info *mbx = &hw->mbx;\n \ts32 ret_val = TXGBE_ERR_MBX;\n \n-\tDEBUGFUNC(\"txgbe_write_posted_mbx\");\n-\n \t/* exit if either we can't write or there isn't a defined timeout */\n \tif (!mbx->write || !mbx->timeout)\n \t\tgoto out;\n@@ -292,7 +274,6 @@ s32 txgbe_check_for_msg_vf(struct txgbe_hw *hw, u16 mbx_id)\n \ts32 ret_val = TXGBE_ERR_MBX;\n \n \tUNREFERENCED_PARAMETER(mbx_id);\n-\tDEBUGFUNC(\"txgbe_check_for_msg_vf\");\n \n \tif (!txgbe_check_for_bit_vf(hw, TXGBE_VFMBCTL_PFSTS)) {\n \t\tret_val = 0;\n@@ -314,7 +295,6 @@ s32 txgbe_check_for_ack_vf(struct txgbe_hw *hw, u16 mbx_id)\n \ts32 ret_val = TXGBE_ERR_MBX;\n \n \tUNREFERENCED_PARAMETER(mbx_id);\n-\tDEBUGFUNC(\"txgbe_check_for_ack_vf\");\n \n \tif (!txgbe_check_for_bit_vf(hw, TXGBE_VFMBCTL_PFACK)) {\n \t\tret_val = 0;\n@@ -336,7 +316,6 @@ s32 txgbe_check_for_rst_vf(struct txgbe_hw *hw, u16 mbx_id)\n \ts32 ret_val = TXGBE_ERR_MBX;\n \n \tUNREFERENCED_PARAMETER(mbx_id);\n-\tDEBUGFUNC(\"txgbe_check_for_rst_vf\");\n \n \tif (!txgbe_check_for_bit_vf(hw, (TXGBE_VFMBCTL_RSTD |\n \t TXGBE_VFMBCTL_RSTI))) {\n@@ -357,8 +336,6 @@ STATIC s32 txgbe_obtain_mbx_lock_vf(struct txgbe_hw *hw)\n {\n \ts32 ret_val = TXGBE_ERR_MBX;\n \n-\tDEBUGFUNC(\"txgbe_obtain_mbx_lock_vf\");\n-\n \t/* Take ownership of the buffer */\n \twr32(hw, TXGBE_VFMBCTL, TXGBE_VFMBCTL_VFU);\n \n@@ -386,8 +363,6 @@ s32 txgbe_write_mbx_vf(struct txgbe_hw *hw, u32 *msg, u16 size,\n \n \tUNREFERENCED_PARAMETER(mbx_id);\n \n-\tDEBUGFUNC(\"txgbe_write_mbx_vf\");\n-\n \t/* lock the mailbox to prevent pf/vf race condition */\n \tret_val = txgbe_obtain_mbx_lock_vf(hw);\n \tif (ret_val)\n@@ -426,7 +401,6 @@ s32 txgbe_read_mbx_vf(struct txgbe_hw *hw, u32 *msg, u16 size,\n \ts32 ret_val = 0;\n \tu16 i;\n \n-\tDEBUGFUNC(\"txgbe_read_mbx_vf\");\n \tUNREFERENCED_PARAMETER(mbx_id);\n \n \t/* lock the mailbox to prevent pf/vf race condition */\n@@ -499,8 +473,6 @@ s32 txgbe_check_for_msg_pf(struct txgbe_hw *hw, u16 vf_number)\n \ts32 index = TXGBE_MBVFICR_INDEX(vf_number);\n \tu32 vf_bit = vf_number % 16;\n \n-\tDEBUGFUNC(\"txgbe_check_for_msg_pf\");\n-\n \tif (!txgbe_check_for_bit_pf(hw, TXGBE_MBVFICR_VFREQ_VF1 << vf_bit,\n \t\t\t\t index)) {\n \t\tret_val = 0;\n@@ -523,8 +495,6 @@ s32 txgbe_check_for_ack_pf(struct txgbe_hw *hw, u16 vf_number)\n \ts32 index = TXGBE_MBVFICR_INDEX(vf_number);\n \tu32 vf_bit = vf_number % 16;\n \n-\tDEBUGFUNC(\"txgbe_check_for_ack_pf\");\n-\n \tif (!txgbe_check_for_bit_pf(hw, TXGBE_MBVFICR_VFACK_VF1 << vf_bit,\n \t\t\t\t index)) {\n \t\tret_val = 0;\n@@ -548,8 +518,6 @@ s32 txgbe_check_for_rst_pf(struct txgbe_hw *hw, u16 vf_number)\n \tu32 vflre = 0;\n \ts32 ret_val = TXGBE_ERR_MBX;\n \n-\tDEBUGFUNC(\"txgbe_check_for_rst_pf\");\n-\n \tvflre = rd32(hw, TXGBE_FLRVFE(reg_offset));\n \tif (vflre & (1 << vf_shift)) {\n \t\tret_val = 0;\n@@ -572,8 +540,6 @@ STATIC s32 txgbe_obtain_mbx_lock_pf(struct txgbe_hw *hw, u16 vf_number)\n \ts32 ret_val = TXGBE_ERR_MBX;\n \tu32 p2v_mailbox;\n \n-\tDEBUGFUNC(\"txgbe_obtain_mbx_lock_pf\");\n-\n \t/* Take ownership of the buffer */\n \twr32(hw, TXGBE_MBCTL(vf_number), TXGBE_MBCTL_PFU);\n \n@@ -602,8 +568,6 @@ s32 txgbe_write_mbx_pf(struct txgbe_hw *hw, u32 *msg, u16 size, u16 vf_number)\n \ts32 ret_val;\n \tu16 i;\n \n-\tDEBUGFUNC(\"txgbe_write_mbx_pf\");\n-\n \t/* lock the mailbox to prevent pf/vf race condition */\n \tret_val = txgbe_obtain_mbx_lock_pf(hw, vf_number);\n \tif (ret_val)\n@@ -643,8 +607,6 @@ s32 txgbe_read_mbx_pf(struct txgbe_hw *hw, u32 *msg, u16 size, u16 vf_number)\n \ts32 ret_val;\n \tu16 i;\n \n-\tDEBUGFUNC(\"txgbe_read_mbx_pf\");\n-\n \t/* lock the mailbox to prevent pf/vf race condition */\n \tret_val = txgbe_obtain_mbx_lock_pf(hw, vf_number);\n \tif (ret_val)\ndiff --git a/drivers/net/txgbe/base/txgbe_mng.c b/drivers/net/txgbe/base/txgbe_mng.c\nindex d0aa665d4a..07bbfe8142 100644\n--- a/drivers/net/txgbe/base/txgbe_mng.c\n+++ b/drivers/net/txgbe/base/txgbe_mng.c\n@@ -45,10 +45,8 @@ txgbe_hic_unlocked(struct txgbe_hw *hw, u32 *buffer, u32 length, u32 timeout)\n \tu32 value, loop;\n \tu16 i, dword_len;\n \n-\tDEBUGFUNC(\"txgbe_hic_unlocked\");\n-\n \tif (!length || length > TXGBE_PMMBX_BSIZE) {\n-\t\tDEBUGOUT(\"Buffer length failure buffersize=%d.\\n\", length);\n+\t\tDEBUGOUT(\"Buffer length failure buffersize=%d.\", length);\n \t\treturn TXGBE_ERR_HOST_INTERFACE_COMMAND;\n \t}\n \n@@ -78,12 +76,12 @@ txgbe_hic_unlocked(struct txgbe_hw *hw, u32 *buffer, u32 length, u32 timeout)\n \t\tTXGBE_MNGMBXCTL_FWRDY, TXGBE_MNGMBXCTL_FWRDY,\n \t\t&value, timeout, 1000);\n \tif (!loop || !(value & TXGBE_MNGMBXCTL_FWACK)) {\n-\t\tDEBUGOUT(\"Command has failed with no status valid.\\n\");\n+\t\tDEBUGOUT(\"Command has failed with no status valid.\");\n \t\treturn TXGBE_ERR_HOST_INTERFACE_COMMAND;\n \t}\n \n \tif ((rd32(hw, TXGBE_MNGMBX) & 0xff0000) >> 16 == 0x80) {\n-\t\tDEBUGOUT(\"It's unknown command.\\n\");\n+\t\tDEBUGOUT(\"It's unknown command.\");\n \t\treturn TXGBE_ERR_MNG_ACCESS_FAILED;\n \t}\n \n@@ -119,10 +117,8 @@ txgbe_host_interface_command(struct txgbe_hw *hw, u32 *buffer,\n \tu32 bi;\n \tu32 dword_len;\n \n-\tDEBUGFUNC(\"txgbe_host_interface_command\");\n-\n \tif (length == 0 || length > TXGBE_PMMBX_BSIZE) {\n-\t\tDEBUGOUT(\"Buffer length failure buffersize=%d.\\n\", length);\n+\t\tDEBUGOUT(\"Buffer length failure buffersize=%d.\", length);\n \t\treturn TXGBE_ERR_HOST_INTERFACE_COMMAND;\n \t}\n \n@@ -164,7 +160,7 @@ txgbe_host_interface_command(struct txgbe_hw *hw, u32 *buffer,\n \t\tgoto rel_out;\n \n \tif (length < buf_len + hdr_size) {\n-\t\tDEBUGOUT(\"Buffer not large enough for reply message.\\n\");\n+\t\tDEBUGOUT(\"Buffer not large enough for reply message.\");\n \t\terr = TXGBE_ERR_HOST_INTERFACE_COMMAND;\n \t\tgoto rel_out;\n \t}\n@@ -273,8 +269,6 @@ s32 txgbe_close_notify(struct txgbe_hw *hw)\n \ts32 status;\n \tstruct txgbe_hic_write_shadow_ram buffer;\n \n-\tDEBUGFUNC(\"txgbe_close_notify\");\n-\n \tbuffer.hdr.req.cmd = FW_DW_CLOSE_NOTIFY;\n \tbuffer.hdr.req.buf_lenh = 0;\n \tbuffer.hdr.req.buf_lenl = 0;\n@@ -305,8 +299,6 @@ s32 txgbe_open_notify(struct txgbe_hw *hw)\n \ts32 status;\n \tstruct txgbe_hic_write_shadow_ram buffer;\n \n-\tDEBUGFUNC(\"txgbe_open_notify\");\n-\n \tbuffer.hdr.req.cmd = FW_DW_OPEN_NOTIFY;\n \tbuffer.hdr.req.buf_lenh = 0;\n \tbuffer.hdr.req.buf_lenl = 0;\n@@ -354,7 +346,6 @@ s32 txgbe_hic_set_drv_ver(struct txgbe_hw *hw, u8 maj, u8 min,\n \tint i;\n \ts32 ret_val = 0;\n \n-\tDEBUGFUNC(\"txgbe_hic_set_drv_ver\");\n \tUNREFERENCED_PARAMETER(len, driver_ver);\n \n \tfw_cmd.hdr.cmd = FW_CEM_CMD_DRIVER_INFO;\n@@ -407,8 +398,6 @@ txgbe_hic_reset(struct txgbe_hw *hw)\n \tint i;\n \ts32 err = 0;\n \n-\tDEBUGFUNC(\"\\n\");\n-\n \treset_cmd.hdr.cmd = FW_RESET_CMD;\n \treset_cmd.hdr.buf_len = FW_RESET_LEN;\n \treset_cmd.hdr.cmd_or_resp.cmd_resv = FW_CEM_CMD_RESERVED;\ndiff --git a/drivers/net/txgbe/base/txgbe_phy.c b/drivers/net/txgbe/base/txgbe_phy.c\nindex 3fb929f37a..504e513274 100644\n--- a/drivers/net/txgbe/base/txgbe_phy.c\n+++ b/drivers/net/txgbe/base/txgbe_phy.c\n@@ -35,7 +35,7 @@ static bool txgbe_identify_extphy(struct txgbe_hw *hw)\n \tu16 phy_addr = 0;\n \n \tif (!txgbe_validate_phy_addr(hw, phy_addr)) {\n-\t\tDEBUGOUT(\"Unable to validate PHY address 0x%04X\\n\",\n+\t\tDEBUGOUT(\"Unable to validate PHY address 0x%04X\",\n \t\t\tphy_addr);\n \t\treturn false;\n \t}\n@@ -100,8 +100,6 @@ s32 txgbe_identify_phy(struct txgbe_hw *hw)\n {\n \ts32 err = TXGBE_ERR_PHY_ADDR_INVALID;\n \n-\tDEBUGFUNC(\"txgbe_identify_phy\");\n-\n \ttxgbe_read_phy_if(hw);\n \n \tif (hw->phy.type != txgbe_phy_unknown)\n@@ -137,11 +135,9 @@ s32 txgbe_check_reset_blocked(struct txgbe_hw *hw)\n {\n \tu32 mmngc;\n \n-\tDEBUGFUNC(\"txgbe_check_reset_blocked\");\n-\n \tmmngc = rd32(hw, TXGBE_STAT);\n \tif (mmngc & TXGBE_STAT_MNGVETO) {\n-\t\tDEBUGOUT(\"MNG_VETO bit detected.\\n\");\n+\t\tDEBUGOUT(\"MNG_VETO bit detected.\");\n \t\treturn true;\n \t}\n \n@@ -159,8 +155,6 @@ bool txgbe_validate_phy_addr(struct txgbe_hw *hw, u32 phy_addr)\n \tu16 phy_id = 0;\n \tbool valid = false;\n \n-\tDEBUGFUNC(\"txgbe_validate_phy_addr\");\n-\n \thw->phy.addr = phy_addr;\n \thw->phy.read_reg(hw, TXGBE_MD_PHY_ID_HIGH,\n \t\t\t TXGBE_MD_DEV_PMA_PMD, &phy_id);\n@@ -168,7 +162,7 @@ bool txgbe_validate_phy_addr(struct txgbe_hw *hw, u32 phy_addr)\n \tif (phy_id != 0xFFFF && phy_id != 0x0)\n \t\tvalid = true;\n \n-\tDEBUGOUT(\"PHY ID HIGH is 0x%04X\\n\", phy_id);\n+\tDEBUGOUT(\"PHY ID HIGH is 0x%04X\", phy_id);\n \n \treturn valid;\n }\n@@ -184,8 +178,6 @@ s32 txgbe_get_phy_id(struct txgbe_hw *hw)\n \tu16 phy_id_high = 0;\n \tu16 phy_id_low = 0;\n \n-\tDEBUGFUNC(\"txgbe_get_phy_id\");\n-\n \terr = hw->phy.read_reg(hw, TXGBE_MD_PHY_ID_HIGH,\n \t\t\t\t TXGBE_MD_DEV_PMA_PMD,\n \t\t\t\t &phy_id_high);\n@@ -198,7 +190,7 @@ s32 txgbe_get_phy_id(struct txgbe_hw *hw)\n \t\thw->phy.id |= (u32)(phy_id_low & TXGBE_PHY_REVISION_MASK);\n \t\thw->phy.revision = (u32)(phy_id_low & ~TXGBE_PHY_REVISION_MASK);\n \t}\n-\tDEBUGOUT(\"PHY_ID_HIGH 0x%04X, PHY_ID_LOW 0x%04X\\n\",\n+\tDEBUGOUT(\"PHY_ID_HIGH 0x%04X, PHY_ID_LOW 0x%04X\",\n \t\t phy_id_high, phy_id_low);\n \n \treturn err;\n@@ -213,8 +205,6 @@ enum txgbe_phy_type txgbe_get_phy_type_from_id(u32 phy_id)\n {\n \tenum txgbe_phy_type phy_type;\n \n-\tDEBUGFUNC(\"txgbe_get_phy_type_from_id\");\n-\n \tswitch (phy_id) {\n \tcase TXGBE_PHYID_TN1010:\n \t\tphy_type = txgbe_phy_tn;\n@@ -272,7 +262,7 @@ txgbe_reset_extphy(struct txgbe_hw *hw)\n \n \tif (ctrl & TXGBE_MD_PORT_CTRL_RESET) {\n \t\terr = TXGBE_ERR_RESET_FAILED;\n-\t\tDEBUGOUT(\"PHY reset polling failed to complete.\\n\");\n+\t\tDEBUGOUT(\"PHY reset polling failed to complete.\");\n \t}\n \n \treturn err;\n@@ -286,8 +276,6 @@ s32 txgbe_reset_phy(struct txgbe_hw *hw)\n {\n \ts32 err = 0;\n \n-\tDEBUGFUNC(\"txgbe_reset_phy\");\n-\n \tif (hw->phy.type == txgbe_phy_unknown)\n \t\terr = txgbe_identify_phy(hw);\n \n@@ -343,7 +331,7 @@ s32 txgbe_read_phy_reg_mdi(struct txgbe_hw *hw, u32 reg_addr, u32 device_type,\n \t */\n \tif (!po32m(hw, TXGBE_MDIOSCD, TXGBE_MDIOSCD_BUSY,\n \t\t0, NULL, 100, 100)) {\n-\t\tDEBUGOUT(\"PHY address command did not complete\\n\");\n+\t\tDEBUGOUT(\"PHY address command did not complete\");\n \t\treturn TXGBE_ERR_PHY;\n \t}\n \n@@ -367,8 +355,6 @@ s32 txgbe_read_phy_reg(struct txgbe_hw *hw, u32 reg_addr,\n \ts32 err;\n \tu32 gssr = hw->phy.phy_semaphore_mask;\n \n-\tDEBUGFUNC(\"txgbe_read_phy_reg\");\n-\n \tif (hw->mac.acquire_swfw_sync(hw, gssr))\n \t\treturn TXGBE_ERR_SWFW_SYNC;\n \n@@ -406,7 +392,7 @@ s32 txgbe_write_phy_reg_mdi(struct txgbe_hw *hw, u32 reg_addr,\n \t/* wait for completion */\n \tif (!po32m(hw, TXGBE_MDIOSCD, TXGBE_MDIOSCD_BUSY,\n \t\t0, NULL, 100, 100)) {\n-\t\tTLOG_DEBUG(\"PHY write cmd didn't complete\\n\");\n+\t\tTLOG_DEBUG(\"PHY write cmd didn't complete\");\n \t\treturn -TERR_PHY;\n \t}\n \n@@ -427,8 +413,6 @@ s32 txgbe_write_phy_reg(struct txgbe_hw *hw, u32 reg_addr,\n \ts32 err;\n \tu32 gssr = hw->phy.phy_semaphore_mask;\n \n-\tDEBUGFUNC(\"txgbe_write_phy_reg\");\n-\n \tif (hw->mac.acquire_swfw_sync(hw, gssr))\n \t\terr = TXGBE_ERR_SWFW_SYNC;\n \n@@ -452,8 +436,6 @@ s32 txgbe_setup_phy_link(struct txgbe_hw *hw)\n \tbool autoneg = false;\n \tu32 speed;\n \n-\tDEBUGFUNC(\"txgbe_setup_phy_link\");\n-\n \ttxgbe_get_copper_link_capabilities(hw, &speed, &autoneg);\n \n \t/* Set or unset auto-negotiation 10G advertisement */\n@@ -539,8 +521,6 @@ s32 txgbe_setup_phy_link_speed(struct txgbe_hw *hw,\n {\n \tUNREFERENCED_PARAMETER(autoneg_wait_to_complete);\n \n-\tDEBUGFUNC(\"txgbe_setup_phy_link_speed\");\n-\n \t/*\n \t * Clear autoneg_advertised and set new values based on input link\n \t * speed.\n@@ -623,8 +603,6 @@ s32 txgbe_get_copper_link_capabilities(struct txgbe_hw *hw,\n {\n \ts32 err = 0;\n \n-\tDEBUGFUNC(\"txgbe_get_copper_link_capabilities\");\n-\n \t*autoneg = true;\n \tif (!hw->phy.speeds_supported)\n \t\terr = txgbe_get_copper_speeds_supported(hw);\n@@ -652,8 +630,6 @@ s32 txgbe_check_phy_link_tnx(struct txgbe_hw *hw, u32 *speed,\n \tu16 phy_speed = 0;\n \tu16 phy_data = 0;\n \n-\tDEBUGFUNC(\"txgbe_check_phy_link_tnx\");\n-\n \t/* Initialize speed and link to default case */\n \t*link_up = false;\n \t*speed = TXGBE_LINK_SPEED_10GB_FULL;\n@@ -697,8 +673,6 @@ s32 txgbe_setup_phy_link_tnx(struct txgbe_hw *hw)\n \tbool autoneg = false;\n \tu32 speed;\n \n-\tDEBUGFUNC(\"txgbe_setup_phy_link_tnx\");\n-\n \ttxgbe_get_copper_link_capabilities(hw, &speed, &autoneg);\n \n \tif (speed & TXGBE_LINK_SPEED_10GB_FULL) {\n@@ -772,8 +746,6 @@ s32 txgbe_identify_module(struct txgbe_hw *hw)\n {\n \ts32 err = TXGBE_ERR_SFP_NOT_PRESENT;\n \n-\tDEBUGFUNC(\"txgbe_identify_module\");\n-\n \tswitch (hw->phy.media_type) {\n \tcase txgbe_media_type_fiber:\n \t\terr = txgbe_identify_sfp_module(hw);\n@@ -811,8 +783,6 @@ s32 txgbe_identify_sfp_module(struct txgbe_hw *hw)\n \tu8 cable_spec = 0;\n \tu16 enforce_sfp = 0;\n \n-\tDEBUGFUNC(\"txgbe_identify_sfp_module\");\n-\n \tif (hw->phy.media_type != txgbe_media_type_fiber) {\n \t\thw->phy.sfp_type = txgbe_sfp_type_not_present;\n \t\treturn TXGBE_ERR_SFP_NOT_PRESENT;\n@@ -992,7 +962,7 @@ s32 txgbe_identify_sfp_module(struct txgbe_hw *hw)\n \t hw->phy.sfp_type == txgbe_sfp_type_1g_lx_core1 ||\n \t hw->phy.sfp_type == txgbe_sfp_type_1g_sx_core0 ||\n \t hw->phy.sfp_type == txgbe_sfp_type_1g_sx_core1)) {\n-\t\tDEBUGOUT(\"SFP+ module not supported\\n\");\n+\t\tDEBUGOUT(\"SFP+ module not supported\");\n \t\thw->phy.type = txgbe_phy_sfp_unsupported;\n \t\treturn TXGBE_ERR_SFP_NOT_SUPPORTED;\n \t}\n@@ -1021,8 +991,6 @@ s32 txgbe_identify_qsfp_module(struct txgbe_hw *hw)\n \tu8 device_tech = 0;\n \tbool active_cable = false;\n \n-\tDEBUGFUNC(\"txgbe_identify_qsfp_module\");\n-\n \tif (hw->phy.media_type != txgbe_media_type_fiber_qsfp) {\n \t\thw->phy.sfp_type = txgbe_sfp_type_not_present;\n \t\terr = TXGBE_ERR_SFP_NOT_PRESENT;\n@@ -1165,10 +1133,10 @@ s32 txgbe_identify_qsfp_module(struct txgbe_hw *hw)\n \t\t\t\tif (hw->allow_unsupported_sfp) {\n \t\t\t\t\tDEBUGOUT(\"WARNING: Wangxun (R) Network Connections are quality tested using Wangxun (R) Ethernet Optics. \"\n \t\t\t\t\t\t\"Using untested modules is not supported and may cause unstable operation or damage to the module or the adapter. \"\n-\t\t\t\t\t\t\"Wangxun Corporation is not responsible for any harm caused by using untested modules.\\n\");\n+\t\t\t\t\t\t\"Wangxun Corporation is not responsible for any harm caused by using untested modules.\");\n \t\t\t\t\terr = 0;\n \t\t\t\t} else {\n-\t\t\t\t\tDEBUGOUT(\"QSFP module not supported\\n\");\n+\t\t\t\t\tDEBUGOUT(\"QSFP module not supported\");\n \t\t\t\t\thw->phy.type =\n \t\t\t\t\t\ttxgbe_phy_sfp_unsupported;\n \t\t\t\t\terr = TXGBE_ERR_SFP_NOT_SUPPORTED;\n@@ -1194,8 +1162,6 @@ s32 txgbe_identify_qsfp_module(struct txgbe_hw *hw)\n s32 txgbe_read_i2c_eeprom(struct txgbe_hw *hw, u8 byte_offset,\n \t\t\t\t u8 *eeprom_data)\n {\n-\tDEBUGFUNC(\"txgbe_read_i2c_eeprom\");\n-\n \treturn hw->phy.read_i2c_byte(hw, byte_offset,\n \t\t\t\t\t TXGBE_I2C_EEPROM_DEV_ADDR,\n \t\t\t\t\t eeprom_data);\n@@ -1228,8 +1194,6 @@ s32 txgbe_read_i2c_sff8472(struct txgbe_hw *hw, u8 byte_offset,\n s32 txgbe_write_i2c_eeprom(struct txgbe_hw *hw, u8 byte_offset,\n \t\t\t\t u8 eeprom_data)\n {\n-\tDEBUGFUNC(\"txgbe_write_i2c_eeprom\");\n-\n \treturn hw->phy.write_i2c_byte(hw, byte_offset,\n \t\t\t\t\t TXGBE_I2C_EEPROM_DEV_ADDR,\n \t\t\t\t\t eeprom_data);\n@@ -1248,8 +1212,6 @@ s32 txgbe_write_i2c_eeprom(struct txgbe_hw *hw, u8 byte_offset,\n s32 txgbe_read_i2c_byte_unlocked(struct txgbe_hw *hw, u8 byte_offset,\n \t\t\t\t\t u8 dev_addr, u8 *data)\n {\n-\tDEBUGFUNC(\"txgbe_read_i2c_byte\");\n-\n \ttxgbe_i2c_start(hw, dev_addr);\n \n \t/* wait tx empty */\n@@ -1312,8 +1274,6 @@ s32 txgbe_read_i2c_byte(struct txgbe_hw *hw, u8 byte_offset,\n s32 txgbe_write_i2c_byte_unlocked(struct txgbe_hw *hw, u8 byte_offset,\n \t\t\t\t\t u8 dev_addr, u8 data)\n {\n-\tDEBUGFUNC(\"txgbe_write_i2c_byte\");\n-\n \ttxgbe_i2c_start(hw, dev_addr);\n \n \t/* wait tx empty */\n@@ -1367,8 +1327,6 @@ s32 txgbe_write_i2c_byte(struct txgbe_hw *hw, u8 byte_offset,\n **/\n static void txgbe_i2c_start(struct txgbe_hw *hw, u8 dev_addr)\n {\n-\tDEBUGFUNC(\"txgbe_i2c_start\");\n-\n \twr32(hw, TXGBE_I2CENA, 0);\n \n \twr32(hw, TXGBE_I2CCON,\n@@ -1396,12 +1354,10 @@ static void txgbe_i2c_start(struct txgbe_hw *hw, u8 dev_addr)\n **/\n static void txgbe_i2c_stop(struct txgbe_hw *hw)\n {\n-\tDEBUGFUNC(\"txgbe_i2c_stop\");\n-\n \t/* wait for completion */\n \tif (!po32m(hw, TXGBE_I2CSTAT, TXGBE_I2CSTAT_MST,\n \t\t0, NULL, 100, 100)) {\n-\t\tDEBUGFUNC(\"i2c stop timeout.\");\n+\t\tDEBUGOUT(\"i2c stop timeout.\");\n \t}\n \n \twr32(hw, TXGBE_I2CENA, 0);\n@@ -2420,8 +2376,6 @@ s32 txgbe_kr_handle(struct txgbe_hw *hw)\n \tu32 value;\n \ts32 status = 0;\n \n-\tDEBUGFUNC(\"txgbe_kr_handle\");\n-\n \tvalue = rd32_epcs(hw, VR_AN_INTR);\n \tBP_LOG(\"AN INTERRUPT!! value: 0x%x\\n\", value);\n \tif (!(value & VR_AN_INTR_PG_RCV)) {\n@@ -2445,8 +2399,6 @@ static s32 txgbe_handle_bp_flow(u32 link_mode, struct txgbe_hw *hw)\n \ts32 status = 0;\n \tstruct txgbe_backplane_ability local_ability, lp_ability;\n \n-\tDEBUGFUNC(\"txgbe_handle_bp_flow\");\n-\n \tlocal_ability.current_link_mode = link_mode;\n \n \t/* 1. Get the local AN73 Base Page Ability */\n@@ -2548,8 +2500,6 @@ static void txgbe_get_bp_ability(struct txgbe_backplane_ability *ability,\n {\n \tu32 value = 0;\n \n-\tDEBUGFUNC(\"txgbe_get_bp_ability\");\n-\n \t/* Link Partner Base Page */\n \tif (link_partner == 1) {\n \t\t/* Read the link partner AN73 Base Page Ability Registers */\n@@ -2621,8 +2571,6 @@ static s32 txgbe_check_bp_ability(struct txgbe_backplane_ability *local_ability,\n \tu32 com_link_abi;\n \ts32 ret = 0;\n \n-\tDEBUGFUNC(\"txgbe_check_bp_ability\");\n-\n \tcom_link_abi = local_ability->link_ability & lp_ability->link_ability;\n \tBP_LOG(\"com_link_abi = 0x%x, local_ability = 0x%x, lp_ability = 0x%x\\n\",\n \t\tcom_link_abi, local_ability->link_ability,\n@@ -2678,8 +2626,6 @@ static void txgbe_clear_bp_intr(u32 bit, u32 bit_high, struct txgbe_hw *hw)\n {\n \tu32 rdata = 0, wdata, i;\n \n-\tDEBUGFUNC(\"txgbe_clear_bp_intr\");\n-\n \trdata = rd32_epcs(hw, VR_AN_INTR);\n \tBP_LOG(\"[Before clear]Read VR AN MMD Interrupt Register: 0x%x\\n\",\n \t\t\trdata);\n@@ -2704,8 +2650,6 @@ static s32 txgbe_enable_kr_training(struct txgbe_hw *hw)\n \ts32 status = 0;\n \tu32 value = 0;\n \n-\tDEBUGFUNC(\"txgbe_enable_kr_training\");\n-\n \tBP_LOG(\"Enable Clause 72 KR Training ...\\n\");\n \n \tif (CL72_KRTR_PRBS_MODE_EN != 0xFFFF) {\n@@ -2749,8 +2693,6 @@ static s32 txgbe_disable_kr_training(struct txgbe_hw *hw, s32 post, s32 mode)\n {\n \ts32 status = 0;\n \n-\tDEBUGFUNC(\"txgbe_disable_kr_training\");\n-\n \tBP_LOG(\"Disable Clause 72 KR Training ...\\n\");\n \t/* Read PHY Lane0 TX EQ before Clause 72 KR Training. */\n \ttxgbe_read_phy_lane_tx_eq(0, hw, post, mode);\n@@ -2767,8 +2709,6 @@ static s32 txgbe_check_kr_training(struct txgbe_hw *hw)\n \tint i;\n \tint times = hw->devarg.poll ? 35 : 20;\n \n-\tDEBUGFUNC(\"txgbe_check_kr_training\");\n-\n \tfor (i = 0; i < times; i++) {\n \t\tvalue = rd32_epcs(hw, SR_PMA_KR_LP_CEU);\n \t\tBP_LOG(\"SR PMA MMD 10GBASE-KR LP Coefficient Update Register: 0x%x\\n\",\n@@ -2826,8 +2766,6 @@ static void txgbe_read_phy_lane_tx_eq(u16 lane, struct txgbe_hw *hw,\n \tu32 addr;\n \tu32 tx_main_cursor, tx_pre_cursor, tx_post_cursor, lmain;\n \n-\tDEBUGFUNC(\"txgbe_read_phy_lane_tx_eq\");\n-\n \taddr = TXGBE_PHY_LANE0_TX_EQ_CTL1 | (lane << 8);\n \tvalue = rd32_ephy(hw, addr);\n \tBP_LOG(\"PHY LANE TX EQ Read Value: %x\\n\", lane);\ndiff --git a/drivers/net/txgbe/base/txgbe_vf.c b/drivers/net/txgbe/base/txgbe_vf.c\nindex fb6d6d90ea..a73502351e 100644\n--- a/drivers/net/txgbe/base/txgbe_vf.c\n+++ b/drivers/net/txgbe/base/txgbe_vf.c\n@@ -107,8 +107,6 @@ s32 txgbe_reset_hw_vf(struct txgbe_hw *hw)\n \tu32 msgbuf[TXGBE_VF_PERMADDR_MSG_LEN];\n \tu8 *addr = (u8 *)(&msgbuf[1]);\n \n-\tDEBUGFUNC(\"txgbevf_reset_hw_vf\");\n-\n \t/* Call adapter stop to disable tx/rx and clear interrupts */\n \thw->mac.stop_hw(hw);\n \n@@ -121,7 +119,7 @@ s32 txgbe_reset_hw_vf(struct txgbe_hw *hw)\n \tmbx->write_posted(hw, msgbuf, 1, 0);\n \tmsec_delay(10);\n \n-\tDEBUGOUT(\"Issuing a function level reset to MAC\\n\");\n+\tDEBUGOUT(\"Issuing a function level reset to MAC\");\n \twr32(hw, TXGBE_VFRST, TXGBE_VFRST_SET);\n \ttxgbe_flush(hw);\n \tmsec_delay(50);\n@@ -238,7 +236,7 @@ STATIC s32 txgbe_mta_vector(struct txgbe_hw *hw, u8 *mc_addr)\n \t\tvector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));\n \t\tbreak;\n \tdefault: /* Invalid mc_filter_type */\n-\t\tDEBUGOUT(\"MC filter type param set incorrectly\\n\");\n+\t\tDEBUGOUT(\"MC filter type param set incorrectly\");\n \t\tASSERT(0);\n \t\tbreak;\n \t}\n@@ -316,8 +314,6 @@ s32 txgbe_update_mc_addr_list_vf(struct txgbe_hw *hw, u8 *mc_addr_list,\n \n \tUNREFERENCED_PARAMETER(clear);\n \n-\tDEBUGFUNC(\"txgbe_update_mc_addr_list_vf\");\n-\n \t/* Each entry in the list uses 1 16 bit word. We have 30\n \t * 16 bit words available in our HW msg buffer (minus 1 for the\n \t * msg type). That's 30 hash values if we pack 'em right. If\n@@ -327,7 +323,7 @@ s32 txgbe_update_mc_addr_list_vf(struct txgbe_hw *hw, u8 *mc_addr_list,\n \t * addresses except for in large enterprise network environments.\n \t */\n \n-\tDEBUGOUT(\"MC Addr Count = %d\\n\", mc_addr_count);\n+\tDEBUGOUT(\"MC Addr Count = %d\", mc_addr_count);\n \n \tcnt = (mc_addr_count > 30) ? 30 : mc_addr_count;\n \tmsgbuf[0] = TXGBE_VF_SET_MULTICAST;\n@@ -335,7 +331,7 @@ s32 txgbe_update_mc_addr_list_vf(struct txgbe_hw *hw, u8 *mc_addr_list,\n \n \tfor (i = 0; i < cnt; i++) {\n \t\tvector = txgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq));\n-\t\tDEBUGOUT(\"Hash value = 0x%03X\\n\", vector);\n+\t\tDEBUGOUT(\"Hash value = 0x%03X\", vector);\n \t\tvector_list[i] = (u16)vector;\n \t}\n \ndiff --git a/drivers/net/txgbe/txgbe_logs.h b/drivers/net/txgbe/txgbe_logs.h\nindex 67e9bfb3af..38c5d05984 100644\n--- a/drivers/net/txgbe/txgbe_logs.h\n+++ b/drivers/net/txgbe/txgbe_logs.h\n@@ -48,11 +48,8 @@ extern int txgbe_logtype_tx_free;\n #define PMD_TX_FREE_LOG(level, fmt, args...) do { } while (0)\n #endif\n \n-#define TLOG_DEBUG(fmt, args...) PMD_DRV_LOG(DEBUG, fmt, ##args)\n-\n-#define DEBUGOUT(fmt, args...) TLOG_DEBUG(fmt, ##args)\n-#define PMD_INIT_FUNC_TRACE() TLOG_DEBUG(\" >>\")\n-#define DEBUGFUNC(fmt) TLOG_DEBUG(fmt)\n+#define DEBUGOUT(fmt, args...) PMD_DRV_LOG(fmt, ##args)\n+#define PMD_INIT_FUNC_TRACE() PMD_DRV_LOG(\" >>\")\n \n extern int txgbe_logtype_bp;\n #define BP_LOG(fmt, args...) \\\n", "prefixes": [ "2/2" ] }