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GET /api/patches/107374/?format=api
{ "id": 107374, "url": "https://patches.dpdk.org/api/patches/107374/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20220211151114.17364-1-cristian.dumitrescu@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220211151114.17364-1-cristian.dumitrescu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220211151114.17364-1-cristian.dumitrescu@intel.com", "date": "2022-02-11T15:11:14", "name": "[V3] pipeline: support checksum for variable size headers", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "0532167f46e695547e2eddce69591c0f6213d0db", "submitter": { "id": 19, "url": "https://patches.dpdk.org/api/people/19/?format=api", "name": "Cristian Dumitrescu", "email": "cristian.dumitrescu@intel.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20220211151114.17364-1-cristian.dumitrescu@intel.com/mbox/", "series": [ { "id": 21636, "url": "https://patches.dpdk.org/api/series/21636/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=21636", "date": "2022-02-11T15:11:14", "name": "[V3] pipeline: support checksum for variable size headers", "version": 3, "mbox": "https://patches.dpdk.org/series/21636/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/107374/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/107374/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 6F970A00C5;\n\tFri, 11 Feb 2022 16:11:20 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 0BAA941144;\n\tFri, 11 Feb 2022 16:11:20 +0100 (CET)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n by mails.dpdk.org (Postfix) with ESMTP id B874F410E5\n for <dev@dpdk.org>; Fri, 11 Feb 2022 16:11:17 +0100 (CET)", "from fmsmga007.fm.intel.com ([10.253.24.52])\n by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 Feb 2022 07:11:16 -0800", "from silpixa00400573.ir.intel.com (HELO\n silpixa00400573.ger.corp.intel.com) ([10.237.223.107])\n by fmsmga007.fm.intel.com with ESMTP; 11 Feb 2022 07:11:15 -0800" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1644592277; x=1676128277;\n h=from:to:cc:subject:date:message-id:in-reply-to: references;\n bh=d8Q/9Mio7SJO+7YfrVFSpn2CN+bbCIWityx62lJVALU=;\n b=foDkvUeyIeA0/3TduNHmjQ3CxiKLtmGNzN+MQ1+7bkshFaas4BxpUEqi\n dZ2C5+Ywug60cSIrSidp0aOg6qzbNkV/c8524nu4sPsk7I/wQhKYFUlJb\n yWvszNb82sEmVmUNcze1KF3aMzoliqtVDi9JcpbRrob60aj8C5ONMiMmF\n j0XdORUfaY281QvOLxwSLQBIW0eqKE30HrCl0AEh5Dtq+Wvab5JKIINRy\n sCiA4BAkyA29kJ2zATTIXgGrheYvWu9sj1jobxvSF80CPxt5vFTnN3G1Q\n yLgMgU1pMbRMR4pT1pepQYytgV5rS77iJg+ecjqLVD8jIOjH7q9FXdRa+ Q==;", "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,10254\"; a=\"249954378\"", "E=Sophos;i=\"5.88,361,1635231600\"; d=\"scan'208\";a=\"249954378\"", "E=Sophos;i=\"5.88,361,1635231600\"; d=\"scan'208\";a=\"537667589\"" ], "X-ExtLoop1": "1", "From": "Cristian Dumitrescu <cristian.dumitrescu@intel.com>", "To": "dev@dpdk.org", "Cc": "Yogesh Jangra <yogesh.jangra@intel.com>,\n Harshad Suresh Narayane <harshad.suresh.narayane@intel.com>", "Subject": "[PATCH V3] pipeline: support checksum for variable size headers", "Date": "Fri, 11 Feb 2022 15:11:14 +0000", "Message-Id": "<20220211151114.17364-1-cristian.dumitrescu@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20220208215205.33730-1-cristian.dumitrescu@intel.com>", "References": "<20220208215205.33730-1-cristian.dumitrescu@intel.com>", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Added checksum support for variable size headers such as IPv4 headers\nwith options.\n\nSigned-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>\nSigned-off-by: Yogesh Jangra <yogesh.jangra@intel.com>\nSigned-off-by: Harshad Suresh Narayane <harshad.suresh.narayane@intel.com>\n---\nChange log:\nV2: Fix the checksum accumulation over initial destination value.\nV3: Fix strange git am issue.\n\n lib/pipeline/rte_swx_pipeline.c | 13 +++---\n lib/pipeline/rte_swx_pipeline_internal.h | 59 ++++++++++++++++--------\n 2 files changed, 47 insertions(+), 25 deletions(-)", "diff": "diff --git a/lib/pipeline/rte_swx_pipeline.c b/lib/pipeline/rte_swx_pipeline.c\nindex 1a50c4bb72..eb54ccaeda 100644\n--- a/lib/pipeline/rte_swx_pipeline.c\n+++ b/lib/pipeline/rte_swx_pipeline.c\n@@ -2887,8 +2887,8 @@ instr_alu_ckadd_translate(struct rte_swx_pipeline *p,\n \tCHECK(n_tokens == 3, EINVAL);\n \n \tfdst = header_field_parse(p, dst, &hdst);\n-\tCHECK(fdst && (fdst->n_bits == 16), EINVAL);\n-\tCHECK(!fdst->var_size, EINVAL);\n+\tCHECK(fdst, EINVAL);\n+\tCHECK(!fdst->var_size && (fdst->n_bits == 16), EINVAL);\n \n \t/* CKADD_FIELD. */\n \tfsrc = header_field_parse(p, src, &hsrc);\n@@ -2908,17 +2908,16 @@ instr_alu_ckadd_translate(struct rte_swx_pipeline *p,\n \t/* CKADD_STRUCT, CKADD_STRUCT20. */\n \thsrc = header_parse(p, src);\n \tCHECK(hsrc, EINVAL);\n-\tCHECK(!hsrc->st->var_size, EINVAL);\n \n \tinstr->type = INSTR_ALU_CKADD_STRUCT;\n-\tif ((hsrc->st->n_bits / 8) == 20)\n+\tif (!hsrc->st->var_size && ((hsrc->st->n_bits / 8) == 20))\n \t\tinstr->type = INSTR_ALU_CKADD_STRUCT20;\n \n \tinstr->alu.dst.struct_id = (uint8_t)hdst->struct_id;\n \tinstr->alu.dst.n_bits = fdst->n_bits;\n \tinstr->alu.dst.offset = fdst->offset / 8;\n \tinstr->alu.src.struct_id = (uint8_t)hsrc->struct_id;\n-\tinstr->alu.src.n_bits = hsrc->st->n_bits;\n+\tinstr->alu.src.n_bits = (uint8_t)hsrc->id; /* The src header ID is stored here. */\n \tinstr->alu.src.offset = 0; /* Unused. */\n \treturn 0;\n }\n@@ -2938,8 +2937,8 @@ instr_alu_cksub_translate(struct rte_swx_pipeline *p,\n \tCHECK(n_tokens == 3, EINVAL);\n \n \tfdst = header_field_parse(p, dst, &hdst);\n-\tCHECK(fdst && (fdst->n_bits == 16), EINVAL);\n-\tCHECK(!fdst->var_size, EINVAL);\n+\tCHECK(fdst, EINVAL);\n+\tCHECK(!fdst->var_size && (fdst->n_bits == 16), EINVAL);\n \n \tfsrc = header_field_parse(p, src, &hsrc);\n \tCHECK(fsrc, EINVAL);\ndiff --git a/lib/pipeline/rte_swx_pipeline_internal.h b/lib/pipeline/rte_swx_pipeline_internal.h\nindex 8f0b024666..da3e88bfa8 100644\n--- a/lib/pipeline/rte_swx_pipeline_internal.h\n+++ b/lib/pipeline/rte_swx_pipeline_internal.h\n@@ -305,16 +305,16 @@ enum instruction_type {\n \tINSTR_ALU_SUB_HI, /* dst = H, src = I */\n \n \t/* ckadd dst src\n-\t * dst = dst '+ src[0:1] '+ src[2:3] + ...\n-\t * dst = H, src = {H, h.header}\n+\t * dst = dst '+ src[0:1] '+ src[2:3] '+ ...\n+\t * dst = H, src = {H, h.header}, '+ = 1's complement addition operator\n \t */\n \tINSTR_ALU_CKADD_FIELD, /* src = H */\n-\tINSTR_ALU_CKADD_STRUCT20, /* src = h.header, with sizeof(header) = 20 */\n-\tINSTR_ALU_CKADD_STRUCT, /* src = h.header, with any sizeof(header) */\n+\tINSTR_ALU_CKADD_STRUCT20, /* src = h.header, with sizeof(header) = 20 bytes. */\n+\tINSTR_ALU_CKADD_STRUCT, /* src = h.header, with sizeof(header) any 4-byte multiple. */\n \n \t/* cksub dst src\n \t * dst = dst '- src\n-\t * dst = H, src = H\n+\t * dst = H, src = H, '- = 1's complement subtraction operator\n \t */\n \tINSTR_ALU_CKSUB_FIELD,\n \n@@ -2700,6 +2700,7 @@ __instr_alu_ckadd_field_exec(struct rte_swx_pipeline *p __rte_unused,\n \tsrc64_mask = UINT64_MAX >> (64 - ip->alu.src.n_bits);\n \tsrc = src64 & src64_mask;\n \n+\t/* Initialize the result with destination 1's complement. */\n \tr = dst;\n \tr = ~r & 0xFFFF;\n \n@@ -2727,6 +2728,7 @@ __instr_alu_ckadd_field_exec(struct rte_swx_pipeline *p __rte_unused,\n \t */\n \tr = (r & 0xFFFF) + (r >> 16);\n \n+\t/* Apply 1's complement to the result. */\n \tr = ~r & 0xFFFF;\n \tr = r ? r : 0xFFFF;\n \n@@ -2756,6 +2758,7 @@ __instr_alu_cksub_field_exec(struct rte_swx_pipeline *p __rte_unused,\n \tsrc64_mask = UINT64_MAX >> (64 - ip->alu.src.n_bits);\n \tsrc = src64 & src64_mask;\n \n+\t/* Initialize the result with destination 1's complement. */\n \tr = dst;\n \tr = ~r & 0xFFFF;\n \n@@ -2795,6 +2798,7 @@ __instr_alu_cksub_field_exec(struct rte_swx_pipeline *p __rte_unused,\n \t */\n \tr = (r & 0xFFFF) + (r >> 16);\n \n+\t/* Apply 1's complement to the result. */\n \tr = ~r & 0xFFFF;\n \tr = r ? r : 0xFFFF;\n \n@@ -2807,7 +2811,7 @@ __instr_alu_ckadd_struct20_exec(struct rte_swx_pipeline *p __rte_unused,\n \t\t\t\tconst struct instruction *ip)\n {\n \tuint8_t *dst_struct, *src_struct;\n-\tuint16_t *dst16_ptr;\n+\tuint16_t *dst16_ptr, dst;\n \tuint32_t *src32_ptr;\n \tuint64_t r0, r1;\n \n@@ -2816,13 +2820,18 @@ __instr_alu_ckadd_struct20_exec(struct rte_swx_pipeline *p __rte_unused,\n \t/* Structs. */\n \tdst_struct = t->structs[ip->alu.dst.struct_id];\n \tdst16_ptr = (uint16_t *)&dst_struct[ip->alu.dst.offset];\n+\tdst = *dst16_ptr;\n \n \tsrc_struct = t->structs[ip->alu.src.struct_id];\n \tsrc32_ptr = (uint32_t *)&src_struct[0];\n \n-\tr0 = src32_ptr[0]; /* r0 is a 32-bit number. */\n+\t/* Initialize the result with destination 1's complement. */\n+\tr0 = dst;\n+\tr0 = ~r0 & 0xFFFF;\n+\n+\tr0 += src32_ptr[0]; /* The output r0 is a 33-bit number. */\n \tr1 = src32_ptr[1]; /* r1 is a 32-bit number. */\n-\tr0 += src32_ptr[2]; /* The output r0 is a 33-bit number. */\n+\tr0 += src32_ptr[2]; /* The output r0 is a 34-bit number. */\n \tr1 += src32_ptr[3]; /* The output r1 is a 33-bit number. */\n \tr0 += r1 + src32_ptr[4]; /* The output r0 is a 35-bit number. */\n \n@@ -2843,6 +2852,7 @@ __instr_alu_ckadd_struct20_exec(struct rte_swx_pipeline *p __rte_unused,\n \t */\n \tr0 = (r0 & 0xFFFF) + (r0 >> 16);\n \n+\t/* Apply 1's complement to the result. */\n \tr0 = ~r0 & 0xFFFF;\n \tr0 = r0 ? r0 : 0xFFFF;\n \n@@ -2854,45 +2864,58 @@ __instr_alu_ckadd_struct_exec(struct rte_swx_pipeline *p __rte_unused,\n \t\t\t struct thread *t,\n \t\t\t const struct instruction *ip)\n {\n+\tuint32_t src_header_id = ip->alu.src.n_bits; /* The src header ID is stored here. */\n+\tuint32_t n_src_header_bytes = t->headers[src_header_id].n_bytes;\n \tuint8_t *dst_struct, *src_struct;\n-\tuint16_t *dst16_ptr;\n+\tuint16_t *dst16_ptr, dst;\n \tuint32_t *src32_ptr;\n-\tuint64_t r = 0;\n+\tuint64_t r;\n \tuint32_t i;\n \n+\tif (n_src_header_bytes == 20) {\n+\t\t__instr_alu_ckadd_struct20_exec(p, t, ip);\n+\t\treturn;\n+\t}\n+\n \tTRACE(\"[Thread %2u] ckadd (struct)\\n\", p->thread_id);\n \n \t/* Structs. */\n \tdst_struct = t->structs[ip->alu.dst.struct_id];\n \tdst16_ptr = (uint16_t *)&dst_struct[ip->alu.dst.offset];\n+\tdst = *dst16_ptr;\n \n \tsrc_struct = t->structs[ip->alu.src.struct_id];\n \tsrc32_ptr = (uint32_t *)&src_struct[0];\n \n-\t/* The max number of 32-bit words in a 256-byte header is 8 = 2^3.\n-\t * Therefore, in the worst case scenario, a 35-bit number is added to a\n-\t * 16-bit number (the input r), so the output r is 36-bit number.\n+\t/* Initialize the result with destination 1's complement. */\n+\tr = dst;\n+\tr = ~r & 0xFFFF;\n+\n+\t/* The max number of 32-bit words in a 32K-byte header is 2^13.\n+\t * Therefore, in the worst case scenario, a 45-bit number is added to a\n+\t * 16-bit number (the input r), so the output r is 46-bit number.\n \t */\n-\tfor (i = 0; i < ip->alu.src.n_bits / 32; i++, src32_ptr++)\n+\tfor (i = 0; i < n_src_header_bytes / 4; i++, src32_ptr++)\n \t\tr += *src32_ptr;\n \n-\t/* The first input is a 16-bit number. The second input is a 20-bit\n-\t * number. Their sum is a 21-bit number.\n+\t/* The first input is a 16-bit number. The second input is a 30-bit\n+\t * number. Their sum is a 31-bit number.\n \t */\n \tr = (r & 0xFFFF) + (r >> 16);\n \n \t/* The first input is a 16-bit number (0 .. 0xFFFF). The second input is\n-\t * a 5-bit number (0 .. 31). The sum is a 17-bit number (0 .. 0x1000E).\n+\t * a 15-bit number (0 .. 0x7FFF). The sum is a 17-bit number (0 .. 0x17FFE).\n \t */\n \tr = (r & 0xFFFF) + (r >> 16);\n \n \t/* When the input r is (0 .. 0xFFFF), the output r is equal to the input\n \t * r, so the output is (0 .. 0xFFFF). When the input r is (0x10000 ..\n-\t * 0x1001E), the output r is (0 .. 31). So no carry bit can be\n+\t * 0x17FFE), the output r is (0 .. 0x7FFF). So no carry bit can be\n \t * generated, therefore the output r is always a 16-bit number.\n \t */\n \tr = (r & 0xFFFF) + (r >> 16);\n \n+\t/* Apply 1's complement to the result. */\n \tr = ~r & 0xFFFF;\n \tr = r ? r : 0xFFFF;\n \n", "prefixes": [ "V3" ] }