get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/105639/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 105639,
    "url": "https://patches.dpdk.org/api/patches/105639/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20220105140020.1615256-5-tduszynski@marvell.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20220105140020.1615256-5-tduszynski@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20220105140020.1615256-5-tduszynski@marvell.com",
    "date": "2022-01-05T14:00:13",
    "name": "[v4,04/11] raw/cnxk_gpio: support queue setup",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "0adb27dda11753480b2b84326c131cc8ee5dd0fc",
    "submitter": {
        "id": 2215,
        "url": "https://patches.dpdk.org/api/people/2215/?format=api",
        "name": "Tomasz Duszynski",
        "email": "tduszynski@marvell.com"
    },
    "delegate": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/users/1/?format=api",
        "username": "tmonjalo",
        "first_name": "Thomas",
        "last_name": "Monjalon",
        "email": "thomas@monjalon.net"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20220105140020.1615256-5-tduszynski@marvell.com/mbox/",
    "series": [
        {
            "id": 21073,
            "url": "https://patches.dpdk.org/api/series/21073/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=21073",
            "date": "2022-01-05T14:00:09",
            "name": "Add cnxk_gpio",
            "version": 4,
            "mbox": "https://patches.dpdk.org/series/21073/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/105639/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/105639/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 4D32AA034D;\n\tWed,  5 Jan 2022 15:00:56 +0100 (CET)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 10B9741155;\n\tWed,  5 Jan 2022 15:00:38 +0100 (CET)",
            "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 16F3841152\n for <dev@dpdk.org>; Wed,  5 Jan 2022 15:00:35 +0100 (CET)",
            "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id\n 205BnG8s031004;\n Wed, 5 Jan 2022 06:00:35 -0800",
            "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3dd214x11a-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Wed, 05 Jan 2022 06:00:34 -0800",
            "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Wed, 5 Jan 2022 06:00:33 -0800",
            "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Wed, 5 Jan 2022 06:00:33 -0800",
            "from localhost.localdomain (unknown [10.28.34.39])\n by maili.marvell.com (Postfix) with ESMTP id D13A23F7076;\n Wed,  5 Jan 2022 06:00:31 -0800 (PST)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=fivAhBM1KTbRuGdAVqRTSg/lXkoE/UDmzBomhr4hADo=;\n b=R6b1mlr8jh40Puw1Qa/of3wwka6XjJjF4yAVD29W58NPemWlepNBOaqfOKCuUXKW6dKL\n UAB8lcZ9BUO0DQrB3Q5C2j+wP+tw00V9aTmcv/O/an/5RP0hSmMj45mGkkmoyh0h/BT+\n ehxPAOcLGH0dI42pqY+S+UnErItwdj73LnUuWsHln3eEwtofbdogCrBcaNvBVneTt6aN\n 6KL097AJf/PBrfAXZLOuCEkESJZB4jTwMJtttWAfYRS2iNR/kV+It50TotLIBSZZSH1l\n c5QiqpVcok9pQXr7sV2ShZLF0RnXUdHFMSGmo9HYOQWog3E67v3dIVzlVTAC7ygatb/3 cg==",
        "From": "Tomasz Duszynski <tduszynski@marvell.com>",
        "To": "<dev@dpdk.org>",
        "CC": "<thomas@monjalon.net>, <jerinj@marvell.com>, Tomasz Duszynski\n <tduszynski@marvell.com>",
        "Subject": "[PATCH v4 04/11] raw/cnxk_gpio: support queue setup",
        "Date": "Wed, 5 Jan 2022 15:00:13 +0100",
        "Message-ID": "<20220105140020.1615256-5-tduszynski@marvell.com>",
        "X-Mailer": "git-send-email 2.25.1",
        "In-Reply-To": "<20220105140020.1615256-1-tduszynski@marvell.com>",
        "References": "<20211213081732.2096334-1-tduszynski@marvell.com>\n <20220105140020.1615256-1-tduszynski@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Proofpoint-GUID": "QjImhNK4w9dzs2bs8I0BgkJlFXVTFaTF",
        "X-Proofpoint-ORIG-GUID": "QjImhNK4w9dzs2bs8I0BgkJlFXVTFaTF",
        "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513\n definitions=2022-01-05_03,2022-01-04_01,2021-12-02_01",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Add support for queue setup.\n\nSigned-off-by: Tomasz Duszynski <tduszynski@marvell.com>\n---\n drivers/raw/cnxk_gpio/cnxk_gpio.c | 80 +++++++++++++++++++++++++++++++\n 1 file changed, 80 insertions(+)",
    "diff": "diff --git a/drivers/raw/cnxk_gpio/cnxk_gpio.c b/drivers/raw/cnxk_gpio/cnxk_gpio.c\nindex 3455d6258c..c1e74fad43 100644\n--- a/drivers/raw/cnxk_gpio/cnxk_gpio.c\n+++ b/drivers/raw/cnxk_gpio/cnxk_gpio.c\n@@ -138,6 +138,85 @@ cnxk_gpio_read_attr_int(char *attr, int *val)\n \treturn 0;\n }\n \n+static int\n+cnxk_gpio_write_attr(const char *attr, const char *val)\n+{\n+\tFILE *fp;\n+\tint ret;\n+\n+\tif (!val)\n+\t\treturn -EINVAL;\n+\n+\tfp = fopen(attr, \"w\");\n+\tif (!fp)\n+\t\treturn -errno;\n+\n+\tret = fprintf(fp, \"%s\", val);\n+\tif (ret < 0) {\n+\t\tfclose(fp);\n+\t\treturn ret;\n+\t}\n+\n+\tret = fclose(fp);\n+\tif (ret)\n+\t\treturn -errno;\n+\n+\treturn 0;\n+}\n+\n+static int\n+cnxk_gpio_write_attr_int(const char *attr, int val)\n+{\n+\tchar buf[CNXK_GPIO_BUFSZ];\n+\n+\tsnprintf(buf, sizeof(buf), \"%d\", val);\n+\n+\treturn cnxk_gpio_write_attr(attr, buf);\n+}\n+\n+static struct cnxk_gpio *\n+cnxk_gpio_lookup(struct cnxk_gpiochip *gpiochip, uint16_t queue)\n+{\n+\tif (queue >= gpiochip->num_gpios)\n+\t\treturn NULL;\n+\n+\treturn gpiochip->gpios[queue];\n+}\n+\n+static int\n+cnxk_gpio_queue_setup(struct rte_rawdev *dev, uint16_t queue_id,\n+\t\t      rte_rawdev_obj_t queue_conf, size_t queue_conf_size)\n+{\n+\tstruct cnxk_gpiochip *gpiochip = dev->dev_private;\n+\tchar buf[CNXK_GPIO_BUFSZ];\n+\tstruct cnxk_gpio *gpio;\n+\tint ret;\n+\n+\tRTE_SET_USED(queue_conf);\n+\tRTE_SET_USED(queue_conf_size);\n+\n+\tgpio = cnxk_gpio_lookup(gpiochip, queue_id);\n+\tif (gpio)\n+\t\treturn -EEXIST;\n+\n+\tgpio = rte_zmalloc(NULL, sizeof(*gpio), 0);\n+\tif (!gpio)\n+\t\treturn -ENOMEM;\n+\tgpio->num = queue_id + gpiochip->base;\n+\tgpio->gpiochip = gpiochip;\n+\n+\tsnprintf(buf, sizeof(buf), \"%s/export\", CNXK_GPIO_CLASS_PATH);\n+\tret = cnxk_gpio_write_attr_int(buf, gpio->num);\n+\tif (ret) {\n+\t\trte_free(gpio);\n+\t\treturn ret;\n+\t}\n+\n+\tgpiochip->gpios[queue_id] = gpio;\n+\n+\treturn 0;\n+}\n+\n static int\n cnxk_gpio_queue_def_conf(struct rte_rawdev *dev, uint16_t queue_id,\n \t\t\t rte_rawdev_obj_t queue_conf, size_t queue_conf_size)\n@@ -167,6 +246,7 @@ cnxk_gpio_queue_count(struct rte_rawdev *dev)\n static const struct rte_rawdev_ops cnxk_gpio_rawdev_ops = {\n \t.queue_def_conf = cnxk_gpio_queue_def_conf,\n \t.queue_count = cnxk_gpio_queue_count,\n+\t.queue_setup = cnxk_gpio_queue_setup,\n };\n \n static int\n",
    "prefixes": [
        "v4",
        "04/11"
    ]
}