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GET /api/patches/103756/?format=api
{ "id": 103756, "url": "https://patches.dpdk.org/api/patches/103756/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20211104123320.1638915-10-xuemingl@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211104123320.1638915-10-xuemingl@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211104123320.1638915-10-xuemingl@nvidia.com", "date": "2021-11-04T12:33:15", "name": "[v4,09/14] net/mlx5: move Rx queue hairpin info to private data", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "b60e4cc84468177cb4109b313f9c1a33b58dc9e8", "submitter": { "id": 1904, "url": "https://patches.dpdk.org/api/people/1904/?format=api", "name": "Xueming Li", "email": "xuemingl@nvidia.com" }, "delegate": { "id": 3268, "url": "https://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20211104123320.1638915-10-xuemingl@nvidia.com/mbox/", "series": [ { "id": 20310, "url": "https://patches.dpdk.org/api/series/20310/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=20310", "date": "2021-11-04T12:33:06", "name": "net/mlx5: support shared Rx queue", "version": 4, "mbox": "https://patches.dpdk.org/series/20310/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/103756/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/103756/checks/", "tags": {}, "related": [], "headers": { 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SFS:(4636009)(46966006)(36840700001)(6666004)(336012)(8676002)(83380400001)(8936002)(4326008)(5660300002)(16526019)(36756003)(426003)(70206006)(2906002)(70586007)(2616005)(7696005)(82310400003)(6916009)(36860700001)(316002)(107886003)(186003)(26005)(47076005)(86362001)(55016002)(508600001)(356005)(7636003)(6286002)(1076003)(54906003);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "04 Nov 2021 12:34:45.4849 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 5e633fd5-1147-4ce6-60cf-08d99f8f7bd7", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BN8NAM11FT055.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CH0PR12MB5281", "Subject": "[dpdk-dev] [PATCH v4 09/14] net/mlx5: move Rx queue hairpin info to\n private data", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Hairpin info of Rx queue can't be shared, moves to private queue data.\n\nSigned-off-by: Xueming Li <xuemingl@nvidia.com>\nAcked-by: Slava Ovsiienko <viacheslavo@nvidia.com>\n---\n drivers/net/mlx5/mlx5_rx.h | 4 ++--\n drivers/net/mlx5/mlx5_rxq.c | 13 +++++--------\n drivers/net/mlx5/mlx5_trigger.c | 24 ++++++++++++------------\n 3 files changed, 19 insertions(+), 22 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_rx.h b/drivers/net/mlx5/mlx5_rx.h\nindex eccfbf1108d..b21918223b8 100644\n--- a/drivers/net/mlx5/mlx5_rx.h\n+++ b/drivers/net/mlx5/mlx5_rx.h\n@@ -162,8 +162,6 @@ struct mlx5_rxq_ctrl {\n \tuint32_t flow_tunnels_n[MLX5_FLOW_TUNNEL]; /* Tunnels counters. */\n \tuint32_t wqn; /* WQ number. */\n \tuint16_t dump_file_n; /* Number of dump files. */\n-\tstruct rte_eth_hairpin_conf hairpin_conf; /* Hairpin configuration. */\n-\tuint32_t hairpin_status; /* Hairpin binding status. */\n };\n \n /* RX queue private data. */\n@@ -173,6 +171,8 @@ struct mlx5_rxq_priv {\n \tstruct mlx5_rxq_ctrl *ctrl; /* Shared Rx Queue. */\n \tLIST_ENTRY(mlx5_rxq_priv) owner_entry; /* Entry in shared rxq_ctrl. */\n \tstruct mlx5_priv *priv; /* Back pointer to private data. */\n+\tstruct rte_eth_hairpin_conf hairpin_conf; /* Hairpin configuration. */\n+\tuint32_t hairpin_status; /* Hairpin binding status. */\n };\n \n /* mlx5_rxq.c */\ndiff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex 8071ddbd61c..7b637fda643 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -1695,8 +1695,8 @@ mlx5_rxq_hairpin_new(struct rte_eth_dev *dev, struct mlx5_rxq_priv *rxq,\n \ttmpl->rxq.elts_n = log2above(desc);\n \ttmpl->rxq.elts = NULL;\n \ttmpl->rxq.mr_ctrl.cache_bh = (struct mlx5_mr_btree) { 0 };\n-\ttmpl->hairpin_conf = *hairpin_conf;\n \ttmpl->rxq.idx = idx;\n+\trxq->hairpin_conf = *hairpin_conf;\n \tmlx5_rxq_ref(dev, idx);\n \tLIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);\n \treturn tmpl;\n@@ -1913,14 +1913,11 @@ const struct rte_eth_hairpin_conf *\n mlx5_rxq_get_hairpin_conf(struct rte_eth_dev *dev, uint16_t idx)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_rxq_ctrl *rxq_ctrl = NULL;\n+\tstruct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, idx);\n \n-\tif (idx < priv->rxqs_n && (*priv->rxqs)[idx]) {\n-\t\trxq_ctrl = container_of((*priv->rxqs)[idx],\n-\t\t\t\t\tstruct mlx5_rxq_ctrl,\n-\t\t\t\t\trxq);\n-\t\tif (rxq_ctrl->type == MLX5_RXQ_TYPE_HAIRPIN)\n-\t\t\treturn &rxq_ctrl->hairpin_conf;\n+\tif (idx < priv->rxqs_n && rxq != NULL) {\n+\t\tif (rxq->ctrl->type == MLX5_RXQ_TYPE_HAIRPIN)\n+\t\t\treturn &rxq->hairpin_conf;\n \t}\n \treturn NULL;\n }\ndiff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c\nindex e5d74d275f8..a124f74fcda 100644\n--- a/drivers/net/mlx5/mlx5_trigger.c\n+++ b/drivers/net/mlx5/mlx5_trigger.c\n@@ -324,7 +324,7 @@ mlx5_hairpin_auto_bind(struct rte_eth_dev *dev)\n \t\t}\n \t\trxq_ctrl = rxq->ctrl;\n \t\tif (rxq_ctrl->type != MLX5_RXQ_TYPE_HAIRPIN ||\n-\t\t rxq_ctrl->hairpin_conf.peers[0].queue != i) {\n+\t\t rxq->hairpin_conf.peers[0].queue != i) {\n \t\t\trte_errno = ENOMEM;\n \t\t\tDRV_LOG(ERR, \"port %u Tx queue %d can't be binded to \"\n \t\t\t\t\"Rx queue %d\", dev->data->port_id,\n@@ -354,7 +354,7 @@ mlx5_hairpin_auto_bind(struct rte_eth_dev *dev)\n \t\tif (ret)\n \t\t\tgoto error;\n \t\t/* Qs with auto-bind will be destroyed directly. */\n-\t\trxq_ctrl->hairpin_status = 1;\n+\t\trxq->hairpin_status = 1;\n \t\ttxq_ctrl->hairpin_status = 1;\n \t\tmlx5_txq_release(dev, i);\n \t}\n@@ -457,9 +457,9 @@ mlx5_hairpin_queue_peer_update(struct rte_eth_dev *dev, uint16_t peer_queue,\n \t\t}\n \t\tpeer_info->qp_id = rxq_ctrl->obj->rq->id;\n \t\tpeer_info->vhca_id = priv->config.hca_attr.vhca_id;\n-\t\tpeer_info->peer_q = rxq_ctrl->hairpin_conf.peers[0].queue;\n-\t\tpeer_info->tx_explicit = rxq_ctrl->hairpin_conf.tx_explicit;\n-\t\tpeer_info->manual_bind = rxq_ctrl->hairpin_conf.manual_bind;\n+\t\tpeer_info->peer_q = rxq->hairpin_conf.peers[0].queue;\n+\t\tpeer_info->tx_explicit = rxq->hairpin_conf.tx_explicit;\n+\t\tpeer_info->manual_bind = rxq->hairpin_conf.manual_bind;\n \t}\n \treturn 0;\n }\n@@ -581,20 +581,20 @@ mlx5_hairpin_queue_peer_bind(struct rte_eth_dev *dev, uint16_t cur_queue,\n \t\t\t\tdev->data->port_id, cur_queue);\n \t\t\treturn -rte_errno;\n \t\t}\n-\t\tif (rxq_ctrl->hairpin_status != 0) {\n+\t\tif (rxq->hairpin_status != 0) {\n \t\t\tDRV_LOG(DEBUG, \"port %u Rx queue %d is already bound\",\n \t\t\t\tdev->data->port_id, cur_queue);\n \t\t\treturn 0;\n \t\t}\n \t\tif (peer_info->tx_explicit !=\n-\t\t rxq_ctrl->hairpin_conf.tx_explicit) {\n+\t\t rxq->hairpin_conf.tx_explicit) {\n \t\t\trte_errno = EINVAL;\n \t\t\tDRV_LOG(ERR, \"port %u Rx queue %d and peer Tx rule mode\"\n \t\t\t\t\" mismatch\", dev->data->port_id, cur_queue);\n \t\t\treturn -rte_errno;\n \t\t}\n \t\tif (peer_info->manual_bind !=\n-\t\t rxq_ctrl->hairpin_conf.manual_bind) {\n+\t\t rxq->hairpin_conf.manual_bind) {\n \t\t\trte_errno = EINVAL;\n \t\t\tDRV_LOG(ERR, \"port %u Rx queue %d and peer binding mode\"\n \t\t\t\t\" mismatch\", dev->data->port_id, cur_queue);\n@@ -606,7 +606,7 @@ mlx5_hairpin_queue_peer_bind(struct rte_eth_dev *dev, uint16_t cur_queue,\n \t\trq_attr.hairpin_peer_vhca = peer_info->vhca_id;\n \t\tret = mlx5_devx_cmd_modify_rq(rxq_ctrl->obj->rq, &rq_attr);\n \t\tif (ret == 0)\n-\t\t\trxq_ctrl->hairpin_status = 1;\n+\t\t\trxq->hairpin_status = 1;\n \t}\n \treturn ret;\n }\n@@ -688,7 +688,7 @@ mlx5_hairpin_queue_peer_unbind(struct rte_eth_dev *dev, uint16_t cur_queue,\n \t\t\t\tdev->data->port_id, cur_queue);\n \t\t\treturn -rte_errno;\n \t\t}\n-\t\tif (rxq_ctrl->hairpin_status == 0) {\n+\t\tif (rxq->hairpin_status == 0) {\n \t\t\tDRV_LOG(DEBUG, \"port %u Rx queue %d is already unbound\",\n \t\t\t\tdev->data->port_id, cur_queue);\n \t\t\treturn 0;\n@@ -703,7 +703,7 @@ mlx5_hairpin_queue_peer_unbind(struct rte_eth_dev *dev, uint16_t cur_queue,\n \t\trq_attr.rq_state = MLX5_SQC_STATE_RST;\n \t\tret = mlx5_devx_cmd_modify_rq(rxq_ctrl->obj->rq, &rq_attr);\n \t\tif (ret == 0)\n-\t\t\trxq_ctrl->hairpin_status = 0;\n+\t\t\trxq->hairpin_status = 0;\n \t}\n \treturn ret;\n }\n@@ -1041,7 +1041,7 @@ mlx5_hairpin_get_peer_ports(struct rte_eth_dev *dev, uint16_t *peer_ports,\n \t\t\trxq_ctrl = rxq->ctrl;\n \t\t\tif (rxq_ctrl->type != MLX5_RXQ_TYPE_HAIRPIN)\n \t\t\t\tcontinue;\n-\t\t\tpp = rxq_ctrl->hairpin_conf.peers[0].port;\n+\t\t\tpp = rxq->hairpin_conf.peers[0].port;\n \t\t\tif (pp >= RTE_MAX_ETHPORTS) {\n \t\t\t\trte_errno = ERANGE;\n \t\t\t\tDRV_LOG(ERR, \"port %hu queue %u peer port \"\n", "prefixes": [ "v4", "09/14" ] }