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GET /api/patches/103313/?format=api
{ "id": 103313, "url": "https://patches.dpdk.org/api/patches/103313/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20211101085143.2472241-5-g.singh@nxp.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211101085143.2472241-5-g.singh@nxp.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211101085143.2472241-5-g.singh@nxp.com", "date": "2021-11-01T08:51:41", "name": "[v2,4/6] dma/dpaa: support basic operations", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "ebceb9e2a9a4a4260c96224a6f099fed0000d16c", "submitter": { "id": 1068, "url": "https://patches.dpdk.org/api/people/1068/?format=api", "name": "Gagandeep Singh", "email": "g.singh@nxp.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20211101085143.2472241-5-g.singh@nxp.com/mbox/", "series": [ { "id": 20166, "url": "https://patches.dpdk.org/api/series/20166/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=20166", "date": "2021-11-01T08:51:37", "name": "Introduce DPAA DMA driver", "version": 2, "mbox": "https://patches.dpdk.org/series/20166/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/103313/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/103313/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 49C70A0C57;\n\tMon, 1 Nov 2021 09:52:39 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id DFF0841125;\n\tMon, 1 Nov 2021 09:52:17 +0100 (CET)", "from EUR02-VE1-obe.outbound.protection.outlook.com\n (mail-eopbgr20087.outbound.protection.outlook.com [40.107.2.87])\n by mails.dpdk.org (Postfix) with ESMTP id 1023F41125\n for <dev@dpdk.org>; Mon, 1 Nov 2021 09:52:16 +0100 (CET)", "from VI1PR04MB6960.eurprd04.prod.outlook.com (2603:10a6:803:12d::10)\n by VI1PR04MB5086.eurprd04.prod.outlook.com (2603:10a6:803:62::31)\n with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4649.15; Mon, 1 Nov\n 2021 08:52:15 +0000", "from VI1PR04MB6960.eurprd04.prod.outlook.com\n ([fe80::11d9:6f32:90e:80c1]) by VI1PR04MB6960.eurprd04.prod.outlook.com\n ([fe80::11d9:6f32:90e:80c1%7]) with mapi id 15.20.4649.019; Mon, 1 Nov 2021\n 08:52:15 +0000", "from lsv03457.swis.in-blr01.nxp.com (14.142.151.118) by\n SG2PR02CA0092.apcprd02.prod.outlook.com (2603:1096:4:90::32) with Microsoft\n SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.20.4649.15 via Frontend Transport; Mon, 1 Nov 2021 08:52:13 +0000" ], "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=n0j1SwFBGGYYPJbc+7iOsirlJ957qWaZKe6T50QMOWo2m//P8PkMRKy9Fx5fpI6Kesrk9nybvP7TGAsB0BjeNG9PN5cSqGUS8mtucRcori5a8HtopEUjh5YRnRmHRpEfE5yvu30M45VQeLPGVSaP3l2gHL1nZLYyVrG1Kh8cDeuym9zcZgv998XIOM/e2NRK+6Q6sP5xXDB7nxk6TPqzGkjrpbJSpOE02K4dALvnlZqH2WNqFHEt/ot7if/xm7eJFTGl5Ft983iNtQAsQXzVPgpQq5Vk6Ie1PzAwRlBEH7qsAv3hQt4+/TlEg74HYkiXiuej1AIdj8Jj2hnCPOKH/g==", "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=2jRMICiofap2sspGpRCRNciAwUyzBmPtd5uyV2tWtkU=;\n b=oV9WN1in2u0oBTzii6O9ifnkBEFhwhmqtDEBYPjMpBArfndFM/eJ3qkhdcX1dNAVH6CM8H5gkisVRNEihGI3vm4JduujzCIr4ZdlJ/9pCNbMQU6PG0ricuS0/UIo2mVvx3XxWvH04QcwlMEuqLhWmq5pPJwltxDXurJsd8eASAd1SgivXNvwvbWvmFMb7kkkOaSYzrzL/wWmlLdFZ82bBIBVrK0w6B/TTlHFMoKtx+pjDY5h5PXl7+Hmf9R7ZCvZuqjn3LBZZN8YFCOloJOiDG8riiAiejE+sWiGCidxDBJTcSxK2Uqb4p4R4/HmRYlq5eM82Vx8ZvPw8zKsBgoRzg==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass\n smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass\n header.d=nxp.com; arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=2jRMICiofap2sspGpRCRNciAwUyzBmPtd5uyV2tWtkU=;\n b=meIkmfER+vF7Hq1suxhHUiXrTDiL/hMHUP2lAJFwGsGtPiLvl2RFU3H7ZhhCJcbXe99qldGNLOzigk8KMg7JmkLoMIolUd9tgDIhvmKtqdA8o/v8rY3Hn/I+QI1ox3ngsTs8qzSANNzWYkMHQtVqqV38gpmZFW4OySsmQxL+zcI=", "Authentication-Results": "dkim=none (message not signed)\n header.d=none;dmarc=none action=none header.from=nxp.com;", "From": "Gagandeep Singh <g.singh@nxp.com>", "To": "thomas@monjalon.net,\n\tdev@dpdk.org", "Cc": "nipun.gupta@nxp.com,\n\tGagandeep Singh <g.singh@nxp.com>", "Date": "Mon, 1 Nov 2021 14:21:41 +0530", "Message-Id": "<20211101085143.2472241-5-g.singh@nxp.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20211101085143.2472241-1-g.singh@nxp.com>", "References": "<20210909111500.3901706-1-g.singh@nxp.com>\n <20211101085143.2472241-1-g.singh@nxp.com>", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-ClientProxiedBy": "SG2PR02CA0092.apcprd02.prod.outlook.com\n (2603:1096:4:90::32) To VI1PR04MB6960.eurprd04.prod.outlook.com\n (2603:10a6:803:12d::10)", "MIME-Version": "1.0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "8aa53b17-93a4-4c07-11c1-08d99d14e6cd", "X-MS-TrafficTypeDiagnostic": "VI1PR04MB5086:", "X-Microsoft-Antispam-PRVS": "\n <VI1PR04MB50862092275C3ECBCF929E54E18A9@VI1PR04MB5086.eurprd04.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:2958;", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n ETKdFCA4uWJ9O+Y4Xt9OU+E+NWZDPJpo9Ce7HKhZVeLDEMVykEClH7CwwaadKE1LSqljyZlRSjdAR1SzU+4bvGklyFyeoKOsnPZy9p/hJ4eRl/0olXipEF4hAhzQUnX+QSNWlOIZ4q7qsU/yvA4PhktGhNCPpnVsPZzefFZvwYpZf9vSiyBkBRRHqsch7UNfxTtE/VXfsvTl+7EC5kTEeYOSls71pX+8md1rtMgedA46jeumzSyFuXl1vqf2doN6A9YDG63nzVdOCBOOfBPclHSmNcL7lHDsVrJzPj+c5s+5TTXDHuRFcu+VZAFDf4TnKsq+SYpdFhGX+dNJimxvObQeQp+kqlrY4sFnAPfL2peOQglxJLnPbslEoeESLeS7Bx4cERp2T4fef1yJ6XQIsu0i8KznoP356I63ZKo0n9YJ1KEKKKOxSv6L8S5nCVNqtMIYwJGYjnTOId8fwLQqtiY97603PMAw2cMXj4bnedoMCYq2S6nHPT2fj9tMisFuzSnFOyDAJhh0l3V/bc56GPIow+aE9U/OeSa4bw6srvMdLBehdapoKHLfLTglcsa9zGxZAYrMYD+7PI6nUDyiEejzb2Ep3Vqnu3kjUAnUAYM0lQs496GIek+1TiNhFMVwTkSlnGwy/M4R2nuEVoHq8EfMQgALpRM5c1tpLMmKdf3myzk3Ro+KOKXl6cdHsCuv9lLSYD14QRGwGxzrVniosDjcz2nWzkdeHX/HUR7CSxA=", "X-Forefront-Antispam-Report": "CIP:255.255.255.255; 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i < (int)(queue->n_cq + COMMAND_QUEUE_OVERFLLOW); i++) {\n+\t\tcomp_temp = rte_zmalloc(\"qdma: comp temp\",\n+\t\t\t\t\tsizeof(*comp_temp), 0);\n+\t\tif (!comp_temp)\n+\t\t\treturn -ENOMEM;\n+\n+\t\tcomp_temp->virt_addr =\n+\t\tdma_pool_alloc(size, aligned, &comp_temp->bus_addr);\n+\t\tif (!comp_temp->virt_addr) {\n+\t\t\trte_free(comp_temp);\n+\t\t\treturn -ENOMEM;\n+\t\t}\n+\n+\t\tcomp_temp->desc_virt_addr =\n+\t\tdma_pool_alloc(size, aligned, &comp_temp->desc_bus_addr);\n+\t\tif (!comp_temp->desc_virt_addr)\n+\t\t\treturn -ENOMEM;\n+\n+\t\tmemset(comp_temp->virt_addr, 0, FSL_QDMA_COMMAND_BUFFER_SIZE);\n+\t\tmemset(comp_temp->desc_virt_addr, 0,\n+\t\t FSL_QDMA_DESCRIPTOR_BUFFER_SIZE);\n+\n+\t\tcsgf_desc = (struct fsl_qdma_format *)comp_temp->virt_addr + 1;\n+\t\tsdf = (struct fsl_qdma_sdf *)comp_temp->desc_virt_addr;\n+\t\tddf = (struct fsl_qdma_ddf *)comp_temp->desc_virt_addr + 1;\n+\t\t/* Compound Command Descriptor(Frame List Table) */\n+\t\tqdma_desc_addr_set64(csgf_desc, comp_temp->desc_bus_addr);\n+\t\t/* It must be 32 as Compound S/G Descriptor */\n+\t\tqdma_csgf_set_len(csgf_desc, 32);\n+\t\t/* Descriptor Buffer */\n+\t\tsdf->cmd = rte_cpu_to_le_32(FSL_QDMA_CMD_RWTTYPE <<\n+\t\t\t FSL_QDMA_CMD_RWTTYPE_OFFSET);\n+\t\tddf->cmd = rte_cpu_to_le_32(FSL_QDMA_CMD_RWTTYPE <<\n+\t\t\t FSL_QDMA_CMD_RWTTYPE_OFFSET);\n+\t\tddf->cmd |= rte_cpu_to_le_32(FSL_QDMA_CMD_LWC <<\n+\t\t\t\tFSL_QDMA_CMD_LWC_OFFSET);\n+\n+\t\tlist_add_tail(&comp_temp->list, &queue->comp_free);\n+\t}\n+\n+\treturn 0;\n+}\n+\n+\n static struct fsl_qdma_queue\n *fsl_qdma_alloc_queue_resources(struct fsl_qdma_engine *fsl_qdma)\n {\n@@ -311,6 +381,79 @@ static int fsl_qdma_reg_init(struct fsl_qdma_engine *fsl_qdma)\n \treturn 0;\n }\n \n+static int fsl_qdma_alloc_chan_resources(struct fsl_qdma_chan *fsl_chan)\n+{\n+\tstruct fsl_qdma_queue *fsl_queue = fsl_chan->queue;\n+\tstruct fsl_qdma_engine *fsl_qdma = fsl_chan->qdma;\n+\tint ret;\n+\n+\tif (fsl_queue->count++)\n+\t\tgoto finally;\n+\n+\tINIT_LIST_HEAD(&fsl_queue->comp_free);\n+\tINIT_LIST_HEAD(&fsl_queue->comp_used);\n+\n+\tret = fsl_qdma_pre_request_enqueue_comp_sd_desc(fsl_queue,\n+\t\t\t\tFSL_QDMA_COMMAND_BUFFER_SIZE, 64);\n+\tif (ret) {\n+\t\tDPAA_QDMA_ERR(\n+\t\t\t\"failed to alloc dma buffer for comp descriptor\\n\");\n+\t\tgoto exit;\n+\t}\n+\n+finally:\n+\treturn fsl_qdma->desc_allocated++;\n+\n+exit:\n+\treturn -ENOMEM;\n+}\n+\n+static int\n+dpaa_info_get(const struct rte_dma_dev *dev, struct rte_dma_info *dev_info,\n+\t uint32_t info_sz)\n+{\n+#define DPAADMA_MAX_DESC 64\n+#define DPAADMA_MIN_DESC 64\n+\n+\tRTE_SET_USED(dev);\n+\tRTE_SET_USED(info_sz);\n+\n+\tdev_info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM |\n+\t\t\t RTE_DMA_CAPA_MEM_TO_DEV |\n+\t\t\t RTE_DMA_CAPA_DEV_TO_DEV |\n+\t\t\t RTE_DMA_CAPA_DEV_TO_MEM |\n+\t\t\t RTE_DMA_CAPA_SILENT |\n+\t\t\t RTE_DMA_CAPA_OPS_COPY;\n+\tdev_info->max_vchans = 1;\n+\tdev_info->max_desc = DPAADMA_MAX_DESC;\n+\tdev_info->min_desc = DPAADMA_MIN_DESC;\n+\n+\treturn 0;\n+}\n+\n+static int\n+dpaa_get_channel(struct fsl_qdma_engine *fsl_qdma, uint16_t vchan)\n+{\n+\tu32 i, start, end;\n+\n+\tstart = fsl_qdma->free_block_id * QDMA_QUEUES;\n+\tfsl_qdma->free_block_id++;\n+\n+\tend = start + 1;\n+\tfor (i = start; i < end; i++) {\n+\t\tstruct fsl_qdma_chan *fsl_chan = &fsl_qdma->chans[i];\n+\n+\t\tif (fsl_chan->free) {\n+\t\t\tfsl_chan->free = false;\n+\t\t\tfsl_qdma_alloc_chan_resources(fsl_chan);\n+\t\t\tfsl_qdma->vchan_map[vchan] = i;\n+\t\t\treturn 0;\n+\t\t}\n+\t}\n+\n+\treturn -1;\n+}\n+\n static void\n dma_release(void *fsl_chan)\n {\n@@ -318,6 +461,45 @@ dma_release(void *fsl_chan)\n \tfsl_qdma_free_chan_resources((struct fsl_qdma_chan *)fsl_chan);\n }\n \n+static int\n+dpaa_qdma_configure(__rte_unused struct rte_dma_dev *dmadev,\n+\t\t __rte_unused const struct rte_dma_conf *dev_conf,\n+\t\t __rte_unused uint32_t conf_sz)\n+{\n+\treturn 0;\n+}\n+\n+static int\n+dpaa_qdma_start(__rte_unused struct rte_dma_dev *dev)\n+{\n+\treturn 0;\n+}\n+\n+static int\n+dpaa_qdma_close(__rte_unused struct rte_dma_dev *dev)\n+{\n+\treturn 0;\n+}\n+\n+static int\n+dpaa_qdma_queue_setup(struct rte_dma_dev *dmadev,\n+\t\t uint16_t vchan,\n+\t\t __rte_unused const struct rte_dma_vchan_conf *conf,\n+\t\t __rte_unused uint32_t conf_sz)\n+{\n+\tstruct fsl_qdma_engine *fsl_qdma = dmadev->data->dev_private;\n+\n+\treturn dpaa_get_channel(fsl_qdma, vchan);\n+}\n+\n+static struct rte_dma_dev_ops dpaa_qdma_ops = {\n+\t.dev_info_get\t\t = dpaa_info_get,\n+\t.dev_configure = dpaa_qdma_configure,\n+\t.dev_start = dpaa_qdma_start,\n+\t.dev_close = dpaa_qdma_close,\n+\t.vchan_setup\t\t = dpaa_qdma_queue_setup,\n+};\n+\n static int\n dpaa_qdma_init(struct rte_dma_dev *dmadev)\n {\n@@ -424,6 +606,9 @@ dpaa_qdma_probe(__rte_unused struct rte_dpaa_driver *dpaa_drv,\n \t}\n \n \tdpaa_dev->dmadev = dmadev;\n+\tdmadev->dev_ops = &dpaa_qdma_ops;\n+\tdmadev->device = &dpaa_dev->device;\n+\tdmadev->fp_obj->dev_private = dmadev->data->dev_private;\n \n \t/* Invoke PMD device initialization function */\n \tret = dpaa_qdma_init(dmadev);\ndiff --git a/drivers/dma/dpaa/dpaa_qdma.h b/drivers/dma/dpaa/dpaa_qdma.h\nindex cc0d1f114e..f482b16334 100644\n--- a/drivers/dma/dpaa/dpaa_qdma.h\n+++ b/drivers/dma/dpaa/dpaa_qdma.h\n@@ -8,6 +8,12 @@\n #define CORE_NUMBER 4\n #define RETRIES\t5\n \n+#ifndef GENMASK\n+#define BITS_PER_LONG\t(__SIZEOF_LONG__ * 8)\n+#define GENMASK(h, l) \\\n+\t\t(((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))\n+#endif\n+\n #define FSL_QDMA_DMR\t\t\t0x0\n #define FSL_QDMA_DSR\t\t\t0x4\n #define FSL_QDMA_DEIER\t\t\t0xe00\n", "prefixes": [ "v2", "4/6" ] }