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GET /api/patches/101217/?format=api
{ "id": 101217, "url": "https://patches.dpdk.org/api/patches/101217/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20211012124554.21296-9-talshn@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211012124554.21296-9-talshn@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211012124554.21296-9-talshn@nvidia.com", "date": "2021-10-12T12:45:49", "name": "[v2,08/13] net/mlx5: support TSO offload on Windows", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "b1bdd9b33da9a12bfe60292d8288b66d50af7fb8", "submitter": { "id": 1893, "url": "https://patches.dpdk.org/api/people/1893/?format=api", "name": "Tal Shnaiderman", "email": "talshn@nvidia.com" }, "delegate": { "id": 3268, "url": "https://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20211012124554.21296-9-talshn@nvidia.com/mbox/", "series": [ { "id": 19558, "url": "https://patches.dpdk.org/api/series/19558/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=19558", "date": "2021-10-12T12:45:41", "name": "Expand NIC offloads support on Windows", "version": 2, "mbox": "https://patches.dpdk.org/series/19558/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/101217/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/101217/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A5E69A0C47;\n\tTue, 12 Oct 2021 14:47:24 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id E1D00411B7;\n\tTue, 12 Oct 2021 14:46:50 +0200 (CEST)", "from NAM12-BN8-obe.outbound.protection.outlook.com\n (mail-bn8nam12on2061.outbound.protection.outlook.com [40.107.237.61])\n by mails.dpdk.org (Postfix) with ESMTP id D6A35411A2\n for <dev@dpdk.org>; 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mx.microsoft.com 1; spf=pass (sender ip is\n 216.228.112.34) smtp.rcpttodomain=monjalon.net smtp.mailfrom=nvidia.com;\n dmarc=pass (p=quarantine sp=quarantine pct=100) action=none\n header.from=nvidia.com; dkim=none (message not signed); arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=9FY1nxaJfqHkGLFd+bxtb5Pst6DWZpi0bHYOQJ/wZU4=;\n b=kHw1B0bn2D7V+QKr7VpfuI/Jq/AmAGQK6shovt0CQGrZLlzWmdCqkXPNrIOHRwj4fGGetG0BCpjKE8nrKeGbdqCPUM7bwVtLgbvz8as0G+2Ogi3tNwvQL51TYCrPcEuN2B96mzUpKMzjPAUa72aW7a4b0leqsRHBa9WpUOFJTWe2FgWTnuwdXd3xwJ4uF8NrYiCXd8Fhppx0L/i+WNSBQzQ2Q5kVLwV6ZxdfqnxZ95XdhE6cn1GCPBkuQXLppUQf6J1ASsiBHWPR5IdhusgLidouP4fkCCCzjn9R8tSvT3Lq1l1azxYbNNQU/Z/7epKx9k0yGddcAFhj+iDH8OIxXw==", "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 216.228.112.34)\n smtp.mailfrom=nvidia.com; monjalon.net; dkim=none (message not signed)\n header.d=none;monjalon.net; dmarc=pass action=none header.from=nvidia.com;", "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.112.34 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.112.34; helo=mail.nvidia.com;", "From": "Tal Shnaiderman <talshn@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "<thomas@monjalon.net>, <matan@nvidia.com>, <rasland@nvidia.com>,\n <asafp@nvidia.com>, <viacheslavo@nvidia.com>, <eilong@nvidia.com>,\n <kcollins@nvidia.com>, <idanhac@nvidia.com>", "Date": "Tue, 12 Oct 2021 15:45:49 +0300", "Message-ID": "<20211012124554.21296-9-talshn@nvidia.com>", "X-Mailer": "git-send-email 2.16.1.windows.4", "In-Reply-To": "<20211012124554.21296-1-talshn@nvidia.com>", "References": "<20211012124554.21296-1-talshn@nvidia.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.187.6]", "X-ClientProxiedBy": "HQMAIL111.nvidia.com (172.20.187.18) To\n HQMAIL107.nvidia.com (172.20.187.13)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "d87401c3-5459-432f-8701-08d98d7e5a8f", "X-MS-TrafficTypeDiagnostic": "DM6PR12MB4281:", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-Microsoft-Antispam-PRVS": "\n <DM6PR12MB4281A235C7FA3A6493ACFBACA4B69@DM6PR12MB4281.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:3968;", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n 7PC3y50MdRv37K0MSsUg4AztlooPcjiL9gUpqNKOWdiYJx21h1W/E/AGJTNa7EH5R18IcODjx2E6yvrCZFIKt1v/fOHZRNSkPnFXwQEZdePnlR4w/leGZLefY7MXUfeQHjecXLBpOlSE/EE0waCc0U0LOHSswybTPPE5l/6IfEXSIR6lJ+GXj9xPXxyxWOJQblmr9E+PGXlpPxgnw+a625nQPU6d+yfA7IHqAGFUW3ZkOl6yom4EjkZXJL9UAMwz38zRa8Ch8ev0LA5j2sccRsTnD6rfnkedgCjjv+NZYw/wSPKPq4cL4Mm3ZWpwmQqRbAL1TBMlyJ36E3GzGwd3KtcUce5Y9ehCsZguSD/2eW/Zn6txpaiS99tvBPnfvr2VDkly/RGeMeel7mji9Ps3QxgfJW4Df6vho18UEj+8TWpwLyxmNxQ3yYkprjmpTYaK+gkpLDirmsUTqwJGeHHp4qsjl+10GhW0ix3Wyv2DSFr0hkBUPZkviEJQrvhAtiK0/5xZZbLItvLr/CTgNst+tG8Az3y5MOBCpV6ly49AJj7QbzL/bYYCjY9h+OwYtH1Mk4cNeQOb1qXfcjraiR8oWseW8MhuQP6ju7WmWtcSiY/a7sixc2qnAPbXV17zNOt1C5yuOaEYAeHP8hfCZ1KoMVfIesHkkBYMzH543FwROVvtbEv0tPG6R+TeRNoft04K4w2rllBVSIs6ZN1TB6yoGQ==", "X-Forefront-Antispam-Report": "CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE;\n SFS:(4636009)(46966006)(36840700001)(70586007)(186003)(55016002)(70206006)(2616005)(54906003)(8676002)(26005)(8936002)(82310400003)(316002)(36756003)(336012)(5660300002)(426003)(356005)(7636003)(16526019)(7696005)(1076003)(6916009)(2906002)(47076005)(107886003)(86362001)(4326008)(508600001)(6286002)(36860700001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "12 Oct 2021 12:46:47.2928 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n d87401c3-5459-432f-8701-08d98d7e5a8f", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DM6NAM11FT025.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM6PR12MB4281", "Subject": "[dpdk-dev] [PATCH v2 08/13] net/mlx5: support TSO offload on Windows", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Support of the TSO offloading by checking\nthe relevant FW capability for NIC support.\n\nSupported offloads:\n\nDEV_TX_OFFLOAD_TCP_TSO\nDEV_TX_OFFLOAD_VXLAN_TNL_TSO\nDEV_TX_OFFLOAD_GRE_TNL_TSO\nDEV_TX_OFFLOAD_GENEVE_TNL_TSO\n\nSigned-off-by: Tal Shnaiderman <talshn@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\nTested-by: Idan Hackmon <idanhac@nvidia.com>\n---\n drivers/net/mlx5/windows/mlx5_os.c | 2 ++\n 1 file changed, 2 insertions(+)", "diff": "diff --git a/drivers/net/mlx5/windows/mlx5_os.c b/drivers/net/mlx5/windows/mlx5_os.c\nindex fab7d7efcb..194cb7d9ad 100644\n--- a/drivers/net/mlx5/windows/mlx5_os.c\n+++ b/drivers/net/mlx5/windows/mlx5_os.c\n@@ -165,6 +165,7 @@ mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)\n \tdevice_attr->max_pd = 1 << hca_attr.log_max_pd;\n \tdevice_attr->max_srq = 1 << hca_attr.log_max_srq;\n \tdevice_attr->max_srq_wr = 1 << hca_attr.log_max_srq_sz;\n+\tdevice_attr->max_tso = 1 << hca_attr.max_lso_cap;\n \tif (hca_attr.rss_ind_tbl_cap) {\n \t\tdevice_attr->max_rwq_indirection_table_size =\n \t\t\t1 << hca_attr.rss_ind_tbl_cap;\n@@ -494,6 +495,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t\tDRV_LOG(DEBUG, \"Rx end alignment padding isn't supported\");\n \t\tconfig->hw_padding = 0;\n \t}\n+\tconfig->tso = (sh->device_attr.max_tso > 0);\n \tif (config->tso)\n \t\tconfig->tso_max_payload_sz = sh->device_attr.max_tso;\n \tDRV_LOG(DEBUG, \"%sMPS is %s.\",\n", "prefixes": [ "v2", "08/13" ] }