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{
    "id": 100265,
    "url": "https://patches.dpdk.org/api/patches/100265/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20211001134022.22700-20-ndabilpuram@marvell.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20211001134022.22700-20-ndabilpuram@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20211001134022.22700-20-ndabilpuram@marvell.com",
    "date": "2021-10-01T13:40:13",
    "name": "[v3,19/28] net/cnxk: support Tx security offload on cn9k",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "a734a5055c48b27a840194fd0ad3ff99df4bac8d",
    "submitter": {
        "id": 1202,
        "url": "https://patches.dpdk.org/api/people/1202/?format=api",
        "name": "Nithin Dabilpuram",
        "email": "ndabilpuram@marvell.com"
    },
    "delegate": {
        "id": 310,
        "url": "https://patches.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerinj@marvell.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20211001134022.22700-20-ndabilpuram@marvell.com/mbox/",
    "series": [
        {
            "id": 19325,
            "url": "https://patches.dpdk.org/api/series/19325/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=19325",
            "date": "2021-10-01T13:39:54",
            "name": "net/cnxk: support for inline ipsec",
            "version": 3,
            "mbox": "https://patches.dpdk.org/series/19325/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/100265/comments/",
    "check": "warning",
    "checks": "https://patches.dpdk.org/api/patches/100265/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
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        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=e7W/ujwsAD1M6U8GQYmpQlzQgpzgVJP37BzNdeVFgWc=;\n b=ZzfOXdGlIZT4xMXr/h6a42myuG6A/DFeXKf6D7ByNMhlEQ6w7ooCM6Tiim+bpKBruh0t\n x9lXeTkxrSG4lyC6fR2l4lvBTs9GdaY58mRvLclQkCN37VDurBNkWC3C18pwYyUzbITQ\n L9+HRys4BJaPg1yWWEiKua7P/dSBYnw9PopRP1KD0bRDIGV1gWL5bsqGypttIWy0fMPG\n 7eURQ5GofwA+1UoelqSXS19PGXhH/J+r8pCarw1a7ujH59KpXMJZuNH4Zy8Jsxr0cSn3\n rakDYK1S7cwIJ1FlVYuL48xYsInB7mRCKqoIllhV1Hb0kj5mAIfXdr/lvy5kg3JXXlqc ow==",
        "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>",
        "To": "<jerinj@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>, \"Shijith\n Thotton\" <sthotton@marvell.com>,\n Nithin Dabilpuram <ndabilpuram@marvell.com>,\n Kiran Kumar K <kirankumark@marvell.com>, Sunil Kumar Kori\n <skori@marvell.com>, Satha Rao <skoteshwar@marvell.com>",
        "CC": "<dev@dpdk.org>",
        "Date": "Fri, 1 Oct 2021 19:10:13 +0530",
        "Message-ID": "<20211001134022.22700-20-ndabilpuram@marvell.com>",
        "X-Mailer": "git-send-email 2.8.4",
        "In-Reply-To": "<20211001134022.22700-1-ndabilpuram@marvell.com>",
        "References": "<20210902021505.17607-1-ndabilpuram@marvell.com>\n <20211001134022.22700-1-ndabilpuram@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain",
        "X-Proofpoint-GUID": "dJ4jrbvAZvb3j00eZbOmHtU5B_SdTIaG",
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        "Subject": "[dpdk-dev] [PATCH v3 19/28] net/cnxk: support Tx security offload\n on cn9k",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
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        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Add support to create and submit CPT instructions on Tx\non CN9K SoC.\n\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\n---\n drivers/event/cnxk/cn9k_eventdev.c               |  29 +-\n drivers/event/cnxk/cn9k_worker.h                 | 163 +++++++++-\n drivers/event/cnxk/cn9k_worker_dual_tx_enq.c     |   2 +-\n drivers/event/cnxk/cn9k_worker_dual_tx_enq_seg.c |   2 +-\n drivers/event/cnxk/cn9k_worker_tx_enq.c          |   2 +-\n drivers/event/cnxk/cn9k_worker_tx_enq_seg.c      |   2 +-\n drivers/net/cnxk/cn9k_tx.c                       |  29 +-\n drivers/net/cnxk/cn9k_tx.h                       | 392 +++++++++++++++--------\n drivers/net/cnxk/cn9k_tx_mseg.c                  |   2 +-\n drivers/net/cnxk/cn9k_tx_vec.c                   |   2 +-\n drivers/net/cnxk/cn9k_tx_vec_mseg.c              |   2 +-\n 11 files changed, 459 insertions(+), 168 deletions(-)",
    "diff": "diff --git a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c\nindex 64d9ded..806dcb0 100644\n--- a/drivers/event/cnxk/cn9k_eventdev.c\n+++ b/drivers/event/cnxk/cn9k_eventdev.c\n@@ -19,8 +19,8 @@\n \t\t\t [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)])\n \n #define CN9K_SET_EVDEV_ENQ_OP(dev, enq_op, enq_ops)                            \\\n-\t(enq_op =                                                              \\\n-\t\t enq_ops[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]       \\\n+\t(enq_op = enq_ops[!!(dev->tx_offloads & NIX_TX_OFFLOAD_SECURITY_F)]    \\\n+\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]       \\\n \t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]          \\\n \t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)]    \\\n \t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)]    \\\n@@ -515,33 +515,34 @@ cn9k_sso_fp_fns_set(struct rte_eventdev *event_dev)\n \n \t/* Tx modes */\n \tconst event_tx_adapter_enqueue\n-\t\tsso_hws_tx_adptr_enq[2][2][2][2][2][2] = {\n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)                             \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_tx_adptr_enq_##name,\n+\t\tsso_hws_tx_adptr_enq[2][2][2][2][2][2][2] = {\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)                         \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_tx_adptr_enq_##name,\n \t\t\tNIX_TX_FASTPATH_MODES\n #undef T\n \t\t};\n \n \tconst event_tx_adapter_enqueue\n-\t\tsso_hws_tx_adptr_enq_seg[2][2][2][2][2][2] = {\n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)                             \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_tx_adptr_enq_seg_##name,\n+\t\tsso_hws_tx_adptr_enq_seg[2][2][2][2][2][2][2] = {\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)                         \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_tx_adptr_enq_seg_##name,\n \t\t\tNIX_TX_FASTPATH_MODES\n #undef T\n \t\t};\n \n \tconst event_tx_adapter_enqueue\n-\t\tsso_hws_dual_tx_adptr_enq[2][2][2][2][2][2] = {\n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)                             \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_tx_adptr_enq_##name,\n+\t\tsso_hws_dual_tx_adptr_enq[2][2][2][2][2][2][2] = {\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)                         \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_tx_adptr_enq_##name,\n \t\t\tNIX_TX_FASTPATH_MODES\n #undef T\n \t\t};\n \n \tconst event_tx_adapter_enqueue\n-\t\tsso_hws_dual_tx_adptr_enq_seg[2][2][2][2][2][2] = {\n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)                             \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_sso_hws_dual_tx_adptr_enq_seg_##name,\n+\t\tsso_hws_dual_tx_adptr_enq_seg[2][2][2][2][2][2][2] = {\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)                         \\\n+\t[f6][f5][f4][f3][f2][f1][f0] =                                         \\\n+\t\t\tcn9k_sso_hws_dual_tx_adptr_enq_seg_##name,\n \t\t\tNIX_TX_FASTPATH_MODES\n #undef T\n \t\t};\ndiff --git a/drivers/event/cnxk/cn9k_worker.h b/drivers/event/cnxk/cn9k_worker.h\nindex f1d2e47..6be9be0 100644\n--- a/drivers/event/cnxk/cn9k_worker.h\n+++ b/drivers/event/cnxk/cn9k_worker.h\n@@ -478,6 +478,145 @@ cn9k_sso_hws_prepare_pkt(const struct cn9k_eth_txq *txq, struct rte_mbuf *m,\n \tcn9k_nix_xmit_prepare(m, cmd, flags, txq->lso_tun_fmt);\n }\n \n+#if defined(RTE_ARCH_ARM64)\n+\n+static __rte_always_inline void\n+cn9k_sso_hws_xmit_sec_one(const struct cn9k_eth_txq *txq, uint64_t base,\n+\t\t\t  struct rte_mbuf *m, uint64_t *cmd,\n+\t\t\t  uint32_t flags)\n+{\n+\tstruct cn9k_outb_priv_data *outb_priv;\n+\trte_iova_t io_addr = txq->cpt_io_addr;\n+\tuint64_t *lmt_addr = txq->lmt_addr;\n+\tstruct cn9k_sec_sess_priv mdata;\n+\tstruct nix_send_hdr_s *send_hdr;\n+\tuint64_t sa_base = txq->sa_base;\n+\tuint32_t pkt_len, dlen_adj, rlen;\n+\tuint64x2_t cmd01, cmd23;\n+\tuint64_t lmt_status, sa;\n+\tunion nix_send_sg_s *sg;\n+\tuintptr_t dptr, nixtx;\n+\tuint64_t ucode_cmd[4];\n+\tuint64_t esn, *iv;\n+\tuint8_t l2_len;\n+\n+\tmdata.u64 = *rte_security_dynfield(m);\n+\tsend_hdr = (struct nix_send_hdr_s *)cmd;\n+\tif (flags & NIX_TX_NEED_EXT_HDR)\n+\t\tsg = (union nix_send_sg_s *)&cmd[4];\n+\telse\n+\t\tsg = (union nix_send_sg_s *)&cmd[2];\n+\n+\tif (flags & NIX_TX_NEED_SEND_HDR_W1)\n+\t\tl2_len = cmd[1] & 0xFF;\n+\telse\n+\t\tl2_len = m->l2_len;\n+\n+\t/* Retrieve DPTR */\n+\tdptr = *(uint64_t *)(sg + 1);\n+\tpkt_len = send_hdr->w0.total;\n+\n+\t/* Calculate rlen */\n+\trlen = pkt_len - l2_len;\n+\trlen = (rlen + mdata.roundup_len) + (mdata.roundup_byte - 1);\n+\trlen &= ~(uint64_t)(mdata.roundup_byte - 1);\n+\trlen += mdata.partial_len;\n+\tdlen_adj = rlen - pkt_len + l2_len;\n+\n+\t/* Update send descriptors. Security is single segment only */\n+\tsend_hdr->w0.total = pkt_len + dlen_adj;\n+\tsg->seg1_size = pkt_len + dlen_adj;\n+\n+\t/* Get area where NIX descriptor needs to be stored */\n+\tnixtx = dptr + pkt_len + dlen_adj;\n+\tnixtx += BIT_ULL(7);\n+\tnixtx = (nixtx - 1) & ~(BIT_ULL(7) - 1);\n+\n+\troc_lmt_mov((void *)(nixtx + 16), cmd, cn9k_nix_tx_ext_subs(flags));\n+\n+\t/* Load opcode and cptr already prepared at pkt metadata set */\n+\tpkt_len -= l2_len;\n+\tpkt_len += sizeof(struct roc_onf_ipsec_outb_hdr) +\n+\t\t    ROC_ONF_IPSEC_OUTB_MAX_L2_INFO_SZ;\n+\tsa_base &= ~(ROC_NIX_INL_SA_BASE_ALIGN - 1);\n+\n+\tsa = (uintptr_t)roc_nix_inl_onf_ipsec_outb_sa(sa_base, mdata.sa_idx);\n+\tucode_cmd[3] = (ROC_CPT_DFLT_ENG_GRP_SE_IE << 61 | sa);\n+\tucode_cmd[0] = (ROC_IE_ONF_MAJOR_OP_PROCESS_OUTBOUND_IPSEC << 48 |\n+\t\t\t0x40UL << 48 | pkt_len);\n+\n+\t/* CPT Word 0 and Word 1 */\n+\tcmd01 = vdupq_n_u64((nixtx + 16) | (cn9k_nix_tx_ext_subs(flags) + 1));\n+\t/* CPT_RES_S is 16B above NIXTX */\n+\tcmd01 = vsetq_lane_u8(nixtx & BIT_ULL(7), cmd01, 8);\n+\n+\t/* CPT word 2 and 3 */\n+\tcmd23 = vdupq_n_u64(0);\n+\tcmd23 = vsetq_lane_u64((((uint64_t)RTE_EVENT_TYPE_CPU << 28) |\n+\t\t\t\tCNXK_ETHDEV_SEC_OUTB_EV_SUB << 20), cmd23, 0);\n+\tcmd23 = vsetq_lane_u64((uintptr_t)m | 1, cmd23, 1);\n+\n+\tdptr += l2_len - ROC_ONF_IPSEC_OUTB_MAX_L2_INFO_SZ -\n+\t\tsizeof(struct roc_onf_ipsec_outb_hdr);\n+\tucode_cmd[1] = dptr;\n+\tucode_cmd[2] = dptr;\n+\n+\t/* Update IV to zero and l2 sz */\n+\t*(uint16_t *)(dptr + sizeof(struct roc_onf_ipsec_outb_hdr)) =\n+\t\trte_cpu_to_be_16(ROC_ONF_IPSEC_OUTB_MAX_L2_INFO_SZ);\n+\tiv = (uint64_t *)(dptr + 8);\n+\tiv[0] = 0;\n+\tiv[1] = 0;\n+\n+\t/* Head wait if needed */\n+\tif (base)\n+\t\troc_sso_hws_head_wait(base + SSOW_LF_GWS_TAG);\n+\n+\t/* ESN */\n+\toutb_priv = roc_nix_inl_onf_ipsec_outb_sa_sw_rsvd((void *)sa);\n+\tesn = outb_priv->esn;\n+\toutb_priv->esn = esn + 1;\n+\n+\tucode_cmd[0] |= (esn >> 32) << 16;\n+\tesn = rte_cpu_to_be_32(esn & (BIT_ULL(32) - 1));\n+\n+\t/* Update ESN and IPID and IV */\n+\t*(uint64_t *)dptr = esn << 32 | esn;\n+\n+\trte_io_wmb();\n+\tcn9k_sso_txq_fc_wait(txq);\n+\n+\t/* Write CPT instruction to lmt line */\n+\tvst1q_u64(lmt_addr, cmd01);\n+\tvst1q_u64(lmt_addr + 2, cmd23);\n+\n+\troc_lmt_mov_seg(lmt_addr + 4, ucode_cmd, 2);\n+\n+\tif (roc_lmt_submit_ldeor(io_addr) == 0) {\n+\t\tdo {\n+\t\t\tvst1q_u64(lmt_addr, cmd01);\n+\t\t\tvst1q_u64(lmt_addr + 2, cmd23);\n+\t\t\troc_lmt_mov_seg(lmt_addr + 4, ucode_cmd, 2);\n+\n+\t\t\tlmt_status = roc_lmt_submit_ldeor(io_addr);\n+\t\t} while (lmt_status == 0);\n+\t}\n+}\n+#else\n+\n+static inline void\n+cn9k_sso_hws_xmit_sec_one(const struct cn9k_eth_txq *txq, uint64_t base,\n+\t\t\t  struct rte_mbuf *m, uint64_t *cmd,\n+\t\t\t  uint32_t flags)\n+{\n+\tRTE_SET_USED(txq);\n+\tRTE_SET_USED(base);\n+\tRTE_SET_USED(m);\n+\tRTE_SET_USED(cmd);\n+\tRTE_SET_USED(flags);\n+}\n+#endif\n+\n static __rte_always_inline uint16_t\n cn9k_sso_hws_event_tx(uint64_t base, struct rte_event *ev, uint64_t *cmd,\n \t\t      const uint64_t txq_data[][RTE_MAX_QUEUES_PER_PORT],\n@@ -494,11 +633,30 @@ cn9k_sso_hws_event_tx(uint64_t base, struct rte_event *ev, uint64_t *cmd,\n \t * In case of fast free is not set, both cn9k_nix_prepare_mseg()\n \t * and cn9k_nix_xmit_prepare() has a barrier after refcnt update.\n \t */\n-\tif (!(flags & NIX_TX_OFFLOAD_MBUF_NOFF_F))\n+\tif (!(flags & NIX_TX_OFFLOAD_MBUF_NOFF_F) &&\n+\t    !(flags & NIX_TX_OFFLOAD_SECURITY_F))\n \t\trte_io_wmb();\n \ttxq = cn9k_sso_hws_xtract_meta(m, txq_data);\n \tcn9k_sso_hws_prepare_pkt(txq, m, cmd, flags);\n \n+\tif (flags & NIX_TX_OFFLOAD_SECURITY_F) {\n+\t\tuint64_t ol_flags = m->ol_flags;\n+\n+\t\tif (ol_flags & PKT_TX_SEC_OFFLOAD) {\n+\t\t\tuintptr_t ssow_base = base;\n+\n+\t\t\tif (ev->sched_type)\n+\t\t\t\tssow_base = 0;\n+\n+\t\t\tcn9k_sso_hws_xmit_sec_one(txq, ssow_base, m, cmd,\n+\t\t\t\t\t\t  flags);\n+\t\t\tgoto done;\n+\t\t}\n+\n+\t\tif (!(flags & NIX_TX_OFFLOAD_MBUF_NOFF_F))\n+\t\t\trte_io_wmb();\n+\t}\n+\n \tif (flags & NIX_TX_MULTI_SEG_F) {\n \t\tconst uint16_t segdw = cn9k_nix_prepare_mseg(m, cmd, flags);\n \t\tif (!CNXK_TT_FROM_EVENT(ev->event)) {\n@@ -526,6 +684,7 @@ cn9k_sso_hws_event_tx(uint64_t base, struct rte_event *ev, uint64_t *cmd,\n \t\t}\n \t}\n \n+done:\n \tif (flags & NIX_TX_OFFLOAD_MBUF_NOFF_F) {\n \t\tif (ref_cnt > 1)\n \t\t\treturn 1;\n@@ -537,7 +696,7 @@ cn9k_sso_hws_event_tx(uint64_t base, struct rte_event *ev, uint64_t *cmd,\n \treturn 1;\n }\n \n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)                             \\\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)                         \\\n \tuint16_t __rte_hot cn9k_sso_hws_tx_adptr_enq_##name(                   \\\n \t\tvoid *port, struct rte_event ev[], uint16_t nb_events);        \\\n \tuint16_t __rte_hot cn9k_sso_hws_tx_adptr_enq_seg_##name(               \\\ndiff --git a/drivers/event/cnxk/cn9k_worker_dual_tx_enq.c b/drivers/event/cnxk/cn9k_worker_dual_tx_enq.c\nindex 92e2981..db045d0 100644\n--- a/drivers/event/cnxk/cn9k_worker_dual_tx_enq.c\n+++ b/drivers/event/cnxk/cn9k_worker_dual_tx_enq.c\n@@ -4,7 +4,7 @@\n \n #include \"cn9k_worker.h\"\n \n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)                             \\\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)                         \\\n \tuint16_t __rte_hot cn9k_sso_hws_dual_tx_adptr_enq_##name(              \\\n \t\tvoid *port, struct rte_event ev[], uint16_t nb_events)         \\\n \t{                                                                      \\\ndiff --git a/drivers/event/cnxk/cn9k_worker_dual_tx_enq_seg.c b/drivers/event/cnxk/cn9k_worker_dual_tx_enq_seg.c\nindex dfb574c..95d711f 100644\n--- a/drivers/event/cnxk/cn9k_worker_dual_tx_enq_seg.c\n+++ b/drivers/event/cnxk/cn9k_worker_dual_tx_enq_seg.c\n@@ -4,7 +4,7 @@\n \n #include \"cn9k_worker.h\"\n \n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)                             \\\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)                         \\\n \tuint16_t __rte_hot cn9k_sso_hws_dual_tx_adptr_enq_seg_##name(          \\\n \t\tvoid *port, struct rte_event ev[], uint16_t nb_events)         \\\n \t{                                                                      \\\ndiff --git a/drivers/event/cnxk/cn9k_worker_tx_enq.c b/drivers/event/cnxk/cn9k_worker_tx_enq.c\nindex 3df649c..026cef8 100644\n--- a/drivers/event/cnxk/cn9k_worker_tx_enq.c\n+++ b/drivers/event/cnxk/cn9k_worker_tx_enq.c\n@@ -4,7 +4,7 @@\n \n #include \"cn9k_worker.h\"\n \n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)                             \\\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)                         \\\n \tuint16_t __rte_hot cn9k_sso_hws_tx_adptr_enq_##name(                   \\\n \t\tvoid *port, struct rte_event ev[], uint16_t nb_events)         \\\n \t{                                                                      \\\ndiff --git a/drivers/event/cnxk/cn9k_worker_tx_enq_seg.c b/drivers/event/cnxk/cn9k_worker_tx_enq_seg.c\nindex 0efe291..97cd7c7 100644\n--- a/drivers/event/cnxk/cn9k_worker_tx_enq_seg.c\n+++ b/drivers/event/cnxk/cn9k_worker_tx_enq_seg.c\n@@ -4,7 +4,7 @@\n \n #include \"cn9k_worker.h\"\n \n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)                             \\\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)                         \\\n \tuint16_t __rte_hot cn9k_sso_hws_tx_adptr_enq_seg_##name(               \\\n \t\tvoid *port, struct rte_event ev[], uint16_t nb_events)         \\\n \t{                                                                      \\\ndiff --git a/drivers/net/cnxk/cn9k_tx.c b/drivers/net/cnxk/cn9k_tx.c\nindex 763f9a1..e5691a2 100644\n--- a/drivers/net/cnxk/cn9k_tx.c\n+++ b/drivers/net/cnxk/cn9k_tx.c\n@@ -5,7 +5,7 @@\n #include \"cn9k_ethdev.h\"\n #include \"cn9k_tx.h\"\n \n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t       \\\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t       \\\n \tuint16_t __rte_noinline __rte_hot cn9k_nix_xmit_pkts_##name(\t       \\\n \t\tvoid *tx_queue, struct rte_mbuf **tx_pkts, uint16_t pkts)      \\\n \t{                                                                      \\\n@@ -23,12 +23,13 @@ NIX_TX_FASTPATH_MODES\n \n static inline void\n pick_tx_func(struct rte_eth_dev *eth_dev,\n-\t     const eth_tx_burst_t tx_burst[2][2][2][2][2][2])\n+\t     const eth_tx_burst_t tx_burst[2][2][2][2][2][2][2])\n {\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n \n \t/* [TS] [TSO] [NOFF] [VLAN] [OL3_OL4_CSUM] [IL3_IL4_CSUM] */\n \teth_dev->tx_pkt_burst = tx_burst\n+\t\t[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_SECURITY_F)]\n \t\t[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_TSTAMP_F)]\n \t\t[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_TSO_F)]\n \t\t[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_MBUF_NOFF_F)]\n@@ -42,33 +43,33 @@ cn9k_eth_set_tx_function(struct rte_eth_dev *eth_dev)\n {\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n \n-\tconst eth_tx_burst_t nix_eth_tx_burst[2][2][2][2][2][2] = {\n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t       \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_nix_xmit_pkts_##name,\n+\tconst eth_tx_burst_t nix_eth_tx_burst[2][2][2][2][2][2][2] = {\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t       \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_nix_xmit_pkts_##name,\n \n \t\tNIX_TX_FASTPATH_MODES\n #undef T\n \t};\n \n-\tconst eth_tx_burst_t nix_eth_tx_burst_mseg[2][2][2][2][2][2] = {\n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t       \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_nix_xmit_pkts_mseg_##name,\n+\tconst eth_tx_burst_t nix_eth_tx_burst_mseg[2][2][2][2][2][2][2] = {\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t       \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_nix_xmit_pkts_mseg_##name,\n \n \t\tNIX_TX_FASTPATH_MODES\n #undef T\n \t};\n \n-\tconst eth_tx_burst_t nix_eth_tx_vec_burst[2][2][2][2][2][2] = {\n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t       \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_nix_xmit_pkts_vec_##name,\n+\tconst eth_tx_burst_t nix_eth_tx_vec_burst[2][2][2][2][2][2][2] = {\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t       \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_nix_xmit_pkts_vec_##name,\n \n \t\tNIX_TX_FASTPATH_MODES\n #undef T\n \t};\n \n-\tconst eth_tx_burst_t nix_eth_tx_vec_burst_mseg[2][2][2][2][2][2] = {\n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t       \\\n-\t[f5][f4][f3][f2][f1][f0] = cn9k_nix_xmit_pkts_vec_mseg_##name,\n+\tconst eth_tx_burst_t nix_eth_tx_vec_burst_mseg[2][2][2][2][2][2][2] = {\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t       \\\n+\t[f6][f5][f4][f3][f2][f1][f0] = cn9k_nix_xmit_pkts_vec_mseg_##name,\n \n \t\tNIX_TX_FASTPATH_MODES\n #undef T\ndiff --git a/drivers/net/cnxk/cn9k_tx.h b/drivers/net/cnxk/cn9k_tx.h\nindex a27ff76..44273ec 100644\n--- a/drivers/net/cnxk/cn9k_tx.h\n+++ b/drivers/net/cnxk/cn9k_tx.h\n@@ -1819,139 +1819,269 @@ cn9k_nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf **tx_pkts,\n #define NOFF_F\t     NIX_TX_OFFLOAD_MBUF_NOFF_F\n #define TSO_F\t     NIX_TX_OFFLOAD_TSO_F\n #define TSP_F\t     NIX_TX_OFFLOAD_TSTAMP_F\n+#define T_SEC_F      NIX_TX_OFFLOAD_SECURITY_F\n \n-/* [TSP] [TSO] [NOFF] [VLAN] [OL3OL4CSUM] [L3L4CSUM] */\n-#define NIX_TX_FASTPATH_MODES\t\t\t\t\t\t       \\\n-T(no_offload,\t\t\t\t0, 0, 0, 0, 0, 0,\t4,\t       \\\n-\t\tNIX_TX_OFFLOAD_NONE)\t\t\t\t\t       \\\n-T(l3l4csum,\t\t\t\t0, 0, 0, 0, 0, 1,\t4,\t       \\\n-\t\tL3L4CSUM_F)\t\t\t\t\t\t       \\\n-T(ol3ol4csum,\t\t\t\t0, 0, 0, 0, 1, 0,\t4,\t       \\\n-\t\tOL3OL4CSUM_F)\t\t\t\t\t\t       \\\n-T(ol3ol4csum_l3l4csum,\t\t\t0, 0, 0, 0, 1, 1,\t4,\t       \\\n-\t\tOL3OL4CSUM_F | L3L4CSUM_F)\t\t\t\t       \\\n-T(vlan,\t\t\t\t\t0, 0, 0, 1, 0, 0,\t6,\t       \\\n-\t\tVLAN_F)\t\t\t\t\t\t\t       \\\n-T(vlan_l3l4csum,\t\t\t0, 0, 0, 1, 0, 1,\t6,\t       \\\n-\t\tVLAN_F | L3L4CSUM_F)\t\t\t\t\t       \\\n-T(vlan_ol3ol4csum,\t\t\t0, 0, 0, 1, 1, 0,\t6,\t       \\\n-\t\tVLAN_F | OL3OL4CSUM_F)\t\t\t\t\t       \\\n-T(vlan_ol3ol4csum_l3l4csum,\t\t0, 0, 0, 1, 1, 1,\t6,\t       \\\n-\t\tVLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\t       \\\n-T(noff,\t\t\t\t\t0, 0, 1, 0, 0, 0,\t4,\t       \\\n-\t\tNOFF_F)\t\t\t\t\t\t\t       \\\n-T(noff_l3l4csum,\t\t\t0, 0, 1, 0, 0, 1,\t4,\t       \\\n-\t\tNOFF_F | L3L4CSUM_F)\t\t\t\t\t       \\\n-T(noff_ol3ol4csum,\t\t\t0, 0, 1, 0, 1, 0,\t4,\t       \\\n-\t\tNOFF_F | OL3OL4CSUM_F)\t\t\t\t\t       \\\n-T(noff_ol3ol4csum_l3l4csum,\t\t0, 0, 1, 0, 1, 1,\t4,\t       \\\n-\t\tNOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\t       \\\n-T(noff_vlan,\t\t\t\t0, 0, 1, 1, 0, 0,\t6,\t       \\\n-\t\tNOFF_F | VLAN_F)\t\t\t\t\t       \\\n-T(noff_vlan_l3l4csum,\t\t\t0, 0, 1, 1, 0, 1,\t6,\t       \\\n-\t\tNOFF_F | VLAN_F | L3L4CSUM_F)\t\t\t\t       \\\n-T(noff_vlan_ol3ol4csum,\t\t\t0, 0, 1, 1, 1, 0,\t6,\t       \\\n-\t\tNOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\t       \\\n-T(noff_vlan_ol3ol4csum_l3l4csum,\t0, 0, 1, 1, 1, 1,\t6,\t       \\\n-\t\tNOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t       \\\n-T(tso,\t\t\t\t\t0, 1, 0, 0, 0, 0,\t6,\t       \\\n-\t\tTSO_F)\t\t\t\t\t\t\t       \\\n-T(tso_l3l4csum,\t\t\t\t0, 1, 0, 0, 0, 1,\t6,\t       \\\n-\t\tTSO_F | L3L4CSUM_F)\t\t\t\t\t       \\\n-T(tso_ol3ol4csum,\t\t\t0, 1, 0, 0, 1, 0,\t6,\t       \\\n-\t\tTSO_F | OL3OL4CSUM_F)\t\t\t\t\t       \\\n-T(tso_ol3ol4csum_l3l4csum,\t\t0, 1, 0, 0, 1, 1,\t6,\t       \\\n-\t\tTSO_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\t       \\\n-T(tso_vlan,\t\t\t\t0, 1, 0, 1, 0, 0,\t6,\t       \\\n-\t\tTSO_F | VLAN_F)\t\t\t\t\t\t       \\\n-T(tso_vlan_l3l4csum,\t\t\t0, 1, 0, 1, 0, 1,\t6,\t       \\\n-\t\tTSO_F | VLAN_F | L3L4CSUM_F)\t\t\t\t       \\\n-T(tso_vlan_ol3ol4csum,\t\t\t0, 1, 0, 1, 1, 0,\t6,\t       \\\n-\t\tTSO_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\t       \\\n-T(tso_vlan_ol3ol4csum_l3l4csum,\t\t0, 1, 0, 1, 1, 1,\t6,\t       \\\n-\t\tTSO_F | VLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t       \\\n-T(tso_noff,\t\t\t\t0, 1, 1, 0, 0, 0,\t6,\t       \\\n-\t\tTSO_F | NOFF_F)\t\t\t\t\t\t       \\\n-T(tso_noff_l3l4csum,\t\t\t0, 1, 1, 0, 0, 1,\t6,\t       \\\n-\t\tTSO_F | NOFF_F | L3L4CSUM_F)\t\t\t\t       \\\n-T(tso_noff_ol3ol4csum,\t\t\t0, 1, 1, 0, 1, 0,\t6,\t       \\\n-\t\tTSO_F | NOFF_F | OL3OL4CSUM_F)\t\t\t\t       \\\n-T(tso_noff_ol3ol4csum_l3l4csum,\t\t0, 1, 1, 0, 1, 1,\t6,\t       \\\n-\t\tTSO_F | NOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t       \\\n-T(tso_noff_vlan,\t\t\t0, 1, 1, 1, 0, 0,\t6,\t       \\\n-\t\tTSO_F | NOFF_F | VLAN_F)\t\t\t\t       \\\n-T(tso_noff_vlan_l3l4csum,\t\t0, 1, 1, 1, 0, 1,\t6,\t       \\\n-\t\tTSO_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t\t       \\\n-T(tso_noff_vlan_ol3ol4csum,\t\t0, 1, 1, 1, 1, 0,\t6,\t       \\\n-\t\tTSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\t       \\\n-T(tso_noff_vlan_ol3ol4csum_l3l4csum,\t0, 1, 1, 1, 1, 1,\t6,\t       \\\n-\t\tTSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t       \\\n-T(ts,\t\t\t\t\t1, 0, 0, 0, 0, 0,\t8,\t       \\\n-\t\tTSP_F)\t\t\t\t\t\t\t       \\\n-T(ts_l3l4csum,\t\t\t\t1, 0, 0, 0, 0, 1,\t8,\t       \\\n-\t\tTSP_F | L3L4CSUM_F)\t\t\t\t\t       \\\n-T(ts_ol3ol4csum,\t\t\t1, 0, 0, 0, 1, 0,\t8,\t       \\\n-\t\tTSP_F | OL3OL4CSUM_F)\t\t\t\t\t       \\\n-T(ts_ol3ol4csum_l3l4csum,\t\t1, 0, 0, 0, 1, 1,\t8,\t       \\\n-\t\tTSP_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\t       \\\n-T(ts_vlan,\t\t\t\t1, 0, 0, 1, 0, 0,\t8,\t       \\\n-\t\tTSP_F | VLAN_F)\t\t\t\t\t\t       \\\n-T(ts_vlan_l3l4csum,\t\t\t1, 0, 0, 1, 0, 1,\t8,\t       \\\n-\t\tTSP_F | VLAN_F | L3L4CSUM_F)\t\t\t\t       \\\n-T(ts_vlan_ol3ol4csum,\t\t\t1, 0, 0, 1, 1, 0,\t8,\t       \\\n-\t\tTSP_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\t       \\\n-T(ts_vlan_ol3ol4csum_l3l4csum,\t\t1, 0, 0, 1, 1, 1,\t8,\t       \\\n-\t\tTSP_F | VLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t       \\\n-T(ts_noff,\t\t\t\t1, 0, 1, 0, 0, 0,\t8,\t       \\\n-\t\tTSP_F | NOFF_F)\t\t\t\t\t\t       \\\n-T(ts_noff_l3l4csum,\t\t\t1, 0, 1, 0, 0, 1,\t8,\t       \\\n-\t\tTSP_F | NOFF_F | L3L4CSUM_F)\t\t\t\t       \\\n-T(ts_noff_ol3ol4csum,\t\t\t1, 0, 1, 0, 1, 0,\t8,\t       \\\n-\t\tTSP_F | NOFF_F | OL3OL4CSUM_F)\t\t\t\t       \\\n-T(ts_noff_ol3ol4csum_l3l4csum,\t\t1, 0, 1, 0, 1, 1,\t8,\t       \\\n-\t\tTSP_F | NOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t       \\\n-T(ts_noff_vlan,\t\t\t\t1, 0, 1, 1, 0, 0,\t8,\t       \\\n-\t\tTSP_F | NOFF_F | VLAN_F)\t\t\t\t       \\\n-T(ts_noff_vlan_l3l4csum,\t\t1, 0, 1, 1, 0, 1,\t8,\t       \\\n-\t\tTSP_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t\t       \\\n-T(ts_noff_vlan_ol3ol4csum,\t\t1, 0, 1, 1, 1, 0,\t8,\t       \\\n-\t\tTSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\t       \\\n-T(ts_noff_vlan_ol3ol4csum_l3l4csum,\t1, 0, 1, 1, 1, 1,\t8,\t       \\\n-\t\tTSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t       \\\n-T(ts_tso,\t\t\t\t1, 1, 0, 0, 0, 0,\t8,\t       \\\n-\t\tTSP_F | TSO_F)\t\t\t\t\t\t       \\\n-T(ts_tso_l3l4csum,\t\t\t1, 1, 0, 0, 0, 1,\t8,\t       \\\n-\t\tTSP_F | TSO_F | L3L4CSUM_F)\t\t\t\t       \\\n-T(ts_tso_ol3ol4csum,\t\t\t1, 1, 0, 0, 1, 0,\t8,\t       \\\n-\t\tTSP_F | TSO_F | OL3OL4CSUM_F)\t\t\t\t       \\\n-T(ts_tso_ol3ol4csum_l3l4csum,\t\t1, 1, 0, 0, 1, 1,\t8,\t       \\\n-\t\tTSP_F | TSO_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t       \\\n-T(ts_tso_vlan,\t\t\t\t1, 1, 0, 1, 0, 0,\t8,\t       \\\n-\t\tTSP_F | TSO_F | VLAN_F)\t\t\t\t\t       \\\n-T(ts_tso_vlan_l3l4csum,\t\t\t1, 1, 0, 1, 0, 1,\t8,\t       \\\n-\t\tTSP_F | TSO_F | VLAN_F | L3L4CSUM_F)\t\t\t       \\\n-T(ts_tso_vlan_ol3ol4csum,\t\t1, 1, 0, 1, 1, 0,\t8,\t       \\\n-\t\tTSP_F | TSO_F | VLAN_F | OL3OL4CSUM_F)\t\t\t       \\\n-T(ts_tso_vlan_ol3ol4csum_l3l4csum,\t1, 1, 0, 1, 1, 1,\t8,\t       \\\n-\t\tTSP_F | TSO_F | VLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t       \\\n-T(ts_tso_noff,\t\t\t\t1, 1, 1, 0, 0, 0,\t8,\t       \\\n-\t\tTSP_F | TSO_F | NOFF_F)\t\t\t\t\t       \\\n-T(ts_tso_noff_l3l4csum,\t\t\t1, 1, 1, 0, 0, 1,\t8,\t       \\\n-\t\tTSP_F | TSO_F | NOFF_F | L3L4CSUM_F)\t\t\t       \\\n-T(ts_tso_noff_ol3ol4csum,\t\t1, 1, 1, 0, 1, 0,\t8,\t       \\\n-\t\tTSP_F | TSO_F | NOFF_F | OL3OL4CSUM_F)\t\t\t       \\\n-T(ts_tso_noff_ol3ol4csum_l3l4csum,\t1, 1, 1, 0, 1, 1,\t8,\t       \\\n-\t\tTSP_F | TSO_F | NOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t       \\\n-T(ts_tso_noff_vlan,\t\t\t1, 1, 1, 1, 0, 0,\t8,\t       \\\n-\t\tTSP_F | TSO_F | NOFF_F | VLAN_F)\t\t\t       \\\n-T(ts_tso_noff_vlan_l3l4csum,\t\t1, 1, 1, 1, 0, 1,\t8,\t       \\\n-\t\tTSP_F | TSO_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t       \\\n-T(ts_tso_noff_vlan_ol3ol4csum,\t\t1, 1, 1, 1, 1, 0,\t8,\t       \\\n-\t\tTSP_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t       \\\n-T(ts_tso_noff_vlan_ol3ol4csum_l3l4csum,\t1, 1, 1, 1, 1, 1,\t8,\t       \\\n-\t\tTSP_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\n+/* [T_SEC_F] [TSP] [TSO] [NOFF] [VLAN] [OL3OL4CSUM] [L3L4CSUM] */\n+#define NIX_TX_FASTPATH_MODES\t\t\t\t\t\t\\\n+T(no_offload,\t\t\t\t0, 0, 0, 0, 0, 0, 0,\t4,\t\\\n+\t\tNIX_TX_OFFLOAD_NONE)\t\t\t\t\t\\\n+T(l3l4csum,\t\t\t\t0, 0, 0, 0, 0, 0, 1,\t4,\t\\\n+\t\tL3L4CSUM_F)\t\t\t\t\t\t\\\n+T(ol3ol4csum,\t\t\t\t0, 0, 0, 0, 0, 1, 0,\t4,\t\\\n+\t\tOL3OL4CSUM_F)\t\t\t\t\t\t\\\n+T(ol3ol4csum_l3l4csum,\t\t\t0, 0, 0, 0, 0, 1, 1,\t4,\t\\\n+\t\tOL3OL4CSUM_F | L3L4CSUM_F)\t\t\t\t\\\n+T(vlan,\t\t\t\t\t0, 0, 0, 0, 1, 0, 0,\t6,\t\\\n+\t\tVLAN_F)\t\t\t\t\t\t\t\\\n+T(vlan_l3l4csum,\t\t\t0, 0, 0, 0, 1, 0, 1,\t6,\t\\\n+\t\tVLAN_F | L3L4CSUM_F)\t\t\t\t\t\\\n+T(vlan_ol3ol4csum,\t\t\t0, 0, 0, 0, 1, 1, 0,\t6,\t\\\n+\t\tVLAN_F | OL3OL4CSUM_F)\t\t\t\t\t\\\n+T(vlan_ol3ol4csum_l3l4csum,\t\t0, 0, 0, 0, 1, 1, 1,\t6,\t\\\n+\t\tVLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\t\\\n+T(noff,\t\t\t\t\t0, 0, 0, 1, 0, 0, 0,\t4,\t\\\n+\t\tNOFF_F)\t\t\t\t\t\t\t\\\n+T(noff_l3l4csum,\t\t\t0, 0, 0, 1, 0, 0, 1,\t4,\t\\\n+\t\tNOFF_F | L3L4CSUM_F)\t\t\t\t\t\\\n+T(noff_ol3ol4csum,\t\t\t0, 0, 0, 1, 0, 1, 0,\t4,\t\\\n+\t\tNOFF_F | OL3OL4CSUM_F)\t\t\t\t\t\\\n+T(noff_ol3ol4csum_l3l4csum,\t\t0, 0, 0, 1, 0, 1, 1,\t4,\t\\\n+\t\tNOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\t\\\n+T(noff_vlan,\t\t\t\t0, 0, 0, 1, 1, 0, 0,\t6,\t\\\n+\t\tNOFF_F | VLAN_F)\t\t\t\t\t\\\n+T(noff_vlan_l3l4csum,\t\t\t0, 0, 0, 1, 1, 0, 1,\t6,\t\\\n+\t\tNOFF_F | VLAN_F | L3L4CSUM_F)\t\t\t\t\\\n+T(noff_vlan_ol3ol4csum,\t\t\t0, 0, 0, 1, 1, 1, 0,\t6,\t\\\n+\t\tNOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\t\\\n+T(noff_vlan_ol3ol4csum_l3l4csum,\t0, 0, 0, 1, 1, 1, 1,\t6,\t\\\n+\t\tNOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\\\n+T(tso,\t\t\t\t\t0, 0, 1, 0, 0, 0, 0,\t6,\t\\\n+\t\tTSO_F)\t\t\t\t\t\t\t\\\n+T(tso_l3l4csum,\t\t\t\t0, 0, 1, 0, 0, 0, 1,\t6,\t\\\n+\t\tTSO_F | L3L4CSUM_F)\t\t\t\t\t\\\n+T(tso_ol3ol4csum,\t\t\t0, 0, 1, 0, 0, 1, 0,\t6,\t\\\n+\t\tTSO_F | OL3OL4CSUM_F)\t\t\t\t\t\\\n+T(tso_ol3ol4csum_l3l4csum,\t\t0, 0, 1, 0, 0, 1, 1,\t6,\t\\\n+\t\tTSO_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\t\\\n+T(tso_vlan,\t\t\t\t0, 0, 1, 0, 1, 0, 0,\t6,\t\\\n+\t\tTSO_F | VLAN_F)\t\t\t\t\t\t\\\n+T(tso_vlan_l3l4csum,\t\t\t0, 0, 1, 0, 1, 0, 1,\t6,\t\\\n+\t\tTSO_F | VLAN_F | L3L4CSUM_F)\t\t\t\t\\\n+T(tso_vlan_ol3ol4csum,\t\t\t0, 0, 1, 0, 1, 1, 0,\t6,\t\\\n+\t\tTSO_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\t\\\n+T(tso_vlan_ol3ol4csum_l3l4csum,\t\t0, 0, 1, 0, 1, 1, 1,\t6,\t\\\n+\t\tTSO_F | VLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\\\n+T(tso_noff,\t\t\t\t0, 0, 1, 1, 0, 0, 0,\t6,\t\\\n+\t\tTSO_F | NOFF_F)\t\t\t\t\t\t\\\n+T(tso_noff_l3l4csum,\t\t\t0, 0, 1, 1, 0, 0, 1,\t6,\t\\\n+\t\tTSO_F | NOFF_F | L3L4CSUM_F)\t\t\t\t\\\n+T(tso_noff_ol3ol4csum,\t\t\t0, 0, 1, 1, 0, 1, 0,\t6,\t\\\n+\t\tTSO_F | NOFF_F | OL3OL4CSUM_F)\t\t\t\t\\\n+T(tso_noff_ol3ol4csum_l3l4csum,\t\t0, 0, 1, 1, 0, 1, 1,\t6,\t\\\n+\t\tTSO_F | NOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\\\n+T(tso_noff_vlan,\t\t\t0, 0, 1, 1, 1, 0, 0,\t6,\t\\\n+\t\tTSO_F | NOFF_F | VLAN_F)\t\t\t\t\\\n+T(tso_noff_vlan_l3l4csum,\t\t0, 0, 1, 1, 1, 0, 1,\t6,\t\\\n+\t\tTSO_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t\t\\\n+T(tso_noff_vlan_ol3ol4csum,\t\t0, 0, 1, 1, 1, 1, 0,\t6,\t\\\n+\t\tTSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\\\n+T(tso_noff_vlan_ol3ol4csum_l3l4csum,\t0, 0, 1, 1, 1, 1, 1,\t6,\t\\\n+\t\tTSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n+T(ts,\t\t\t\t\t0, 1, 0, 0, 0, 0, 0,\t8,\t\\\n+\t\tTSP_F)\t\t\t\t\t\t\t\\\n+T(ts_l3l4csum,\t\t\t\t0, 1, 0, 0, 0, 0, 1,\t8,\t\\\n+\t\tTSP_F | L3L4CSUM_F)\t\t\t\t\t\\\n+T(ts_ol3ol4csum,\t\t\t0, 1, 0, 0, 0, 1, 0,\t8,\t\\\n+\t\tTSP_F | OL3OL4CSUM_F)\t\t\t\t\t\\\n+T(ts_ol3ol4csum_l3l4csum,\t\t0, 1, 0, 0, 0, 1, 1,\t8,\t\\\n+\t\tTSP_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\t\\\n+T(ts_vlan,\t\t\t\t0, 1, 0, 0, 1, 0, 0,\t8,\t\\\n+\t\tTSP_F | VLAN_F)\t\t\t\t\t\t\\\n+T(ts_vlan_l3l4csum,\t\t\t0, 1, 0, 0, 1, 0, 1,\t8,\t\\\n+\t\tTSP_F | VLAN_F | L3L4CSUM_F)\t\t\t\t\\\n+T(ts_vlan_ol3ol4csum,\t\t\t0, 1, 0, 0, 1, 1, 0,\t8,\t\\\n+\t\tTSP_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\t\\\n+T(ts_vlan_ol3ol4csum_l3l4csum,\t\t0, 1, 0, 0, 1, 1, 1,\t8,\t\\\n+\t\tTSP_F | VLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\\\n+T(ts_noff,\t\t\t\t0, 1, 0, 1, 0, 0, 0,\t8,\t\\\n+\t\tTSP_F | NOFF_F)\t\t\t\t\t\t\\\n+T(ts_noff_l3l4csum,\t\t\t0, 1, 0, 1, 0, 0, 1,\t8,\t\\\n+\t\tTSP_F | NOFF_F | L3L4CSUM_F)\t\t\t\t\\\n+T(ts_noff_ol3ol4csum,\t\t\t0, 1, 0, 1, 0, 1, 0,\t8,\t\\\n+\t\tTSP_F | NOFF_F | OL3OL4CSUM_F)\t\t\t\t\\\n+T(ts_noff_ol3ol4csum_l3l4csum,\t\t0, 1, 0, 1, 0, 1, 1,\t8,\t\\\n+\t\tTSP_F | NOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\\\n+T(ts_noff_vlan,\t\t\t\t0, 1, 0, 1, 1, 0, 0,\t8,\t\\\n+\t\tTSP_F | NOFF_F | VLAN_F)\t\t\t\t\\\n+T(ts_noff_vlan_l3l4csum,\t\t0, 1, 0, 1, 1, 0, 1,\t8,\t\\\n+\t\tTSP_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t\t\\\n+T(ts_noff_vlan_ol3ol4csum,\t\t0, 1, 0, 1, 1, 1, 0,\t8,\t\\\n+\t\tTSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\\\n+T(ts_noff_vlan_ol3ol4csum_l3l4csum,\t0, 1, 0, 1, 1, 1, 1,\t8,\t\\\n+\t\tTSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n+T(ts_tso,\t\t\t\t0, 1, 1, 0, 0, 0, 0,\t8,\t\\\n+\t\tTSP_F | TSO_F)\t\t\t\t\t\t\\\n+T(ts_tso_l3l4csum,\t\t\t0, 1, 1, 0, 0, 0, 1,\t8,\t\\\n+\t\tTSP_F | TSO_F | L3L4CSUM_F)\t\t\t\t\\\n+T(ts_tso_ol3ol4csum,\t\t\t0, 1, 1, 0, 0, 1, 0,\t8,\t\\\n+\t\tTSP_F | TSO_F | OL3OL4CSUM_F)\t\t\t\t\\\n+T(ts_tso_ol3ol4csum_l3l4csum,\t\t0, 1, 1, 0, 0, 1, 1,\t8,\t\\\n+\t\tTSP_F | TSO_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\\\n+T(ts_tso_vlan,\t\t\t\t0, 1, 1, 0, 1, 0, 0,\t8,\t\\\n+\t\tTSP_F | TSO_F | VLAN_F)\t\t\t\t\t\\\n+T(ts_tso_vlan_l3l4csum,\t\t\t0, 1, 1, 0, 1, 0, 1,\t8,\t\\\n+\t\tTSP_F | TSO_F | VLAN_F | L3L4CSUM_F)\t\t\t\\\n+T(ts_tso_vlan_ol3ol4csum,\t\t0, 1, 1, 0, 1, 1, 0,\t8,\t\\\n+\t\tTSP_F | TSO_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\\\n+T(ts_tso_vlan_ol3ol4csum_l3l4csum,\t0, 1, 1, 0, 1, 1, 1,\t8,\t\\\n+\t\tTSP_F | TSO_F | VLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\\\n+T(ts_tso_noff,\t\t\t\t0, 1, 1, 1, 0, 0, 0,\t8,\t\\\n+\t\tTSP_F | TSO_F | NOFF_F)\t\t\t\t\t\\\n+T(ts_tso_noff_l3l4csum,\t\t\t0, 1, 1, 1, 0, 0, 1,\t8,\t\\\n+\t\tTSP_F | TSO_F | NOFF_F | L3L4CSUM_F)\t\t\t\\\n+T(ts_tso_noff_ol3ol4csum,\t\t0, 1, 1, 1, 0, 1, 0,\t8,\t\\\n+\t\tTSP_F | TSO_F | NOFF_F | OL3OL4CSUM_F)\t\t\t\\\n+T(ts_tso_noff_ol3ol4csum_l3l4csum,\t0, 1, 1, 1, 0, 1, 1,\t8,\t\\\n+\t\tTSP_F | TSO_F | NOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\\\n+T(ts_tso_noff_vlan,\t\t\t0, 1, 1, 1, 1, 0, 0,\t8,\t\\\n+\t\tTSP_F | TSO_F | NOFF_F | VLAN_F)\t\t\t\\\n+T(ts_tso_noff_vlan_l3l4csum,\t\t0, 1, 1, 1, 1, 0, 1,\t8,\t\\\n+\t\tTSP_F | TSO_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t\\\n+T(ts_tso_noff_vlan_ol3ol4csum,\t\t0, 1, 1, 1, 1, 1, 0,\t8,\t\\\n+\t\tTSP_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\\\n+T(ts_tso_noff_vlan_ol3ol4csum_l3l4csum,\t0, 1, 1, 1, 1, 1, 1,\t8,\t\\\n+\t\tTSP_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\\\n+T(sec,\t\t\t\t\t1, 0, 0, 0, 0, 0, 0,\t4,\t\\\n+\t\tT_SEC_F)\t\t\t\t\t\t\\\n+T(sec_l3l4csum,\t\t\t\t1, 0, 0, 0, 0, 0, 1,\t4,\t\\\n+\t\tT_SEC_F | L3L4CSUM_F)\t\t\t\t\t\\\n+T(sec_ol3ol4csum,\t\t\t1, 0, 0, 0, 0, 1, 0,\t4,\t\\\n+\t\tT_SEC_F | OL3OL4CSUM_F)\t\t\t\t\t\\\n+T(sec_ol3ol4csum_l3l4csum,\t\t1, 0, 0, 0, 0, 1, 1,\t4,\t\\\n+\t\tT_SEC_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\t\\\n+T(sec_vlan,\t\t\t\t1, 0, 0, 0, 1, 0, 0,\t6,\t\\\n+\t\tT_SEC_F | VLAN_F)\t\t\t\t\t\\\n+T(sec_vlan_l3l4csum,\t\t\t1, 0, 0, 0, 1, 0, 1,\t6,\t\\\n+\t\tT_SEC_F | VLAN_F | L3L4CSUM_F)\t\t\t\t\\\n+T(sec_vlan_ol3ol4csum,\t\t\t1, 0, 0, 0, 1, 1, 0,\t6,\t\\\n+\t\tT_SEC_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\\\n+T(sec_vlan_ol3ol4csum_l3l4csum,\t\t1, 0, 0, 0, 1, 1, 1,\t6,\t\\\n+\t\tT_SEC_F | VLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\\\n+T(sec_noff,\t\t\t\t1, 0, 0, 1, 0, 0, 0,\t4,\t\\\n+\t\tT_SEC_F | NOFF_F)\t\t\t\t\t\\\n+T(sec_noff_l3l4csum,\t\t\t1, 0, 0, 1, 0, 0, 1,\t4,\t\\\n+\t\tT_SEC_F | NOFF_F | L3L4CSUM_F)\t\t\t\t\\\n+T(sec_noff_ol3ol4csum,\t\t\t1, 0, 0, 1, 0, 1, 0,\t4,\t\\\n+\t\tT_SEC_F | NOFF_F | OL3OL4CSUM_F)\t\t\t\\\n+T(sec_noff_ol3ol4csum_l3l4csum,\t\t1, 0, 0, 1, 0, 1, 1,\t4,\t\\\n+\t\tT_SEC_F | NOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\\\n+T(sec_noff_vlan,\t\t\t1, 0, 0, 1, 1, 0, 0,\t6,\t\\\n+\t\tT_SEC_F | NOFF_F | VLAN_F)\t\t\t\t\\\n+T(sec_noff_vlan_l3l4csum,\t\t1, 0, 0, 1, 1, 0, 1,\t6,\t\\\n+\t\tT_SEC_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t\t\\\n+T(sec_noff_vlan_ol3ol4csum,\t\t1, 0, 0, 1, 1, 1, 0,\t6,\t\\\n+\t\tT_SEC_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\\\n+T(sec_noff_vlan_ol3ol4csum_l3l4csum,\t1, 0, 0, 1, 1, 1, 1,\t6,\t\\\n+\t\tT_SEC_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n+T(sec_tso,\t\t\t\t1, 0, 1, 0, 0, 0, 0,\t6,\t\\\n+\t\tT_SEC_F | TSO_F)\t\t\t\t\t\\\n+T(sec_tso_l3l4csum,\t\t\t1, 0, 1, 0, 0, 0, 1,\t6,\t\\\n+\t\tT_SEC_F | TSO_F | L3L4CSUM_F)\t\t\t\t\\\n+T(sec_tso_ol3ol4csum,\t\t\t1, 0, 1, 0, 0, 1, 0,\t6,\t\\\n+\t\tT_SEC_F | TSO_F | OL3OL4CSUM_F)\t\t\t\t\\\n+T(sec_tso_ol3ol4csum_l3l4csum,\t\t1, 0, 1, 0, 0, 1, 1,\t6,\t\\\n+\t\tT_SEC_F | TSO_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\\\n+T(sec_tso_vlan,\t\t\t\t1, 0, 1, 0, 1, 0, 0,\t6,\t\\\n+\t\tT_SEC_F | TSO_F | VLAN_F)\t\t\t\t\\\n+T(sec_tso_vlan_l3l4csum,\t\t1, 0, 1, 0, 1, 0, 1,\t6,\t\\\n+\t\tT_SEC_F | TSO_F | VLAN_F | L3L4CSUM_F)\t\t\t\\\n+T(sec_tso_vlan_ol3ol4csum,\t\t1, 0, 1, 0, 1, 1, 0,\t6,\t\\\n+\t\tT_SEC_F | TSO_F | VLAN_F | OL3OL4CSUM_F)\t\t\\\n+T(sec_tso_vlan_ol3ol4csum_l3l4csum,\t1, 0, 1, 0, 1, 1, 1,\t6,\t\\\n+\t\tT_SEC_F | TSO_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n+T(sec_tso_noff,\t\t\t\t1, 0, 1, 1, 0, 0, 0,\t6,\t\\\n+\t\tT_SEC_F | TSO_F | NOFF_F)\t\t\t\t\\\n+T(sec_tso_noff_l3l4csum,\t\t1, 0, 1, 1, 0, 0, 1,\t6,\t\\\n+\t\tT_SEC_F | TSO_F | NOFF_F | L3L4CSUM_F)\t\t\t\\\n+T(sec_tso_noff_ol3ol4csum,\t\t1, 0, 1, 1, 0, 1, 0,\t6,\t\\\n+\t\tT_SEC_F | TSO_F | NOFF_F | OL3OL4CSUM_F)\t\t\\\n+T(sec_tso_noff_ol3ol4csum_l3l4csum,\t1, 0, 1, 1, 0, 1, 1,\t6,\t\\\n+\t\tT_SEC_F | TSO_F | NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n+T(sec_tso_noff_vlan,\t\t\t1, 0, 1, 1, 1, 0, 0,\t6,\t\\\n+\t\tT_SEC_F | TSO_F | NOFF_F | VLAN_F)\t\t\t\\\n+T(sec_tso_noff_vlan_l3l4csum,\t\t1, 0, 1, 1, 1, 0, 1,\t6,\t\\\n+\t\tT_SEC_F | TSO_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t\\\n+T(sec_tso_noff_vlan_ol3ol4csum,\t\t1, 0, 1, 1, 1, 1, 0,\t6,\t\\\n+\t\tT_SEC_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\\\n+T(sec_tso_noff_vlan_ol3ol4csum_l3l4csum, 1, 0, 1, 1, 1, 1, 1,\t6,\t\\\n+\t\tT_SEC_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\\\n+T(sec_ts,\t\t\t\t1, 1, 0, 0, 0, 0, 0,\t8,\t\\\n+\t\tT_SEC_F | TSP_F)\t\t\t\t\t\\\n+T(sec_ts_l3l4csum,\t\t\t1, 1, 0, 0, 0, 0, 1,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | L3L4CSUM_F)\t\t\t\t\\\n+T(sec_ts_ol3ol4csum,\t\t\t1, 1, 0, 0, 0, 1, 0,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | OL3OL4CSUM_F)\t\t\t\t\\\n+T(sec_ts_ol3ol4csum_l3l4csum,\t\t1, 1, 0, 0, 0, 1, 1,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\\\n+T(sec_ts_vlan,\t\t\t\t1, 1, 0, 0, 1, 0, 0,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | VLAN_F)\t\t\t\t\\\n+T(sec_ts_vlan_l3l4csum,\t\t\t1, 1, 0, 0, 1, 0, 1,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | VLAN_F | L3L4CSUM_F)\t\t\t\\\n+T(sec_ts_vlan_ol3ol4csum,\t\t1, 1, 0, 0, 1, 1, 0,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | VLAN_F | OL3OL4CSUM_F)\t\t\\\n+T(sec_ts_vlan_ol3ol4csum_l3l4csum,\t1, 1, 0, 0, 1, 1, 1,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n+T(sec_ts_noff,\t\t\t\t1, 1, 0, 1, 0, 0, 0,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | NOFF_F)\t\t\t\t\\\n+T(sec_ts_noff_l3l4csum,\t\t\t1, 1, 0, 1, 0, 0, 1,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | NOFF_F | L3L4CSUM_F)\t\t\t\\\n+T(sec_ts_noff_ol3ol4csum,\t\t1, 1, 0, 1, 0, 1, 0,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | NOFF_F | OL3OL4CSUM_F)\t\t\\\n+T(sec_ts_noff_ol3ol4csum_l3l4csum,\t1, 1, 0, 1, 0, 1, 1,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n+T(sec_ts_noff_vlan,\t\t\t1, 1, 0, 1, 1, 0, 0,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | NOFF_F | VLAN_F)\t\t\t\\\n+T(sec_ts_noff_vlan_l3l4csum,\t\t1, 1, 0, 1, 1, 0, 1,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t\\\n+T(sec_ts_noff_vlan_ol3ol4csum,\t\t1, 1, 0, 1, 1, 1, 0,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\\\n+T(sec_ts_noff_vlan_ol3ol4csum_l3l4csum,\t1, 1, 0, 1, 1, 1, 1,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\\\n+T(sec_ts_tso,\t\t\t\t1, 1, 1, 0, 0, 0, 0,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | TSO_F)\t\t\t\t\\\n+T(sec_ts_tso_l3l4csum,\t\t\t1, 1, 1, 0, 0, 0, 1,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | TSO_F | L3L4CSUM_F)\t\t\t\\\n+T(sec_ts_tso_ol3ol4csum,\t\t1, 1, 1, 0, 0, 1, 0,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | TSO_F | OL3OL4CSUM_F)\t\t\t\\\n+T(sec_ts_tso_ol3ol4csum_l3l4csum,\t1, 1, 1, 0, 0, 1, 1,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | TSO_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n+T(sec_ts_tso_vlan,\t\t\t1, 1, 1, 0, 1, 0, 0,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | TSO_F | VLAN_F)\t\t\t\\\n+T(sec_ts_tso_vlan_l3l4csum,\t\t1, 1, 1, 0, 1, 0, 1,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | TSO_F | VLAN_F | L3L4CSUM_F)\t\t\\\n+T(sec_ts_tso_vlan_ol3ol4csum,\t\t1, 1, 1, 0, 1, 1, 0,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | TSO_F | VLAN_F | OL3OL4CSUM_F)\t\\\n+T(sec_ts_tso_vlan_ol3ol4csum_l3l4csum,\t1, 1, 1, 0, 1, 1, 1,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | TSO_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F) \\\n+T(sec_ts_tso_noff,\t\t\t1, 1, 1, 1, 0, 0, 0,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | TSO_F | NOFF_F)\t\t\t\\\n+T(sec_ts_tso_noff_l3l4csum,\t\t1, 1, 1, 1, 0, 0, 1,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | TSO_F | NOFF_F | L3L4CSUM_F)\t\t\\\n+T(sec_ts_tso_noff_ol3ol4csum,\t\t1, 1, 1, 1, 0, 1, 0,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | TSO_F | NOFF_F | OL3OL4CSUM_F)\t\\\n+T(sec_ts_tso_noff_ol3ol4csum_l3l4csum,\t1, 1, 1, 1, 0, 1, 1,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | TSO_F | NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F) \\\n+T(sec_ts_tso_noff_vlan,\t\t\t1, 1, 1, 1, 1, 0, 0,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | TSO_F | NOFF_F | VLAN_F)\t\t\\\n+T(sec_ts_tso_noff_vlan_l3l4csum,\t1, 1, 1, 1, 1, 0, 1,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | TSO_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\\\n+T(sec_ts_tso_noff_vlan_ol3ol4csum,\t1, 1, 1, 1, 1, 1, 0,\t8,\t\\\n+\t\tT_SEC_F | TSP_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\\\n+T(sec_ts_tso_noff_vlan_ol3ol4csum_l3l4csum, 1, 1, 1, 1, 1, 1, 1, 8,\t\\\n+\t\tT_SEC_F | TSP_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | \\\n+\t\tL3L4CSUM_F)\n \n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t       \\\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t       \\\n \tuint16_t __rte_noinline __rte_hot cn9k_nix_xmit_pkts_##name(           \\\n \t\tvoid *tx_queue, struct rte_mbuf **tx_pkts, uint16_t pkts);     \\\n \t\t\t\t\t\t\t\t\t       \\\ndiff --git a/drivers/net/cnxk/cn9k_tx_mseg.c b/drivers/net/cnxk/cn9k_tx_mseg.c\nindex f3c427c..37cba78 100644\n--- a/drivers/net/cnxk/cn9k_tx_mseg.c\n+++ b/drivers/net/cnxk/cn9k_tx_mseg.c\n@@ -5,7 +5,7 @@\n #include \"cn9k_ethdev.h\"\n #include \"cn9k_tx.h\"\n \n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t       \\\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t       \\\n \tuint16_t __rte_noinline __rte_hot\t\t\t\t       \\\n \t\tcn9k_nix_xmit_pkts_mseg_##name(void *tx_queue,                 \\\n \t\t\t\t\t       struct rte_mbuf **tx_pkts,      \\\ndiff --git a/drivers/net/cnxk/cn9k_tx_vec.c b/drivers/net/cnxk/cn9k_tx_vec.c\nindex 56a3e25..b424f95 100644\n--- a/drivers/net/cnxk/cn9k_tx_vec.c\n+++ b/drivers/net/cnxk/cn9k_tx_vec.c\n@@ -5,7 +5,7 @@\n #include \"cn9k_ethdev.h\"\n #include \"cn9k_tx.h\"\n \n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t       \\\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t       \\\n \tuint16_t __rte_noinline __rte_hot\t\t\t\t       \\\n \t\tcn9k_nix_xmit_pkts_vec_##name(void *tx_queue,                  \\\n \t\t\t\t\t      struct rte_mbuf **tx_pkts,       \\\ndiff --git a/drivers/net/cnxk/cn9k_tx_vec_mseg.c b/drivers/net/cnxk/cn9k_tx_vec_mseg.c\nindex 0256efd..5fdf0a9 100644\n--- a/drivers/net/cnxk/cn9k_tx_vec_mseg.c\n+++ b/drivers/net/cnxk/cn9k_tx_vec_mseg.c\n@@ -5,7 +5,7 @@\n #include \"cn9k_ethdev.h\"\n #include \"cn9k_tx.h\"\n \n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)                             \\\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)                         \\\n \tuint16_t __rte_noinline __rte_hot cn9k_nix_xmit_pkts_vec_mseg_##name(  \\\n \t\tvoid *tx_queue, struct rte_mbuf **tx_pkts, uint16_t pkts)      \\\n \t{                                                                      \\\n",
    "prefixes": [
        "v3",
        "19/28"
    ]
}