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GET /api/patches/100163/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 100163,
    "url": "https://patches.dpdk.org/api/patches/100163/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210930170113.29030-29-ndabilpuram@marvell.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210930170113.29030-29-ndabilpuram@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210930170113.29030-29-ndabilpuram@marvell.com",
    "date": "2021-09-30T17:01:13",
    "name": "[v2,28/28] net/cnxk: reflect globally enabled offloads in queue conf",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": true,
    "hash": "d1c004d0ff74f573ae0235a42fada53349a748ed",
    "submitter": {
        "id": 1202,
        "url": "https://patches.dpdk.org/api/people/1202/?format=api",
        "name": "Nithin Dabilpuram",
        "email": "ndabilpuram@marvell.com"
    },
    "delegate": {
        "id": 310,
        "url": "https://patches.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerinj@marvell.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210930170113.29030-29-ndabilpuram@marvell.com/mbox/",
    "series": [
        {
            "id": 19307,
            "url": "https://patches.dpdk.org/api/series/19307/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=19307",
            "date": "2021-09-30T17:00:48",
            "name": "net/cnxk: support for inline ipsec",
            "version": 2,
            "mbox": "https://patches.dpdk.org/series/19307/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/100163/comments/",
    "check": "warning",
    "checks": "https://patches.dpdk.org/api/patches/100163/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D18EAA0C43;\n\tThu, 30 Sep 2021 19:05:42 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 59D69411A3;\n\tThu, 30 Sep 2021 19:03:48 +0200 (CEST)",
            "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 76D7141100;\n Thu, 30 Sep 2021 19:02:41 +0200 (CEST)",
            "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id\n 18UDg4Ev025474;\n Thu, 30 Sep 2021 10:02:40 -0700",
            "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0a-0016f401.pphosted.com with ESMTP id 3bdebtgytj-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Thu, 30 Sep 2021 10:02:40 -0700",
            "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Thu, 30 Sep 2021 10:02:38 -0700",
            "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Thu, 30 Sep 2021 10:02:38 -0700",
            "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id D10F03F7067;\n Thu, 30 Sep 2021 10:02:36 -0700 (PDT)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=XkjhKOwqTIY4SFbKYAPJ3DBbO39zQcWMf3oBBnifwww=;\n b=O/ogiJAlSDNw7NQ8g6W2X/kUGZj/Hc2re3kieQHmNKXKVKKxwUvXVWjAm/CxmK4ykMeI\n n976EYelerRcVosaINdbNi6uhGMqGvqqj+Mx4BBIWIHOOF4d+h2v0mRUl+mMy/n3Gsh2\n nJQjaGLclRVttclP4sRQYsB9+c4MEIbn07n0J6q8d24XXAoKUNwG6JTIJmT27n/RToZN\n 5K95RuMgKvPYT5UedBF0xZFJBjbbelEGxP2pn5MchREBYFU0gMLz8Q0bPvlJ5xObj4A5\n QE9W9U4mpyf6b9MoTe3tx87MD1D+pnfRdctPn4J5NsFK96LJif73srUmRobMmbC3xfQS xQ==",
        "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>",
        "To": "<jerinj@marvell.com>, Nithin Dabilpuram <ndabilpuram@marvell.com>, \"Kiran\n Kumar K\" <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>,\n Satha Rao <skoteshwar@marvell.com>",
        "CC": "<dev@dpdk.org>, <stable@dpdk.org>",
        "Date": "Thu, 30 Sep 2021 22:31:13 +0530",
        "Message-ID": "<20210930170113.29030-29-ndabilpuram@marvell.com>",
        "X-Mailer": "git-send-email 2.8.4",
        "In-Reply-To": "<20210930170113.29030-1-ndabilpuram@marvell.com>",
        "References": "<20210902021505.17607-1-ndabilpuram@marvell.com>\n <20210930170113.29030-1-ndabilpuram@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain",
        "X-Proofpoint-ORIG-GUID": "eqVhvf-c43aLDQzo09Tx32fKld6HjhS_",
        "X-Proofpoint-GUID": "eqVhvf-c43aLDQzo09Tx32fKld6HjhS_",
        "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475\n definitions=2021-09-30_06,2021-09-30_01,2020-04-07_01",
        "Subject": "[dpdk-dev] [PATCH v2 28/28] net/cnxk: reflect globally enabled\n offloads in queue conf",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Reflect globally enabled Rx and Tx offloads in queue conf.\nAlso fix issue with lmt data prepare for multi seg.\n\nFixes: a24af6361e37 (\"net/cnxk: add Tx queue setup and release\")\nFixes: a86144cd9ded (\"net/cnxk: add Rx queue setup and release\")\nFixes: 305ca2c4c382 (\"net/cnxk: support multi-segment vector Tx\")\nCc: stable@dpdk.org\n\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\n---\n drivers/net/cnxk/cn10k_tx.h    | 2 +-\n drivers/net/cnxk/cnxk_ethdev.c | 4 ++++\n 2 files changed, 5 insertions(+), 1 deletion(-)",
    "diff": "diff --git a/drivers/net/cnxk/cn10k_tx.h b/drivers/net/cnxk/cn10k_tx.h\nindex ad84464..c6f349b 100644\n--- a/drivers/net/cnxk/cn10k_tx.h\n+++ b/drivers/net/cnxk/cn10k_tx.h\n@@ -1280,7 +1280,7 @@ cn10k_nix_prep_lmt_mseg_vector(struct rte_mbuf **mbufs, uint64x2_t *cmd0,\n \t\t\tvst1q_u64(lmt_addr + 14, cmd1[3]);\n \n \t\t\t*data128 |= ((__uint128_t)7) << *shift;\n-\t\t\tshift += 3;\n+\t\t\t*shift += 3;\n \n \t\t\treturn 1;\n \t\t}\ndiff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c\nindex 2367d5c..bdceac8 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.c\n+++ b/drivers/net/cnxk/cnxk_ethdev.c\n@@ -380,6 +380,8 @@ cnxk_nix_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid,\n \ttxq_sp->dev = dev;\n \ttxq_sp->qid = qid;\n \ttxq_sp->qconf.conf.tx = *tx_conf;\n+\t/* Queue config should reflect global offloads */\n+\ttxq_sp->qconf.conf.tx.offloads = dev->tx_offloads;\n \ttxq_sp->qconf.nb_desc = nb_desc;\n \n \tplt_nix_dbg(\"sq=%d fc=%p offload=0x%\" PRIx64 \" lmt_addr=%p\"\n@@ -527,6 +529,8 @@ cnxk_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid,\n \trxq_sp->dev = dev;\n \trxq_sp->qid = qid;\n \trxq_sp->qconf.conf.rx = *rx_conf;\n+\t/* Queue config should reflect global offloads */\n+\trxq_sp->qconf.conf.rx.offloads = dev->rx_offloads;\n \trxq_sp->qconf.nb_desc = nb_desc;\n \trxq_sp->qconf.mp = mp;\n \n",
    "prefixes": [
        "v2",
        "28/28"
    ]
}