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{
    "id": 79808,
    "url": "https://patches.dpdk.org/api/covers/79808/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/cover/20201006162319.7981-1-mairtin.oloingsigh@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20201006162319.7981-1-mairtin.oloingsigh@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20201006162319.7981-1-mairtin.oloingsigh@intel.com",
    "date": "2020-10-06T16:23:17",
    "name": "[v4,0/2] net: add CRC run-time checks and AVX512/VPCLMULQDQ based CRC",
    "submitter": {
        "id": 1605,
        "url": "https://patches.dpdk.org/api/people/1605/?format=api",
        "name": "Mairtin o Loingsigh",
        "email": "mairtin.oloingsigh@intel.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/cover/20201006162319.7981-1-mairtin.oloingsigh@intel.com/mbox/",
    "series": [
        {
            "id": 12724,
            "url": "https://patches.dpdk.org/api/series/12724/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=12724",
            "date": "2020-10-06T16:23:17",
            "name": "net: add CRC run-time checks and AVX512/VPCLMULQDQ based CRC",
            "version": 4,
            "mbox": "https://patches.dpdk.org/series/12724/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/covers/79808/comments/",
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 90A93A04BB;\n\tTue,  6 Oct 2020 18:23:39 +0200 (CEST)",
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        ],
        "IronPort-SDR": [
            "\n gQOX81JDAtxTs/1jj9kRsYuaCPOXo9BjZxANrQBrXJoy3W6iV97fHiIwhnSw6SbeRgoAToHQgJ\n x9kF3E2agxnQ==",
            "\n 87cxZ6zu9xAPaQh1mJw9tr9e+iLyXlAuYZHxlDu3hdvFUCNCZDNlpQIXeXelOz3piP/JXk9Wew\n 8vQ3VQb8dzkw=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6000,8403,9765\"; a=\"143956478\"",
            "E=Sophos;i=\"5.77,343,1596524400\"; d=\"scan'208\";a=\"143956478\"",
            "E=Sophos;i=\"5.77,343,1596524400\"; d=\"scan'208\";a=\"342363169\""
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "From": "Mairtin o Loingsigh <mairtin.oloingsigh@intel.com>",
        "To": "jasvinder.singh@intel.com, bruce.richardson@intel.com,\n pablo.de.lara.guarch@intel.com",
        "Cc": "dev@dpdk.org, brendan.ryan@intel.com, mairtin.oloingsigh@intel.com,\n david.coyle@intel.com",
        "Date": "Tue,  6 Oct 2020 17:23:17 +0100",
        "Message-Id": "<20201006162319.7981-1-mairtin.oloingsigh@intel.com>",
        "X-Mailer": "git-send-email 2.12.3",
        "In-Reply-To": "<1601393761-11588-1-git-send-email-mairtin.oloingsigh@intel.com>",
        "References": "<1601393761-11588-1-git-send-email-mairtin.oloingsigh@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v4 0/2] net: add CRC run-time checks and\n\tAVX512/VPCLMULQDQ based CRC",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "This patchset makes two significant enhancements to the CRC modules of\nthe rte_net library:\n\n1) Adds run-time selection of the optimal architecture-specific CRC path.\n   Previously the selection was solely made at compile-time, meaning it\n   could only be built and run on the same generation of CPU. Adding\n   run-time selection ability means this can be used from distro packages\n   and/or DPDK can be compiled on an older CPU and run on a newer CPU.\n2) Adds an optimized CRC implementation based on the AVX512 and\n   VPCLMULQDQ instruction sets.\n   \nFor further details, please see the commit messages of the individual\npatches.\n\nv4:\n* Fixed build issue when older version of meson is used (0.47.1)\n* Addressed review comments\n  * remove Intel copyright header from neon CRC file\n  * tidy-up of register initialisation\n\nv3:\n* Re-submitted v2 as encountered problems when originally submitting it.\n\nv2:\n* Added support for run-time selection of optimal architecture-specific\n  CRC, based on v1 review comment.\n* Added full working AVX512/VPCLMULQDQ support for CRC32-Ethernet and\n  CRC16-CCITT.\n\nv1:\n* Initial version, with incomplete AVX512/VPCLMULQDQ support for\n  CRC32-Ethernet only.\n\nMairtin o Loingsigh (2):\n  net: add run-time architecture specific CRC selection\n  net: add support for AVX512/VPCLMULQDQ based CRC\n\n app/test/test_crc.c                               |  11 +-\n config/x86/meson.build                            |   6 +-\n doc/guides/rel_notes/release_20_11.rst            |   6 +\n lib/librte_net/meson.build                        |  89 ++++-\n lib/librte_net/net_crc.h                          |  45 +++\n lib/librte_net/net_crc_avx512.c                   | 423 ++++++++++++++++++++++\n lib/librte_net/{net_crc_neon.h => net_crc_neon.c} |  26 +-\n lib/librte_net/{net_crc_sse.h => net_crc_sse.c}   |  34 +-\n lib/librte_net/rte_net_crc.c                      | 100 +++--\n lib/librte_net/rte_net_crc.h                      |   4 +-\n 10 files changed, 672 insertions(+), 72 deletions(-)\n create mode 100644 lib/librte_net/net_crc.h\n create mode 100644 lib/librte_net/net_crc_avx512.c\n rename lib/librte_net/{net_crc_neon.h => net_crc_neon.c} (95%)\n rename lib/librte_net/{net_crc_sse.h => net_crc_sse.c} (94%)"
}