Show a cover letter.

GET /api/covers/73582/
HTTP 200 OK
Allow: GET, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 73582,
    "url": "https://patches.dpdk.org/api/covers/73582/",
    "web_url": "https://patches.dpdk.org/cover/73582/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk"
    },
    "msgid": "<20200709073452.948894-1-parav@mellanox.com>",
    "date": "2020-07-09T07:34:43",
    "name": "[v5,0/9] Improve mlx5 PMD driver framework for multiple classes",
    "submitter": {
        "id": 1780,
        "url": "https://patches.dpdk.org/api/people/1780/",
        "name": "Parav Pandit",
        "email": "parav@mellanox.com"
    },
    "mbox": "https://patches.dpdk.org/cover/73582/mbox/",
    "series": [
        {
            "id": 10912,
            "url": "https://patches.dpdk.org/api/series/10912/",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=10912",
            "date": "2020-07-09T07:34:43",
            "name": "Improve mlx5 PMD driver framework for multiple classes",
            "version": 5,
            "mbox": "https://patches.dpdk.org/series/10912/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/covers/73582/comments/",
    "headers": {
        "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted",
        "X-Mailman-Version": "2.1.15",
        "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DBAPR05MB6936",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n rkq1/ts3Hgj8Kinq81QLsF8tXFm7MXGKkGh7xgb1nsL01u/cG0oMAJO+AcJUhw3BaNCJe5RUiuXQq0aJK/Ya5A==",
        "Precedence": "list",
        "X-MS-Exchange-Transport-Forked": "True",
        "X-BeenThere": "dev@dpdk.org",
        "X-LD-Processed": "a652971c-7d2e-4d9b-a6a4-d149256f461b,ExtFwd,ExtAddr",
        "X-ClientProxiedBy": "SN4PR0501CA0104.namprd05.prod.outlook.com\n (2603:10b6:803:42::21) To DB7PR05MB4876.eurprd05.prod.outlook.com\n (2603:10a6:10:1d::32)",
        "Content-Transfer-Encoding": "8bit",
        "X-MS-Exchange-CrossTenant-AuthAs": "Internal",
        "X-MS-Exchange-AntiSpam-MessageData": "\n 3p6owxqz05Ixto0h/C/4b7fEqbtx/QSE3ZLETE8YrLtucY4L5E6i9BHqq04S/6YU7dAw8MquPYUHVUndFWSfmJAzsI1U3Nfij0tI6YguhwbwWxI57KDPr5SBuDA6YkFX7WaIGhxrzhRHjLSRzxTjWYAaIDaUS42tR0Nl5VwYP4EN4tomThUQJBdsfS3Mky37pLs7YsZwQRREfYUE5t6M2DqyuEoWpv3gy9An56v2HtLNwO3i6fU6ikC8SQHZvA7w46mFRm8JkpPQSD/abBq5AkoY6z5ZJ+He7Gr/QcYx91YzVKacVeXPARt+XLGvt8CvALkB1DS+Sq4UBTFy82cVbPJO0zu2aEof0Ou5rsAKZYFdIhfq3fUPanD8EqTOG4TY8rq+bnzDrVoT43rf0jS832SVtBvLLXYtjCJyc07ACWVBXKocXyk3dxvsTPEHMNZ3WIG6KoBfxKRyQYQLhBg6xffCdrWMprznTIBR65lUvqY=",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 31C18A0526;\n\tThu,  9 Jul 2020 09:35:23 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 90D9D1DBBF;\n\tThu,  9 Jul 2020 09:35:22 +0200 (CEST)",
            "from EUR05-VI1-obe.outbound.protection.outlook.com\n (mail-vi1eur05on2065.outbound.protection.outlook.com [40.107.21.65])\n by dpdk.org (Postfix) with ESMTP id A59FF1DBB6\n for <dev@dpdk.org>; Thu,  9 Jul 2020 09:35:20 +0200 (CEST)",
            "from DB7PR05MB4876.eurprd05.prod.outlook.com (2603:10a6:10:1d::32)\n by DBAPR05MB6936.eurprd05.prod.outlook.com (2603:10a6:10:18f::10) with\n Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3153.23; Thu, 9 Jul\n 2020 07:35:18 +0000",
            "from DB7PR05MB4876.eurprd05.prod.outlook.com\n ([fe80::8cb3:93cb:c3ef:4293]) by DB7PR05MB4876.eurprd05.prod.outlook.com\n ([fe80::8cb3:93cb:c3ef:4293%5]) with mapi id 15.20.3174.022; Thu, 9 Jul 2020\n 07:35:18 +0000",
            "from sw-mtx-036.mtx.labs.mlnx (208.176.44.194) by\n SN4PR0501CA0104.namprd05.prod.outlook.com (2603:10b6:803:42::21) with\n Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3195.9 via Frontend\n Transport; Thu, 9 Jul 2020 07:35:10 +0000"
        ],
        "Subject": "[dpdk-dev] [PATCH v5 0/9] Improve mlx5 PMD driver framework for\n\tmultiple classes",
        "X-MS-PublicTrafficType": "Email",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "Message-Id": "<20200709073452.948894-1-parav@mellanox.com>",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=Mellanox.com;\n s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=NHF9Wq6epFOSzzids4RhP0CS++GxL0PpiIvL4loPQH4=;\n b=D8CLUC/pdJE8ByugK8rzH7Li/0oifulTDjws3iiy+KSw45ByDaQyIpO4GtqtoVc1EyeUWoGEcFvWOV8GZjv7OyOHccCTsTGixuIFCn47615+RTfV+npjegwkUn6y2FcQsPJA4NTdeY7/FsOfn8s3fGb8wdfpahRCbnhtfqfKYvw=",
        "X-Forefront-PRVS": "04599F3534",
        "X-MS-Office365-Filtering-HT": "Tenant",
        "To": "dev@dpdk.org, grive@u256.net, ferruh.yigit@intel.com, thomas@monjalon.net",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "From": "Parav Pandit <parav@mellanox.com>",
        "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED",
        "Cc": "rasland@mellanox.com, orika@mellanox.com, matan@mellanox.com,\n joyce.kong@arm.com, Parav Pandit <parav@mellanox.com>",
        "X-MS-Exchange-CrossTenant-AuthSource": "DB7PR05MB4876.eurprd05.prod.outlook.com",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>",
        "X-MS-TrafficTypeDiagnostic": "DBAPR05MB6936:",
        "Return-Path": "<dev-bounces@dpdk.org>",
        "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass\n smtp.mailfrom=mellanox.com; dmarc=pass action=none header.from=mellanox.com;\n dkim=pass header.d=mellanox.com; arc=none",
        "Authentication-Results": "dpdk.org; dkim=none (message not signed)\n header.d=none;dpdk.org; dmarc=none action=none header.from=mellanox.com;",
        "X-OriginatorOrg": "Mellanox.com",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "X-Microsoft-Antispam-PRVS": "\n <DBAPR05MB693619E20ACE9B14EFFB419CD1640@DBAPR05MB6936.eurprd05.prod.outlook.com>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "MIME-Version": "1.0",
        "X-MS-Exchange-CrossTenant-Id": "a652971c-7d2e-4d9b-a6a4-d149256f461b",
        "X-MS-Exchange-MessageSentRepresentingType": "1",
        "References": "<20200610171728.89-2-parav@mellanox.com>",
        "Content-Type": "text/plain; charset=UTF-8",
        "X-MS-Oob-TLC-OOBClassifiers": "OLM:4941;",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "X-Originating-IP": "[208.176.44.194]",
        "X-Forefront-Antispam-Report": "CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:;\n IPV:NLI; SFV:NSPM; H:DB7PR05MB4876.eurprd05.prod.outlook.com; PTR:; CAT:NONE;\n SFTY:;\n SFS:(4636009)(366004)(136003)(396003)(39860400002)(346002)(376002)(66476007)(36756003)(4326008)(66556008)(1076003)(6486002)(6506007)(66946007)(6666004)(16526019)(83380400001)(66574015)(186003)(26005)(52116002)(107886003)(5660300002)(2906002)(478600001)(8936002)(8676002)(956004)(2616005)(6512007)(86362001)(316002);\n DIR:OUT; SFP:1101;",
        "X-Mailer": [
            "git-send-email 2.26.2",
            "git-send-email 2.26.2"
        ],
        "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=NHF9Wq6epFOSzzids4RhP0CS++GxL0PpiIvL4loPQH4=;\n b=l7idz19WVWoX2cFW4b9gckwtC/oRlF8zJ/tdmrv9nK4+uVWTpySsoXMKe13vXCAso8eMDf8hM0YS5K1FfinTIQgbCCWrHkJfBkAqCNeiCXjRjgsDjyAImgCZSf3YpROpm9EjxB2vSj1iyj2AKd4AoxmfA1Qn9KXFkQdkCRCX9zbbWpLU43wYSuXpKYfsf3ixGw75/6wU78qgebpuVlcuLAinAe7IZTs2E/n+NI8G1CF5gRvo61rSnULX2NhBYrnm2mzHIb2PVikg8vYOHkdHHleTtF++zuS2JJSPM7yrjnqYzCLvQ2CGhJhwFW9rlid0tyBEkJA3Kyu48YTCRfnHiQ==",
        "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n fa783a0a-d2bf-47ed-b8cb-08d823da9d18",
        "Date": "Thu,  9 Jul 2020 10:34:43 +0300",
        "X-MS-Office365-Filtering-Correlation-Id": "fa783a0a-d2bf-47ed-b8cb-08d823da9d18",
        "X-Microsoft-Antispam-Message-Info": "\n E1xHpwGDQSkQpeST0kE2XKgcge+MZafIr5cT+UTkLghXV7vLFnvysmqnMoec0k0zv/btkSEEPeLQPqptQ18uGJv0sa9nNnt2GRw9/DalilcRn5q/fTe+wBOLEU+SPnyqMRoLBIgdMu0EK4Wzm3fXbCbAe2CpfoMTQYHOwZlr0Xad4Wk5ARghy0PbjMHT9ACSikEC7kJZR97O5iflNRcFNW+iw3Ud54TExNCPkDUD3OBs0akWS4sUFEP6pisY9w1lGeM37XjQ4JTsqAI8TFrLPIJHuG/AEJeVAXpm9E4hKdJP4lJkF6/t0+4JWuuuUrGPHS+8EIWDDKeMA9hqx4ttlA==",
        "X-MS-Exchange-SenderADCheck": "1",
        "In-Reply-To": "<20200610171728.89-2-parav@mellanox.com>",
        "X-Microsoft-Antispam": "BCL:0;",
        "Errors-To": "dev-bounces@dpdk.org",
        "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=l31AjVYH3lhoR5GDVh3rINZ7Mzp7lFFa4HPZBNFlte07k2zqYawPPNL/xw4U2Poe6xKxLEnbI0+KOZrM8RmuBT1vhlrWbSakvOlVpIZZ+RWtW3z4KAuqf3U4Nyjc3BMml5XLsChSX+2ZUBZemZ7fDThyuWdgxUJvQqrpRelgd29kTk+xTe1n9EirEDk7k9fymoOoLPTW4x6H6gLhwJ8v2YMjQq+vheunyZoX7UCG2lK4YRXuRwn1stvfX7pwsXhlN/ISLpYmNtMRh8YenozF4H3oLf7Ft2qqQ6O8LpUxDky9yNOGlEQkP21esqRQ5RTv5/v5FcaWSR3GvLx9GrO4fg==",
        "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "09 Jul 2020 07:35:17.8716 (UTC)"
    },
    "content": "This series introduces mlx5 bus to support multiple class of devices\nfor a single PCI device.\n\nMotivation and example\n----------------------\nmlx5 PCI device supports multiple class of devices such as net, vdpa\nand regex devices.\n\nCurrently only one pmd (either net or vdpa) can bind to this device.\nThis design limits use of PCI device only for single device class.\n\nTo support multiple classes simultaneously for a mlx5 PCI device,\na new mlx5 PCI bus is created. This bus allows binding multiple\nclass drivers (such as net, vdpa, regex(future)) to bind to the\nmlx5 PCI bus driver.\n\nChange description\n------------------\nPatch-1 Introduces RTE_BIT() macro\nPatch-2 Introduces new RTE constructor priority for common\ninitialization\nPatch-3 Fixes compilation error\nPatch-4 Define mlx5 class as bit fields\nPatch-5 Uses new RTE common priority\nPatch-6 Adds mlx5 PCI bus\nPatch-7 Implements a mlx5 PCI bus driver\nPatch-8 Migrates mlx5 net and vdpa driver to use mlx5 PCI bus\nAPI instead of rte PCI bus API\nPatch-9 Removed class check code as its already part of the bus now\nPatch-10 Add maintainers for the new bus\n\nDesign overview\n---------------\n\n -----------    ------------    -------------\n |   mlx5  |    |   mlx5   |    |   mlx5    |\n | net pmd |    | vdpa pmd |    | regex pmd |\n -----------    ------------    -------------\n      \\              |                /\n       \\             |               /\n        \\       -------------       /\n         \\______|   mlx5    |_____ /\n                |   pci bus |\n                -------------   \n                     |\n                 ----------- \n                 |   mlx5  | \n                 | pci dev | \n                 ----------- \n\n- mlx5 pci bus driver binds to mlx5 PCI devices defined by PCI\n  ID table of all related mlx5 PCI devices.\n- mlx5 class driver such as net, vdpa, regex PMD defines its\n  specific PCI ID table and mlx5 bus driver probes matching\n  class drivers.\n- mlx5 pci bus driver is cental place that validates supported\n  class combinations.\n- In future as code evolves, more device setup/cleanup and\n  resource creation code moves to mlx5 PCI bus driver.\n\nAlternatives considered\n-----------------------\n1. Instead of creating mlx5 pci bus, a common driver is\nimplemented which exposes class registration API.\nHowever, bus model fits better with existing DPDK design\nsimilar to ifpga driver.\nClass registration API need to create a new callbacks\nand ID signature; instead it is better to utilize current\nwell defined methods.\n\n2. Enhance pci core to allow multiple driver binding to\nsingle rte PCI device.\nThis approach is not taken, because peer drivers using\none PCI device won't be aware of other's presence. This\nrequires cross-driver syncronization of who initializes\ncommon resources (such as irq, eq and more).\nThis also requires refcounting common objects etc among\npeer drivers.\nInstead of layered approach delivers and allows putting\ncommon resource sharing, setup code in common bus driver.\nIt also eliminates peer blind zone problem as bottom pci\nbus layer provides necessary setup without any reference\ncounting.\n\n3. In future mlx5 prefers to use RDMA MR cache of the mbuf\nused between net and regex pmd so that same mbuf use across\nmultiple device can be possible.\n\nExamples:\n--------\nA user who wish to use a specific class(es) provides list\nof classes at command line such as,\n./testpmd -w <PCI BDF>,class=net:vdpa\n./testpmd -w <PCI BDF>,class=vdpa\n\nIn future,\n./testpmd -w <PCI BDF>,class=net:regex\n\nChangelog:\nv4->v5:\n - Squash the maintainers update path with other patch which adds the\n   bus\n - Addressed comments from Morten Brørup\n - Renamed newly added macro to RTE_BIT64\n - Added doxygen comment section for the macro\nv3->v4:\n - Fixed dma_map error unwinding flow to follow same order for unmap\nv2->v3:\n - Added RTE priority for common driver initialization\n - Addressed comments from Thomas and Asaf\n - Fixed compilation error in glue wrapper\n - Moved pci_driver structure instance as first in driver\n - Removed white spaces at the end of line in diagram\n - Address commnts from Matan\n - Removed CONFIG_RTE_LIBRTE_MLX5_PCI_BUS from config files\n - Renamed mlx5_valid_class_combo to mlx5_class_combinations\n - Added cross check for class drivers to support only 3 flags for now\n - Added full stop at the end of comment block\n - Using full names in function names\n - Added new line before function name in multiple functions\n - Added example string to parse for multiple classes\n - Dropped mlx5 prefix from static function\n - Removed empty lines\n - Fixed issue to remove multiple classes for a driver\n - Using define for drv_flags at multiple places\n - Deriving drv_flags based on the class drivers\n - Fixed alignment for id_table\n - Perform dma map on best effort basis for all supported drivers\n - Dynamically build pci id table\n - Using PCI to mlx5 device helper routines\nv1->v2:\n - Addressed most comments from Thomas and Gaetan.\n - Symbols starting with prefix rte_bus_pci_mlx5 may be\n   confusing as it may appear as it belong to rte_bus_pci module.\n   Hence it is kept as rte_bus_mlx5_pci which matches with other\n   modules as mlx5_vdpa, mlx5_net.\n - Dropped 2nd patch and replace with new 6th patch.\n - Avoided new file, added macro to rte_bitops.h\n - Inheriting ret_pci_driver instead of rte_driver\n - Added design and description of the mlx5_pci bus\n - Enhanced driver to honor RTE_PCI_DRV_PROBE_AGAIN drv_flag\n - Use anonymous structure for class search and code changes around it\n - Define static for class comination array\n - Use RTE_DIM to find array size\n - Added OOM check for strdup()\n - Renamed copy variable to nstr_orig\n - Returning negagive error code\n - Returning directly if match entry found\n - Use compat condition check\n - Avoided cutting error message string\n - Use uint32_t datatype instead of enum mlx5_class\n - Changed logic to parse device arguments only once during probe()\n - Added check to fail driver probe if multiple classes register with\n   DMA ops\n - Renamed function to parse_class_options\n - Migreate API from rte_driver to rte_pci_driver\n\nParav Pandit (9):\n  eal: introduce macros for getting value for bit\n  eal: introduce RTE common initialization level\n  common/mlx5: fix empty input style in glue wrappers\n  common/mlx5: change mlx5 class enum values as bits\n  common/mlx5: use common rte priority\n  bus/mlx5_pci: add mlx5 PCI bus\n  bus/mlx5_pci: register a PCI driver\n  bus/mlx5_pci: enable net and vDPA to use mlx5 PCI bus driver\n  common/mlx5: remove class checks from individual driver\n\n MAINTAINERS                                   |   5 +\n drivers/bus/Makefile                          |   3 +\n drivers/bus/meson.build                       |   2 +-\n drivers/bus/mlx5_pci/Makefile                 |  40 ++\n drivers/bus/mlx5_pci/meson.build              |  19 +\n drivers/bus/mlx5_pci/mlx5_pci_bus.c           | 522 ++++++++++++++++++\n drivers/bus/mlx5_pci/rte_bus_mlx5_pci.h       |  84 +++\n .../bus/mlx5_pci/rte_bus_mlx5_pci_version.map |   5 +\n drivers/common/mlx5/linux/mlx5_glue.h         |   4 +-\n drivers/common/mlx5/mlx5_common.c             |  39 +-\n drivers/common/mlx5/mlx5_common.h             |   7 +-\n .../common/mlx5/rte_common_mlx5_version.map   |   2 -\n drivers/net/mlx5/Makefile                     |   3 +-\n drivers/net/mlx5/linux/mlx5_os.c              |   6 -\n drivers/net/mlx5/meson.build                  |   2 +-\n drivers/net/mlx5/mlx5.c                       |  26 +-\n drivers/net/mlx5/mlx5.h                       |   1 -\n drivers/vdpa/mlx5/Makefile                    |   3 +-\n drivers/vdpa/mlx5/meson.build                 |   2 +-\n drivers/vdpa/mlx5/mlx5_vdpa.c                 |  30 +-\n lib/librte_eal/include/rte_bitops.h           |   8 +\n lib/librte_eal/include/rte_common.h           |   1 +\n mk/rte.app.mk                                 |   1 +\n 23 files changed, 730 insertions(+), 85 deletions(-)\n create mode 100644 drivers/bus/mlx5_pci/Makefile\n create mode 100644 drivers/bus/mlx5_pci/meson.build\n create mode 100644 drivers/bus/mlx5_pci/mlx5_pci_bus.c\n create mode 100644 drivers/bus/mlx5_pci/rte_bus_mlx5_pci.h\n create mode 100644 drivers/bus/mlx5_pci/rte_bus_mlx5_pci_version.map"
}