From patchwork Tue Dec 10 12:08:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 63704 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5792EA04F0; Tue, 10 Dec 2019 13:08:57 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 483D437A2; Tue, 10 Dec 2019 13:08:56 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 7FE7123D for ; Tue, 10 Dec 2019 13:08:55 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id xBAC6MDH021978 for ; Tue, 10 Dec 2019 04:08:54 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=pfpt0818; bh=+iR/wtRQ9PqRxaCtljiSrP15wIxJAgctK2WBRYh/hVw=; b=TouMO2q6q4PRZ06yIAzNUVTNrgNzbmGHeSYC8tTh2QYxwOnlZyQqWZKAwSbY3YVKNmCi Jqfq3rFegEcxnKRJGdMYr6/YQkfntNDPnmKYxwIcWHAwErd8UImPQf8i/J4oEnUY1w2e 0ldGYz+Ax2yqhB4fbUNrMm86t6AKUhDzkdWdYqNGXGGNAPFZHODnq5eevws9SJuD2Nu0 gqteitLNcMcvEA3NoJ/TDv6HBOuXheMsyi3Fiq6PqPJzeEOSB0gKADBIzqq92mte5ZpX Fu1fm23jfzVwgbQKP2KLbAhTzDuAwxDS+JI+Pu7XLHHh/E5dmZS5/xXlf1HVF8wRJNNe cw== Received: from sc-exch03.marvell.com ([199.233.58.183]) by mx0b-0016f401.pphosted.com with ESMTP id 2wsgrq59se-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 10 Dec 2019 04:08:54 -0800 Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Tue, 10 Dec 2019 04:08:53 -0800 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Tue, 10 Dec 2019 04:08:52 -0800 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id D53703F7040; Tue, 10 Dec 2019 04:08:50 -0800 (PST) From: Nithin Dabilpuram To: Jerin Jacob , Nithin Dabilpuram , Kiran Kumar K CC: , Andrew Pinski Date: Tue, 10 Dec 2019 17:38:44 +0530 Message-ID: <20191210120844.50017-1-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,18.0.572 definitions=2019-12-10_02:2019-12-10,2019-12-10 signatures=0 Subject: [dpdk-dev] [PATCH] net/octeontx2: perf improvement to rx vector func X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Jerin Jacob Use scalar loads instead of vector loads for fields that don't need any vector operations. Signed-off-by: Andrew Pinski Signed-off-by: Jerin Jacob Signed-off-by: Nithin Dabilpuram --- drivers/net/octeontx2/otx2_rx.c | 48 ++++++++++++++++++++--------------------- 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/drivers/net/octeontx2/otx2_rx.c b/drivers/net/octeontx2/otx2_rx.c index 48565db..db4a221 100644 --- a/drivers/net/octeontx2/otx2_rx.c +++ b/drivers/net/octeontx2/otx2_rx.c @@ -184,17 +184,21 @@ nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts, f3 = vqtbl1q_u8(cq3_w8, shuf_msk); /* Load CQE word0 and word 1 */ - uint64x2_t cq0_w0 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(0))); - uint64x2_t cq1_w0 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(1))); - uint64x2_t cq2_w0 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(2))); - uint64x2_t cq3_w0 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(3))); + uint64_t cq0_w0 = ((uint64_t *)(cq0 + CQE_SZ(0)))[0]; + uint64_t cq0_w1 = ((uint64_t *)(cq0 + CQE_SZ(0)))[1]; + uint64_t cq1_w0 = ((uint64_t *)(cq0 + CQE_SZ(1)))[0]; + uint64_t cq1_w1 = ((uint64_t *)(cq0 + CQE_SZ(1)))[1]; + uint64_t cq2_w0 = ((uint64_t *)(cq0 + CQE_SZ(2)))[0]; + uint64_t cq2_w1 = ((uint64_t *)(cq0 + CQE_SZ(2)))[1]; + uint64_t cq3_w0 = ((uint64_t *)(cq0 + CQE_SZ(3)))[0]; + uint64_t cq3_w1 = ((uint64_t *)(cq0 + CQE_SZ(3)))[1]; if (flags & NIX_RX_OFFLOAD_RSS_F) { /* Fill rss in the rx_descriptor_fields1 */ - f0 = vsetq_lane_u32(vgetq_lane_u32(cq0_w0, 0), f0, 3); - f1 = vsetq_lane_u32(vgetq_lane_u32(cq1_w0, 0), f1, 3); - f2 = vsetq_lane_u32(vgetq_lane_u32(cq2_w0, 0), f2, 3); - f3 = vsetq_lane_u32(vgetq_lane_u32(cq3_w0, 0), f3, 3); + f0 = vsetq_lane_u32(cq0_w0, f0, 3); + f1 = vsetq_lane_u32(cq1_w0, f1, 3); + f2 = vsetq_lane_u32(cq2_w0, f2, 3); + f3 = vsetq_lane_u32(cq3_w0, f3, 3); ol_flags0 = PKT_RX_RSS_HASH; ol_flags1 = PKT_RX_RSS_HASH; ol_flags2 = PKT_RX_RSS_HASH; @@ -206,25 +210,21 @@ nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts, if (flags & NIX_RX_OFFLOAD_PTYPE_F) { /* Fill packet_type in the rx_descriptor_fields1 */ - f0 = vsetq_lane_u32(nix_ptype_get(lookup_mem, - vgetq_lane_u64(cq0_w0, 1)), f0, 0); - f1 = vsetq_lane_u32(nix_ptype_get(lookup_mem, - vgetq_lane_u64(cq1_w0, 1)), f1, 0); - f2 = vsetq_lane_u32(nix_ptype_get(lookup_mem, - vgetq_lane_u64(cq2_w0, 1)), f2, 0); - f3 = vsetq_lane_u32(nix_ptype_get(lookup_mem, - vgetq_lane_u64(cq3_w0, 1)), f3, 0); + f0 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq0_w1), + f0, 0); + f1 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq1_w1), + f1, 0); + f2 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq2_w1), + f2, 0); + f3 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq3_w1), + f3, 0); } if (flags & NIX_RX_OFFLOAD_CHECKSUM_F) { - ol_flags0 |= nix_rx_olflags_get(lookup_mem, - vgetq_lane_u64(cq0_w0, 1)); - ol_flags1 |= nix_rx_olflags_get(lookup_mem, - vgetq_lane_u64(cq1_w0, 1)); - ol_flags2 |= nix_rx_olflags_get(lookup_mem, - vgetq_lane_u64(cq2_w0, 1)); - ol_flags3 |= nix_rx_olflags_get(lookup_mem, - vgetq_lane_u64(cq3_w0, 1)); + ol_flags0 |= nix_rx_olflags_get(lookup_mem, cq0_w1); + ol_flags1 |= nix_rx_olflags_get(lookup_mem, cq1_w1); + ol_flags2 |= nix_rx_olflags_get(lookup_mem, cq2_w1); + ol_flags3 |= nix_rx_olflags_get(lookup_mem, cq3_w1); } if (flags & NIX_RX_OFFLOAD_VLAN_STRIP_F) {