From patchwork Sun Dec 1 09:35:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tonghao Zhang X-Patchwork-Id: 63411 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 91F39A04B5; Sun, 1 Dec 2019 10:35:26 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id E06C34CA7; Sun, 1 Dec 2019 10:35:24 +0100 (CET) Received: from mail-pf1-f193.google.com (mail-pf1-f193.google.com [209.85.210.193]) by dpdk.org (Postfix) with ESMTP id 71BE21F5 for ; Sun, 1 Dec 2019 10:35:22 +0100 (CET) Received: by mail-pf1-f193.google.com with SMTP id n13so16982149pff.1 for ; Sun, 01 Dec 2019 01:35:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=8Z3sEyQRwFZdxsWnKM6hVYvjvUUPsmFKFUIbTGS76N0=; b=cTvReLxA0N+1IRo2f6mrknE9ue8jWYwffRrH2YuNj+pGaJ56xsZKPVUE1OVXUKIeXu m9N/busWqm68xvLez//8qjtpL8qc567KtWztK2dVrg+Mb9qLr/aHoQrlQT2RFoswGPMr 6p/qLgnIzkWMMmNuBOx4n6nlf3rbhqxqSyhr6fEUz6zEHzgkZslaLDLKXxk7RV0D/0SX RFTBWCFva7mI8lBsP+T2xNQvNlJUhlje1owwJIG/4WAglzFnuXWxgYEvv1JcPMml1dr5 xRljt4bkPKttIQLMqj35gQRUULTwuYCmUEKD8F59Lv0ROAI6CzjzFkXcOfrTAlIZq1iC awiA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=8Z3sEyQRwFZdxsWnKM6hVYvjvUUPsmFKFUIbTGS76N0=; b=S4QncAn7CaoFdgJTRUxLVsOrfNrtskNsyoBpDiVkbCy0a5D664GaPtcNLOiK9RvEOI aFPKZ5NBGf61zWF3VbzNmS0GHqaFLif8ng6oPLmKgGK/TwZOimLr1pCZ/g7h51b4LG8p yFw72JbWuSvODF1fCqR4bnnnm8kjx+elIoN5YCDfffmyjmKtRR9R9Qy53S9+dhqO1/qH JF+jyrMRp+8azZYw0W8UZAa9PDywiM4YzYiKahBANeJkEUIYE1tqeCMvqWRd2LHL6rZk KRyY9rBsKNEoOQdvU6KdnFJ1iBAjP2P+5rkC6C8xS14/f86KnLPuUVIe9I3mx9aJr15I pb5g== X-Gm-Message-State: APjAAAU55wK6ZFNdeRwEmJOnQ0lrrMAUkCzmQqxBYlqKZHM5dnUNOLgD vMzi6hlVujHr9KGGuLZjIHw= X-Google-Smtp-Source: APXvYqyxtpRBgktFkcZrYeOpTI7tpdsFH/W50b2W9W5WgVnMa6oB6v+Ub9Ee3bsJmIel3P/eXOZ9UA== X-Received: by 2002:a63:115c:: with SMTP id 28mr25529315pgr.6.1575192921317; Sun, 01 Dec 2019 01:35:21 -0800 (PST) Received: from local.opencloud.tech.localdomain ([203.100.54.194]) by smtp.gmail.com with ESMTPSA id j5sm29880496pfe.100.2019.12.01.01.35.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 01 Dec 2019 01:35:20 -0800 (PST) From: xiangxia.m.yue@gmail.com To: orika@mellanox.com Cc: dev@dpdk.org, Tonghao Zhang Date: Sun, 1 Dec 2019 17:35:09 +0800 Message-Id: <1575192909-105146-1-git-send-email-xiangxia.m.yue@gmail.com> X-Mailer: git-send-email 1.8.3.1 Subject: [dpdk-dev] [PATCH dpdk-dev] net/mlx5: support hairpin between different ports X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Tonghao Zhang In the dpdk upstream, each hairpin Rxq can be connected Txq which can belong to a same port. This patch allows Rxq connected to different port Txq. rte_eth_hairpin_conf_check will check the hairpin_conf valid in high level. Signed-off-by: Tonghao Zhang --- drivers/net/mlx5/mlx5_rxq.c | 5 ++- drivers/net/mlx5/mlx5_trigger.c | 41 ++++++++++++++++------- drivers/net/mlx5/mlx5_txq.c | 4 +-- lib/librte_ethdev/rte_ethdev.c | 73 ++++++++++++++++++++++++++++------------- 4 files changed, 83 insertions(+), 40 deletions(-) diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index 986ec01..c2daebd 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -547,9 +547,8 @@ res = mlx5_rx_queue_pre_setup(dev, idx, desc); if (res) return res; - if (hairpin_conf->peer_count != 1 || - hairpin_conf->peers[0].port != dev->data->port_id || - hairpin_conf->peers[0].queue >= priv->txqs_n) { + + if (hairpin_conf->peer_count != 1) { DRV_LOG(ERR, "port %u unable to setup hairpin queue index %u " " invalid hairpind configuration", dev->data->port_id, idx); diff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c index ab6937a..3eb2984 100644 --- a/drivers/net/mlx5/mlx5_trigger.c +++ b/drivers/net/mlx5/mlx5_trigger.c @@ -185,6 +185,10 @@ struct mlx5_rxq_ctrl *rxq_ctrl; struct mlx5_devx_obj *sq; struct mlx5_devx_obj *rq; + struct rte_eth_dev *rxq_dev; + struct mlx5_priv *rxq_priv; + uint16_t peer_queue_id; + uint16_t peer_port_id; unsigned int i; int ret = 0; @@ -203,37 +207,50 @@ mlx5_txq_release(dev, i); return -rte_errno; } - sq = txq_ctrl->obj->sq; - rxq_ctrl = mlx5_rxq_get(dev, - txq_ctrl->hairpin_conf.peers[0].queue); + peer_port_id = txq_ctrl->hairpin_conf.peers[0].port; + peer_queue_id = txq_ctrl->hairpin_conf.peers[0].queue; + rxq_dev = &rte_eth_devices[peer_port_id]; + rxq_priv = rxq_dev->data->dev_private; + + rxq_ctrl = mlx5_rxq_get(rxq_dev, peer_queue_id); if (!rxq_ctrl) { mlx5_txq_release(dev, i); rte_errno = EINVAL; DRV_LOG(ERR, "port %u no rxq object found: %d", - dev->data->port_id, - txq_ctrl->hairpin_conf.peers[0].queue); + peer_port_id, peer_queue_id); return -rte_errno; } if (rxq_ctrl->type != MLX5_RXQ_TYPE_HAIRPIN || rxq_ctrl->hairpin_conf.peers[0].queue != i) { rte_errno = ENOMEM; DRV_LOG(ERR, "port %u Tx queue %d can't be binded to " - "Rx queue %d", dev->data->port_id, - i, txq_ctrl->hairpin_conf.peers[0].queue); + "port %u Rx queue %d", + dev->data->port_id, i, + peer_port_id, peer_queue_id); goto error; } + if (!rxq_ctrl->obj) { + DRV_LOG(ERR, "port %u rxq obj not created, " + "you may start it firstly.", + peer_port_id); + goto error; + } + + sq = txq_ctrl->obj->sq; rq = rxq_ctrl->obj->rq; if (!rq) { rte_errno = ENOMEM; - DRV_LOG(ERR, "port %u hairpin no matching rxq: %d", + DRV_LOG(ERR, "port %u hairpin no matching port" + " %u rxq %d", dev->data->port_id, - txq_ctrl->hairpin_conf.peers[0].queue); + peer_port_id, + peer_queue_id); goto error; } sq_attr.state = MLX5_SQC_STATE_RDY; sq_attr.sq_state = MLX5_SQC_STATE_RST; sq_attr.hairpin_peer_rq = rq->id; - sq_attr.hairpin_peer_vhca = priv->config.hca_attr.vhca_id; + sq_attr.hairpin_peer_vhca = rxq_priv->config.hca_attr.vhca_id; ret = mlx5_devx_cmd_modify_sq(sq, &sq_attr); if (ret) goto error; @@ -245,12 +262,12 @@ if (ret) goto error; mlx5_txq_release(dev, i); - mlx5_rxq_release(dev, txq_ctrl->hairpin_conf.peers[0].queue); + mlx5_rxq_release(rxq_dev, peer_queue_id); } return 0; error: mlx5_txq_release(dev, i); - mlx5_rxq_release(dev, txq_ctrl->hairpin_conf.peers[0].queue); + mlx5_rxq_release(dev, peer_queue_id); return -rte_errno; } diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c index bac4f71..98ee35e 100644 --- a/drivers/net/mlx5/mlx5_txq.c +++ b/drivers/net/mlx5/mlx5_txq.c @@ -254,9 +254,7 @@ res = mlx5_tx_queue_pre_setup(dev, idx, desc); if (res) return res; - if (hairpin_conf->peer_count != 1 || - hairpin_conf->peers[0].port != dev->data->port_id || - hairpin_conf->peers[0].queue >= priv->rxqs_n) { + if (hairpin_conf->peer_count != 1) { DRV_LOG(ERR, "port %u unable to setup hairpin queue index %u " " invalid hairpind configuration", dev->data->port_id, idx); diff --git a/lib/librte_ethdev/rte_ethdev.c b/lib/librte_ethdev/rte_ethdev.c index 8d2ce31..0bd6d87 100644 --- a/lib/librte_ethdev/rte_ethdev.c +++ b/lib/librte_ethdev/rte_ethdev.c @@ -1923,6 +1923,53 @@ struct rte_eth_dev * return eth_err(port_id, ret); } +static int +rte_eth_hairpin_conf_check(const struct rte_eth_hairpin_conf *conf, + const struct rte_eth_hairpin_cap *cap, + bool is_rx_hairpin) +{ + uint16_t max_queues_mapping = is_rx_hairpin ? + cap->max_rx_2_tx : cap->max_tx_2_rx; + struct rte_eth_dev *dev; + uint16_t nb_queues; + uint16_t port_id; + int i; + + if (conf->peer_count == 0) { + RTE_ETHDEV_LOG(ERR, "Invalid value for number of peers(=%hu)," + " should be: > 0", + conf->peer_count); + return -EINVAL; + } + if (conf->peer_count > max_queues_mapping) { + RTE_ETHDEV_LOG(ERR, "Invalid value for number of peers(=%hu)," + " should be: <= %hu", + conf->peer_count, max_queues_mapping); + return -EINVAL; + } + for (i = 0; i < conf->peer_count; i++) { + port_id = conf->peers[i].port; + + if (!rte_eth_dev_is_valid_port(port_id)) { + RTE_ETHDEV_LOG(ERR, "Invalid port_id(=%hu) for" + " hairpin peers", conf->peer_count); + return -EINVAL; + } + + dev = &rte_eth_devices[port_id]; + nb_queues = is_rx_hairpin ? + dev->data->nb_tx_queues : dev->data->nb_rx_queues; + if (conf->peers[i].queue >= nb_queues) { + RTE_ETHDEV_LOG(ERR, "Invalid queue_id(=%hu) for" + " hairpin peers, shoud be < %hu", + conf->peer_count, nb_queues); + return -EINVAL; + } + } + + return 0; +} + int rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc, @@ -1956,18 +2003,9 @@ struct rte_eth_dev * nb_rx_desc, cap.max_nb_desc); return -EINVAL; } - if (conf->peer_count > cap.max_rx_2_tx) { - RTE_ETHDEV_LOG(ERR, - "Invalid value for number of peers for Rx queue(=%hu), should be: <= %hu", - conf->peer_count, cap.max_rx_2_tx); - return -EINVAL; - } - if (conf->peer_count == 0) { - RTE_ETHDEV_LOG(ERR, - "Invalid value for number of peers for Rx queue(=%hu), should be: > 0", - conf->peer_count); + if (rte_eth_hairpin_conf_check(conf, &cap, true)) return -EINVAL; - } + for (i = 0, count = 0; i < dev->data->nb_rx_queues && cap.max_nb_queues != UINT16_MAX; i++) { if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i)) @@ -2126,18 +2164,9 @@ struct rte_eth_dev * nb_tx_desc, cap.max_nb_desc); return -EINVAL; } - if (conf->peer_count > cap.max_tx_2_rx) { - RTE_ETHDEV_LOG(ERR, - "Invalid value for number of peers for Tx queue(=%hu), should be: <= %hu", - conf->peer_count, cap.max_tx_2_rx); + if (rte_eth_hairpin_conf_check(conf, &cap, false)) return -EINVAL; - } - if (conf->peer_count == 0) { - RTE_ETHDEV_LOG(ERR, - "Invalid value for number of peers for Tx queue(=%hu), should be: > 0", - conf->peer_count); - return -EINVAL; - } + for (i = 0, count = 0; i < dev->data->nb_tx_queues && cap.max_nb_queues != UINT16_MAX; i++) { if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))