From patchwork Tue Aug 27 16:16:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Harris, James R" X-Patchwork-Id: 58100 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 648541C1DF; Wed, 28 Aug 2019 01:21:31 +0200 (CEST) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id 31FFD1C1D6 for ; Wed, 28 Aug 2019 01:21:28 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Aug 2019 16:21:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,439,1559545200"; d="scan'208";a="181847709" Received: from jrharri1-skx.ch.intel.com (HELO [127.0.1.1]) ([143.182.137.73]) by fmsmga007.fm.intel.com with ESMTP; 27 Aug 2019 16:21:26 -0700 From: Jim Harris To: dev@dpdk.org, bruce.richardson@intel.com, anatoly.burakov@intel.com Date: Tue, 27 Aug 2019 09:16:23 -0700 Message-ID: <156692258331.17033.5356117169898030871.stgit@jrharri1-skx> In-Reply-To: <156646334762.14099.13593080473257757748.stgit@jrharri1-skx> References: <156646334762.14099.13593080473257757748.stgit@jrharri1-skx> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v6] eal: add tsc_hz to rte_mem_config X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This ensures secondary processes never have to calculate the TSC rate themselves, which can be noticeable in VMs that don't have access to arch-specific detection mechanism (such as CPUID leaf 0x15 or MSR 0xCE on x86). Since rte_mem_config is now internal to the rte_eal library, we can add tsc_hz without ABI breakage concerns. Reduces rte_eal_init() execution time in a secondary process from 165ms to 66ms on my test system. Signed-off-by: Jim Harris --- lib/librte_eal/common/eal_common_timer.c | 15 +++++++++++++++ lib/librte_eal/common/eal_memcfg.h | 3 +++ 2 files changed, 18 insertions(+) diff --git a/lib/librte_eal/common/eal_common_timer.c b/lib/librte_eal/common/eal_common_timer.c index 145543de7..fa9ee1b22 100644 --- a/lib/librte_eal/common/eal_common_timer.c +++ b/lib/librte_eal/common/eal_common_timer.c @@ -15,8 +15,10 @@ #include #include #include +#include #include "eal_private.h" +#include "eal_memcfg.h" /* The frequency of the RDTSC timer resolution */ static uint64_t eal_tsc_resolution_hz; @@ -77,8 +79,20 @@ estimate_tsc_freq(void) void set_tsc_freq(void) { + struct rte_mem_config *mcfg = rte_eal_get_configuration()->mem_config; uint64_t freq; + if (rte_eal_process_type() == RTE_PROC_SECONDARY) { + /* + * Just use the primary process calculated TSC rate in any + * secondary process. It avoids any unnecessary overhead on + * systems where arch-specific frequency detection is not + * available. + */ + eal_tsc_resolution_hz = mcfg->tsc_hz; + return; + } + freq = get_tsc_freq_arch(); if (!freq) freq = get_tsc_freq(); @@ -87,6 +101,7 @@ set_tsc_freq(void) RTE_LOG(DEBUG, EAL, "TSC frequency is ~%" PRIu64 " KHz\n", freq / 1000); eal_tsc_resolution_hz = freq; + mcfg->tsc_hz = freq; } void rte_delay_us_callback_register(void (*userfunc)(unsigned int)) diff --git a/lib/librte_eal/common/eal_memcfg.h b/lib/librte_eal/common/eal_memcfg.h index 359beb216..73be6fbae 100644 --- a/lib/librte_eal/common/eal_memcfg.h +++ b/lib/librte_eal/common/eal_memcfg.h @@ -70,6 +70,9 @@ struct rte_mem_config { uint32_t single_file_segments; /**< stored single file segments parameter. */ + uint64_t tsc_hz; + /**< TSC rate */ + uint8_t dma_maskbits; /**< Keeps the more restricted dma mask. */ };