From patchwork Mon Aug 26 10:16:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Junyu Jiang X-Patchwork-Id: 57961 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 51ED21D159; Mon, 26 Aug 2019 13:14:55 +0200 (CEST) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id 9FB9B1D157 for ; Mon, 26 Aug 2019 13:14:53 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Aug 2019 04:14:52 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,433,1559545200"; d="scan'208";a="209328546" Received: from intel.sh.intel.com ([10.239.255.144]) by fmsmga002.fm.intel.com with ESMTP; 26 Aug 2019 04:14:51 -0700 From: junyux.jiang@intel.com To: dev@dpdk.org Cc: Jiang JunyuX Date: Mon, 26 Aug 2019 10:16:00 +0000 Message-Id: <20190826101600.8042-1-junyux.jiang@intel.com> X-Mailer: git-send-email 2.17.1 Subject: [dpdk-dev] [PATCH v1] net/ixgbe: fix Rx/Tx queue interrupt for X552/557 devices X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Jiang JunyuX X552/557 devices don't map interrupt vector before enabling Rx/Tx queue interrupt. Fixes: d2e72774e58c ("ixgbe/base: support X550") Signed-off-by: Jiang JunyuX --- drivers/net/ixgbe/ixgbe_ethdev.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c index 03fc1f717..e36e1c58e 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.c +++ b/drivers/net/ixgbe/ixgbe_ethdev.c @@ -5896,7 +5896,8 @@ ixgbe_set_ivar_map(struct ixgbe_hw *hw, int8_t direction, IXGBE_WRITE_REG(hw, IXGBE_IVAR(idx), tmp); } else if ((hw->mac.type == ixgbe_mac_82599EB) || (hw->mac.type == ixgbe_mac_X540) || - (hw->mac.type == ixgbe_mac_X550)) { + (hw->mac.type == ixgbe_mac_X550) || + (hw->mac.type == ixgbe_mac_X550EM_x)) { if (direction == -1) { /* other causes */ idx = ((queue & 1) * 8); @@ -6026,6 +6027,7 @@ ixgbe_configure_msix(struct rte_eth_dev *dev) case ixgbe_mac_82599EB: case ixgbe_mac_X540: case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: ixgbe_set_ivar_map(hw, -1, 1, IXGBE_MISC_VEC_ID); break; default: