From patchwork Fri May 16 07:27:43 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanxiao Li X-Patchwork-Id: 153476 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 24A8146760; Fri, 16 May 2025 09:32:10 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3202A4060C; Fri, 16 May 2025 09:31:39 +0200 (CEST) Received: from mxhk.zte.com.cn (mxhk.zte.com.cn [63.216.63.35]) by mails.dpdk.org (Postfix) with ESMTP id 1C65D402E1 for ; Fri, 16 May 2025 09:31:36 +0200 (CEST) Received: from mse-fl1.zte.com.cn (unknown [10.5.228.132]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mxhk.zte.com.cn (FangMail) with ESMTPS id 4ZzJfv1T4Zz5B1J6 for ; Fri, 16 May 2025 15:31:35 +0800 (CST) Received: from szxlzmapp04.zte.com.cn ([10.5.231.166]) by mse-fl1.zte.com.cn with SMTP id 54G7VBDv006329 for ; Fri, 16 May 2025 15:31:11 +0800 (+08) (envelope-from li.hanxiao@zte.com.cn) Received: from localhost.localdomain (unknown [192.168.6.15]) by smtp (Zmail) with SMTP; Fri, 16 May 2025 15:31:14 +0800 X-Zmail-TransId: 3e816826e9c2004-de5a4 From: Hanxiao Li To: dev@dpdk.org Cc: Hanxiao Li Subject: [PATCH v4 1/9] crypto/zsda: add skeleton Date: Fri, 16 May 2025 15:27:43 +0800 Message-ID: <20250516072752.1971299-2-li.hanxiao@zte.com.cn> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250516072752.1971299-1-li.hanxiao@zte.com.cn> References: <20250515101927.1926502-2-li.hanxiao@zte.com.cn> <20250516072752.1971299-1-li.hanxiao@zte.com.cn> MIME-Version: 1.0 X-MAIL: mse-fl1.zte.com.cn 54G7VBDv006329 X-Fangmail-Anti-Spam-Filtered: true X-Fangmail-MID-QID: 6826E9D7.001/4ZzJfv1T4Zz5B1J6 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add crypto driver skeleton for zsda devices. Signed-off-by: Hanxiao Li --- MAINTAINERS | 6 ++ doc/guides/cryptodevs/index.rst | 1 + doc/guides/cryptodevs/zsda.rst | 26 ++++++ drivers/common/zsda/meson.build | 12 ++- drivers/common/zsda/zsda_device.c | 14 +++- drivers/common/zsda/zsda_device.h | 10 +++ drivers/common/zsda/zsda_qp.c | 9 ++ drivers/common/zsda/zsda_qp_common.h | 5 +- drivers/crypto/zsda/zsda_crypto_pmd.c | 115 ++++++++++++++++++++++++++ drivers/crypto/zsda/zsda_crypto_pmd.h | 49 +++++++++++ 10 files changed, 244 insertions(+), 3 deletions(-) create mode 100644 doc/guides/cryptodevs/zsda.rst create mode 100644 drivers/crypto/zsda/zsda_crypto_pmd.c create mode 100644 drivers/crypto/zsda/zsda_crypto_pmd.h -- 2.27.0 diff --git a/MAINTAINERS b/MAINTAINERS index 167cc74a15..3e16789250 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1270,6 +1270,12 @@ F: drivers/crypto/virtio/ F: doc/guides/cryptodevs/virtio.rst F: doc/guides/cryptodevs/features/virtio.ini +ZTE Storage Data Accelerator (ZSDA) +M: Hanxiao Li +F: drivers/crypto/zsda/ +F: doc/guides/cryptodevs/zsda.rst +F: doc/guides/cryptodevs/features/zsda.ini + Compression Drivers ------------------- diff --git a/doc/guides/cryptodevs/index.rst b/doc/guides/cryptodevs/index.rst index 1e57a9fe86..be2620f185 100644 --- a/doc/guides/cryptodevs/index.rst +++ b/doc/guides/cryptodevs/index.rst @@ -34,3 +34,4 @@ Crypto Device Drivers uadk virtio zuc + zsda diff --git a/doc/guides/cryptodevs/zsda.rst b/doc/guides/cryptodevs/zsda.rst new file mode 100644 index 0000000000..0a7aeb2d50 --- /dev/null +++ b/doc/guides/cryptodevs/zsda.rst @@ -0,0 +1,26 @@ +.. SPDX-License-Identifier: BSD-3-Clause + Copyright(c) 2025 ZTE Corporation. + +ZTE Storage Data Accelerator (ZSDA) Poll Mode Driver +==================================================== + +The ZSDA crypto PMD provides poll mode Cipher and Hash driver +support for the following hardware accelerator devices: + +* ``ZTE Processing accelerators 1cf2`` + + +Features +-------- + + +Limitations +----------- + + +Installation +------------ + + +Testing +------- diff --git a/drivers/common/zsda/meson.build b/drivers/common/zsda/meson.build index be4fbaedb3..e897c3a931 100644 --- a/drivers/common/zsda/meson.build +++ b/drivers/common/zsda/meson.build @@ -7,7 +7,7 @@ if is_windows subdir_done() endif -deps += ['bus_pci', 'mbuf', 'compressdev'] +deps += ['bus_pci', 'compressdev', 'cryptodev'] sources += files( 'zsda_device.c', 'zsda_logs.c', @@ -24,3 +24,13 @@ if zsda_compress sources += files(join_paths(zsda_compress_relpath, f)) endforeach endif + +zsda_crypto = true +zsda_crypto_path = 'crypto/zsda' +zsda_crypto_relpath = '../../' + zsda_crypto_path +includes += include_directories(zsda_crypto_relpath) +if zsda_crypto + foreach f: ['zsda_crypto_pmd.c'] + sources += files(join_paths(zsda_crypto_relpath, f)) + endforeach +endif diff --git a/drivers/common/zsda/zsda_device.c b/drivers/common/zsda/zsda_device.c index 8a89dc7fc9..0d1e772fe4 100644 --- a/drivers/common/zsda/zsda_device.c +++ b/drivers/common/zsda/zsda_device.c @@ -152,6 +152,7 @@ zsda_pci_dev_destroy(struct zsda_pci_device *zsda_pci_dev, { zsda_comp_dev_destroy(zsda_pci_dev); + zsda_crypto_dev_destroy(zsda_pci_dev); return zsda_pci_device_release(pci_dev); } @@ -177,9 +178,20 @@ zsda_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, ret = zsda_comp_dev_create(zsda_pci_dev); if (ret) - ZSDA_LOG(ERR, "Failed! dev create."); + ZSDA_LOG(ERR, "Failed! comp_dev create."); + + ret = zsda_crypto_dev_create(zsda_pci_dev); + if (ret) { + ZSDA_LOG(ERR, "Failed! crypto_dev create."); + goto exit; + } return ret; + +exit: + zsda_comp_dev_destroy(zsda_pci_dev); + + return ZSDA_FAILED; } static int diff --git a/drivers/common/zsda/zsda_device.h b/drivers/common/zsda/zsda_device.h index dd0fa35ba6..036e157b8d 100644 --- a/drivers/common/zsda/zsda_device.h +++ b/drivers/common/zsda/zsda_device.h @@ -7,6 +7,7 @@ #include "zsda_qp_common.h" #include "zsda_comp_pmd.h" +#include "zsda_crypto_pmd.h" #define MAX_QPS_ON_FUNCTION 128 #define ZSDA_DEV_NAME_MAX_LEN 64 @@ -21,6 +22,11 @@ struct zsda_device_info { * Register with this rather than with the one in * pci_dev so that its driver can have a compression-specific name */ + struct rte_device crypto_rte_dev; + /**< This represents the crypto subset of this pci device. + * Register with this rather than with the one in + * pci_dev so that its driver can have a crypto-specific name + */ struct rte_pci_device *pci_dev; }; @@ -52,6 +58,10 @@ struct zsda_pci_device { struct zsda_comp_dev_private *comp_dev; /**< link back to compressdev private data */ + /* Data relating to crypto service */ + struct zsda_crypto_dev_private *crypto_dev_priv; + /**< link back to cryptodev private data */ + struct zsda_qp_hw zsda_hw_qps[ZSDA_MAX_SERVICES]; uint16_t zsda_qp_hw_num[ZSDA_MAX_SERVICES]; }; diff --git a/drivers/common/zsda/zsda_qp.c b/drivers/common/zsda/zsda_qp.c index 0ef7cac585..a5f00d8ab6 100644 --- a/drivers/common/zsda/zsda_qp.c +++ b/drivers/common/zsda/zsda_qp.c @@ -15,6 +15,9 @@ static uint8_t zsda_num_used_qps; static struct ring_size zsda_qp_hw_ring_size[ZSDA_MAX_SERVICES] = { [ZSDA_SERVICE_COMPRESSION] = {32, 16}, [ZSDA_SERVICE_DECOMPRESSION] = {32, 16}, + [ZSDA_SERVICE_CRYPRO_ENCRY] = {128, 16}, + [ZSDA_SERVICE_CRYPTO_DECRY] = {128, 16}, + [ZSDA_SERVICE_HASH_ENCODE] = {32, 16}, }; static const uint8_t crc8_table[256] = { @@ -480,6 +483,12 @@ zsda_nb_qps_get(const struct zsda_pci_device *zsda_pci_dev) zsda_num_qps_get(zsda_pci_dev, ZSDA_SERVICE_COMPRESSION); zsda_nb_qps.decomp = zsda_num_qps_get(zsda_pci_dev, ZSDA_SERVICE_DECOMPRESSION); + zsda_nb_qps.encrypt = + zsda_num_qps_get(zsda_pci_dev, ZSDA_SERVICE_CRYPRO_ENCRY); + zsda_nb_qps.decrypt = + zsda_num_qps_get(zsda_pci_dev, ZSDA_SERVICE_CRYPTO_DECRY); + zsda_nb_qps.hash = + zsda_num_qps_get(zsda_pci_dev, ZSDA_SERVICE_HASH_ENCODE); } int diff --git a/drivers/common/zsda/zsda_qp_common.h b/drivers/common/zsda/zsda_qp_common.h index 941278c6d2..911b3a07a3 100644 --- a/drivers/common/zsda/zsda_qp_common.h +++ b/drivers/common/zsda/zsda_qp_common.h @@ -24,9 +24,12 @@ enum zsda_service_type { ZSDA_SERVICE_COMPRESSION = 0, ZSDA_SERVICE_DECOMPRESSION = 1, + ZSDA_SERVICE_CRYPRO_ENCRY = 2, + ZSDA_SERVICE_CRYPTO_DECRY = 3, + ZSDA_SERVICE_HASH_ENCODE = 6, ZSDA_SERVICE_INVALID, }; -#define ZSDA_MAX_SERVICES (2) +#define ZSDA_MAX_SERVICES (ZSDA_SERVICE_INVALID) #define ZSDA_CSR_READ32(addr) rte_read32((addr)) #define ZSDA_CSR_WRITE32(addr, value) rte_write32((value), (addr)) diff --git a/drivers/crypto/zsda/zsda_crypto_pmd.c b/drivers/crypto/zsda/zsda_crypto_pmd.c new file mode 100644 index 0000000000..99acfa3418 --- /dev/null +++ b/drivers/crypto/zsda/zsda_crypto_pmd.c @@ -0,0 +1,115 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2025 ZTE Corporation + */ + +#include + +#include "zsda_crypto_pmd.h" + +uint8_t zsda_crypto_driver_id; + +static struct rte_cryptodev_ops crypto_zsda_ops = { + .dev_configure = NULL, + .dev_start = NULL, + .dev_stop = NULL, + .dev_close = NULL, + .dev_infos_get = NULL, + + .stats_get = NULL, + .stats_reset = NULL, + .queue_pair_setup = NULL, + .queue_pair_release = NULL, + + .sym_session_get_size = NULL, + .sym_session_configure = NULL, + .sym_session_clear = NULL, +}; + +static const char zsda_crypto_drv_name[] = RTE_STR(CRYPTODEV_NAME_ZSDA_PMD); +static const struct rte_driver cryptodev_zsda_crypto_driver = { + .name = zsda_crypto_drv_name, + .alias = zsda_crypto_drv_name +}; + +int +zsda_crypto_dev_create(struct zsda_pci_device *zsda_pci_dev) +{ + struct zsda_device_info *dev_info = + &zsda_devs[zsda_pci_dev->zsda_dev_id]; + + struct rte_cryptodev_pmd_init_params init_params = { + .name = "", + .socket_id = (int)rte_socket_id(), + .private_data_size = sizeof(struct zsda_crypto_dev_private) + }; + + char name[RTE_CRYPTODEV_NAME_MAX_LEN]; + struct rte_cryptodev *cryptodev; + struct zsda_crypto_dev_private *crypto_dev_priv; + + if (rte_eal_process_type() != RTE_PROC_PRIMARY) + return ZSDA_SUCCESS; + + snprintf(name, RTE_CRYPTODEV_NAME_MAX_LEN, "%s_%s", zsda_pci_dev->name, + "crypto"); + ZSDA_LOG(DEBUG, "Creating ZSDA crypto device %s", name); + + dev_info->crypto_rte_dev.driver = &cryptodev_zsda_crypto_driver; + dev_info->crypto_rte_dev.numa_node = dev_info->pci_dev->device.numa_node; + + cryptodev = rte_cryptodev_pmd_create(name, &(dev_info->crypto_rte_dev), + &init_params); + + if (cryptodev == NULL) { + ZSDA_LOG(ERR, "Failed! rte_cryptodev_pmd_create"); + goto error; + } + + dev_info->crypto_rte_dev.name = cryptodev->data->name; + cryptodev->driver_id = zsda_crypto_driver_id; + + cryptodev->dev_ops = &crypto_zsda_ops; + + cryptodev->enqueue_burst = NULL; + cryptodev->dequeue_burst = NULL; + cryptodev->feature_flags = 0; + + crypto_dev_priv = cryptodev->data->dev_private; + crypto_dev_priv->zsda_pci_dev = zsda_pci_dev; + crypto_dev_priv->cryptodev = cryptodev; + + zsda_pci_dev->crypto_dev_priv = crypto_dev_priv; + + return ZSDA_SUCCESS; + +error: + + rte_cryptodev_pmd_destroy(cryptodev); + memset(&dev_info->crypto_rte_dev, 0, sizeof(dev_info->crypto_rte_dev)); + + return -EFAULT; +} + +void +zsda_crypto_dev_destroy(struct zsda_pci_device *zsda_pci_dev) +{ + struct zsda_crypto_dev_private *crypto_dev_priv; + + if (zsda_pci_dev == NULL) + return; + + crypto_dev_priv = zsda_pci_dev->crypto_dev_priv; + if (crypto_dev_priv == NULL) + return; + + if (rte_eal_process_type() == RTE_PROC_PRIMARY) + rte_memzone_free(crypto_dev_priv->capa_mz); + + rte_cryptodev_pmd_destroy(crypto_dev_priv->cryptodev); + zsda_devs[zsda_pci_dev->zsda_dev_id].crypto_rte_dev.name = NULL; + zsda_pci_dev->crypto_dev_priv = NULL; +} + +static struct cryptodev_driver zsda_crypto_drv; +RTE_PMD_REGISTER_CRYPTO_DRIVER(zsda_crypto_drv, cryptodev_zsda_crypto_driver, + zsda_crypto_driver_id); diff --git a/drivers/crypto/zsda/zsda_crypto_pmd.h b/drivers/crypto/zsda/zsda_crypto_pmd.h new file mode 100644 index 0000000000..1b17735d40 --- /dev/null +++ b/drivers/crypto/zsda/zsda_crypto_pmd.h @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2025 ZTE Corporation + */ + +#ifndef _ZSDA_CRYPTO_PMD_H_ +#define _ZSDA_CRYPTO_PMD_H_ + +#include "cryptodev_pmd.h" + +#include "zsda_qp.h" + +/** ZSDA Crypto PMD driver name */ +#define CRYPTODEV_NAME_ZSDA_PMD crypto_zsda +#define ZSDA_CIPHER_KEY_MAX_LEN 64 + +#define ZSDA_OPC_EC_AES_XTS_256 0x0 /* Encry AES-XTS-256 */ +#define ZSDA_OPC_EC_AES_XTS_512 0x01 /* Encry AES-XTS-512 */ +#define ZSDA_OPC_EC_SM4_XTS_256 0x02 /* Encry SM4-XTS-256 */ +#define ZSDA_OPC_DC_AES_XTS_256 0x08 /* Decry AES-XTS-256 */ +#define ZSDA_OPC_DC_AES_XTS_512 0x09 /* Decry AES-XTS-512 */ +#define ZSDA_OPC_DC_SM4_XTS_256 0x0A /* Decry SM4-XTS-256 */ +#define ZSDA_OPC_HASH_SHA1 0x20 /* Hash-SHA1 */ +#define ZSDA_OPC_HASH_SHA2_224 0x21 /* Hash-SHA2-224 */ +#define ZSDA_OPC_HASH_SHA2_256 0x22 /* Hash-SHA2-256 */ +#define ZSDA_OPC_HASH_SHA2_384 0x23 /* Hash-SHA2-384 */ +#define ZSDA_OPC_HASH_SHA2_512 0x24 /* Hash-SHA2-512 */ +#define ZSDA_OPC_HASH_SM3 0x25 /* Hash-SM3 */ + + +/** private data structure for a ZSDA device. + * This ZSDA device is a device offering only symmetric crypto service, + * there can be one of these on each zsda_pci_device (VF). + */ +struct zsda_crypto_dev_private { + struct zsda_pci_device *zsda_pci_dev; + /* The zsda pci device hosting the service */ + struct rte_cryptodev *cryptodev; + /* The pointer to this crypto device structure */ + const struct rte_cryptodev_capabilities *zsda_crypto_capabilities; + /* ZSDA device crypto capabilities */ + const struct rte_memzone *capa_mz; + /* Shared memzone for storing capabilities */ +}; + +int zsda_crypto_dev_create(struct zsda_pci_device *zsda_pci_dev); + +void zsda_crypto_dev_destroy(struct zsda_pci_device *zsda_pci_dev); + +#endif /* _ZSDA_CRYPTO_PMD_H_ */ From patchwork Fri May 16 07:27:44 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanxiao Li X-Patchwork-Id: 153477 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0E39546760; Fri, 16 May 2025 09:32:17 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 843D04065D; Fri, 16 May 2025 09:31:40 +0200 (CEST) Received: from mxhk.zte.com.cn (mxhk.zte.com.cn [63.216.63.35]) by mails.dpdk.org (Postfix) with ESMTP id CC2DB4060C for ; Fri, 16 May 2025 09:31:36 +0200 (CEST) Received: from mse-fl1.zte.com.cn (unknown [10.5.228.132]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mxhk.zte.com.cn (FangMail) with ESMTPS id 4ZzJfv6Jdjz5B1Jd for ; Fri, 16 May 2025 15:31:35 +0800 (CST) Received: from szxlzmapp01.zte.com.cn ([10.5.231.85]) by mse-fl1.zte.com.cn with SMTP id 54G7VCjD006330 for ; Fri, 16 May 2025 15:31:12 +0800 (+08) (envelope-from li.hanxiao@zte.com.cn) Received: from localhost.localdomain (unknown [192.168.6.15]) by smtp (Zmail) with SMTP; Fri, 16 May 2025 15:31:14 +0800 X-Zmail-TransId: 3e816826e9c2004-de5a6 From: Hanxiao Li To: dev@dpdk.org Cc: Hanxiao Li Subject: [PATCH v4 2/9] crypto/zsda: add device operations Date: Fri, 16 May 2025 15:27:44 +0800 Message-ID: <20250516072752.1971299-3-li.hanxiao@zte.com.cn> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250516072752.1971299-1-li.hanxiao@zte.com.cn> References: <20250515101927.1926502-2-li.hanxiao@zte.com.cn> <20250516072752.1971299-1-li.hanxiao@zte.com.cn> MIME-Version: 1.0 X-MAIL: mse-fl1.zte.com.cn 54G7VCjD006330 X-Fangmail-Anti-Spam-Filtered: true X-Fangmail-MID-QID: 6826E9D7.003/4ZzJfv6Jdjz5B1Jd X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add crypto device operations for zsda devices. Signed-off-by: Hanxiao Li --- drivers/crypto/zsda/zsda_crypto_pmd.c | 82 +++++++++++++++++++++++++-- 1 file changed, 77 insertions(+), 5 deletions(-) -- 2.27.0 diff --git a/drivers/crypto/zsda/zsda_crypto_pmd.c b/drivers/crypto/zsda/zsda_crypto_pmd.c index 99acfa3418..04c4e45843 100644 --- a/drivers/crypto/zsda/zsda_crypto_pmd.c +++ b/drivers/crypto/zsda/zsda_crypto_pmd.c @@ -8,12 +8,82 @@ uint8_t zsda_crypto_driver_id; +static int +zsda_dev_config(__rte_unused struct rte_cryptodev *dev, + __rte_unused struct rte_cryptodev_config *config) +{ + return ZSDA_SUCCESS; +} + +static int +zsda_dev_start(struct rte_cryptodev *dev) +{ + struct zsda_crypto_dev_private *crypto_dev = dev->data->dev_private; + int ret; + + ret = zsda_queue_start(crypto_dev->zsda_pci_dev->pci_dev); + + return ret; +} + +static void +zsda_dev_stop(struct rte_cryptodev *dev) +{ + struct zsda_crypto_dev_private *crypto_dev = dev->data->dev_private; + + zsda_queue_stop(crypto_dev->zsda_pci_dev->pci_dev); +} + +static int +zsda_dev_close(struct rte_cryptodev *dev __rte_unused) +{ + int ret = ZSDA_SUCCESS; + return ret; +} + +static uint16_t +zsda_crypto_max_nb_qps(void) +{ + uint16_t encrypt = zsda_nb_qps.encrypt; + uint16_t decrypt = zsda_nb_qps.decrypt; + uint16_t hash = zsda_nb_qps.hash; + uint16_t min = 0; + + if ((encrypt == MAX_QPS_ON_FUNCTION) || + (decrypt == MAX_QPS_ON_FUNCTION) || + (hash == MAX_QPS_ON_FUNCTION)) + min = MAX_QPS_ON_FUNCTION; + else { + min = (encrypt < decrypt) ? encrypt : decrypt; + min = (min < hash) ? min : hash; + } + + if (min == 0) + return MAX_QPS_ON_FUNCTION; + return min; +} + +static void +zsda_dev_info_get(struct rte_cryptodev *dev, + struct rte_cryptodev_info *info) +{ + struct zsda_crypto_dev_private *crypto_dev_priv = dev->data->dev_private; + + if (info != NULL) { + info->max_nb_queue_pairs = zsda_crypto_max_nb_qps(); + info->feature_flags = dev->feature_flags; + info->capabilities = crypto_dev_priv->zsda_crypto_capabilities; + info->driver_id = zsda_crypto_driver_id; + info->sym.max_nb_sessions = 0; + } +} + static struct rte_cryptodev_ops crypto_zsda_ops = { - .dev_configure = NULL, - .dev_start = NULL, - .dev_stop = NULL, - .dev_close = NULL, - .dev_infos_get = NULL, + .dev_configure = zsda_dev_config, + .dev_start = zsda_dev_start, + .dev_stop = zsda_dev_stop, + .dev_close = zsda_dev_close, + .dev_infos_get = zsda_dev_info_get, .stats_get = NULL, .stats_reset = NULL, @@ -105,6 +175,8 @@ zsda_crypto_dev_destroy(struct zsda_pci_device *zsda_pci_dev) if (rte_eal_process_type() == RTE_PROC_PRIMARY) rte_memzone_free(crypto_dev_priv->capa_mz); + zsda_dev_close(crypto_dev_priv->cryptodev); + rte_cryptodev_pmd_destroy(crypto_dev_priv->cryptodev); zsda_devs[zsda_pci_dev->zsda_dev_id].crypto_rte_dev.name = NULL; zsda_pci_dev->crypto_dev_priv = NULL; From patchwork Fri May 16 07:27:45 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanxiao Li X-Patchwork-Id: 153472 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BA91546760; Fri, 16 May 2025 09:31:28 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 43D4D400EF; Fri, 16 May 2025 09:31:28 +0200 (CEST) Received: from mxhk.zte.com.cn (mxhk.zte.com.cn [63.216.63.35]) by mails.dpdk.org (Postfix) with ESMTP id 1948C40041 for ; Fri, 16 May 2025 09:31:26 +0200 (CEST) Received: from mse-fl2.zte.com.cn (unknown [10.5.228.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mxhk.zte.com.cn (FangMail) with ESMTPS id 4ZzJfg6c7Pz5B1Jc for ; Fri, 16 May 2025 15:31:23 +0800 (CST) Received: from szxlzmapp01.zte.com.cn ([10.5.231.85]) by mse-fl2.zte.com.cn with SMTP id 54G7VCpn056290 for ; Fri, 16 May 2025 15:31:12 +0800 (+08) (envelope-from li.hanxiao@zte.com.cn) Received: from localhost.localdomain (unknown [192.168.6.15]) by smtp (Zmail) with SMTP; Fri, 16 May 2025 15:31:15 +0800 X-Zmail-TransId: 3e816826e9c2004-de5a8 From: Hanxiao Li To: dev@dpdk.org Cc: Hanxiao Li Subject: [PATCH v4 3/9] crypto/zsda: add statistics Date: Fri, 16 May 2025 15:27:45 +0800 Message-ID: <20250516072752.1971299-4-li.hanxiao@zte.com.cn> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250516072752.1971299-1-li.hanxiao@zte.com.cn> References: <20250515101927.1926502-2-li.hanxiao@zte.com.cn> <20250516072752.1971299-1-li.hanxiao@zte.com.cn> MIME-Version: 1.0 X-MAIL: mse-fl2.zte.com.cn 54G7VCpn056290 X-Fangmail-Anti-Spam-Filtered: true X-Fangmail-MID-QID: 6826E9CB.01B/4ZzJfg6c7Pz5B1Jc X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add crypto statistics operations for zsda devices. Signed-off-by: Hanxiao Li --- drivers/crypto/zsda/zsda_crypto_pmd.c | 24 ++++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) -- 2.27.0 diff --git a/drivers/crypto/zsda/zsda_crypto_pmd.c b/drivers/crypto/zsda/zsda_crypto_pmd.c index 04c4e45843..8b44ebe61f 100644 --- a/drivers/crypto/zsda/zsda_crypto_pmd.c +++ b/drivers/crypto/zsda/zsda_crypto_pmd.c @@ -78,6 +78,26 @@ zsda_dev_info_get(struct rte_cryptodev *dev, } } +static void +zsda_crypto_stats_get(struct rte_cryptodev *dev, struct rte_cryptodev_stats *stats) +{ + struct zsda_qp_stat comm = {0}; + + zsda_stats_get(dev->data->queue_pairs, dev->data->nb_queue_pairs, + &comm); + stats->enqueued_count = comm.enqueued_count; + stats->dequeued_count = comm.dequeued_count; + stats->enqueue_err_count = comm.enqueue_err_count; + stats->dequeue_err_count = comm.dequeue_err_count; +} + +static void +zsda_crypto_stats_reset(struct rte_cryptodev *dev) +{ + zsda_stats_reset(dev->data->queue_pairs, dev->data->nb_queue_pairs); +} + + static struct rte_cryptodev_ops crypto_zsda_ops = { .dev_configure = zsda_dev_config, .dev_start = zsda_dev_start, @@ -85,8 +105,8 @@ static struct rte_cryptodev_ops crypto_zsda_ops = { .dev_close = zsda_dev_close, .dev_infos_get = zsda_dev_info_get, - .stats_get = NULL, - .stats_reset = NULL, + .stats_get = zsda_crypto_stats_get, + .stats_reset = zsda_crypto_stats_reset, .queue_pair_setup = NULL, .queue_pair_release = NULL, From patchwork Fri May 16 07:27:46 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanxiao Li X-Patchwork-Id: 153479 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8213546760; Fri, 16 May 2025 09:32:35 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8E5C440672; Fri, 16 May 2025 09:31:43 +0200 (CEST) Received: from mxct.zte.com.cn (mxct.zte.com.cn [183.62.165.209]) by mails.dpdk.org (Postfix) with ESMTP id EA7B940651 for ; Fri, 16 May 2025 09:31:39 +0200 (CEST) Received: from mse-fl1.zte.com.cn (unknown [10.5.228.132]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mxct.zte.com.cn (FangMail) with ESMTPS id 4ZzJfw0Rvkz4x5q1 for ; Fri, 16 May 2025 15:31:36 +0800 (CST) Received: from szxlzmapp04.zte.com.cn ([10.5.231.166]) by mse-fl1.zte.com.cn with SMTP id 54G7VCvY006331 for ; Fri, 16 May 2025 15:31:12 +0800 (+08) (envelope-from li.hanxiao@zte.com.cn) Received: from localhost.localdomain (unknown [192.168.6.15]) by smtp (Zmail) with SMTP; Fri, 16 May 2025 15:31:15 +0800 X-Zmail-TransId: 3e816826e9c3004-de5aa From: Hanxiao Li To: dev@dpdk.org Cc: Hanxiao Li Subject: [PATCH v4 4/9] crypto/zsda: add queue pair configuration Date: Fri, 16 May 2025 15:27:46 +0800 Message-ID: <20250516072752.1971299-5-li.hanxiao@zte.com.cn> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250516072752.1971299-1-li.hanxiao@zte.com.cn> References: <20250515101927.1926502-2-li.hanxiao@zte.com.cn> <20250516072752.1971299-1-li.hanxiao@zte.com.cn> MIME-Version: 1.0 X-MAIL: mse-fl1.zte.com.cn 54G7VCvY006331 X-Fangmail-Anti-Spam-Filtered: true X-Fangmail-MID-QID: 6826E9D8.000/4ZzJfw0Rvkz4x5q1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add crypto queue pair configuration operations for zsda device. Signed-off-by: Hanxiao Li --- drivers/crypto/zsda/zsda_crypto_pmd.c | 80 ++++++++++++++++++++++++++- 1 file changed, 77 insertions(+), 3 deletions(-) -- 2.27.0 diff --git a/drivers/crypto/zsda/zsda_crypto_pmd.c b/drivers/crypto/zsda/zsda_crypto_pmd.c index 8b44ebe61f..60c0df3a44 100644 --- a/drivers/crypto/zsda/zsda_crypto_pmd.c +++ b/drivers/crypto/zsda/zsda_crypto_pmd.c @@ -35,9 +35,20 @@ zsda_dev_stop(struct rte_cryptodev *dev) } static int -zsda_dev_close(struct rte_cryptodev *dev __rte_unused) +zsda_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id) +{ + return zsda_queue_pair_release( + (struct zsda_qp **)&(dev->data->queue_pairs[queue_pair_id])); +} + +static int +zsda_dev_close(struct rte_cryptodev *dev) { int ret = ZSDA_SUCCESS; + uint16_t i; + + for (i = 0; i < dev->data->nb_queue_pairs; i++) + ret |= zsda_qp_release(dev, i); return ret; } @@ -98,6 +109,69 @@ zsda_crypto_stats_reset(struct rte_cryptodev *dev) } +static int +zsda_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id, + const struct rte_cryptodev_qp_conf *qp_conf, + int socket_id) +{ + int ret = ZSDA_SUCCESS; + struct zsda_qp *qp_new; + struct zsda_qp **qp_addr = + (struct zsda_qp **)&(dev->data->queue_pairs[qp_id]); + struct zsda_crypto_dev_private *crypto_dev_priv = dev->data->dev_private; + struct zsda_pci_device *zsda_pci_dev = crypto_dev_priv->zsda_pci_dev; + uint32_t nb_des = qp_conf->nb_descriptors; + struct task_queue_info task_q_info; + + nb_des = (nb_des == NB_DES) ? nb_des : NB_DES; + + if (*qp_addr != NULL) { + ret = zsda_qp_release(dev, qp_id); + if (ret) + return ret; + } + + qp_new = rte_zmalloc_socket("zsda PMD qp metadata", sizeof(*qp_new), + RTE_CACHE_LINE_SIZE, socket_id); + if (qp_new == NULL) { + ZSDA_LOG(ERR, "Failed to alloc mem for qp struct"); + return -ENOMEM; + } + + task_q_info.nb_des = nb_des; + task_q_info.socket_id = socket_id; + task_q_info.qp_id = qp_id; + task_q_info.rx_cb = NULL; + + task_q_info.type = ZSDA_SERVICE_CRYPRO_ENCRY; + task_q_info.service_str = "encry"; + task_q_info.tx_cb = NULL; + task_q_info.match = NULL; + ret = zsda_task_queue_setup(zsda_pci_dev, qp_new, &task_q_info); + + task_q_info.type = ZSDA_SERVICE_CRYPTO_DECRY; + task_q_info.service_str = "decry"; + task_q_info.tx_cb = NULL; + task_q_info.match = NULL; + ret |= zsda_task_queue_setup(zsda_pci_dev, qp_new, &task_q_info); + + task_q_info.type = ZSDA_SERVICE_HASH_ENCODE; + task_q_info.service_str = "hash"; + task_q_info.tx_cb = NULL; + task_q_info.match = NULL; + ret |= zsda_task_queue_setup(zsda_pci_dev, qp_new, &task_q_info); + + if (ret) { + ZSDA_LOG(ERR, "zsda_task_queue_setup crypto is failed!"); + rte_free(qp_new); + return ret; + } + + *qp_addr = qp_new; + + return ret; +} + static struct rte_cryptodev_ops crypto_zsda_ops = { .dev_configure = zsda_dev_config, .dev_start = zsda_dev_start, @@ -107,8 +181,8 @@ static struct rte_cryptodev_ops crypto_zsda_ops = { .stats_get = zsda_crypto_stats_get, .stats_reset = zsda_crypto_stats_reset, - .queue_pair_setup = NULL, - .queue_pair_release = NULL, + .queue_pair_setup = zsda_qp_setup, + .queue_pair_release = zsda_qp_release, .sym_session_get_size = NULL, .sym_session_configure = NULL, From patchwork Fri May 16 07:27:47 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Hanxiao Li X-Patchwork-Id: 153474 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 98B3446760; Fri, 16 May 2025 09:31:50 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1A26D402CC; Fri, 16 May 2025 09:31:32 +0200 (CEST) Received: from mxct.zte.com.cn (mxct.zte.com.cn [183.62.165.209]) by mails.dpdk.org (Postfix) with ESMTP id 5EBCE402DF for ; Fri, 16 May 2025 09:31:30 +0200 (CEST) Received: from mse-fl2.zte.com.cn (unknown [10.5.228.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mxct.zte.com.cn (FangMail) with ESMTPS id 4ZzJfk0QSFz51SZ0 for ; Fri, 16 May 2025 15:31:26 +0800 (CST) Received: from szxl2zmapp07.zte.com.cn ([10.1.32.52]) by mse-fl2.zte.com.cn with SMTP id 54G7VDuB056319 for ; Fri, 16 May 2025 15:31:13 +0800 (+08) (envelope-from li.hanxiao@zte.com.cn) Received: from localhost.localdomain (unknown [192.168.6.15]) by smtp (Zmail) with SMTP; Fri, 16 May 2025 15:31:15 +0800 X-Zmail-TransId: 3e816826e9c3004-de5ac From: Hanxiao Li To: dev@dpdk.org Cc: Hanxiao Li Subject: [PATCH v4 5/9] crypto/zsda: add session configuration Date: Fri, 16 May 2025 15:27:47 +0800 Message-ID: <20250516072752.1971299-6-li.hanxiao@zte.com.cn> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250516072752.1971299-1-li.hanxiao@zte.com.cn> References: <20250515101927.1926502-2-li.hanxiao@zte.com.cn> <20250516072752.1971299-1-li.hanxiao@zte.com.cn> MIME-Version: 1.0 X-MAIL: mse-fl2.zte.com.cn 54G7VDuB056319 X-Fangmail-Anti-Spam-Filtered: true X-Fangmail-MID-QID: 6826E9CE.000/4ZzJfk0QSFz51SZ0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add crypto session configuration for zsda device. Signed-off-by: Hanxiao Li --- drivers/common/zsda/meson.build | 2 +- drivers/crypto/zsda/zsda_crypto_pmd.c | 45 +- drivers/crypto/zsda/zsda_crypto_session.c | 498 ++++++++++++++++++++++ drivers/crypto/zsda/zsda_crypto_session.h | 81 ++++ 4 files changed, 622 insertions(+), 4 deletions(-) create mode 100644 drivers/crypto/zsda/zsda_crypto_session.c create mode 100644 drivers/crypto/zsda/zsda_crypto_session.h -- 2.27.0 diff --git a/drivers/common/zsda/meson.build b/drivers/common/zsda/meson.build index e897c3a931..f2d1e29c7a 100644 --- a/drivers/common/zsda/meson.build +++ b/drivers/common/zsda/meson.build @@ -30,7 +30,7 @@ zsda_crypto_path = 'crypto/zsda' zsda_crypto_relpath = '../../' + zsda_crypto_path includes += include_directories(zsda_crypto_relpath) if zsda_crypto - foreach f: ['zsda_crypto_pmd.c'] + foreach f: ['zsda_crypto_pmd.c', 'zsda_crypto_session.c'] sources += files(join_paths(zsda_crypto_relpath, f)) endforeach endif diff --git a/drivers/crypto/zsda/zsda_crypto_pmd.c b/drivers/crypto/zsda/zsda_crypto_pmd.c index 60c0df3a44..beb7a0b16c 100644 --- a/drivers/crypto/zsda/zsda_crypto_pmd.c +++ b/drivers/crypto/zsda/zsda_crypto_pmd.c @@ -5,6 +5,7 @@ #include #include "zsda_crypto_pmd.h" +#include "zsda_crypto_session.h" uint8_t zsda_crypto_driver_id; @@ -172,6 +173,44 @@ zsda_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id, return ret; } +static unsigned int +zsda_sym_session_private_size_get(struct rte_cryptodev *dev __rte_unused) +{ + return RTE_ALIGN_CEIL(sizeof(struct zsda_sym_session), 8); +} + +static int +zsda_sym_session_configure(struct rte_cryptodev *dev __rte_unused, + struct rte_crypto_sym_xform *xform, + struct rte_cryptodev_sym_session *sess) +{ + void *sess_private_data; + int ret; + + if (unlikely(sess == NULL)) { + ZSDA_LOG(ERR, "Invalid session struct"); + return -EINVAL; + } + + sess_private_data = CRYPTODEV_GET_SYM_SESS_PRIV(sess); + + ret = zsda_crypto_session_parameters_set( + sess_private_data, xform); + + if (ret != ZSDA_SUCCESS) + ZSDA_LOG(ERR, "Failed configure session parameters"); + + return ret; +} + +static void +zsda_sym_session_clear(struct rte_cryptodev *dev __rte_unused, + struct rte_cryptodev_sym_session *sess) +{ + struct zsda_sym_session *sess_priv = CRYPTODEV_GET_SYM_SESS_PRIV(sess); + memset(sess_priv, 0, sizeof(struct zsda_sym_session)); +} + static struct rte_cryptodev_ops crypto_zsda_ops = { .dev_configure = zsda_dev_config, .dev_start = zsda_dev_start, @@ -184,9 +223,9 @@ static struct rte_cryptodev_ops crypto_zsda_ops = { .queue_pair_setup = zsda_qp_setup, .queue_pair_release = zsda_qp_release, - .sym_session_get_size = NULL, - .sym_session_configure = NULL, - .sym_session_clear = NULL, + .sym_session_get_size = zsda_sym_session_private_size_get, + .sym_session_configure = zsda_sym_session_configure, + .sym_session_clear = zsda_sym_session_clear, }; static const char zsda_crypto_drv_name[] = RTE_STR(CRYPTODEV_NAME_ZSDA_PMD); diff --git a/drivers/crypto/zsda/zsda_crypto_session.c b/drivers/crypto/zsda/zsda_crypto_session.c new file mode 100644 index 0000000000..5087ae248a --- /dev/null +++ b/drivers/crypto/zsda/zsda_crypto_session.c @@ -0,0 +1,498 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2025 ZTE Corporation + */ + +#include "cryptodev_pmd.h" +#include "rte_byteorder.h" + +#include "zsda_crypto_pmd.h" +#include "zsda_crypto_session.h" + +/**************** AES KEY EXPANSION ****************/ +/** + * AES S-boxes + * Sbox table: 8bits input convert to 8bits output + **/ +static const unsigned char aes_sbox[256] = { + /* 0 1 2 3 4 5 6 7 8 9 A B + * C D E F + */ + 0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, 0x30, 0x01, 0x67, 0x2b, + 0xfe, 0xd7, 0xab, 0x76, 0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0, + 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0, 0xb7, 0xfd, 0x93, 0x26, + 0x36, 0x3f, 0xf7, 0xcc, 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15, + 0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, 0x07, 0x12, 0x80, 0xe2, + 0xeb, 0x27, 0xb2, 0x75, 0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0, + 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84, 0x53, 0xd1, 0x00, 0xed, + 0x20, 0xfc, 0xb1, 0x5b, 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf, + 0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, 0x45, 0xf9, 0x02, 0x7f, + 0x50, 0x3c, 0x9f, 0xa8, 0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5, + 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2, 0xcd, 0x0c, 0x13, 0xec, + 0x5f, 0x97, 0x44, 0x17, 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73, + 0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, 0x46, 0xee, 0xb8, 0x14, + 0xde, 0x5e, 0x0b, 0xdb, 0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c, + 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79, 0xe7, 0xc8, 0x37, 0x6d, + 0x8d, 0xd5, 0x4e, 0xa9, 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08, + 0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, 0xe8, 0xdd, 0x74, 0x1f, + 0x4b, 0xbd, 0x8b, 0x8a, 0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e, + 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e, 0xe1, 0xf8, 0x98, 0x11, + 0x69, 0xd9, 0x8e, 0x94, 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf, + 0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, 0x41, 0x99, 0x2d, 0x0f, + 0xb0, 0x54, 0xbb, 0x16}; + +/** + * The round constant word array, rcon[i] + * + * From Wikipedia's article on the Rijndael key schedule @ + * https://en.wikipedia.org/wiki/Rijndael_key_schedule#rcon "Only the first some + * of these constants are actually used – up to rcon[10] for AES-128 (as 11 + * round keys are needed), up to rcon[8] for AES-192, up to rcon[7] for AES-256. + * rcon[0] is not used in AES algorithm." + */ +static const unsigned char rcon[11] = {0x8d, 0x01, 0x02, 0x04, 0x08, 0x10, + 0x20, 0x40, 0x80, 0x1b, 0x36}; + +#define GET_AES_SBOX_VAL(num) (aes_sbox[(num)]) + +/** + *rotate shift left marco definition + * + **/ +#define SHL(x, n) (((x)&0xFFFFFFFF) << n) +#define ROTL(x, n) (SHL((x), n) | ((x) >> (32 - n))) + +/** + * SM4 S-boxes + * Sbox table: 8bits input convert to 8 bitg288s output + **/ +static unsigned char sm4_sbox[16][16] = { + {0xd6, 0x90, 0xe9, 0xfe, 0xcc, 0xe1, 0x3d, 0xb7, 0x16, 0xb6, 0x14, 0xc2, + 0x28, 0xfb, 0x2c, 0x05}, + {0x2b, 0x67, 0x9a, 0x76, 0x2a, 0xbe, 0x04, 0xc3, 0xaa, 0x44, 0x13, 0x26, + 0x49, 0x86, 0x06, 0x99}, + {0x9c, 0x42, 0x50, 0xf4, 0x91, 0xef, 0x98, 0x7a, 0x33, 0x54, 0x0b, 0x43, + 0xed, 0xcf, 0xac, 0x62}, + {0xe4, 0xb3, 0x1c, 0xa9, 0xc9, 0x08, 0xe8, 0x95, 0x80, 0xdf, 0x94, 0xfa, + 0x75, 0x8f, 0x3f, 0xa6}, + {0x47, 0x07, 0xa7, 0xfc, 0xf3, 0x73, 0x17, 0xba, 0x83, 0x59, 0x3c, 0x19, + 0xe6, 0x85, 0x4f, 0xa8}, + {0x68, 0x6b, 0x81, 0xb2, 0x71, 0x64, 0xda, 0x8b, 0xf8, 0xeb, 0x0f, 0x4b, + 0x70, 0x56, 0x9d, 0x35}, + {0x1e, 0x24, 0x0e, 0x5e, 0x63, 0x58, 0xd1, 0xa2, 0x25, 0x22, 0x7c, 0x3b, + 0x01, 0x21, 0x78, 0x87}, + {0xd4, 0x00, 0x46, 0x57, 0x9f, 0xd3, 0x27, 0x52, 0x4c, 0x36, 0x02, 0xe7, + 0xa0, 0xc4, 0xc8, 0x9e}, + {0xea, 0xbf, 0x8a, 0xd2, 0x40, 0xc7, 0x38, 0xb5, 0xa3, 0xf7, 0xf2, 0xce, + 0xf9, 0x61, 0x15, 0xa1}, + {0xe0, 0xae, 0x5d, 0xa4, 0x9b, 0x34, 0x1a, 0x55, 0xad, 0x93, 0x32, 0x30, + 0xf5, 0x8c, 0xb1, 0xe3}, + {0x1d, 0xf6, 0xe2, 0x2e, 0x82, 0x66, 0xca, 0x60, 0xc0, 0x29, 0x23, 0xab, + 0x0d, 0x53, 0x4e, 0x6f}, + {0xd5, 0xdb, 0x37, 0x45, 0xde, 0xfd, 0x8e, 0x2f, 0x03, 0xff, 0x6a, 0x72, + 0x6d, 0x6c, 0x5b, 0x51}, + {0x8d, 0x1b, 0xaf, 0x92, 0xbb, 0xdd, 0xbc, 0x7f, 0x11, 0xd9, 0x5c, 0x41, + 0x1f, 0x10, 0x5a, 0xd8}, + {0x0a, 0xc1, 0x31, 0x88, 0xa5, 0xcd, 0x7b, 0xbd, 0x2d, 0x74, 0xd0, 0x12, + 0xb8, 0xe5, 0xb4, 0xb0}, + {0x89, 0x69, 0x97, 0x4a, 0x0c, 0x96, 0x77, 0x7e, 0x65, 0xb9, 0xf1, 0x09, + 0xc5, 0x6e, 0xc6, 0x84}, + {0x18, 0xf0, 0x7d, 0xec, 0x3a, 0xdc, 0x4d, 0x20, 0x79, 0xee, 0x5f, 0x3e, + 0xd7, 0xcb, 0x39, 0x48}, +}; + +/* System parameter */ +static const unsigned int fk[4] = {0xa3b1bac6, 0x56aa3350, 0x677d9197, + 0xb27022dc}; + +/* fixed parameter */ +static const unsigned int ck[32] = { + 0x00070e15, 0x1c232a31, 0x383f464d, 0x545b6269, 0x70777e85, 0x8c939aa1, + 0xa8afb6bd, 0xc4cbd2d9, 0xe0e7eef5, 0xfc030a11, 0x181f262d, 0x343b4249, + 0x50575e65, 0x6c737a81, 0x888f969d, 0xa4abb2b9, 0xc0c7ced5, 0xdce3eaf1, + 0xf8ff060d, 0x141b2229, 0x30373e45, 0x4c535a61, 0x686f767d, 0x848b9299, + 0xa0a7aeb5, 0xbcc3cad1, 0xd8dfe6ed, 0xf4fb0209, 0x10171e25, 0x2c333a41, + 0x484f565d, 0x646b7279}; + +/* + * private function: + * look up in SM4 S-boxes and get the related value. + * args: [in] inch: 0x00~0xFF (8 bits unsigned value). + */ +static unsigned char +sm4_sbox_cal(unsigned char inch) +{ + unsigned char *ptable = (unsigned char *)sm4_sbox; + unsigned char ret = (unsigned char)(ptable[inch]); + return ret; +} + +/* private function: + * Calculating round encryption key. + * args: [in] ka: ka is a 32 bits unsigned value; + * return: sk[i]: i{0,1,2,3,...31}. + */ +static unsigned int +sm4_cirk_cal(unsigned int ka) +{ + unsigned int bb = 0; + unsigned int rk = 0; + unsigned char a[4] = {0}; + unsigned char b[4]; + + uint32_t be_ka = rte_cpu_to_be_32(ka); + *(uint32_t *)&a[0] = be_ka; + b[0] = sm4_sbox_cal(a[0]); + b[1] = sm4_sbox_cal(a[1]); + b[2] = sm4_sbox_cal(a[2]); + b[3] = sm4_sbox_cal(a[3]); + bb = rte_be_to_cpu_32(*(uint32_t *)&b[0]); + rk = bb ^ (ROTL(bb, 13)) ^ (ROTL(bb, 23)); + return rk; +} + +static void +zsda_sm4_key_expansion(unsigned int sk[32], const uint8_t key[16]) +{ + unsigned int mk[4]; + unsigned int k[36]; + unsigned int i = 0; + + mk[0] = rte_be_to_cpu_32(*(const uint32_t *)&key[0]); + mk[1] = rte_be_to_cpu_32(*(const uint32_t *)&key[4]); + mk[2] = rte_be_to_cpu_32(*(const uint32_t *)&key[8]); + mk[3] = rte_be_to_cpu_32(*(const uint32_t *)&key[12]); + + k[0] = mk[0] ^ fk[0]; + k[1] = mk[1] ^ fk[1]; + k[2] = mk[2] ^ fk[2]; + k[3] = mk[3] ^ fk[3]; + for (; i < 32; i++) { + k[i + 4] = k[i] ^ + (sm4_cirk_cal(k[i + 1] ^ k[i + 2] ^ k[i + 3] ^ ck[i])); + sk[i] = k[i + 4]; + } +} + +static void +u32_to_u8(uint32_t *u_int32_t_data, uint8_t *u8_data) +{ + uint32_t be_data = rte_cpu_to_be_32(*u_int32_t_data); + + rte_memcpy(u8_data, &be_data, sizeof(be_data)); +} + +static void +zsda_aes_key_expansion(uint8_t *round_key, uint32_t round_num, + const uint8_t *key, uint32_t key_len) +{ + uint32_t i, j, k, nk, nr; + uint8_t tempa[4]; + + nk = key_len >> 2; + nr = round_num; + + /* The first round key is the key itself. */ + for (i = 0; i < nk; ++i) { + round_key[(i * 4) + 0] = key[(i * 4) + 0]; + + round_key[(i * 4) + 1] = key[(i * 4) + 1]; + + round_key[(i * 4) + 2] = key[(i * 4) + 2]; + round_key[(i * 4) + 3] = key[(i * 4) + 3]; + } + + /* All other round keys are found from the previous round keys. */ + for (i = nk; i < (4 * (nr + 1)); ++i) { + k = (i - 1) * 4; + tempa[0] = round_key[k + 0]; + tempa[1] = round_key[k + 1]; + tempa[2] = round_key[k + 2]; + tempa[3] = round_key[k + 3]; + + if ((nk != 0) && ((i % nk) == 0)) { + /* This function shifts the 4 bytes in a word to the + * left once. [a0,a1,a2,a3] becomes [a1,a2,a3,a0] + * Function RotWord() + */ + { + const uint8_t u8tmp = tempa[0]; + + tempa[0] = tempa[1]; + tempa[1] = tempa[2]; + tempa[2] = tempa[3]; + tempa[3] = u8tmp; + } + + /* SubWord() is a function that takes a four-byte input + * word and applies the S-box to each of the four bytes + * to produce an output word. Function Subword() + */ + { + tempa[0] = GET_AES_SBOX_VAL(tempa[0]); + tempa[1] = GET_AES_SBOX_VAL(tempa[1]); + tempa[2] = GET_AES_SBOX_VAL(tempa[2]); + tempa[3] = GET_AES_SBOX_VAL(tempa[3]); + } + + tempa[0] = tempa[0] ^ rcon[i / nk]; + } + + if (nk == 8) { + if ((i % nk) == 4) { + /* Function Subword() */ + { + tempa[0] = GET_AES_SBOX_VAL(tempa[0]); + tempa[1] = GET_AES_SBOX_VAL(tempa[1]); + tempa[2] = GET_AES_SBOX_VAL(tempa[2]); + tempa[3] = GET_AES_SBOX_VAL(tempa[3]); + } + } + } + + j = i * 4; + k = (i - nk) * 4; + round_key[j + 0] = round_key[k + 0] ^ tempa[0]; + round_key[j + 1] = round_key[k + 1] ^ tempa[1]; + round_key[j + 2] = round_key[k + 2] ^ tempa[2]; + round_key[j + 3] = round_key[k + 3] ^ tempa[3]; + } +} + +void +zsda_reverse_memcpy(uint8_t *dst, const uint8_t *src, size_t n) +{ + size_t i; + + for (i = 0; i < n; ++i) + dst[n - 1 - i] = src[i]; +} + +static void +zsda_decry_key_set(uint8_t key[64], const uint8_t *key1_ptr, uint8_t skey_len, + enum rte_crypto_cipher_algorithm algo) +{ + uint8_t round_num; + uint8_t dec_key1[ZSDA_AES_MAX_KEY_BYTE_LEN] = {0}; + uint8_t aes_round_key[ZSDA_AES_MAX_EXP_BYTE_SIZE] = {0}; + uint32_t sm4_round_key[ZSDA_SM4_MAX_EXP_DWORD_SIZE] = {0}; + + switch (algo) { + case RTE_CRYPTO_CIPHER_AES_XTS: + round_num = (skey_len == ZSDA_SYM_XTS_256_SKEY_LEN) + ? ZSDA_AES256_ROUND_NUM + : ZSDA_AES512_ROUND_NUM; + zsda_aes_key_expansion(aes_round_key, round_num, key1_ptr, + skey_len); + rte_memcpy(dec_key1, + ((uint8_t *)aes_round_key + (16 * round_num)), 16); + + if (skey_len == ZSDA_SYM_XTS_512_SKEY_LEN && + (16 * round_num) <= ZSDA_AES_MAX_EXP_BYTE_SIZE) { + for (int i = 0; i < 16; i++) { + dec_key1[i + 16] = + aes_round_key[(16 * (round_num - 1)) + i]; + } + } + break; + case RTE_CRYPTO_CIPHER_SM4_XTS: + zsda_sm4_key_expansion(sm4_round_key, key1_ptr); + for (size_t i = 0; i < 4; i++) + u32_to_u8((uint32_t *)sm4_round_key + + ZSDA_SM4_MAX_EXP_DWORD_SIZE - 1 - i, + dec_key1 + (4 * i)); + break; + default: + ZSDA_LOG(ERR, "unknown cipher algo!"); + return; + } + + if (skey_len == ZSDA_SYM_XTS_256_SKEY_LEN) { + zsda_reverse_memcpy((uint8_t *)key + ZSDA_SYM_XTS_256_KEY2_OFF, + key1_ptr + skey_len, skey_len); + zsda_reverse_memcpy((uint8_t *)key + ZSDA_SYM_XTS_256_KEY1_OFF, + dec_key1, skey_len); + } else { + zsda_reverse_memcpy(key, key1_ptr + skey_len, skey_len); + zsda_reverse_memcpy((uint8_t *)key + ZSDA_SYM_XTS_512_KEY1_OFF, + dec_key1, skey_len); + } +} + +static uint8_t +zsda_sym_lbads(uint32_t dataunit_len) +{ + uint8_t lbads; + + switch (dataunit_len) { + case ZSDA_AES_LBADS_512: + lbads = ZSDA_AES_LBADS_INDICATE_512; + break; + case ZSDA_AES_LBADS_4096: + lbads = ZSDA_AES_LBADS_INDICATE_4096; + break; + case ZSDA_AES_LBADS_8192: + lbads = ZSDA_AES_LBADS_INDICATE_8192; + break; + case ZSDA_AES_LBADS_0: + lbads = ZSDA_AES_LBADS_INDICATE_0; + break; + default: + ZSDA_LOG(ERR, "dataunit_len should be 0/512/4096/8192 - %d.", + dataunit_len); + lbads = ZSDA_AES_LBADS_INDICATE_INVALID; + break; + } + return lbads; +} + +static int +zsda_session_cipher_set(struct zsda_sym_session *sess, + struct rte_crypto_cipher_xform *cipher_xform) +{ + uint8_t skey_len = 0; + const uint8_t *key1_ptr = NULL; + + if (cipher_xform->key.length > ZSDA_CIPHER_KEY_MAX_LEN) { + ZSDA_LOG(ERR, "key length not supported"); + return -EINVAL; + } + + sess->chain_order = ZSDA_SYM_CHAIN_ONLY_CIPHER; + sess->cipher.iv.offset = cipher_xform->iv.offset; + sess->cipher.iv.length = cipher_xform->iv.length; + sess->cipher.op = cipher_xform->op; + sess->cipher.algo = cipher_xform->algo; + sess->cipher.dataunit_len = cipher_xform->dataunit_len; + sess->cipher.lbads = zsda_sym_lbads(cipher_xform->dataunit_len); + if (sess->cipher.lbads == 0xff) { + ZSDA_LOG(ERR, "dataunit_len wrong!"); + return -EINVAL; + } + + skey_len = (cipher_xform->key.length / 2) & 0xff; + + if (sess->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) { + sess->cipher.key_encry.length = cipher_xform->key.length; + if (skey_len == ZSDA_SYM_XTS_256_SKEY_LEN) { + zsda_reverse_memcpy((uint8_t *)sess->cipher.key_encry.data + + ZSDA_SYM_XTS_256_KEY2_OFF, + (cipher_xform->key.data + skey_len), + skey_len); + zsda_reverse_memcpy(((uint8_t *)sess->cipher.key_encry.data + + ZSDA_SYM_XTS_256_KEY1_OFF), + cipher_xform->key.data, skey_len); + } else + zsda_reverse_memcpy((uint8_t *)sess->cipher.key_encry.data, + cipher_xform->key.data, + cipher_xform->key.length); + } else if (sess->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT) { + sess->cipher.key_decry.length = cipher_xform->key.length; + key1_ptr = cipher_xform->key.data; + zsda_decry_key_set(sess->cipher.key_decry.data, key1_ptr, skey_len, + sess->cipher.algo); + } + + return ZSDA_SUCCESS; +} + +static int +zsda_session_auth_set(struct zsda_sym_session *sess, + struct rte_crypto_auth_xform *xform) +{ + sess->auth.op = xform->op; + sess->auth.algo = xform->algo; + sess->auth.digest_length = xform->digest_length; + + return ZSDA_SUCCESS; +} + +static struct rte_crypto_auth_xform * +zsda_auth_xform_get(struct rte_crypto_sym_xform *xform) +{ + do { + if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH) + return &xform->auth; + + xform = xform->next; + } while (xform); + + return NULL; +} + +static struct rte_crypto_cipher_xform * +zsda_cipher_xform_get(struct rte_crypto_sym_xform *xform) +{ + do { + if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER) + return &xform->cipher; + + xform = xform->next; + } while (xform); + + return NULL; +} + +/** Configure the session from a crypto xform chain */ +static enum zsda_sym_chain_order +zsda_crypto_chain_order_get(const struct rte_crypto_sym_xform *xform) +{ + enum zsda_sym_chain_order res = ZSDA_SYM_CHAIN_NOT_SUPPORTED; + + if (xform != NULL) { + if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH) { + if (xform->next == NULL) + res = ZSDA_SYM_CHAIN_ONLY_AUTH; + else if (xform->next->type == + RTE_CRYPTO_SYM_XFORM_CIPHER) + res = ZSDA_SYM_CHAIN_AUTH_CIPHER; + } + if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER) { + if (xform->next == NULL) + res = ZSDA_SYM_CHAIN_ONLY_CIPHER; + else if (xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) + res = ZSDA_SYM_CHAIN_CIPHER_AUTH; + } + } + + return res; +} + +/* Set session cipher parameters */ +int +zsda_crypto_session_parameters_set(void *sess_priv, + struct rte_crypto_sym_xform *xform) +{ + + struct zsda_sym_session *sess = sess_priv; + struct rte_crypto_cipher_xform *cipher_xform = + zsda_cipher_xform_get(xform); + struct rte_crypto_auth_xform *auth_xform = + zsda_auth_xform_get(xform); + + int ret = ZSDA_SUCCESS; + + sess->chain_order = zsda_crypto_chain_order_get(xform); + switch (sess->chain_order) { + case ZSDA_SYM_CHAIN_ONLY_CIPHER: + if (!cipher_xform) { + ZSDA_LOG(ERR, "Failed! cipher_xform is NULL"); + return -EINVAL; + } + ret = zsda_session_cipher_set(sess, cipher_xform); + break; + case ZSDA_SYM_CHAIN_ONLY_AUTH: + if (!auth_xform) { + ZSDA_LOG(ERR, "Failed! auth_xform is NULL"); + return -EINVAL; + } + ret = zsda_session_auth_set(sess, auth_xform); + break; + + default: + ZSDA_LOG(ERR, "Invalid chain order"); + ret = -EINVAL; + break; + } + + return ret; +} diff --git a/drivers/crypto/zsda/zsda_crypto_session.h b/drivers/crypto/zsda/zsda_crypto_session.h new file mode 100644 index 0000000000..2514af7d8b --- /dev/null +++ b/drivers/crypto/zsda/zsda_crypto_session.h @@ -0,0 +1,81 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2025 ZTE Corporation + */ + +#ifndef _ZSDA_CRYPTO_SESSION_H_ +#define _ZSDA_CRYPTO_SESSION_H_ + +#define ZSDA_SYM_XTS_IV_SLBA_OFF (8) +#define ZSDA_SYM_XTS_256_SKEY_LEN (16) +#define ZSDA_SYM_XTS_512_SKEY_LEN (32) +#define ZSDA_SYM_XTS_256_KEY2_OFF (16) +#define ZSDA_SYM_XTS_256_KEY1_OFF (48) +#define ZSDA_SYM_XTS_512_KEY1_OFF (32) +#define ZSDA_SYM_MIN_SRC_LEN_HASH (16) + +#define ZSDA_AES256_ROUND_NUM (10) +#define ZSDA_AES512_ROUND_NUM (14) +#define ZSDA_AES_MAX_EXP_BYTE_SIZE (240) +#define ZSDA_AES_MAX_KEY_BYTE_LEN (32) +#define ZSDA_SM4_MAX_EXP_DWORD_SIZE (32) + +#define ZSDA_AES_LBADS_0 (0) +#define ZSDA_AES_LBADS_512 (512) +#define ZSDA_AES_LBADS_4096 (4096) +#define ZSDA_AES_LBADS_8192 (8192) + +#define ZSDA_AES_LBADS_INDICATE_0 (0x0) +#define ZSDA_AES_LBADS_INDICATE_512 (0x9) +#define ZSDA_AES_LBADS_INDICATE_4096 (0xC) +#define ZSDA_AES_LBADS_INDICATE_8192 (0xD) +#define ZSDA_AES_LBADS_INDICATE_INVALID (0xff) + +enum zsda_sym_chain_order { + ZSDA_SYM_CHAIN_ONLY_CIPHER, + ZSDA_SYM_CHAIN_ONLY_AUTH, + ZSDA_SYM_CHAIN_CIPHER_AUTH, + ZSDA_SYM_CHAIN_AUTH_CIPHER, + ZSDA_SYM_CHAIN_NOT_SUPPORTED +}; + +struct zsda_sym_session { + enum zsda_sym_chain_order chain_order; + + /* Cipher Parameters */ + struct { + enum rte_crypto_cipher_operation op; + enum rte_crypto_cipher_algorithm algo; + struct { + uint8_t data[ZSDA_CIPHER_KEY_MAX_LEN]; + size_t length; + } key_encry; + struct { + uint8_t data[ZSDA_CIPHER_KEY_MAX_LEN]; + size_t length; + } key_decry; + struct { + uint32_t offset; + size_t length; + } iv; + + uint32_t dataunit_len; + uint8_t lbads; + } cipher; + + struct { + enum rte_crypto_auth_operation op; + /* Auth operation */ + enum rte_crypto_auth_algorithm algo; + /* Auth algorithm */ + uint16_t digest_length; + } auth; + + bool cipher_first; +}; + +void zsda_reverse_memcpy(uint8_t *dst, const uint8_t *src, size_t n); + +int zsda_crypto_session_parameters_set(void *sess_priv, + struct rte_crypto_sym_xform *xform); + +#endif /* _ZSDA_CRYPTO_SESSION_H_ */ From patchwork Fri May 16 07:27:48 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanxiao Li X-Patchwork-Id: 153478 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2075846760; Fri, 16 May 2025 09:32:26 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 199F240667; Fri, 16 May 2025 09:31:42 +0200 (CEST) Received: from mxhk.zte.com.cn (mxhk.zte.com.cn [63.216.63.35]) by mails.dpdk.org (Postfix) with ESMTP id 02E834064F for ; Fri, 16 May 2025 09:31:37 +0200 (CEST) Received: from mse-fl1.zte.com.cn (unknown [10.5.228.132]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mxhk.zte.com.cn (FangMail) with ESMTPS id 4ZzJfx0TBXz5B1J6 for ; Fri, 16 May 2025 15:31:37 +0800 (CST) Received: from szxlzmapp02.zte.com.cn ([10.5.231.79]) by mse-fl1.zte.com.cn with SMTP id 54G7VCHD006342 for ; Fri, 16 May 2025 15:31:12 +0800 (+08) (envelope-from li.hanxiao@zte.com.cn) Received: from localhost.localdomain (unknown [192.168.6.15]) by smtp (Zmail) with SMTP; Fri, 16 May 2025 15:31:15 +0800 X-Zmail-TransId: 3e816826e9c3004-de5af From: Hanxiao Li To: dev@dpdk.org Cc: Hanxiao Li Subject: [PATCH v4 6/9] crypto/zsda: add enqueue datapath Date: Fri, 16 May 2025 15:27:48 +0800 Message-ID: <20250516072752.1971299-7-li.hanxiao@zte.com.cn> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250516072752.1971299-1-li.hanxiao@zte.com.cn> References: <20250515101927.1926502-2-li.hanxiao@zte.com.cn> <20250516072752.1971299-1-li.hanxiao@zte.com.cn> MIME-Version: 1.0 X-MAIL: mse-fl1.zte.com.cn 54G7VCHD006342 X-Fangmail-Anti-Spam-Filtered: true X-Fangmail-MID-QID: 6826E9D9.000/4ZzJfx0TBXz5B1J6 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add crypto enqueue datapath configuration for zsda device. Signed-off-by: Hanxiao Li --- drivers/common/zsda/meson.build | 2 +- drivers/crypto/zsda/zsda_crypto.c | 256 ++++++++++++++++++++++++++ drivers/crypto/zsda/zsda_crypto.h | 45 +++++ drivers/crypto/zsda/zsda_crypto_pmd.c | 23 ++- 4 files changed, 318 insertions(+), 8 deletions(-) create mode 100644 drivers/crypto/zsda/zsda_crypto.c create mode 100644 drivers/crypto/zsda/zsda_crypto.h -- 2.27.0 diff --git a/drivers/common/zsda/meson.build b/drivers/common/zsda/meson.build index f2d1e29c7a..ac942b7bb9 100644 --- a/drivers/common/zsda/meson.build +++ b/drivers/common/zsda/meson.build @@ -30,7 +30,7 @@ zsda_crypto_path = 'crypto/zsda' zsda_crypto_relpath = '../../' + zsda_crypto_path includes += include_directories(zsda_crypto_relpath) if zsda_crypto - foreach f: ['zsda_crypto_pmd.c', 'zsda_crypto_session.c'] + foreach f: ['zsda_crypto_pmd.c', 'zsda_crypto_session.c', 'zsda_crypto.c'] sources += files(join_paths(zsda_crypto_relpath, f)) endforeach endif diff --git a/drivers/crypto/zsda/zsda_crypto.c b/drivers/crypto/zsda/zsda_crypto.c new file mode 100644 index 0000000000..66ae2a804e --- /dev/null +++ b/drivers/crypto/zsda/zsda_crypto.c @@ -0,0 +1,256 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2025 ZTE Corporation + */ + +#include "zsda_crypto.h" + +#define choose_dst_mbuf(mbuf_src, mbuf_dst) ((mbuf_dst) == NULL ? (mbuf_src) : (mbuf_dst)) +#define LBADS_MAX_REMAINDER (16 - 1) + +int +zsda_encry_match(const void *op_in) +{ + const struct rte_crypto_op *op = op_in; + struct rte_cryptodev_sym_session *session = op->sym->session; + struct zsda_sym_session *sess = + (struct zsda_sym_session *)session->driver_priv_data; + + if (sess->chain_order == ZSDA_SYM_CHAIN_ONLY_CIPHER && + sess->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) + return 1; + else + return 0; +} + +int +zsda_decry_match(const void *op_in) +{ + const struct rte_crypto_op *op = op_in; + struct rte_cryptodev_sym_session *session = op->sym->session; + struct zsda_sym_session *sess = + (struct zsda_sym_session *)session->driver_priv_data; + + if (sess->chain_order == ZSDA_SYM_CHAIN_ONLY_CIPHER && + sess->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT) + return 1; + else + return 0; +} + +int +zsda_hash_match(const void *op_in) +{ + const struct rte_crypto_op *op = op_in; + struct rte_cryptodev_sym_session *session = op->sym->session; + struct zsda_sym_session *sess = + (struct zsda_sym_session *)session->driver_priv_data; + + if (sess->chain_order == ZSDA_SYM_CHAIN_ONLY_AUTH) + return 1; + else + return 0; +} + +static uint8_t +zsda_opcode_hash_get(struct zsda_sym_session *sess) +{ + switch (sess->auth.algo) { + case RTE_CRYPTO_AUTH_SHA1: + return ZSDA_OPC_HASH_SHA1; + + case RTE_CRYPTO_AUTH_SHA224: + return ZSDA_OPC_HASH_SHA2_224; + + case RTE_CRYPTO_AUTH_SHA256: + return ZSDA_OPC_HASH_SHA2_256; + + case RTE_CRYPTO_AUTH_SHA384: + return ZSDA_OPC_HASH_SHA2_384; + + case RTE_CRYPTO_AUTH_SHA512: + return ZSDA_OPC_HASH_SHA2_512; + + case RTE_CRYPTO_AUTH_SM3: + return ZSDA_OPC_HASH_SM3; + default: + break; + } + + return ZSDA_OPC_INVALID; +} + +static uint8_t +zsda_opcode_crypto_get(struct zsda_sym_session *sess) +{ + if (sess->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) { + if (sess->cipher.algo == RTE_CRYPTO_CIPHER_AES_XTS && + sess->cipher.key_encry.length == 32) + return ZSDA_OPC_EC_AES_XTS_256; + else if (sess->cipher.algo == RTE_CRYPTO_CIPHER_AES_XTS && + sess->cipher.key_encry.length == 64) + return ZSDA_OPC_EC_AES_XTS_512; + else if (sess->cipher.algo == RTE_CRYPTO_CIPHER_SM4_XTS) + return ZSDA_OPC_EC_SM4_XTS_256; + } else if (sess->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT) { + if (sess->cipher.algo == RTE_CRYPTO_CIPHER_AES_XTS && + sess->cipher.key_decry.length == 32) + return ZSDA_OPC_DC_AES_XTS_256; + else if (sess->cipher.algo == RTE_CRYPTO_CIPHER_AES_XTS && + sess->cipher.key_decry.length == 64) + return ZSDA_OPC_DC_AES_XTS_512; + else if (sess->cipher.algo == RTE_CRYPTO_CIPHER_SM4_XTS) + return ZSDA_OPC_DC_SM4_XTS_256; + } + return ZSDA_OPC_INVALID; +} + +static int +zsda_len_lbads_chk(uint32_t data_len, uint32_t lbads_size) +{ + if (data_len < 16) { + ZSDA_LOG(ERR, "data_len wrong data_len 0x%x!", data_len); + return ZSDA_FAILED; + } + if (lbads_size != 0) { + if (!(((data_len % lbads_size) == 0) || + ((data_len % lbads_size) > LBADS_MAX_REMAINDER))) { + ZSDA_LOG(ERR, "data_len wrong! data_len 0x%x - %d", + data_len, data_len % lbads_size); + return ZSDA_FAILED; + } + } + + return ZSDA_SUCCESS; +} + +int +zsda_cipher_wqe_build(void *op_in, const struct zsda_queue *queue, + void **op_cookies, const uint16_t new_tail) +{ + struct rte_crypto_op *op = op_in; + + struct rte_cryptodev_sym_session *session = op->sym->session; + struct zsda_sym_session *sess = + (struct zsda_sym_session *)session->driver_priv_data; + + struct zsda_wqe_crpt *wqe = + (struct zsda_wqe_crpt *)(queue->base_addr + + (new_tail * queue->msg_size)); + struct zsda_op_cookie *cookie = op_cookies[new_tail]; + struct zsda_sgl *sgl_src = (struct zsda_sgl *)&cookie->sgl_src; + struct zsda_sgl *sgl_dst = (struct zsda_sgl *)&cookie->sgl_dst; + struct rte_mbuf *mbuf; + + int ret; + uint32_t op_offset; + uint32_t op_src_len; + uint32_t op_dst_len; + const uint8_t *iv_addr = NULL; + uint8_t iv_len = 0; + + ret = zsda_len_lbads_chk(op->sym->cipher.data.length, + sess->cipher.dataunit_len); + if (ret) { + ZSDA_LOG(ERR, "data_len 0x%x", op->sym->cipher.data.length); + return ZSDA_FAILED; + } + + op_offset = op->sym->cipher.data.offset; + op_src_len = op->sym->cipher.data.length; + mbuf = op->sym->m_src; + ret = zsda_sgl_fill(mbuf, op_offset, sgl_src, cookie->sgl_src_phys_addr, + op_src_len, NULL); + + mbuf = choose_dst_mbuf(op->sym->m_src, op->sym->m_dst); + op_dst_len = mbuf->pkt_len - op_offset; + ret |= zsda_sgl_fill(mbuf, op_offset, sgl_dst, + cookie->sgl_dst_phys_addr, op_dst_len, NULL); + + if (ret) { + ZSDA_LOG(ERR, "Failed! zsda_sgl_fill"); + return ret; + } + + cookie->used = true; + cookie->sid = new_tail; + cookie->op = op; + + memset(wqe, 0, sizeof(struct zsda_wqe_crpt)); + wqe->rx_length = op_src_len; + wqe->tx_length = op_dst_len; + wqe->valid = queue->valid; + wqe->op_code = zsda_opcode_crypto_get(sess); + wqe->sid = cookie->sid; + wqe->rx_sgl_type = WQE_ELM_TYPE_LIST; + wqe->tx_sgl_type = WQE_ELM_TYPE_LIST; + wqe->rx_addr = cookie->sgl_src_phys_addr; + wqe->tx_addr = cookie->sgl_dst_phys_addr; + wqe->cfg.lbads = sess->cipher.lbads; + + if (sess->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) + memcpy((uint8_t *)wqe->cfg.key, sess->cipher.key_encry.data, + ZSDA_CIPHER_KEY_MAX_LEN); + else + memcpy((uint8_t *)wqe->cfg.key, sess->cipher.key_decry.data, + ZSDA_CIPHER_KEY_MAX_LEN); + + iv_addr = (const uint8_t *)rte_crypto_op_ctod_offset( + op, char *, sess->cipher.iv.offset); + iv_len = sess->cipher.iv.length; + zsda_reverse_memcpy((uint8_t *)wqe->cfg.slba_H, iv_addr, iv_len / 2); + zsda_reverse_memcpy((uint8_t *)wqe->cfg.slba_L, iv_addr + 8, iv_len / 2); + + return ret; +} + +int +zsda_hash_wqe_build(void *op_in, const struct zsda_queue *queue, + void **op_cookies, const uint16_t new_tail) +{ + struct rte_crypto_op *op = op_in; + + struct rte_cryptodev_sym_session *session = op->sym->session; + struct zsda_sym_session *sess = + (struct zsda_sym_session *)session->driver_priv_data; + + struct zsda_wqe_crpt *wqe = + (struct zsda_wqe_crpt *)(queue->base_addr + + (new_tail * queue->msg_size)); + struct zsda_op_cookie *cookie = op_cookies[new_tail]; + struct zsda_sgl *sgl_src = &cookie->sgl_src; + uint8_t opcode; + uint32_t op_offset; + uint32_t op_src_len; + int ret; + + opcode = zsda_opcode_hash_get(sess); + if (opcode == ZSDA_OPC_INVALID) { + ZSDA_LOG(ERR, "Failed! zsda_opcode_hash_get"); + return ZSDA_FAILED; + } + + op_offset = op->sym->auth.data.offset; + op_src_len = op->sym->auth.data.length; + ret = zsda_sgl_fill(op->sym->m_src, op_offset, sgl_src, + cookie->sgl_src_phys_addr, op_src_len, NULL); + if (ret) { + ZSDA_LOG(ERR, "Failed! zsda_sgl_fill"); + return ret; + } + + memset(wqe, 0, sizeof(struct zsda_wqe_crpt)); + cookie->used = true; + cookie->sid = new_tail; + cookie->op = op; + wqe->valid = queue->valid; + wqe->op_code = opcode; + wqe->sid = cookie->sid; + wqe->rx_sgl_type = WQE_ELM_TYPE_LIST; + wqe->tx_sgl_type = WQE_ELM_TYPE_PHYS_ADDR; + wqe->rx_addr = cookie->sgl_src_phys_addr; + wqe->tx_addr = op->sym->auth.digest.phys_addr; + wqe->rx_length = op->sym->auth.data.length; + wqe->tx_length = sess->auth.digest_length; + + return ret; +} diff --git a/drivers/crypto/zsda/zsda_crypto.h b/drivers/crypto/zsda/zsda_crypto.h new file mode 100644 index 0000000000..09cc5ce755 --- /dev/null +++ b/drivers/crypto/zsda/zsda_crypto.h @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2025 ZTE Corporation + */ + +#ifndef _ZSDA_CRYPTO_H_ +#define _ZSDA_CRYPTO_H_ + +#include "zsda_crypto_pmd.h" +#include "zsda_crypto_session.h" + +struct __rte_packed_begin crypto_cfg { + uint8_t slba_L[8]; + uint8_t key[ZSDA_CIPHER_KEY_MAX_LEN]; + uint8_t lbads : 4; + uint8_t resv1 : 4; + uint8_t resv2[7]; + uint8_t slba_H[8]; + uint8_t resv3[8]; +} __rte_packed_end; + +struct __rte_packed_begin zsda_wqe_crpt { + uint8_t valid; + uint8_t op_code; + uint16_t sid; + uint8_t resv[3]; + uint8_t rx_sgl_type : 4; + uint8_t tx_sgl_type : 4; + uint64_t rx_addr; + uint32_t rx_length; + uint64_t tx_addr; + uint32_t tx_length; + struct crypto_cfg cfg; +} __rte_packed_end; + +int zsda_encry_match(const void *op_in); +int zsda_decry_match(const void *op_in); +int zsda_hash_match(const void *op_in); + +int zsda_cipher_wqe_build(void *op_in, const struct zsda_queue *queue, + void **op_cookies, const uint16_t new_tail); + +int zsda_hash_wqe_build(void *op_in, const struct zsda_queue *queue, + void **op_cookies, const uint16_t new_tail); + +#endif /* _ZSDA_CRYPTO_H_ */ diff --git a/drivers/crypto/zsda/zsda_crypto_pmd.c b/drivers/crypto/zsda/zsda_crypto_pmd.c index beb7a0b16c..af5192d1cd 100644 --- a/drivers/crypto/zsda/zsda_crypto_pmd.c +++ b/drivers/crypto/zsda/zsda_crypto_pmd.c @@ -6,6 +6,7 @@ #include "zsda_crypto_pmd.h" #include "zsda_crypto_session.h" +#include "zsda_crypto.h" uint8_t zsda_crypto_driver_id; @@ -146,20 +147,20 @@ zsda_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id, task_q_info.type = ZSDA_SERVICE_CRYPRO_ENCRY; task_q_info.service_str = "encry"; - task_q_info.tx_cb = NULL; - task_q_info.match = NULL; + task_q_info.tx_cb = zsda_cipher_wqe_build; + task_q_info.match = zsda_encry_match; ret = zsda_task_queue_setup(zsda_pci_dev, qp_new, &task_q_info); task_q_info.type = ZSDA_SERVICE_CRYPTO_DECRY; task_q_info.service_str = "decry"; - task_q_info.tx_cb = NULL; - task_q_info.match = NULL; + task_q_info.tx_cb = zsda_cipher_wqe_build; + task_q_info.match = zsda_decry_match; ret |= zsda_task_queue_setup(zsda_pci_dev, qp_new, &task_q_info); task_q_info.type = ZSDA_SERVICE_HASH_ENCODE; task_q_info.service_str = "hash"; - task_q_info.tx_cb = NULL; - task_q_info.match = NULL; + task_q_info.tx_cb = zsda_hash_wqe_build; + task_q_info.match = zsda_hash_match; ret |= zsda_task_queue_setup(zsda_pci_dev, qp_new, &task_q_info); if (ret) { @@ -234,6 +235,14 @@ static const struct rte_driver cryptodev_zsda_crypto_driver = { .alias = zsda_crypto_drv_name }; +static uint16_t +zsda_crypto_enqueue_op_burst(void *qp, struct rte_crypto_op **ops, + uint16_t nb_ops) +{ + return zsda_enqueue_burst((struct zsda_qp *)qp, (void **)ops, + nb_ops); +} + int zsda_crypto_dev_create(struct zsda_pci_device *zsda_pci_dev) { @@ -273,7 +282,7 @@ zsda_crypto_dev_create(struct zsda_pci_device *zsda_pci_dev) cryptodev->dev_ops = &crypto_zsda_ops; - cryptodev->enqueue_burst = NULL; + cryptodev->enqueue_burst = zsda_crypto_enqueue_op_burst; cryptodev->dequeue_burst = NULL; cryptodev->feature_flags = 0; From patchwork Fri May 16 07:27:49 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanxiao Li X-Patchwork-Id: 153473 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 580AE46760; Fri, 16 May 2025 09:31:43 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D621A40430; Fri, 16 May 2025 09:31:30 +0200 (CEST) Received: from mxhk.zte.com.cn (mxhk.zte.com.cn [63.216.63.40]) by mails.dpdk.org (Postfix) with ESMTP id E2C8F402B3 for ; Fri, 16 May 2025 09:31:28 +0200 (CEST) Received: from mse-fl2.zte.com.cn (unknown [10.5.228.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mxhk.zte.com.cn (FangMail) with ESMTPS id 4ZzJfj09Rcz8R041 for ; Fri, 16 May 2025 15:31:25 +0800 (CST) Received: from szxlzmapp01.zte.com.cn ([10.5.231.85]) by mse-fl2.zte.com.cn with SMTP id 54G7VDek056324 for ; Fri, 16 May 2025 15:31:13 +0800 (+08) (envelope-from li.hanxiao@zte.com.cn) Received: from localhost.localdomain (unknown [192.168.6.15]) by smtp (Zmail) with SMTP; Fri, 16 May 2025 15:31:15 +0800 X-Zmail-TransId: 3e816826e9c3004-de5b2 From: Hanxiao Li To: dev@dpdk.org Cc: Hanxiao Li Subject: [PATCH v4 7/9] crypto/zsda: add dequeue datapath Date: Fri, 16 May 2025 15:27:49 +0800 Message-ID: <20250516072752.1971299-8-li.hanxiao@zte.com.cn> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250516072752.1971299-1-li.hanxiao@zte.com.cn> References: <20250515101927.1926502-2-li.hanxiao@zte.com.cn> <20250516072752.1971299-1-li.hanxiao@zte.com.cn> MIME-Version: 1.0 X-MAIL: mse-fl2.zte.com.cn 54G7VDek056324 X-Fangmail-Anti-Spam-Filtered: true X-Fangmail-MID-QID: 6826E9CD.000/4ZzJfj09Rcz8R041 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add crypto dequeue datapath configuration for zsda device. Signed-off-by: Hanxiao Li --- drivers/crypto/zsda/zsda_crypto.c | 16 ++++++++++++++++ drivers/crypto/zsda/zsda_crypto.h | 2 ++ drivers/crypto/zsda/zsda_crypto_pmd.c | 12 ++++++++++-- 3 files changed, 28 insertions(+), 2 deletions(-) -- 2.27.0 diff --git a/drivers/crypto/zsda/zsda_crypto.c b/drivers/crypto/zsda/zsda_crypto.c index 66ae2a804e..58fdde8ec8 100644 --- a/drivers/crypto/zsda/zsda_crypto.c +++ b/drivers/crypto/zsda/zsda_crypto.c @@ -254,3 +254,19 @@ zsda_hash_wqe_build(void *op_in, const struct zsda_queue *queue, return ret; } + +int +zsda_crypto_callback(void *cookie_in, struct zsda_cqe *cqe) +{ + struct zsda_op_cookie *tmp_cookie = cookie_in; + struct rte_crypto_op *op = tmp_cookie->op; + + if (!(CQE_ERR0(cqe->err0) || CQE_ERR1(cqe->err1))) + op->status = RTE_CRYPTO_OP_STATUS_SUCCESS; + else { + op->status = RTE_CRYPTO_OP_STATUS_ERROR; + return ZSDA_FAILED; + } + + return ZSDA_SUCCESS; +} diff --git a/drivers/crypto/zsda/zsda_crypto.h b/drivers/crypto/zsda/zsda_crypto.h index 09cc5ce755..3a8019d48f 100644 --- a/drivers/crypto/zsda/zsda_crypto.h +++ b/drivers/crypto/zsda/zsda_crypto.h @@ -42,4 +42,6 @@ int zsda_cipher_wqe_build(void *op_in, const struct zsda_queue *queue, int zsda_hash_wqe_build(void *op_in, const struct zsda_queue *queue, void **op_cookies, const uint16_t new_tail); +int zsda_crypto_callback(void *cookie_in, struct zsda_cqe *cqe); + #endif /* _ZSDA_CRYPTO_H_ */ diff --git a/drivers/crypto/zsda/zsda_crypto_pmd.c b/drivers/crypto/zsda/zsda_crypto_pmd.c index af5192d1cd..e2b22a881b 100644 --- a/drivers/crypto/zsda/zsda_crypto_pmd.c +++ b/drivers/crypto/zsda/zsda_crypto_pmd.c @@ -143,7 +143,7 @@ zsda_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id, task_q_info.nb_des = nb_des; task_q_info.socket_id = socket_id; task_q_info.qp_id = qp_id; - task_q_info.rx_cb = NULL; + task_q_info.rx_cb = zsda_crypto_callback; task_q_info.type = ZSDA_SERVICE_CRYPRO_ENCRY; task_q_info.service_str = "encry"; @@ -243,6 +243,14 @@ zsda_crypto_enqueue_op_burst(void *qp, struct rte_crypto_op **ops, nb_ops); } +static uint16_t +zsda_crypto_dequeue_op_burst(void *qp, struct rte_crypto_op **ops, + uint16_t nb_ops) +{ + return zsda_dequeue_burst((struct zsda_qp *)qp, (void **)ops, + nb_ops); +} + int zsda_crypto_dev_create(struct zsda_pci_device *zsda_pci_dev) { @@ -283,7 +291,7 @@ zsda_crypto_dev_create(struct zsda_pci_device *zsda_pci_dev) cryptodev->dev_ops = &crypto_zsda_ops; cryptodev->enqueue_burst = zsda_crypto_enqueue_op_burst; - cryptodev->dequeue_burst = NULL; + cryptodev->dequeue_burst = zsda_crypto_dequeue_op_burst; cryptodev->feature_flags = 0; crypto_dev_priv = cryptodev->data->dev_private; From patchwork Fri May 16 07:27:50 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanxiao Li X-Patchwork-Id: 153475 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BCE4146760; Fri, 16 May 2025 09:32:00 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id AE44640648; Fri, 16 May 2025 09:31:37 +0200 (CEST) Received: from mxct.zte.com.cn (mxct.zte.com.cn [183.62.165.209]) by mails.dpdk.org (Postfix) with ESMTP id 1EE4940041 for ; Fri, 16 May 2025 09:31:34 +0200 (CEST) Received: from mse-fl2.zte.com.cn (unknown [10.5.228.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mxct.zte.com.cn (FangMail) with ESMTPS id 4ZzJfn1QPyz51STb for ; Fri, 16 May 2025 15:31:29 +0800 (CST) Received: from szxlzmapp04.zte.com.cn ([10.5.231.166]) by mse-fl2.zte.com.cn with SMTP id 54G7VD7d056325 for ; Fri, 16 May 2025 15:31:13 +0800 (+08) (envelope-from li.hanxiao@zte.com.cn) Received: from localhost.localdomain (unknown [192.168.6.15]) by smtp (Zmail) with SMTP; Fri, 16 May 2025 15:31:15 +0800 X-Zmail-TransId: 3e816826e9c3004-de5b4 From: Hanxiao Li To: dev@dpdk.org Cc: Hanxiao Li Subject: [PATCH v4 8/9] crypto/zsda: add capabilities Date: Fri, 16 May 2025 15:27:50 +0800 Message-ID: <20250516072752.1971299-9-li.hanxiao@zte.com.cn> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250516072752.1971299-1-li.hanxiao@zte.com.cn> References: <20250515101927.1926502-2-li.hanxiao@zte.com.cn> <20250516072752.1971299-1-li.hanxiao@zte.com.cn> MIME-Version: 1.0 X-MAIL: mse-fl2.zte.com.cn 54G7VD7d056325 X-Fangmail-Anti-Spam-Filtered: true X-Fangmail-MID-QID: 6826E9D1.001/4ZzJfn1QPyz51STb X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add crypto capabilities scope for zsda device. Signed-off-by: Hanxiao Li --- doc/guides/cryptodevs/features/zsda.ini | 51 ++++++++ doc/guides/cryptodevs/zsda.rst | 26 ++++ doc/guides/rel_notes/release_25_07.rst | 8 ++ .../crypto/zsda/zsda_crypto_capabilities.h | 111 ++++++++++++++++++ drivers/crypto/zsda/zsda_crypto_pmd.c | 29 ++++- 5 files changed, 224 insertions(+), 1 deletion(-) create mode 100644 doc/guides/cryptodevs/features/zsda.ini create mode 100644 drivers/crypto/zsda/zsda_crypto_capabilities.h -- 2.27.0 diff --git a/doc/guides/cryptodevs/features/zsda.ini b/doc/guides/cryptodevs/features/zsda.ini new file mode 100644 index 0000000000..b0f10f8de9 --- /dev/null +++ b/doc/guides/cryptodevs/features/zsda.ini @@ -0,0 +1,51 @@ +; +; Supported features of the 'zsda' crypto driver. +; +; Refer to default.ini for the full list of available PMD features. +; +[Features] +Symmetric crypto = Y +HW Accelerated = Y +In Place SGL = Y +OOP SGL In SGL Out = Y +OOP SGL In LB Out = Y +OOP LB In SGL Out = Y +OOP LB In LB Out = Y + +; +; Supported crypto algorithms of the 'zsda' crypto driver. +; +[Cipher] +AES XTS (128) = Y +AES XTS (256) = Y +SM4 XTS = Y + +; +; Supported authentication algorithms of the 'zsda' crypto driver. +; +[Auth] +SHA1 = Y +SHA224 = Y +SHA256 = Y +SHA384 = Y +SHA512 = Y +SM3 = Y + + +; +; Supported AEAD algorithms of the 'zsda' crypto driver. +; +[AEAD] + + +; +; Supported Asymmetric algorithms of the 'zsda' crypto driver. +; +[Asymmetric] + + +; +; Supported Operating systems of the 'zsda' crypto driver. +; +[OS] +Linux = Y diff --git a/doc/guides/cryptodevs/zsda.rst b/doc/guides/cryptodevs/zsda.rst index 0a7aeb2d50..2b7de0422d 100644 --- a/doc/guides/cryptodevs/zsda.rst +++ b/doc/guides/cryptodevs/zsda.rst @@ -13,14 +13,40 @@ support for the following hardware accelerator devices: Features -------- +The ZSDA SYM PMD has support for: + +Cipher algorithms: + +* ``RTE_CRYPTO_CIPHER_AES_XTS`` +* ``RTE_CRYPTO_CIPHER_SM4_XTS`` + +Hash algorithms: + +* ``RTE_CRYPTO_AUTH_SHA1`` +* ``RTE_CRYPTO_AUTH_SHA224`` +* ``RTE_CRYPTO_AUTH_SHA256`` +* ``RTE_CRYPTO_AUTH_SHA384`` +* ``RTE_CRYPTO_AUTH_SHA512`` +* ``RTE_CRYPTO_AUTH_SM3`` + Limitations ----------- +* Only supports the session-oriented API implementation (session-less APIs are + not supported). +* No BSD and Windows support. +* Queue-pairs are thread-safe on Intel CPUs but Queues are not (that is, within + a single queue-pair all enqueues to the TX queue must be done from one thread + and all dequeues from the RX queue must be done from one thread, but enqueues + and dequeues may be done in different threads.) + Installation ------------ +The ZSDA crypto service is built by default with a standard DPDK build. + Testing ------- diff --git a/doc/guides/rel_notes/release_25_07.rst b/doc/guides/rel_notes/release_25_07.rst index 093b85d206..8cd5d53ef3 100644 --- a/doc/guides/rel_notes/release_25_07.rst +++ b/doc/guides/rel_notes/release_25_07.rst @@ -56,6 +56,14 @@ New Features ======================================================= +* **Added ZTE Storage Data Accelerator (ZSDA) crypto driver.** + + Added a crypto driver for ZSDA devices + to support some encrypt, decrypt and hash algorithm. + + See the :doc:`../cryptodevs/zsda` guide for more details on the new driver. + + Removed Items ------------- diff --git a/drivers/crypto/zsda/zsda_crypto_capabilities.h b/drivers/crypto/zsda/zsda_crypto_capabilities.h new file mode 100644 index 0000000000..d00bdd2468 --- /dev/null +++ b/drivers/crypto/zsda/zsda_crypto_capabilities.h @@ -0,0 +1,111 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2025 ZTE Corporation + */ + +#ifndef _ZSDA_SYM_CAPABILITIES_H_ +#define _ZSDA_SYM_CAPABILITIES_H_ + +static const struct rte_cryptodev_capabilities zsda_crypto_dev_capabilities[] = { + {/* SHA1 */ + .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, + { .sym = {.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, + { .auth = { + .algo = RTE_CRYPTO_AUTH_SHA1, + .block_size = 64, + .key_size = {.min = 0, .max = 0, .increment = 0}, + .digest_size = {.min = 20, .max = 20, .increment = 2}, + .iv_size = {0} }, + } }, + } + }, + {/* SHA224 */ + .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, + { .sym = { + .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, + { .auth = { + .algo = RTE_CRYPTO_AUTH_SHA224, + .block_size = 64, + .key_size = {.min = 0, .max = 0, .increment = 0}, + .digest_size = {.min = 28, .max = 28, .increment = 0}, + .iv_size = {0} }, + } }, + } + }, + {/* SHA256 */ + .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, + { .sym = { + .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, + { .auth = { + .algo = RTE_CRYPTO_AUTH_SHA256, + .block_size = 64, + .key_size = {.min = 0, .max = 0, .increment = 0}, + .digest_size = {.min = 32, .max = 32, .increment = 0}, + .iv_size = {0} }, + } }, + } + }, + {/* SHA384 */ + .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, + { .sym = { + .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, + { .auth = { + .algo = RTE_CRYPTO_AUTH_SHA384, + .block_size = 128, + .key_size = {.min = 0, .max = 0, .increment = 0}, + .digest_size = {.min = 48, .max = 48, .increment = 0}, + .iv_size = {0} }, + } }, + } + }, + {/* SHA512 */ + .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, + { .sym = { + .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, + { .auth = { + .algo = RTE_CRYPTO_AUTH_SHA512, + .block_size = 128, + .key_size = {.min = 0, .max = 0, .increment = 0}, + .digest_size = {.min = 64, .max = 64, .increment = 0}, + .iv_size = {0} }, + } }, + } + }, + {/* SM3 */ + .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, + { .sym = { + .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, + { .auth = { + .algo = RTE_CRYPTO_AUTH_SM3, + .block_size = 64, + .key_size = {.min = 0, .max = 0, .increment = 0}, + .digest_size = {.min = 32, .max = 32, .increment = 0}, + .iv_size = {0} }, + } }, + } + }, + {/* AES XTS */ + .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, + { .sym = { + .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER, + { .cipher = { + .algo = RTE_CRYPTO_CIPHER_AES_XTS, + .block_size = 16, + .key_size = {.min = 32, .max = 64, .increment = 32}, + .iv_size = {.min = 16, .max = 16, .increment = 0} }, + } }, + } + }, + {/* SM4 XTS */ + .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, + { .sym = { + .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER, + { .cipher = { + .algo = RTE_CRYPTO_CIPHER_SM4_XTS, + .block_size = 16, + .key_size = {.min = 32, .max = 32, .increment = 0}, + .iv_size = {.min = 16, .max = 16, .increment = 0} }, + } }, + } + } +}; +#endif /* _ZSDA_SYM_CAPABILITIES_H_ */ diff --git a/drivers/crypto/zsda/zsda_crypto_pmd.c b/drivers/crypto/zsda/zsda_crypto_pmd.c index e2b22a881b..30f01faf61 100644 --- a/drivers/crypto/zsda/zsda_crypto_pmd.c +++ b/drivers/crypto/zsda/zsda_crypto_pmd.c @@ -7,6 +7,7 @@ #include "zsda_crypto_pmd.h" #include "zsda_crypto_session.h" #include "zsda_crypto.h" +#include "zsda_crypto_capabilities.h" uint8_t zsda_crypto_driver_id; @@ -264,8 +265,11 @@ zsda_crypto_dev_create(struct zsda_pci_device *zsda_pci_dev) }; char name[RTE_CRYPTODEV_NAME_MAX_LEN]; + char capa_memz_name[RTE_CRYPTODEV_NAME_MAX_LEN]; struct rte_cryptodev *cryptodev; struct zsda_crypto_dev_private *crypto_dev_priv; + const struct rte_cryptodev_capabilities *capabilities; + uint64_t capa_size; if (rte_eal_process_type() != RTE_PROC_PRIMARY) return ZSDA_SUCCESS; @@ -292,12 +296,35 @@ zsda_crypto_dev_create(struct zsda_pci_device *zsda_pci_dev) cryptodev->enqueue_burst = zsda_crypto_enqueue_op_burst; cryptodev->dequeue_burst = zsda_crypto_dequeue_op_burst; - cryptodev->feature_flags = 0; + cryptodev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO | + RTE_CRYPTODEV_FF_SYM_SESSIONLESS | + RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT | + RTE_CRYPTODEV_FF_OOP_LB_IN_SGL_OUT | + RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT | + RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT | + RTE_CRYPTODEV_FF_HW_ACCELERATED; + capabilities = zsda_crypto_dev_capabilities; crypto_dev_priv = cryptodev->data->dev_private; crypto_dev_priv->zsda_pci_dev = zsda_pci_dev; crypto_dev_priv->cryptodev = cryptodev; + capa_size = sizeof(zsda_crypto_dev_capabilities); + + snprintf(capa_memz_name, RTE_CRYPTODEV_NAME_MAX_LEN, "ZSDA_CRYPTO_CAPA"); + crypto_dev_priv->capa_mz = rte_memzone_lookup(capa_memz_name); + if (crypto_dev_priv->capa_mz == NULL) + crypto_dev_priv->capa_mz = rte_memzone_reserve( + capa_memz_name, capa_size, rte_socket_id(), 0); + + if (crypto_dev_priv->capa_mz == NULL) { + ZSDA_LOG(ERR, "Failed! crypto_dev_priv->capa_mz"); + goto error; + } + + memcpy(crypto_dev_priv->capa_mz->addr, capabilities, capa_size); + crypto_dev_priv->zsda_crypto_capabilities = crypto_dev_priv->capa_mz->addr; + zsda_pci_dev->crypto_dev_priv = crypto_dev_priv; return ZSDA_SUCCESS; From patchwork Fri May 16 07:27:51 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanxiao Li X-Patchwork-Id: 153480 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) 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3e816826e9c3004-de5b6 From: Hanxiao Li To: dev@dpdk.org Cc: Hanxiao Li Subject: [PATCH v4 9/9] app/test: add zsda cryptodev test Date: Fri, 16 May 2025 15:27:51 +0800 Message-ID: <20250516072752.1971299-10-li.hanxiao@zte.com.cn> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250516072752.1971299-1-li.hanxiao@zte.com.cn> References: <20250515101927.1926502-2-li.hanxiao@zte.com.cn> <20250516072752.1971299-1-li.hanxiao@zte.com.cn> MIME-Version: 1.0 X-MAIL: mse-fl1.zte.com.cn 54G7VDZo006343 X-Fangmail-Anti-Spam-Filtered: true X-Fangmail-MID-QID: 6826E9DB.000/4ZzJfz1Pnzz5B1Jb X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add crypto test for zsda device and driver. Signed-off-by: Hanxiao Li --- app/test/test_cryptodev.c | 7 +++++++ app/test/test_cryptodev.h | 1 + doc/guides/cryptodevs/zsda.rst | 6 ++++++ 3 files changed, 14 insertions(+) -- 2.27.0 diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c index 31a4905a97..ca2ed39b48 100644 --- a/app/test/test_cryptodev.c +++ b/app/test/test_cryptodev.c @@ -20233,6 +20233,12 @@ test_cryptodev_dpaa_sec_raw_api(void) return run_cryptodev_raw_testsuite(RTE_STR(CRYPTODEV_NAME_DPAA_SEC_PMD)); } +static int +test_cryptodev_zsda(void) +{ + return run_cryptodev_testsuite(RTE_STR(CRYPTODEV_NAME_ZSDA_SYM_PMD)); +} + REGISTER_DRIVER_TEST(cryptodev_cn10k_raw_api_autotest, test_cryptodev_cn10k_raw_api); REGISTER_DRIVER_TEST(cryptodev_dpaa2_sec_raw_api_autotest, @@ -20270,3 +20276,4 @@ REGISTER_DRIVER_TEST(cryptodev_nitrox_autotest, test_cryptodev_nitrox); REGISTER_DRIVER_TEST(cryptodev_bcmfs_autotest, test_cryptodev_bcmfs); REGISTER_DRIVER_TEST(cryptodev_cn9k_autotest, test_cryptodev_cn9k); REGISTER_DRIVER_TEST(cryptodev_cn10k_autotest, test_cryptodev_cn10k); +REGISTER_DRIVER_TEST(cryptodev_zsda_autotest, test_cryptodev_zsda); diff --git a/app/test/test_cryptodev.h b/app/test/test_cryptodev.h index 22bcb4969b..a80c11baf4 100644 --- a/app/test/test_cryptodev.h +++ b/app/test/test_cryptodev.h @@ -73,6 +73,7 @@ #define CRYPTODEV_NAME_CN10K_PMD crypto_cn10k #define CRYPTODEV_NAME_MLX5_PMD crypto_mlx5 #define CRYPTODEV_NAME_UADK_PMD crypto_uadk +#define CRYPTODEV_NAME_ZSDA_SYM_PMD crypto_zsda enum cryptodev_api_test_type { diff --git a/doc/guides/cryptodevs/zsda.rst b/doc/guides/cryptodevs/zsda.rst index 2b7de0422d..0e1d8fd215 100644 --- a/doc/guides/cryptodevs/zsda.rst +++ b/doc/guides/cryptodevs/zsda.rst @@ -50,3 +50,9 @@ The ZSDA crypto service is built by default with a standard DPDK build. Testing ------- + +ZSDA SYM crypto PMD can be tested by running the test application:: + + cd .//app/test + ./dpdk-test -l1 -n1 -a + RTE>>cryptodev_zsda_autotest