From patchwork Mon Mar 18 17:31:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Sivaprasad Tummala X-Patchwork-Id: 138458 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D1F2643CE8; Mon, 18 Mar 2024 18:32:14 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 97D4040289; Mon, 18 Mar 2024 18:32:14 +0100 (CET) Received: from NAM04-MW2-obe.outbound.protection.outlook.com (mail-mw2nam04on2082.outbound.protection.outlook.com [40.107.101.82]) by mails.dpdk.org (Postfix) with ESMTP id 5886C4027F; Mon, 18 Mar 2024 18:32:13 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=bAQy668XR+Bc0xDHtlHrzIVWHS52hhkY80+VuGRDLD4hYzz3ZGRTmmwG8ri4QL0/G3Vtksx5VIJJOXVMDZIQm5LddWvjmC4JsGFUe9zVlY6OSPggMOxAbhdtHAvB3G/s+qb6UCvECrHVn8YFso4loneEuinx9TrDM8XCDSK0SKoIgJ3dHyJvBY6KDH2+Z9Nw1LsniriWScyCTK/uCbTxiHa3+t/eV6x4GGE1f75V6INnmCy2R7iP59VCaFXyXUXfvOwntjeWTTThVTvYQBV3qIk3z7hqPBriI2nS2WmiqclS0khZGxKPYf361+8vITQj9EI2F6oD7jR8163b+ICQow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=Q8VxakJqV8vepUMtgDW8Tk075lVCb+hiQDYe3Gx/Rx4=; b=SYTQ1YPdBTe2JcTwYhleRVwp3vn3YsfQOObkHvoq6jVdFiroZKE5jRSojg5Sgl3RlEpdSKkX1iO10CvGksyyNrncn0b6TD2VyHFxK8q5pIDd4jnWI7X8G5AAOVyHKnvdbxLIFtjBSnUUvPar93FIhcrSMyOLujVyUOoDq9zzotRP8ry1iXxE3x7EO56IsSiPSIYTJOB0grZFCCezuKX0La2bXx7fx1A1Sjjb3qov3XjbQvashW9AMLb1KSQ8nze3QPkeBCPA2RkeCt2VnP5W0r+gGvcAeKLd+xaWflf/QheeCuCpqJpa5wajnbts8a6+PThtG0JU8aj09GDNAUDlsw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=intel.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Q8VxakJqV8vepUMtgDW8Tk075lVCb+hiQDYe3Gx/Rx4=; b=HbF6N03lxc+/9ndNe9Pq0K0OIAPvvUn3EEAlyYPFdiNWYjd9FBE4xPO21tFXfrnjrMGAWbzSV1M6vQxERD+P/FmtEKDcqXKoMFSqtTJo82zvlUfr5tNi4Wu+BTG4xlJ2UkpgAjayyHuetqHmNSFv+YRg0COUazUq6oOKPg42nn4= Received: from CH2PR02CA0019.namprd02.prod.outlook.com (2603:10b6:610:4e::29) by PH7PR12MB7210.namprd12.prod.outlook.com (2603:10b6:510:205::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7386.26; Mon, 18 Mar 2024 17:32:10 +0000 Received: from CH1PEPF0000AD79.namprd04.prod.outlook.com (2603:10b6:610:4e:cafe::61) by CH2PR02CA0019.outlook.office365.com (2603:10b6:610:4e::29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7386.19 via Frontend Transport; Mon, 18 Mar 2024 17:32:10 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CH1PEPF0000AD79.mail.protection.outlook.com (10.167.244.57) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7409.10 via Frontend Transport; Mon, 18 Mar 2024 17:32:10 +0000 Received: from ubuntu2004.linuxvmimages.local (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 18 Mar 2024 12:32:06 -0500 From: Sivaprasad Tummala To: , , , , , , , , , CC: , Subject: [PATCH v5 1/6] examples/l3fwd: fix lcore ID restriction Date: Mon, 18 Mar 2024 18:31:40 +0100 Message-ID: <20240318173146.24303-2-sivaprasad.tummala@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240318173146.24303-1-sivaprasad.tummala@amd.com> References: <20240116182332.95537-1-sivaprasad.tummala@amd.com> <20240318173146.24303-1-sivaprasad.tummala@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD79:EE_|PH7PR12MB7210:EE_ X-MS-Office365-Filtering-Correlation-Id: 2e6e3e3e-ff66-4164-7f16-08dc4771575f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: s+2JASvlDBr8v64DdoGLrtZ2rhXWTG7s2s9Ned1JIBUkbpug6LQqgF6u4/a/g9PPb+RQ3PrQuBo5fxYmdEdGuH6ONkCSOVe9UBqhKH6YzD4ljDXXOhXe3MaQrtwm4h2JLsEPIZtMGmo1vTPI3IdKxHVeRRZsCj0SMDhPvVjnkY2mWSdTTfkfXBW7slAJ8hUULx0XnYc11F/wQ+fc2WLuBrpmD2NDc34I8sRPWq0U7sk9H9KKBSlbjQI2alD1zolVf2bem0Vc9uNELmDv/u9xJWYhy7hgidbOMjBjAkHYog8KkgQvAPZHP2gSSA3ebDjt9IzSLnGpqL7ye1Mt7P9UoPt/Ijg4JNFbGp0Mcirq6+PgzuhOgT3z8lg4ttoD4LY7yMbS5GmSPraNK3E5c9LN/ofc4o6ZrAWCf1SGzxcz1fCXvT3CirmVvFvt2cTk/9zj1/tM0EN6R2WlyNfVIsokIP6L9sQFie+UWx69g9UP+BZRgK7yCKt7GYvv52lSzhiuE+jx5hUGIOREMKO/FUIc7PRN7lqQ9UdJdxpx0FprlHj124eljXYRxVF0foukaubODalLIlcZnJJ4ScgIfpFbKQEKGSkhLYB83PR54zkel2odnguO8eYrIy13SuPAIZRlrf0tIuPb7oZiXFpFlI7GDC0mzWNJs8d3wA+kFQIYS3EWTwRodsin5zFq5xrHBPObjpsQyYjSMGXcDR2rfm7YVpNQxSz9kPVhpkF+vKT+YEtd/exPLMkfqmt2yZ2WfGptqgqqU8gK4NTdhuX3fmDZzg== X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(36860700004)(376005)(1800799015)(7416005)(82310400014)(921011); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Mar 2024 17:32:10.1895 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2e6e3e3e-ff66-4164-7f16-08dc4771575f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD79.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7210 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Currently the config option allows lcore IDs up to 255, irrespective of RTE_MAX_LCORES and needs to be fixed. The patch allows config options based on DPDK config. Fixes: af75078fece3 ("first public release") Cc: stable@dpdk.org Signed-off-by: Sivaprasad Tummala Acked-by: Konstantin Ananyev Acked-by: Morten Brørup --- examples/l3fwd/l3fwd.h | 2 +- examples/l3fwd/l3fwd_acl.c | 4 ++-- examples/l3fwd/l3fwd_em.c | 4 ++-- examples/l3fwd/l3fwd_event.h | 2 +- examples/l3fwd/l3fwd_fib.c | 4 ++-- examples/l3fwd/l3fwd_lpm.c | 5 ++--- examples/l3fwd/main.c | 40 ++++++++++++++++++++---------------- 7 files changed, 32 insertions(+), 29 deletions(-) diff --git a/examples/l3fwd/l3fwd.h b/examples/l3fwd/l3fwd.h index e7ae0e5834..12c264cb4c 100644 --- a/examples/l3fwd/l3fwd.h +++ b/examples/l3fwd/l3fwd.h @@ -74,7 +74,7 @@ struct mbuf_table { struct lcore_rx_queue { uint16_t port_id; - uint8_t queue_id; + uint16_t queue_id; } __rte_cache_aligned; struct lcore_conf { diff --git a/examples/l3fwd/l3fwd_acl.c b/examples/l3fwd/l3fwd_acl.c index 401692bcec..2bd63181bc 100644 --- a/examples/l3fwd/l3fwd_acl.c +++ b/examples/l3fwd/l3fwd_acl.c @@ -997,7 +997,7 @@ acl_main_loop(__rte_unused void *dummy) uint64_t prev_tsc, diff_tsc, cur_tsc; int i, nb_rx; uint16_t portid; - uint8_t queueid; + uint16_t queueid; struct lcore_conf *qconf; int socketid; const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) @@ -1020,7 +1020,7 @@ acl_main_loop(__rte_unused void *dummy) portid = qconf->rx_queue_list[i].port_id; queueid = qconf->rx_queue_list[i].queue_id; RTE_LOG(INFO, L3FWD, - " -- lcoreid=%u portid=%u rxqueueid=%hhu\n", + " -- lcoreid=%u portid=%u rxqueueid=%hu\n", lcore_id, portid, queueid); } diff --git a/examples/l3fwd/l3fwd_em.c b/examples/l3fwd/l3fwd_em.c index 40e102b38a..cd2bb4a4bb 100644 --- a/examples/l3fwd/l3fwd_em.c +++ b/examples/l3fwd/l3fwd_em.c @@ -586,7 +586,7 @@ em_main_loop(__rte_unused void *dummy) unsigned lcore_id; uint64_t prev_tsc, diff_tsc, cur_tsc; int i, nb_rx; - uint8_t queueid; + uint16_t queueid; uint16_t portid; struct lcore_conf *qconf; const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) / @@ -609,7 +609,7 @@ em_main_loop(__rte_unused void *dummy) portid = qconf->rx_queue_list[i].port_id; queueid = qconf->rx_queue_list[i].queue_id; RTE_LOG(INFO, L3FWD, - " -- lcoreid=%u portid=%u rxqueueid=%hhu\n", + " -- lcoreid=%u portid=%u rxqueueid=%hu\n", lcore_id, portid, queueid); } diff --git a/examples/l3fwd/l3fwd_event.h b/examples/l3fwd/l3fwd_event.h index 9aad358003..c6a4a89127 100644 --- a/examples/l3fwd/l3fwd_event.h +++ b/examples/l3fwd/l3fwd_event.h @@ -78,8 +78,8 @@ struct l3fwd_event_resources { uint8_t deq_depth; uint8_t has_burst; uint8_t enabled; - uint8_t eth_rx_queues; uint8_t vector_enabled; + uint16_t eth_rx_queues; uint16_t vector_size; uint64_t vector_tmo_ns; }; diff --git a/examples/l3fwd/l3fwd_fib.c b/examples/l3fwd/l3fwd_fib.c index 6a21984415..7da55f707a 100644 --- a/examples/l3fwd/l3fwd_fib.c +++ b/examples/l3fwd/l3fwd_fib.c @@ -186,7 +186,7 @@ fib_main_loop(__rte_unused void *dummy) uint64_t prev_tsc, diff_tsc, cur_tsc; int i, nb_rx; uint16_t portid; - uint8_t queueid; + uint16_t queueid; struct lcore_conf *qconf; const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) / US_PER_S * BURST_TX_DRAIN_US; @@ -208,7 +208,7 @@ fib_main_loop(__rte_unused void *dummy) portid = qconf->rx_queue_list[i].port_id; queueid = qconf->rx_queue_list[i].queue_id; RTE_LOG(INFO, L3FWD, - " -- lcoreid=%u portid=%u rxqueueid=%hhu\n", + " -- lcoreid=%u portid=%u rxqueueid=%hu\n", lcore_id, portid, queueid); } diff --git a/examples/l3fwd/l3fwd_lpm.c b/examples/l3fwd/l3fwd_lpm.c index a484a33089..01d38bc69c 100644 --- a/examples/l3fwd/l3fwd_lpm.c +++ b/examples/l3fwd/l3fwd_lpm.c @@ -148,8 +148,7 @@ lpm_main_loop(__rte_unused void *dummy) unsigned lcore_id; uint64_t prev_tsc, diff_tsc, cur_tsc; int i, nb_rx; - uint16_t portid; - uint8_t queueid; + uint16_t portid, queueid; struct lcore_conf *qconf; const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) / US_PER_S * BURST_TX_DRAIN_US; @@ -171,7 +170,7 @@ lpm_main_loop(__rte_unused void *dummy) portid = qconf->rx_queue_list[i].port_id; queueid = qconf->rx_queue_list[i].queue_id; RTE_LOG(INFO, L3FWD, - " -- lcoreid=%u portid=%u rxqueueid=%hhu\n", + " -- lcoreid=%u portid=%u rxqueueid=%hu\n", lcore_id, portid, queueid); } diff --git a/examples/l3fwd/main.c b/examples/l3fwd/main.c index 8d32ae1dd5..19e4d9dfa2 100644 --- a/examples/l3fwd/main.c +++ b/examples/l3fwd/main.c @@ -98,8 +98,8 @@ struct parm_cfg parm_config; struct lcore_params { uint16_t port_id; - uint8_t queue_id; - uint8_t lcore_id; + uint16_t queue_id; + uint32_t lcore_id; } __rte_cache_aligned; static struct lcore_params lcore_params_array[MAX_LCORE_PARAMS]; @@ -292,24 +292,24 @@ setup_l3fwd_lookup_tables(void) static int check_lcore_params(void) { - uint8_t queue, lcore; - uint16_t i; + uint16_t queue, i; + uint32_t lcore; int socketid; for (i = 0; i < nb_lcore_params; ++i) { queue = lcore_params[i].queue_id; if (queue >= MAX_RX_QUEUE_PER_PORT) { - printf("invalid queue number: %hhu\n", queue); + printf("invalid queue number: %hu\n", queue); return -1; } lcore = lcore_params[i].lcore_id; if (!rte_lcore_is_enabled(lcore)) { - printf("error: lcore %hhu is not enabled in lcore mask\n", lcore); + printf("error: lcore %u is not enabled in lcore mask\n", lcore); return -1; } if ((socketid = rte_lcore_to_socket_id(lcore) != 0) && (numa_on == 0)) { - printf("warning: lcore %hhu is on socket %d with numa off \n", + printf("warning: lcore %u is on socket %d with numa off\n", lcore, socketid); } } @@ -336,7 +336,7 @@ check_port_config(void) return 0; } -static uint8_t +static uint16_t get_port_n_rx_queues(const uint16_t port) { int queue = -1; @@ -352,21 +352,21 @@ get_port_n_rx_queues(const uint16_t port) lcore_params[i].port_id); } } - return (uint8_t)(++queue); + return (uint16_t)(++queue); } static int init_lcore_rx_queues(void) { uint16_t i, nb_rx_queue; - uint8_t lcore; + uint32_t lcore; for (i = 0; i < nb_lcore_params; ++i) { lcore = lcore_params[i].lcore_id; nb_rx_queue = lcore_conf[lcore].n_rx_queue; if (nb_rx_queue >= MAX_RX_QUEUE_PER_LCORE) { printf("error: too many queues (%u) for lcore: %u\n", - (unsigned)nb_rx_queue + 1, (unsigned)lcore); + (unsigned int)nb_rx_queue + 1, lcore); return -1; } else { lcore_conf[lcore].rx_queue_list[nb_rx_queue].port_id = @@ -500,6 +500,8 @@ parse_config(const char *q_arg) char *str_fld[_NUM_FLD]; int i; unsigned size; + uint32_t max_fld[_NUM_FLD] = {RTE_MAX_ETHPORTS, + USHRT_MAX, RTE_MAX_LCORE}; nb_lcore_params = 0; @@ -518,7 +520,8 @@ parse_config(const char *q_arg) for (i = 0; i < _NUM_FLD; i++){ errno = 0; int_fld[i] = strtoul(str_fld[i], &end, 0); - if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) + if (errno != 0 || end == str_fld[i] || int_fld[i] > + max_fld[i]) return -1; } if (nb_lcore_params >= MAX_LCORE_PARAMS) { @@ -527,11 +530,11 @@ parse_config(const char *q_arg) return -1; } lcore_params_array[nb_lcore_params].port_id = - (uint8_t)int_fld[FLD_PORT]; + (uint16_t)int_fld[FLD_PORT]; lcore_params_array[nb_lcore_params].queue_id = - (uint8_t)int_fld[FLD_QUEUE]; + (uint16_t)int_fld[FLD_QUEUE]; lcore_params_array[nb_lcore_params].lcore_id = - (uint8_t)int_fld[FLD_LCORE]; + (uint32_t)int_fld[FLD_LCORE]; ++nb_lcore_params; } lcore_params = lcore_params_array; @@ -630,7 +633,7 @@ parse_event_eth_rx_queues(const char *eth_rx_queues) { struct l3fwd_event_resources *evt_rsrc = l3fwd_get_eventdev_rsrc(); char *end = NULL; - uint8_t num_eth_rx_queues; + uint16_t num_eth_rx_queues; /* parse decimal string */ num_eth_rx_queues = strtoul(eth_rx_queues, &end, 10); @@ -1211,7 +1214,8 @@ config_port_max_pkt_len(struct rte_eth_conf *conf, static void l3fwd_poll_resource_setup(void) { - uint8_t nb_rx_queue, queue, socketid; + uint8_t socketid; + uint16_t nb_rx_queue, queue; struct rte_eth_dev_info dev_info; uint32_t n_tx_queue, nb_lcores; struct rte_eth_txconf *txconf; @@ -1535,7 +1539,7 @@ main(int argc, char **argv) struct lcore_conf *qconf; uint16_t queueid, portid; unsigned int lcore_id; - uint8_t queue; + uint16_t queue; int ret; /* init EAL */ From patchwork Mon Mar 18 17:31:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sivaprasad Tummala X-Patchwork-Id: 138459 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 63FFF43CE8; Mon, 18 Mar 2024 18:32:34 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D451F409FA; Mon, 18 Mar 2024 18:32:20 +0100 (CET) Received: from NAM11-DM6-obe.outbound.protection.outlook.com (mail-dm6nam11on2079.outbound.protection.outlook.com [40.107.223.79]) by mails.dpdk.org (Postfix) with ESMTP id 3805A406B7; Mon, 18 Mar 2024 18:32:19 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=a2KrUAnE1dQsBP3zLVdq69MN8bDJCF1Lwv1N+Dhz/Sqd+oqI2c4qyhtE432KqH5aMSDN8e8oE4b4B8acpm2WimgfvFOUBzi0QpDFM8CifVSG9hQyrqmyFBsurIVVEUkIs/IHVV6nHcaAHtjPpVntC5VHU4PKYxD/pfzRutzN0USX7IWBFEAanhnZ1hxaWC/igddVfF/E0x0er/jAtPcGDi263X2lPkjvsie3/Hp5g7RnI+ovP/Ys+oUGJ3mEiqWuBF6U1UQCGXiP035p84v9z5X8DmVN9Lkzwf1CiGuMudOwpxw1UL53k4/VxvBtqa5koPy36biTEc/Vddk1TAwl9w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=NFFhnNocpbC7ZQxY4jXqxJlizdDeSctULyR3n3YdeKo=; b=P9yJ+OybxBqs3wYMKcVfAB/c7YvVmWi17mzgdBUfPT61p77KoXyUiaT9rPlgvv6zhPa0teKHSb6/9L09wO6pns8OgMcE1QF9DBfFtkfskUY1mF0X1kFWCZ++Zdsy5CPVwUtpbxHl3BVj/nT9AqwYTFT7VPX8L1tpA2vh7t+UrAi2hPcINv7q+LBCh7upnAwRGH0RZiOfcprsiIe1EmC2oDmeZx6bz+EENHVENQo8tuyKypIRIzSrHSzVxADbqqEioPXNWIiJYu40dnU4pf0BXeIa1a5nhMTHhNWTNQESJjPBXWPZkjAQt+5+2JWGdUrajr+qF3MsVKn0SmfLrdIacw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=intel.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=NFFhnNocpbC7ZQxY4jXqxJlizdDeSctULyR3n3YdeKo=; b=nPJPyid8ec4wb82+1Pv60ooRNQVVwEzZiBs+NNO9ji31DuptT3/JSruRr3Q9MbLCfb14Mi+9VfbcHrVRiQKBcCnZ//ZYRRquiDDwdvo3noengPa0vGRpPgaeXZ7Eu//S3H6QoJB6ulABUiin3bJxXAOV4QcnlghemOcTKj97ckk= Received: from CH0PR07CA0019.namprd07.prod.outlook.com (2603:10b6:610:32::24) by MW4PR12MB6874.namprd12.prod.outlook.com (2603:10b6:303:20b::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7386.27; Mon, 18 Mar 2024 17:32:15 +0000 Received: from CH1PEPF0000AD76.namprd04.prod.outlook.com (2603:10b6:610:32:cafe::49) by CH0PR07CA0019.outlook.office365.com (2603:10b6:610:32::24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7386.27 via Frontend Transport; Mon, 18 Mar 2024 17:32:14 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CH1PEPF0000AD76.mail.protection.outlook.com (10.167.244.53) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7409.10 via Frontend Transport; Mon, 18 Mar 2024 17:32:14 +0000 Received: from ubuntu2004.linuxvmimages.local (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 18 Mar 2024 12:32:09 -0500 From: Sivaprasad Tummala To: , , , , , , , , , CC: , Subject: [PATCH v5 2/6] examples/l3fwd-power: fix lcore ID restriction Date: Mon, 18 Mar 2024 18:31:41 +0100 Message-ID: <20240318173146.24303-3-sivaprasad.tummala@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240318173146.24303-1-sivaprasad.tummala@amd.com> References: <20240116182332.95537-1-sivaprasad.tummala@amd.com> <20240318173146.24303-1-sivaprasad.tummala@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD76:EE_|MW4PR12MB6874:EE_ X-MS-Office365-Filtering-Correlation-Id: 7932bb24-dafa-4bc3-268f-08dc47715a31 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: OV+HY4/7uhOFKMrJzNEgITM/jCMantfuMaSwQHiPNybD7qNyDCGDGauEx2pj99FCtZ4OAXI6ybnG0AJ2WfPcqCY9OvYvUl0sD2z2WuXAUgk3DhBWyCga/pMd/7/vt0kigZOD8TJrH25RQbqdd3rfNiLYn7P1hmk2OpwxQmdVtSWQ7+Y2xuGLwX0h0gzMIClyoyQI4C1n60z/yjUH7TidXCYzINr+vwWAvBhTfOdFrn0SDli9Imha2nAFEchbC0HOdymSIBRtAEVH2vqEUvzBdnieGCl7ZGg99JNHm4GnlcEAtI4wzgOz047Z4JyNQKsYOd7G7+Q+Bn2tqMOhxB3ZIxiOMo2LBA1RWJ/RMiy9ZGodmQ+Ihi4ZyQD799h3DtIKMTV+yJN/IoyFDSCuDribwzFkr/zJciZoYwMEaUVzpMj0ZnG1KiPd72LkoLJfXf5dpCU4+IAS1nsjwgT6LkVcKAsfXEG9d4h+yVVA1dglfv1qdi5IgKQrrH7OAHwOKf7/XehOZnzV/9FpJSe5DrxruXzj4Qd7WGSj8W74bYODsmXZH90dSJA7ftb4p55++33V/O5z0dmnIeldpfxudPXM80NxM+wf8gzu/FoXX7earf0GH6ZrGGbk6ojTUs2VwcN3t/bAcFxXPJSFCJZF8PkUSs2m/GdC0UrfCYvH41tCERFS0jE7XLk2m+XIkkHOw8klZ8VewEXdEG6nDzfyBP2k1FiYoHXKueAW4hZqKKsnnZDPGSP9THrybcm1bHBsTVoSuN69xR1sAW9IqVFGMGhFJA== X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(1800799015)(82310400014)(7416005)(36860700004)(376005)(921011); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Mar 2024 17:32:14.9189 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7932bb24-dafa-4bc3-268f-08dc47715a31 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD76.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB6874 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Currently the config option allows lcore IDs up to 255, irrespective of RTE_MAX_LCORES and needs to be fixed. The patch allows config options based on DPDK config. Fixes: f88e7c175a68 ("examples/l3fwd-power: add high/regular perf cores options") Cc: radu.nicolau@intel.com Cc: stable@dpdk.org Signed-off-by: Sivaprasad Tummala --- examples/l3fwd-power/main.c | 59 ++++++++++++++++---------------- examples/l3fwd-power/main.h | 4 +-- examples/l3fwd-power/perf_core.c | 16 +++++---- 3 files changed, 41 insertions(+), 38 deletions(-) diff --git a/examples/l3fwd-power/main.c b/examples/l3fwd-power/main.c index f4adcf41b5..4430605df0 100644 --- a/examples/l3fwd-power/main.c +++ b/examples/l3fwd-power/main.c @@ -214,7 +214,7 @@ enum freq_scale_hint_t struct lcore_rx_queue { uint16_t port_id; - uint8_t queue_id; + uint16_t queue_id; enum freq_scale_hint_t freq_up_hint; uint32_t zero_rx_packet_count; uint32_t idle_hint; @@ -838,7 +838,7 @@ sleep_until_rx_interrupt(int num, int lcore) struct rte_epoll_event event[num]; int n, i; uint16_t port_id; - uint8_t queue_id; + uint16_t queue_id; void *data; if (status[lcore].wakeup) { @@ -850,9 +850,9 @@ sleep_until_rx_interrupt(int num, int lcore) n = rte_epoll_wait(RTE_EPOLL_PER_THREAD, event, num, 10); for (i = 0; i < n; i++) { data = event[i].epdata.data; - port_id = ((uintptr_t)data) >> CHAR_BIT; + port_id = ((uintptr_t)data) >> (sizeof(uint16_t) * CHAR_BIT); queue_id = ((uintptr_t)data) & - RTE_LEN2MASK(CHAR_BIT, uint8_t); + RTE_LEN2MASK((sizeof(uint16_t) * CHAR_BIT), uint16_t); RTE_LOG(INFO, L3FWD_POWER, "lcore %u is waked up from rx interrupt on" " port %d queue %d\n", @@ -867,7 +867,7 @@ static void turn_on_off_intr(struct lcore_conf *qconf, bool on) { int i; struct lcore_rx_queue *rx_queue; - uint8_t queue_id; + uint16_t queue_id; uint16_t port_id; for (i = 0; i < qconf->n_rx_queue; ++i) { @@ -887,7 +887,7 @@ static void turn_on_off_intr(struct lcore_conf *qconf, bool on) static int event_register(struct lcore_conf *qconf) { struct lcore_rx_queue *rx_queue; - uint8_t queueid; + uint16_t queueid; uint16_t portid; uint32_t data; int ret; @@ -897,7 +897,7 @@ static int event_register(struct lcore_conf *qconf) rx_queue = &(qconf->rx_queue_list[i]); portid = rx_queue->port_id; queueid = rx_queue->queue_id; - data = portid << CHAR_BIT | queueid; + data = portid << (sizeof(uint16_t) * CHAR_BIT) | queueid; ret = rte_eth_dev_rx_intr_ctl_q(portid, queueid, RTE_EPOLL_PER_THREAD, @@ -917,8 +917,7 @@ static int main_intr_loop(__rte_unused void *dummy) unsigned int lcore_id; uint64_t prev_tsc, diff_tsc, cur_tsc; int i, j, nb_rx; - uint8_t queueid; - uint16_t portid; + uint16_t portid, queueid; struct lcore_conf *qconf; struct lcore_rx_queue *rx_queue; uint32_t lcore_rx_idle_count = 0; @@ -946,7 +945,7 @@ static int main_intr_loop(__rte_unused void *dummy) portid = qconf->rx_queue_list[i].port_id; queueid = qconf->rx_queue_list[i].queue_id; RTE_LOG(INFO, L3FWD_POWER, - " -- lcoreid=%u portid=%u rxqueueid=%hhu\n", + " -- lcoreid=%u portid=%u rxqueueid=%hu\n", lcore_id, portid, queueid); } @@ -1083,8 +1082,7 @@ main_telemetry_loop(__rte_unused void *dummy) unsigned int lcore_id; uint64_t prev_tsc, diff_tsc, cur_tsc, prev_tel_tsc; int i, j, nb_rx; - uint8_t queueid; - uint16_t portid; + uint16_t portid, queueid; struct lcore_conf *qconf; struct lcore_rx_queue *rx_queue; uint64_t ep_nep[2] = {0}, fp_nfp[2] = {0}; @@ -1114,7 +1112,7 @@ main_telemetry_loop(__rte_unused void *dummy) portid = qconf->rx_queue_list[i].port_id; queueid = qconf->rx_queue_list[i].queue_id; RTE_LOG(INFO, L3FWD_POWER, " -- lcoreid=%u portid=%u " - "rxqueueid=%hhu\n", lcore_id, portid, queueid); + "rxqueueid=%hu\n", lcore_id, portid, queueid); } while (!is_done()) { @@ -1205,8 +1203,7 @@ main_legacy_loop(__rte_unused void *dummy) uint64_t prev_tsc, diff_tsc, cur_tsc, tim_res_tsc, hz; uint64_t prev_tsc_power = 0, cur_tsc_power, diff_tsc_power; int i, j, nb_rx; - uint8_t queueid; - uint16_t portid; + uint16_t portid, queueid; struct lcore_conf *qconf; struct lcore_rx_queue *rx_queue; enum freq_scale_hint_t lcore_scaleup_hint; @@ -1234,7 +1231,7 @@ main_legacy_loop(__rte_unused void *dummy) portid = qconf->rx_queue_list[i].port_id; queueid = qconf->rx_queue_list[i].queue_id; RTE_LOG(INFO, L3FWD_POWER, " -- lcoreid=%u portid=%u " - "rxqueueid=%hhu\n", lcore_id, portid, queueid); + "rxqueueid=%hu\n", lcore_id, portid, queueid); } /* add into event wait list */ @@ -1399,25 +1396,25 @@ main_legacy_loop(__rte_unused void *dummy) static int check_lcore_params(void) { - uint8_t queue, lcore; - uint16_t i; + uint16_t queue, i; + uint32_t lcore; int socketid; for (i = 0; i < nb_lcore_params; ++i) { queue = lcore_params[i].queue_id; if (queue >= MAX_RX_QUEUE_PER_PORT) { - printf("invalid queue number: %hhu\n", queue); + printf("invalid queue number: %hu\n", queue); return -1; } lcore = lcore_params[i].lcore_id; if (!rte_lcore_is_enabled(lcore)) { - printf("error: lcore %hhu is not enabled in lcore " + printf("error: lcore %u is not enabled in lcore " "mask\n", lcore); return -1; } if ((socketid = rte_lcore_to_socket_id(lcore) != 0) && (numa_on == 0)) { - printf("warning: lcore %hhu is on socket %d with numa " + printf("warning: lcore %u is on socket %d with numa " "off\n", lcore, socketid); } if (app_mode == APP_MODE_TELEMETRY && lcore == rte_lcore_id()) { @@ -1451,7 +1448,7 @@ check_port_config(void) return 0; } -static uint8_t +static uint16_t get_port_n_rx_queues(const uint16_t port) { int queue = -1; @@ -1462,14 +1459,14 @@ get_port_n_rx_queues(const uint16_t port) lcore_params[i].queue_id > queue) queue = lcore_params[i].queue_id; } - return (uint8_t)(++queue); + return (uint16_t)(++queue); } static int init_lcore_rx_queues(void) { uint16_t i, nb_rx_queue; - uint8_t lcore; + uint32_t lcore; for (i = 0; i < nb_lcore_params; ++i) { lcore = lcore_params[i].lcore_id; @@ -1661,6 +1658,8 @@ parse_config(const char *q_arg) char *str_fld[_NUM_FLD]; int i; unsigned size; + unsigned int max_fld[_NUM_FLD] = {RTE_MAX_ETHPORTS, + USHRT_MAX, RTE_MAX_LCORE}; nb_lcore_params = 0; @@ -1681,7 +1680,7 @@ parse_config(const char *q_arg) errno = 0; int_fld[i] = strtoul(str_fld[i], &end, 0); if (errno != 0 || end == str_fld[i] || int_fld[i] > - 255) + max_fld[i]) return -1; } if (nb_lcore_params >= MAX_LCORE_PARAMS) { @@ -1690,11 +1689,11 @@ parse_config(const char *q_arg) return -1; } lcore_params_array[nb_lcore_params].port_id = - (uint8_t)int_fld[FLD_PORT]; + (uint16_t)int_fld[FLD_PORT]; lcore_params_array[nb_lcore_params].queue_id = - (uint8_t)int_fld[FLD_QUEUE]; + (uint16_t)int_fld[FLD_QUEUE]; lcore_params_array[nb_lcore_params].lcore_id = - (uint8_t)int_fld[FLD_LCORE]; + (uint32_t)int_fld[FLD_LCORE]; ++nb_lcore_params; } lcore_params = lcore_params_array; @@ -2501,8 +2500,8 @@ main(int argc, char **argv) uint64_t hz; uint32_t n_tx_queue, nb_lcores; uint32_t dev_rxq_num, dev_txq_num; - uint8_t nb_rx_queue, queue, socketid; - uint16_t portid; + uint8_t socketid; + uint16_t portid, nb_rx_queue, queue; const char *ptr_strings[NUM_TELSTATS]; /* init EAL */ diff --git a/examples/l3fwd-power/main.h b/examples/l3fwd-power/main.h index 258de98f5b..194bd82102 100644 --- a/examples/l3fwd-power/main.h +++ b/examples/l3fwd-power/main.h @@ -9,8 +9,8 @@ #define MAX_LCORE_PARAMS 1024 struct lcore_params { uint16_t port_id; - uint8_t queue_id; - uint8_t lcore_id; + uint16_t queue_id; + uint32_t lcore_id; } __rte_cache_aligned; extern struct lcore_params *lcore_params; diff --git a/examples/l3fwd-power/perf_core.c b/examples/l3fwd-power/perf_core.c index 41ef6d0c9a..c2cdc4bf49 100644 --- a/examples/l3fwd-power/perf_core.c +++ b/examples/l3fwd-power/perf_core.c @@ -22,9 +22,9 @@ static uint16_t nb_hp_lcores; struct perf_lcore_params { uint16_t port_id; - uint8_t queue_id; + uint16_t queue_id; uint8_t high_perf; - uint8_t lcore_idx; + uint32_t lcore_idx; } __rte_cache_aligned; static struct perf_lcore_params prf_lc_prms[MAX_LCORE_PARAMS]; @@ -132,6 +132,8 @@ parse_perf_config(const char *q_arg) char *str_fld[_NUM_FLD]; int i; unsigned int size; + unsigned int max_fld[_NUM_FLD] = {RTE_MAX_ETHPORTS, USHRT_MAX, + UCHAR_MAX, RTE_MAX_LCORE}; nb_prf_lc_prms = 0; @@ -152,7 +154,9 @@ parse_perf_config(const char *q_arg) for (i = 0; i < _NUM_FLD; i++) { errno = 0; int_fld[i] = strtoul(str_fld[i], &end, 0); - if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) + if (errno != 0 || end == str_fld[i] || int_fld[i] > + max_fld[i]) + return -1; } if (nb_prf_lc_prms >= MAX_LCORE_PARAMS) { @@ -161,13 +165,13 @@ parse_perf_config(const char *q_arg) return -1; } prf_lc_prms[nb_prf_lc_prms].port_id = - (uint8_t)int_fld[FLD_PORT]; + (uint16_t)int_fld[FLD_PORT]; prf_lc_prms[nb_prf_lc_prms].queue_id = - (uint8_t)int_fld[FLD_QUEUE]; + (uint16_t)int_fld[FLD_QUEUE]; prf_lc_prms[nb_prf_lc_prms].high_perf = !!(uint8_t)int_fld[FLD_LCORE_HP]; prf_lc_prms[nb_prf_lc_prms].lcore_idx = - (uint8_t)int_fld[FLD_LCORE_IDX]; + (uint32_t)int_fld[FLD_LCORE_IDX]; ++nb_prf_lc_prms; } From patchwork Mon Mar 18 17:31:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sivaprasad Tummala X-Patchwork-Id: 138460 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B63BF43CE8; Mon, 18 Mar 2024 18:32:46 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1EF3440A77; Mon, 18 Mar 2024 18:32:23 +0100 (CET) Received: from NAM02-DM3-obe.outbound.protection.outlook.com (mail-dm3nam02on2088.outbound.protection.outlook.com [40.107.95.88]) by mails.dpdk.org (Postfix) with ESMTP id 3547340693; Mon, 18 Mar 2024 18:32:21 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Sn92pYYCZ+Mrex9ZAs160Q5YMKkS93PPCgo0KJ0IUevDd6et8bk/B6QPQhOiYXCJbRg/m6eDR2NKyvfF+x6HkaoZH0pGcMeo0ioLaf+NZPcFnBY6uDU09bFVZLxangg9XqPowkOnD7ISNYo9odNC5yiFUbQUm0CHEIZNxe7EHAXVWFr/41tdOq81GMleleDmP4netT/g6JOnEt168zpYtZbUlqFdq7ldShsq6KZ25KgNwD0g/EUvkab2M+E2Yoq4mN4YZU/wIexVzvxWJzpTsFLOXJEsZVMDoqPiMHuDHUUBPob5MPdtaq7s/rpuNqiRJ+EfpF10VcxmDddn0AckBg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=ttgGWmfXzEL3Cc2MDL9R0dPsElFGd6uFJCaq88zgaPQ=; b=GDXclvuDzZqtJAGNzR0/i7DGtmmN3k7k6qN7QkvZAqk023rLT0D4QG5aiqRfaotYC5hZtaTtnaqvWkwdDeBgG/eUj9OE/JxDRWlROqHpGW+F3htQ4Bwe0FGJxIUo2VvjqSWoTXm2qfn8z2Bv+fIerum37sMGf5CBje/L++wnTc0dQVUB/kZyhuVAU83gdvtbhQN3JdVfTf2zff2qd3kgCk3MjWz1LBBb6zczIoedVA91PRBnIAIevFv3Pq3AMbtN3L2eqfnfGh6Gr1E9p0tt/xRxIhwIVFYgItdn92dAsd7tSs4RJSB7AQsv9NaJq5G0VEFsoLCZNtYg4sOUD9WTcA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=intel.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ttgGWmfXzEL3Cc2MDL9R0dPsElFGd6uFJCaq88zgaPQ=; b=gPFbTVzJt8VqWK5a/RgkIzTpIcYl1SgteMl3g6o2QGVEqXqjJtMJjG+lWTozKFr7LAMYuST3wvhJg0VHoKGLpN8ufkxNuTyE33+MdVJi1Gxse8S/Twc82qQku9o3EdHvfW31x6jO75qwLX8poexFbfA4P1DDScyPgdZRCmHbm58= Received: from DM6PR08CA0005.namprd08.prod.outlook.com (2603:10b6:5:80::18) by SA1PR12MB8743.namprd12.prod.outlook.com (2603:10b6:806:37c::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7386.26; Mon, 18 Mar 2024 17:32:19 +0000 Received: from CH1PEPF0000AD7A.namprd04.prod.outlook.com (2603:10b6:5:80:cafe::3a) by DM6PR08CA0005.outlook.office365.com (2603:10b6:5:80::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7386.27 via Frontend Transport; Mon, 18 Mar 2024 17:32:19 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CH1PEPF0000AD7A.mail.protection.outlook.com (10.167.244.59) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7409.10 via Frontend Transport; Mon, 18 Mar 2024 17:32:19 +0000 Received: from ubuntu2004.linuxvmimages.local (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 18 Mar 2024 12:32:14 -0500 From: Sivaprasad Tummala To: , , , , , , , , , CC: , , Subject: [PATCH v5 3/6] examples/l3fwd-graph: fix lcore ID restriction Date: Mon, 18 Mar 2024 18:31:42 +0100 Message-ID: <20240318173146.24303-4-sivaprasad.tummala@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240318173146.24303-1-sivaprasad.tummala@amd.com> References: <20240116182332.95537-1-sivaprasad.tummala@amd.com> <20240318173146.24303-1-sivaprasad.tummala@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD7A:EE_|SA1PR12MB8743:EE_ X-MS-Office365-Filtering-Correlation-Id: 47871088-e52d-4da0-a5b2-08dc47715ca5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: AnBJeLoUDqFUzGDhKco9+XeZyX/K4ioZJIDucbkm2XPaAPyTZMtqilBnYZ3zkbc+4QndN6M3zK6Y+iZ9D6iJolD7TtUgc9czsFIqrsCbHd650+fbn+jwHQD5mTIpB5HWrjzbEW2rvpufpk7O8BMODJpu4OSBXU8z8L9XeJJEcojKhPMeTYmP4CQLl2me4D6WSj94rSiEzDw9Wmsu8gEEcOZQ4zHASCGDioec/FyMh7LQVqHUFYRmAjQzxqz/QJdWrPpj7csjac/ZbADS1z9AujM142IUEPI7KORhPsSkgoNktDGnshRhh58oNY/lzwo4s2pxx3llwqUF+CT6oPNJRg6/IHMekGzbRC2Rv9As+Ag3JGwkqjc0cDc9Gea6NVxgTcEdSKfRnyvnKeGiBoaY+PACbjXazBU+iLkmdVvZcAIDyKn8ug1WUR24Yy0fFiBFcphWYvJtPI+PKOSpuN1KA0cRcjBidVrQlg2qCVavHplKoTkyCD7/AJqRYtx0bNFTbJgGuM2vQF9PKjdNEyahVw4yElr3j/gCVmU6CAKKly5boksGMktmB2JC0EvYj590o0h04IIu7VEYBV4+Sz7E3GKfC/LPhAe+VtMVfJOa5+J6g/veCmOXjmx2CplOqS7UTulumyc6H3D+SwKGf331STNSrHX7VTYE89j3/JG4wNoys3spNWYVuji5ApCDXsfmbFc0p5hrr5+7QZHdBTefNZulvnJ5QPmxh/wm+97Fa5Y4mBIB6qOTvcO/36km178iIaDkemftxfb08zu6jl5THw== X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(376005)(1800799015)(7416005)(82310400014)(36860700004)(921011); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Mar 2024 17:32:19.0379 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 47871088-e52d-4da0-a5b2-08dc47715ca5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD7A.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB8743 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Currently the config option allows lcore IDs up to 255, irrespective of RTE_MAX_LCORES and needs to be fixed. The patch allows config options based on DPDK config. Fixes: 08bd1a174461 ("examples/l3fwd-graph: add graph-based l3fwd skeleton") Cc: ndabilpuram@marvell.com Cc: stable@dpdk.org Signed-off-by: Sivaprasad Tummala --- examples/l3fwd-graph/main.c | 33 +++++++++++++++++---------------- 1 file changed, 17 insertions(+), 16 deletions(-) diff --git a/examples/l3fwd-graph/main.c b/examples/l3fwd-graph/main.c index 96cb1c81ff..557ac6d823 100644 --- a/examples/l3fwd-graph/main.c +++ b/examples/l3fwd-graph/main.c @@ -90,7 +90,7 @@ static int pcap_trace_enable; struct lcore_rx_queue { uint16_t port_id; - uint8_t queue_id; + uint16_t queue_id; char node_name[RTE_NODE_NAMESIZE]; }; @@ -110,8 +110,8 @@ static struct lcore_conf lcore_conf[RTE_MAX_LCORE]; struct lcore_params { uint16_t port_id; - uint8_t queue_id; - uint8_t lcore_id; + uint16_t queue_id; + uint32_t lcore_id; } __rte_cache_aligned; static struct lcore_params lcore_params_array[MAX_LCORE_PARAMS]; @@ -205,19 +205,19 @@ check_worker_model_params(void) static int check_lcore_params(void) { - uint8_t queue, lcore; + uint16_t queue, i; int socketid; - uint16_t i; + uint32_t lcore; for (i = 0; i < nb_lcore_params; ++i) { queue = lcore_params[i].queue_id; if (queue >= MAX_RX_QUEUE_PER_PORT) { - printf("Invalid queue number: %hhu\n", queue); + printf("Invalid queue number: %hu\n", queue); return -1; } lcore = lcore_params[i].lcore_id; if (!rte_lcore_is_enabled(lcore)) { - printf("Error: lcore %hhu is not enabled in lcore mask\n", + printf("Error: lcore %u is not enabled in lcore mask\n", lcore); return -1; } @@ -228,7 +228,7 @@ check_lcore_params(void) } socketid = rte_lcore_to_socket_id(lcore); if ((socketid != 0) && (numa_on == 0)) { - printf("Warning: lcore %hhu is on socket %d with numa off\n", + printf("Warning: lcore %u is on socket %d with numa off\n", lcore, socketid); } } @@ -257,7 +257,7 @@ check_port_config(void) return 0; } -static uint8_t +static uint16_t get_port_n_rx_queues(const uint16_t port) { int queue = -1; @@ -275,14 +275,14 @@ get_port_n_rx_queues(const uint16_t port) } } - return (uint8_t)(++queue); + return (uint16_t)(++queue); } static int init_lcore_rx_queues(void) { uint16_t i, nb_rx_queue; - uint8_t lcore; + uint32_t lcore; for (i = 0; i < nb_lcore_params; ++i) { lcore = lcore_params[i].lcore_id; @@ -290,7 +290,7 @@ init_lcore_rx_queues(void) if (nb_rx_queue >= MAX_RX_QUEUE_PER_LCORE) { printf("Error: too many queues (%u) for lcore: %u\n", (unsigned int)nb_rx_queue + 1, - (unsigned int)lcore); + lcore); return -1; } @@ -448,11 +448,11 @@ parse_config(const char *q_arg) } lcore_params_array[nb_lcore_params].port_id = - (uint8_t)int_fld[FLD_PORT]; + (uint16_t)int_fld[FLD_PORT]; lcore_params_array[nb_lcore_params].queue_id = - (uint8_t)int_fld[FLD_QUEUE]; + (uint16_t)int_fld[FLD_QUEUE]; lcore_params_array[nb_lcore_params].lcore_id = - (uint8_t)int_fld[FLD_LCORE]; + (uint32_t)int_fld[FLD_LCORE]; ++nb_lcore_params; } lcore_params = lcore_params_array; @@ -1011,7 +1011,8 @@ main(int argc, char **argv) "ethdev_tx-*", "pkt_drop", }; - uint8_t nb_rx_queue, queue, socketid; + uint8_t socketid; + uint16_t nb_rx_queue, queue; struct rte_graph_param graph_conf; struct rte_eth_dev_info dev_info; uint32_t nb_ports, nb_conf = 0; From patchwork Mon Mar 18 17:31:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sivaprasad Tummala X-Patchwork-Id: 138461 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id DC84D43CE8; Mon, 18 Mar 2024 18:32:59 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A2AFE40A81; Mon, 18 Mar 2024 18:32:26 +0100 (CET) Received: from NAM11-BN8-obe.outbound.protection.outlook.com (mail-bn8nam11on2041.outbound.protection.outlook.com [40.107.236.41]) by mails.dpdk.org (Postfix) with ESMTP id 3332040DCB; Mon, 18 Mar 2024 18:32:25 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=A4j8dQw0zt8X1Bas6bfc47vhcDo2I3akxkhtzos/796vnh6zB8rktF2YHgwLRoknmsPzGn0kUFycNrqXk5kUpKaQ/+AayeNrqNIaG/lRpa5xcyJAK4smGTmvh+ne68xkbjoPiZI+OF/yotZkL6zvXrHBzBrs8JmIi1TMPkCS1VCA5dAhyLDjHy2LcanpeHXtcH7KVlpMg5P+U32WCByrIPwrGYooFqNn2zGTLucueSM3vBHDrBNQ6gNOiXDVHD+El0pDRdoP3rWQRlpWMNd4t4HNBpiYWGqz6b0nmVSwP/BwieBJG180uIK0AZaURcE7Hy8IRz7dcOc7PM/JNW/GyQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=s0XMAVPNXoiXHRddejmmS2DSqjX7LbwK5+ZhrdIkj6k=; b=h+IEZYEL0wOPEU6jDGfVZJ3VRbKl74Ld3jwcWG+ZN/VEDzGQarePr6TcETCuZ6XqaEkPFd2WNt7lJ9v+DyIanye7PSgnhwSzbdK0eIAnCptoj8E2nACkHx+gIX3jpEs0/JsKdol3V2lT+sT+9IQRJBFjGmFOL59BRCzyfKu+zc+h5TJ2/EPaVfDklBN69Ar5YwbFJMCcxvdc+N5qoBm7Tl5QNLtIby0EekLCoUHbAHtQAIEFzIl33FnyHK0LV9bsxwCRQvpZby4h2Xmd4zkszjeQhMbfb4xSj75mwcGkbW0KLXkCA+rp2PtUyLrHTY+a8lCWkERs2RAW796t3JXFfg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=intel.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=s0XMAVPNXoiXHRddejmmS2DSqjX7LbwK5+ZhrdIkj6k=; b=404MNj0KeaQbGzY0XL8/h4NLhtC3OzVBrSgO3SDhdq0h29dH4O2IzL29nIfB1JlRF1BMu8Fuj8GSQujLQBRq3kccYQTkPEoN6EnPdinoTH+Od1O/J18NEZyNKt2WDCPBHwIjfiqpwaFpBe/D4VsKhBasu+xNvixOotCJpEkexvY= Received: from CH2PR02CA0028.namprd02.prod.outlook.com (2603:10b6:610:4e::38) by IA1PR12MB7638.namprd12.prod.outlook.com (2603:10b6:208:426::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7386.27; Mon, 18 Mar 2024 17:32:22 +0000 Received: from CH1PEPF0000AD79.namprd04.prod.outlook.com (2603:10b6:610:4e:cafe::af) by CH2PR02CA0028.outlook.office365.com (2603:10b6:610:4e::38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7386.19 via Frontend Transport; Mon, 18 Mar 2024 17:32:22 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CH1PEPF0000AD79.mail.protection.outlook.com (10.167.244.57) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7409.10 via Frontend Transport; Mon, 18 Mar 2024 17:32:22 +0000 Received: from ubuntu2004.linuxvmimages.local (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 18 Mar 2024 12:32:18 -0500 From: Sivaprasad Tummala To: , , , , , , , , , CC: , , Subject: [PATCH v5 4/6] examples/ipsec-secgw: fix lcore ID restriction Date: Mon, 18 Mar 2024 18:31:43 +0100 Message-ID: <20240318173146.24303-5-sivaprasad.tummala@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240318173146.24303-1-sivaprasad.tummala@amd.com> References: <20240116182332.95537-1-sivaprasad.tummala@amd.com> <20240318173146.24303-1-sivaprasad.tummala@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD79:EE_|IA1PR12MB7638:EE_ X-MS-Office365-Filtering-Correlation-Id: cc06d770-9627-4163-2a93-08dc47715ec2 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: DnFCwz34ggclcdYzHDk2IaK9p8bJVjOyjJ+yXezfFdPG5gYfXJ+I/5g3viYAz5HKwDHAnoV27x2n+rfuiI/+33ey5HEPfBzaQyiaHHOrHfI5xpNaepsj6KVBgeqzBJJvZ3Rx+U68akgTmbHom6c4NCIgkIWRuzK+YxD/KwMkApHNe6jc4V7ZH7lZbPIxzQ5txFjDtog6t9lNDwE01YPD8v+07MStaehJdFrNZls3s4s7Potpe5WM3dz/KK5bWPXa4WZuUenfaKSQX6UH9lCSeY5u/DNlKy07v3/e6ATevjOn4Z/2P1OqdmQ3WVDuSkdfHbi8/IYb8pyjy4JYa4f1rhhlzFMV2HlVwakvzxSZCZlXj0QgY6CWwmRoH4EtosgNScyIGhPy2GR6MwEYceWMvcgRmSe5Fk8u4BzCj06XT1KzAL1Hq5WGb2zoDzRBLM1f23rzv3uzGYcmkq3qNGGchiO80jfHsoX/i9DsLKkFb9I8lzyYaKCL+StxUjyFBpnp2NB92leeuZZ5ewkjCWANXpohDuDIqTaJ6iIUZ8cFr740Hzfhu26xy+I6xpGssT4ychKS9R3IGGgDRnVqJ+7U20LwH/cLuyMKQXd6iKyvHkaA/Bha+Z0wR8mzX8bSOYPXIppURWnm6ccLSmS8kozpsBdZRNpVqXteUXbkTR7/Ss8wXBRBilUgdrlTwxdCeeRzs8W5hYha2LF/UHvuMZdDCRBqdrDgkJUFakV+Jy8WJa+BxKQXZMCCF5l8EiQ0zYFIxEkPcwM/F4BvfSQOOUoEDw== X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(7416005)(376005)(82310400014)(1800799015)(36860700004)(921011); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Mar 2024 17:32:22.5802 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cc06d770-9627-4163-2a93-08dc47715ec2 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD79.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB7638 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Currently the config option allows lcore IDs up to 255, irrespective of RTE_MAX_LCORES and needs to be fixed. The patch allows config options based on DPDK config. Fixes: d299106e8e31 ("examples/ipsec-secgw: add IPsec sample application") Cc: sergio.gonzalez.monroy@intel.com Cc: stable@dpdk.org Signed-off-by: Sivaprasad Tummala Acked-by: Konstantin Ananyev --- examples/ipsec-secgw/event_helper.h | 2 +- examples/ipsec-secgw/ipsec-secgw.c | 37 +++++++++++++++-------------- examples/ipsec-secgw/ipsec.c | 2 +- examples/ipsec-secgw/ipsec.h | 6 ++--- examples/ipsec-secgw/ipsec_worker.c | 10 ++++---- 5 files changed, 28 insertions(+), 29 deletions(-) diff --git a/examples/ipsec-secgw/event_helper.h b/examples/ipsec-secgw/event_helper.h index dfb81bfcf1..be635685b4 100644 --- a/examples/ipsec-secgw/event_helper.h +++ b/examples/ipsec-secgw/event_helper.h @@ -102,7 +102,7 @@ struct eh_event_link_info { /**< Event port ID */ uint8_t eventq_id; /**< Event queue to be linked to the port */ - uint8_t lcore_id; + uint32_t lcore_id; /**< Lcore to be polling on this port */ }; diff --git a/examples/ipsec-secgw/ipsec-secgw.c b/examples/ipsec-secgw/ipsec-secgw.c index 45a303850d..dc7491a2b9 100644 --- a/examples/ipsec-secgw/ipsec-secgw.c +++ b/examples/ipsec-secgw/ipsec-secgw.c @@ -220,8 +220,8 @@ static const char *cfgfile; struct lcore_params { uint16_t port_id; - uint8_t queue_id; - uint8_t lcore_id; + uint16_t queue_id; + uint32_t lcore_id; } __rte_cache_aligned; static struct lcore_params lcore_params_array[MAX_LCORE_PARAMS]; @@ -695,8 +695,7 @@ ipsec_poll_mode_worker(void) struct rte_mbuf *pkts[MAX_PKT_BURST]; uint32_t lcore_id; uint64_t prev_tsc, diff_tsc, cur_tsc; - uint16_t i, nb_rx, portid; - uint8_t queueid; + uint16_t i, nb_rx, portid, queueid; struct lcore_conf *qconf; int32_t rc, socket_id; const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) @@ -743,7 +742,7 @@ ipsec_poll_mode_worker(void) portid = rxql[i].port_id; queueid = rxql[i].queue_id; RTE_LOG(INFO, IPSEC, - " -- lcoreid=%u portid=%u rxqueueid=%hhu\n", + " -- lcoreid=%u portid=%u rxqueueid=%hu\n", lcore_id, portid, queueid); } @@ -788,8 +787,7 @@ int check_flow_params(uint16_t fdir_portid, uint8_t fdir_qid) { uint16_t i; - uint16_t portid; - uint8_t queueid; + uint16_t portid, queueid; for (i = 0; i < nb_lcore_params; ++i) { portid = lcore_params_array[i].port_id; @@ -809,7 +807,7 @@ check_flow_params(uint16_t fdir_portid, uint8_t fdir_qid) static int32_t check_poll_mode_params(struct eh_conf *eh_conf) { - uint8_t lcore; + uint32_t lcore; uint16_t portid; uint16_t i; int32_t socket_id; @@ -828,13 +826,13 @@ check_poll_mode_params(struct eh_conf *eh_conf) for (i = 0; i < nb_lcore_params; ++i) { lcore = lcore_params[i].lcore_id; if (!rte_lcore_is_enabled(lcore)) { - printf("error: lcore %hhu is not enabled in " + printf("error: lcore %u is not enabled in " "lcore mask\n", lcore); return -1; } socket_id = rte_lcore_to_socket_id(lcore); if (socket_id != 0 && numa_on == 0) { - printf("warning: lcore %hhu is on socket %d " + printf("warning: lcore %u is on socket %d " "with numa off\n", lcore, socket_id); } @@ -851,7 +849,7 @@ check_poll_mode_params(struct eh_conf *eh_conf) return 0; } -static uint8_t +static uint16_t get_port_nb_rx_queues(const uint16_t port) { int32_t queue = -1; @@ -862,14 +860,14 @@ get_port_nb_rx_queues(const uint16_t port) lcore_params[i].queue_id > queue) queue = lcore_params[i].queue_id; } - return (uint8_t)(++queue); + return (uint16_t)(++queue); } static int32_t init_lcore_rx_queues(void) { uint16_t i, nb_rx_queue; - uint8_t lcore; + uint32_t lcore; for (i = 0; i < nb_lcore_params; ++i) { lcore = lcore_params[i].lcore_id; @@ -1050,6 +1048,8 @@ parse_config(const char *q_arg) char *str_fld[_NUM_FLD]; int32_t i; uint32_t size; + uint32_t max_fld[_NUM_FLD] = {RTE_MAX_ETHPORTS, + USHRT_MAX, RTE_MAX_LCORE}; nb_lcore_params = 0; @@ -1070,7 +1070,7 @@ parse_config(const char *q_arg) for (i = 0; i < _NUM_FLD; i++) { errno = 0; int_fld[i] = strtoul(str_fld[i], &end, 0); - if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) + if (errno != 0 || end == str_fld[i] || int_fld[i] > max_fld[i]) return -1; } if (nb_lcore_params >= MAX_LCORE_PARAMS) { @@ -1079,11 +1079,11 @@ parse_config(const char *q_arg) return -1; } lcore_params_array[nb_lcore_params].port_id = - (uint8_t)int_fld[FLD_PORT]; + (uint16_t)int_fld[FLD_PORT]; lcore_params_array[nb_lcore_params].queue_id = - (uint8_t)int_fld[FLD_QUEUE]; + (uint16_t)int_fld[FLD_QUEUE]; lcore_params_array[nb_lcore_params].lcore_id = - (uint8_t)int_fld[FLD_LCORE]; + (uint32_t)int_fld[FLD_LCORE]; ++nb_lcore_params; } lcore_params = lcore_params_array; @@ -1919,7 +1919,8 @@ port_init(uint16_t portid, uint64_t req_rx_offloads, uint64_t req_tx_offloads, struct rte_eth_dev_info dev_info; struct rte_eth_txconf *txconf; uint16_t nb_tx_queue, nb_rx_queue; - uint16_t tx_queueid, rx_queueid, queue, lcore_id; + uint16_t tx_queueid, rx_queueid, queue; + uint32_t lcore_id; int32_t ret, socket_id; struct lcore_conf *qconf; struct rte_ether_addr ethaddr; diff --git a/examples/ipsec-secgw/ipsec.c b/examples/ipsec-secgw/ipsec.c index c321108119..b52b0ffc3d 100644 --- a/examples/ipsec-secgw/ipsec.c +++ b/examples/ipsec-secgw/ipsec.c @@ -259,7 +259,7 @@ create_lookaside_session(struct ipsec_ctx *ipsec_ctx_lcore[], continue; /* Looking for cryptodev, which can handle this SA */ - key.lcore_id = (uint8_t)lcore_id; + key.lcore_id = lcore_id; key.cipher_algo = (uint8_t)sa->cipher_algo; key.auth_algo = (uint8_t)sa->auth_algo; key.aead_algo = (uint8_t)sa->aead_algo; diff --git a/examples/ipsec-secgw/ipsec.h b/examples/ipsec-secgw/ipsec.h index bdcada1c40..6526a80d81 100644 --- a/examples/ipsec-secgw/ipsec.h +++ b/examples/ipsec-secgw/ipsec.h @@ -256,11 +256,11 @@ extern struct offloads tx_offloads; * (hash key calculation reads 8 bytes if this struct is size 5 bytes). */ struct cdev_key { - uint16_t lcore_id; + uint32_t lcore_id; uint8_t cipher_algo; uint8_t auth_algo; uint8_t aead_algo; - uint8_t padding[3]; /* padding to 8-byte size should be zeroed */ + uint8_t padding; /* padding to 8-byte size should be zeroed */ }; struct socket_ctx { @@ -285,7 +285,7 @@ struct cnt_blk { struct lcore_rx_queue { uint16_t port_id; - uint8_t queue_id; + uint16_t queue_id; void *sec_ctx; } __rte_cache_aligned; diff --git a/examples/ipsec-secgw/ipsec_worker.c b/examples/ipsec-secgw/ipsec_worker.c index 8d122e8519..90a4c38ba4 100644 --- a/examples/ipsec-secgw/ipsec_worker.c +++ b/examples/ipsec-secgw/ipsec_worker.c @@ -1598,8 +1598,7 @@ ipsec_poll_mode_wrkr_inl_pr(void) int32_t socket_id; uint32_t lcore_id; int32_t i, nb_rx; - uint16_t portid; - uint8_t queueid; + uint16_t portid, queueid; prev_tsc = 0; lcore_id = rte_lcore_id(); @@ -1633,7 +1632,7 @@ ipsec_poll_mode_wrkr_inl_pr(void) portid = rxql[i].port_id; queueid = rxql[i].queue_id; RTE_LOG(INFO, IPSEC, - " -- lcoreid=%u portid=%u rxqueueid=%hhu\n", + " -- lcoreid=%u portid=%u rxqueueid=%hu\n", lcore_id, portid, queueid); } @@ -1729,8 +1728,7 @@ ipsec_poll_mode_wrkr_inl_pr_ss(void) uint32_t i, nb_rx, j; int32_t socket_id; uint32_t lcore_id; - uint16_t portid; - uint8_t queueid; + uint16_t portid, queueid; prev_tsc = 0; lcore_id = rte_lcore_id(); @@ -1764,7 +1762,7 @@ ipsec_poll_mode_wrkr_inl_pr_ss(void) portid = rxql[i].port_id; queueid = rxql[i].queue_id; RTE_LOG(INFO, IPSEC, - " -- lcoreid=%u portid=%u rxqueueid=%hhu\n", + " -- lcoreid=%u portid=%u rxqueueid=%hu\n", lcore_id, portid, queueid); } From patchwork Mon Mar 18 17:31:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sivaprasad Tummala X-Patchwork-Id: 138463 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8A53543CE8; Mon, 18 Mar 2024 18:33:22 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8B76A40E09; Mon, 18 Mar 2024 18:32:36 +0100 (CET) Received: from NAM02-SN1-obe.outbound.protection.outlook.com (mail-sn1nam02on2061.outbound.protection.outlook.com [40.107.96.61]) by mails.dpdk.org (Postfix) with ESMTP id E7EA740DC9; Mon, 18 Mar 2024 18:32:33 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=REAxZmv/F1/aobQilZp7+JpHawa9fuOufV35+DhnPgNkFxC/v1kM6c+9Jz1tyzFuoskGIgRl7HI3VMbtILB7fBs9SGOckgLrTLe8nSiDP0WBdTwe0TM1mwWxuBzBfZm85kQMwKXSaD+RgiKjjobEywbpmuofjJH6vHcrgyO/H8VCfzVyYzi+y9AeyuGUpog5eT0O+xkrlLmlaQ31ocOJDbgwtrU1/eEK6Pzcwpa1EVcX6dIOSBehBsCYbkF3PhAMpwtga1hVd5Xy0D06fnAIVmojKxxtdWjxBUE/FWOu2pHA0e85KkV7L6KXmw7LijhbcySuUkIDDonASbzpFdf1rw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=sKL5Cjh46AbCO5GLJKM7k7DJqGLNep7Cq0iXrerPwbY=; b=gHQe2B2u/BppdIzgIEibKb3YGlQDYOgGyk7BZWxKUgUuIjv8qy0bsovZc08pAyaP8lYgx0GGqqT87rsgfB3LKB2b8bHVii81ATrPNzC3zNXT07X/6rPCz+5lYn9KSG8GVHnVJh8E8aI7AriVbHWzfRmBBs7omJwJMskMAZK6ZaSy8ucUdYBdGl4O6+GPJEwLY6rAQZUb5VxfAZTvqVkVmdtfoZdbvEyUQU2vg7iXXU3UbeWvvJwqP19Dxx05+YsIrP0rnYh4pT2sboS9x1w5DYIFqHX6YfRvrpSIP2WuEOtSEGhX+cpE26nQv5XWwMS3OQEqYLIKz+Vwc8yqqA4rrw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=intel.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=sKL5Cjh46AbCO5GLJKM7k7DJqGLNep7Cq0iXrerPwbY=; b=P8/Vddkl19ppFunt7HSUcPIUKJsNMhckGrJsASf39tW5GSc7UHyPLcLY7eVkXh7NsHshMt7Fgv/gjTsE/Ei1dZa6mspdrGdkXEoYYUoEovKMoK//i3wQGLDTeDWm5TbeE7MI7fbBplywpkY61xnbFufuN6jZQroSjYgqDGU0Ay4= Received: from BN0PR04CA0110.namprd04.prod.outlook.com (2603:10b6:408:ec::25) by IA0PR12MB8695.namprd12.prod.outlook.com (2603:10b6:208:485::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7386.26; Mon, 18 Mar 2024 17:32:28 +0000 Received: from BN3PEPF0000B073.namprd04.prod.outlook.com (2603:10b6:408:ec:cafe::de) by BN0PR04CA0110.outlook.office365.com (2603:10b6:408:ec::25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7386.27 via Frontend Transport; Mon, 18 Mar 2024 17:32:28 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN3PEPF0000B073.mail.protection.outlook.com (10.167.243.118) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7409.10 via Frontend Transport; Mon, 18 Mar 2024 17:32:28 +0000 Received: from ubuntu2004.linuxvmimages.local (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 18 Mar 2024 12:32:22 -0500 From: Sivaprasad Tummala To: , , , , , , , , , CC: , Subject: [PATCH v5 5/6] examples/qos_sched: fix lcore ID restriction Date: Mon, 18 Mar 2024 18:31:44 +0100 Message-ID: <20240318173146.24303-6-sivaprasad.tummala@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240318173146.24303-1-sivaprasad.tummala@amd.com> References: <20240116182332.95537-1-sivaprasad.tummala@amd.com> <20240318173146.24303-1-sivaprasad.tummala@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B073:EE_|IA0PR12MB8695:EE_ X-MS-Office365-Filtering-Correlation-Id: 1fed33dd-f7d5-4355-3c89-08dc4771623e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ENP+X01U/hIbDpAECWU0pQvYYBJd+e5Q319MKn+wwt+nky1TtZu3F4VEO47oDzC4HY66zDbT2dgRO7Wj4QaXK3heU1Fw0uGd1SXBeahDR8zGrvDz7Gitaklc0vXZBUDZkvzzt/uQuD8HHbakKbSb48BjoC4q7Domv1OoMQSWpWK1MwV1cPdTAxOntpSQ2Hn7P6p0oZr7t/NFxC4Aygh9jqLmeyjGUL8AdyuANGFj00XwRooK5MIN0C+HcU6gVEAkSLjq6EQNJdUgW450tFwMEZ5WMksYz5CKTzXVWBdU1CA2zfjpKC3FVg+9EPOkb5HYHfEEvR4kMSZ5ChCtOteXFvEtJkTh67wPSu6u6y/aeUD03Zg7HoABITVZ/81peLllou2dFKOJ2yq8/Xk4ynOgtq5A/LYiNruSHB6CkYDoI3uTW+lgrEM0nPIDBBazTDRp6r1M6gg8Yenq/268X8peYUj1PCi7j7E4RsC9rz8UiSo9f09F3MiDPdXapGXZu+9cB5TVmR1A6oLnYL3aPZnk8t/1F/zyZRxyX/8frRiei3Wzih/yMp5VAzEg1Mdcy66bWMkuspkcNna6/difOKBvEf5bumI/8n3YsISzrsiVLA3NTjmKFFbVzZW1rxQFKfPgFfI7eiT+la8lWM+Ek1JoQRMLIgf5zbu3swo5GvYmxkYY/PNdcdBjbcu/UHWf0bZJ7ffYLpzT3YfZae1n2Nf5Bcj2gUyYiL7npke3moZn1VeFAqL/qqpkrv/oHFMwoQLs2ZsMQbcqM7jz6tER+Fts+w== X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(376005)(82310400014)(1800799015)(7416005)(36860700004)(921011); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Mar 2024 17:32:28.4421 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1fed33dd-f7d5-4355-3c89-08dc4771623e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B073.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB8695 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Currently the config option allows lcore IDs up to 255, irrespective of RTE_MAX_LCORES and needs to be fixed. The patch allows config options based on DPDK config. Fixes: de3cfa2c9823 ("sched: initial import") Cc: stable@dpdk.org Signed-off-by: Sivaprasad Tummala --- examples/qos_sched/args.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/examples/qos_sched/args.c b/examples/qos_sched/args.c index 8d61d3e454..886542b3c1 100644 --- a/examples/qos_sched/args.c +++ b/examples/qos_sched/args.c @@ -184,10 +184,10 @@ app_parse_flow_conf(const char *conf_str) pconf->rx_port = vals[0]; pconf->tx_port = vals[1]; - pconf->rx_core = (uint8_t)vals[2]; - pconf->wt_core = (uint8_t)vals[3]; + pconf->rx_core = vals[2]; + pconf->wt_core = vals[3]; if (ret == 5) - pconf->tx_core = (uint8_t)vals[4]; + pconf->tx_core = vals[4]; else pconf->tx_core = pconf->wt_core; From patchwork Mon Mar 18 17:31:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sivaprasad Tummala X-Patchwork-Id: 138462 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 18F0943CE8; Mon, 18 Mar 2024 18:33:12 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 04F1E40DC9; Mon, 18 Mar 2024 18:32:35 +0100 (CET) Received: from NAM04-MW2-obe.outbound.protection.outlook.com (mail-mw2nam04on2064.outbound.protection.outlook.com [40.107.101.64]) by mails.dpdk.org (Postfix) with ESMTP id AEE3440A80; Mon, 18 Mar 2024 18:32:33 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=PoWsx9fqH90XbW/OGo4ttADRSJgzEgIgayZEjMzHK6wTMiMJTQtDY/OBKCDlGWAvoj24t3QxpN1l20Egs+rUWIPhD7113JGzS3qOJ+wx6N051ZHCMzIr5G5BI4IQKHxzWDbkkoGSSu+OhPiJ9Dm43qdjflF/z6k/iv4JvRdlC2c1XiCa0ZGuEGIc93VU5E8R57wZ7fniaKCqA9k9TNUAyAAJP6O4NRELIC20KpGDT12bIb800T/lY1gb0mUh4HoEpeQElqAb6XpnzRu1PJieO4wb/9TDaOZ4d9aNwZDg6netlJ+O9pgSn3zZCEJD6L4iGMssGE+FFnMw4WoS/Z6MhA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=OTd5VNcNhO6FDeMTA3luxXWRKtBBvBwfBetB+a3X7iA=; b=d50YAC2CevXffpqCZtY+DeDr11K7hp0+SL6ZODlb7U2yy7zTj1wrVeBxioEeLJwogp7xN/KenGTMKWjwjObcXNJt6CWCClshyByEcdKJrW/pMpOwkKUlagqe2ZkpTV73BBb7zFtBlIzKJ0Vy+VbT/owIvkf8lINNH7Q67D9trryUXYV4uO7SF3xalUXjDe3h6fORuS4v77ae3tiOgxsoWV9zDuv6u3kxxqRMDZavkSS9A/NeDu3HijqEDnALASf43uJryMe3XIK4hDUvJb1hBY1fVmzy8WcdVhMV+JMakuKcptUeZwYw/Y1+zt18Fcf4w4wVI2sripMmQGermb7N0g== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=intel.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=OTd5VNcNhO6FDeMTA3luxXWRKtBBvBwfBetB+a3X7iA=; b=LlrBf55a727wV9A+7hXeZ5htz2Y6yrrLG0As3uSz/73vrhT4/NdYecR2DpSnPOZYSJ/9fBtmrI0ytLttRk0lsGmGJvcXcSUJ7WUPZDEYPLtf6CQrA5urkTGQYwHuj7BmzlyPgdRSSaakO4o5mXDwFCRDXx2ZhHiyi4ql7KyOHyU= Received: from BN0PR04CA0191.namprd04.prod.outlook.com (2603:10b6:408:e9::16) by PH7PR12MB9075.namprd12.prod.outlook.com (2603:10b6:510:2f0::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7386.27; Mon, 18 Mar 2024 17:32:29 +0000 Received: from BN3PEPF0000B076.namprd04.prod.outlook.com (2603:10b6:408:e9:cafe::10) by BN0PR04CA0191.outlook.office365.com (2603:10b6:408:e9::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7386.27 via Frontend Transport; Mon, 18 Mar 2024 17:32:29 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN3PEPF0000B076.mail.protection.outlook.com (10.167.243.121) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7409.10 via Frontend Transport; Mon, 18 Mar 2024 17:32:29 +0000 Received: from ubuntu2004.linuxvmimages.local (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 18 Mar 2024 12:32:25 -0500 From: Sivaprasad Tummala To: , , , , , , , , , CC: , , Subject: [PATCH v5 6/6] examples/vm_power_manager: fix lcore ID restriction Date: Mon, 18 Mar 2024 18:31:45 +0100 Message-ID: <20240318173146.24303-7-sivaprasad.tummala@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240318173146.24303-1-sivaprasad.tummala@amd.com> References: <20240116182332.95537-1-sivaprasad.tummala@amd.com> <20240318173146.24303-1-sivaprasad.tummala@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B076:EE_|PH7PR12MB9075:EE_ X-MS-Office365-Filtering-Correlation-Id: 9c0e1d04-1bfe-4b4f-42ef-08dc477162e6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Kevyx98sX8zBI8CVC7C7Io7xShhCJxuqNnstC+/Vn17fn0gCmntJzBRdi/o8V5ZJyrqGXxHxjYJh+aRwXD/Hfn/i1w9X59fLKkxsBXA/GGEqYwACUrSTkD67Ju03apVZoV+lsDPapcHMU6ikZvJmP5ZH60JnKfz8bZhkqEJdN6lT5uFIpxlMCJTKco1CdVkkcnRQW/d5fc/3gRbUz6iCzIgVc1Ub4qLmng6A5+x3lQa99RPf1LfJ43qhQZOSKVRP8GvJTF6loNa6IBypTVjuF5eEPrpCEukKGV6RfHA3XQNNBtcyOciMdSAcUOSbsFUwACFG5S0M6AoZkX+r3KJj0M51g0Ht/YiBNskb8srxpGgTD8GzWFzmJZpE7uxszmV/roP1DqmKHGdq9DFUBFRNIGGZwI3A2J4X+x1+uqS5HboJfIjAjhDjAypltq4HP12taULn0sULkC+zkgox8b45W7pmMm4zYLafwpEPQO2NSl6do2vlcVCpEMtKiu8CFd9e5EYTPmZRar2xlF/cO0FaykntvpKIZc2kABiSZB2IXeFqxyCSAsvuDMxAyASoCkVGK5ypb57b9WWJ+r0+PxFwuN0uFe+M2678EVJBoUaxgqbULg7deZxQcDdOUMV3nptXYVNWHFM6J5DCm8i/5fPk9d21sZpdhMCEk69XoYW6ddexAdxSz3BQrmsCu7q4mmuJTe1dwg4rGLZqMT208saKUsHlpsUHrz+Hl2TEPY3irh1V3PAXf8CeT5hN/eBzl19ZDb0X4aOAnUj3TVa2gGgKJg== X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(376005)(82310400014)(7416005)(36860700004)(1800799015)(921011); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Mar 2024 17:32:29.5433 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9c0e1d04-1bfe-4b4f-42ef-08dc477162e6 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B076.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB9075 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Currently the config option allows lcore IDs up to 255, irrespective of RTE_MAX_LCORES and needs to be fixed. The patch allows config options based on DPDK config. Fixes: 0e8f47491f09 ("examples/vm_power: add command to query CPU frequency") Cc: marcinx.hajkowski@intel.com Cc: stable@dpdk.org Signed-off-by: Sivaprasad Tummala --- examples/vm_power_manager/guest_cli/vm_power_cli_guest.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/examples/vm_power_manager/guest_cli/vm_power_cli_guest.c b/examples/vm_power_manager/guest_cli/vm_power_cli_guest.c index 94bfbbaf78..5eddb47847 100644 --- a/examples/vm_power_manager/guest_cli/vm_power_cli_guest.c +++ b/examples/vm_power_manager/guest_cli/vm_power_cli_guest.c @@ -401,7 +401,7 @@ check_response_cmd(unsigned int lcore_id, int *result) struct cmd_set_cpu_freq_result { cmdline_fixed_string_t set_cpu_freq; - uint8_t lcore_id; + uint32_t lcore_id; cmdline_fixed_string_t cmd; }; @@ -444,7 +444,7 @@ cmdline_parse_token_string_t cmd_set_cpu_freq = set_cpu_freq, "set_cpu_freq"); cmdline_parse_token_num_t cmd_set_cpu_freq_core_num = TOKEN_NUM_INITIALIZER(struct cmd_set_cpu_freq_result, - lcore_id, RTE_UINT8); + lcore_id, RTE_UINT32); cmdline_parse_token_string_t cmd_set_cpu_freq_cmd_cmd = TOKEN_STRING_INITIALIZER(struct cmd_set_cpu_freq_result, cmd, "up#down#min#max#enable_turbo#disable_turbo");