From patchwork Wed Mar 6 12:24:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138014 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1E24E43C5B; Wed, 6 Mar 2024 13:24:57 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D704840A6F; Wed, 6 Mar 2024 13:24:56 +0100 (CET) Received: from smtp-fw-2101.amazon.com (smtp-fw-2101.amazon.com [72.21.196.25]) by mails.dpdk.org (Postfix) with ESMTP id 5BC104027C for ; Wed, 6 Mar 2024 13:24:55 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727896; x=1741263896; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=SOx7LsS6G0ty/ZpiCj/kAL1TgAnWPKqvmUmP5IMtYfk=; b=gh/eaUqBofnMXSuwYInMpLpWXWnXi2J2DA52KPIO1t8V8rx445P2QSng FKNvQD+KKSn3HzJ3Xc3kY1dLC1eJlvzPQMCwUO2gMyU1AmUfduvPEK1z2 DshczQlne8z0AMrR5dlfDrctwVyZagpRHnSeY1aSfHqXlOPFIozTqE9wm k=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="385860453" Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO smtpout.prod.us-east-1.prod.farcaster.email.amazon.dev) ([10.43.8.6]) by smtp-border-fw-2101.iad2.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:24:53 +0000 Received: from EX19MTAEUC001.ant.amazon.com [10.0.10.100:20519] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.42.5:2525] with esmtp (Farcaster) id 899dc50d-8f71-423f-bbe9-8c465f6da4e1; Wed, 6 Mar 2024 12:24:52 +0000 (UTC) X-Farcaster-Flow-ID: 899dc50d-8f71-423f-bbe9-8c465f6da4e1 Received: from EX19D007EUA001.ant.amazon.com (10.252.50.133) by EX19MTAEUC001.ant.amazon.com (10.252.51.155) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:24:51 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUA001.ant.amazon.com (10.252.50.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:24:51 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:24:49 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 01/33] net/ena: rework the metrics multi-process functions Date: Wed, 6 Mar 2024 14:24:13 +0200 Message-ID: <20240306122445.4350-2-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes 1. Changed the rte_memcpy call to use the precomputed buf_size. 2. Removed redundant address operators (ampersand symbol) when providing memcpy source address parameter. 3. Code style related change. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/ena_ethdev.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c index beb17c4125..6d500bfa78 100644 --- a/drivers/net/ena/ena_ethdev.c +++ b/drivers/net/ena/ena_ethdev.c @@ -531,8 +531,8 @@ __extension__ ({ __extension__ ({ ENA_TOUCH(rsp); ENA_TOUCH(ena_dev); - if (stats != (struct ena_admin_eni_stats *)&adapter->metrics_stats) - rte_memcpy(stats, &adapter->metrics_stats, sizeof(*stats)); + if (stats != (struct ena_admin_eni_stats *)adapter->metrics_stats) + rte_memcpy(stats, adapter->metrics_stats, sizeof(*stats)); }), struct ena_com_dev *ena_dev, struct ena_admin_eni_stats *stats); @@ -590,9 +590,8 @@ __extension__ ({ __extension__ ({ ENA_TOUCH(rsp); ENA_TOUCH(ena_dev); - ENA_TOUCH(buf_size); - if (buf != (char *)&adapter->metrics_stats) - rte_memcpy(buf, &adapter->metrics_stats, adapter->metrics_num * sizeof(uint64_t)); + if (buf != (char *)adapter->metrics_stats) + rte_memcpy(buf, adapter->metrics_stats, buf_size); }), struct ena_com_dev *ena_dev, char *buf, size_t buf_size); @@ -4088,7 +4087,7 @@ ena_mp_primary_handle(const struct rte_mp_msg *mp_msg, const void *peer) case ENA_MP_CUSTOMER_METRICS_GET: res = ena_com_get_customer_metrics(ena_dev, (char *)adapter->metrics_stats, - sizeof(uint64_t) * adapter->metrics_num); + adapter->metrics_num * sizeof(uint64_t)); break; case ENA_MP_SRD_STATS_GET: res = ena_com_get_ena_srd_info(ena_dev, From patchwork Wed Mar 6 12:24:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138015 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3CE0D43C5B; Wed, 6 Mar 2024 13:25:04 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6D6DB42DEF; Wed, 6 Mar 2024 13:24:59 +0100 (CET) Received: from smtp-fw-80007.amazon.com (smtp-fw-80007.amazon.com [99.78.197.218]) by mails.dpdk.org (Postfix) with ESMTP id 7E35842DEE for ; Wed, 6 Mar 2024 13:24:58 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727899; x=1741263899; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=BOmRK8UcwIvmjS69kjh/4s0l51THaz0Y5/Awy+ac56U=; b=MRgLh7XvSdUabcjNY07tcRRAGFp6FtrvcOt6DPNv8sKjIigBr7P7MYzc 5FobMLf/Je537IxRt03q8NHNHuS/SiM6oh/K2WwFMRHW9xy04m/VBGGl4 0X4/A96uMzgxiUIJ74hrnTvQL1rdSq358rW/SDxURPwc1WBqddQtzs+KX w=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="279007461" Received: from pdx4-co-svc-p1-lb2-vlan2.amazon.com (HELO smtpout.prod.us-east-1.prod.farcaster.email.amazon.dev) ([10.25.36.210]) by smtp-border-fw-80007.pdx80.corp.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:24:55 +0000 Received: from EX19MTAEUA002.ant.amazon.com [10.0.43.254:33125] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.41.19:2525] with esmtp (Farcaster) id 1ae4afec-9750-4ab3-b8b4-7d299b9163ed; Wed, 6 Mar 2024 12:24:53 +0000 (UTC) X-Farcaster-Flow-ID: 1ae4afec-9750-4ab3-b8b4-7d299b9163ed Received: from EX19D007EUA001.ant.amazon.com (10.252.50.133) by EX19MTAEUA002.ant.amazon.com (10.252.50.124) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:24:53 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUA001.ant.amazon.com (10.252.50.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:24:53 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:24:51 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 02/33] net/ena: report new supported link speed capabilities Date: Wed, 6 Mar 2024 14:24:14 +0200 Message-ID: <20240306122445.4350-3-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes Updated the rte_eth_dev_info device supported speed bitmap to include 200Gbps and 400Gbps capabilities. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/ena_ethdev.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c index 6d500bfa78..b1e7de0541 100644 --- a/drivers/net/ena/ena_ethdev.c +++ b/drivers/net/ena/ena_ethdev.c @@ -2542,7 +2542,9 @@ static int ena_infos_get(struct rte_eth_dev *dev, RTE_ETH_LINK_SPEED_25G | RTE_ETH_LINK_SPEED_40G | RTE_ETH_LINK_SPEED_50G | - RTE_ETH_LINK_SPEED_100G; + RTE_ETH_LINK_SPEED_100G | + RTE_ETH_LINK_SPEED_200G | + RTE_ETH_LINK_SPEED_400G; /* Inform framework about available features */ dev_info->rx_offload_capa = ena_get_rx_port_offloads(adapter); From patchwork Wed Mar 6 12:24:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138018 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3B04E43C5B; Wed, 6 Mar 2024 13:25:33 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4268642E17; Wed, 6 Mar 2024 13:25:07 +0100 (CET) Received: from smtp-fw-9105.amazon.com (smtp-fw-9105.amazon.com [207.171.188.204]) by mails.dpdk.org (Postfix) with ESMTP id 6431442DFC for ; Wed, 6 Mar 2024 13:25:04 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727905; x=1741263905; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=4dZAtYkiE6lhOaDbHE5ce8hRE0FEhRd8KKXOL80impg=; b=KPjXZKKby5wzOs6MbGknBU0XedMrjyv5ghLvEpsTKddNBLZgL1nYY0A3 76YE7sBja5pY++W4FSsqecpfwbGXIMnSUPwDDG3pGGXz8WLSkdQW8Dqc7 /xSg6rZ7k7oYJn4WcVMnXkY1QYY62I0VAwrjGD+IuEYajQ0+US24MLJUH k=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="709678920" Received: from pdx4-co-svc-p1-lb2-vlan2.amazon.com (HELO smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.25.36.210]) by smtp-border-fw-9105.sea19.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:24:58 +0000 Received: from EX19MTAEUB001.ant.amazon.com [10.0.10.100:30623] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.11.111:2525] with esmtp (Farcaster) id c189c232-240d-47f6-bfaf-63e38b92f549; Wed, 6 Mar 2024 12:24:56 +0000 (UTC) X-Farcaster-Flow-ID: c189c232-240d-47f6-bfaf-63e38b92f549 Received: from EX19D007EUA001.ant.amazon.com (10.252.50.133) by EX19MTAEUB001.ant.amazon.com (10.252.51.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:24:56 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUA001.ant.amazon.com (10.252.50.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:24:55 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:24:53 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 03/33] net/ena: update imissed stat with Rx overruns Date: Wed, 6 Mar 2024 14:24:15 +0200 Message-ID: <20240306122445.4350-4-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes Depending on its acceleration support, the device updates a different statistic when an ingress packet is dropped because no buffers are available to hold it. - In AWS instance types from later generations 'rx_overruns' is updated. - Otherwise, in legacy instance types, 'rx_dropped_cnt' is updated. That is, there is no need to report rx_overruns separately as an xstat and the driver can simply sum up the two self-contained counters as the 'imissed' statistic. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- doc/guides/rel_notes/release_24_03.rst | 4 ++++ drivers/net/ena/ena_ethdev.c | 8 +++++--- drivers/net/ena/ena_ethdev.h | 1 - 3 files changed, 9 insertions(+), 4 deletions(-) diff --git a/doc/guides/rel_notes/release_24_03.rst b/doc/guides/rel_notes/release_24_03.rst index 879bb4944c..fb66d67d32 100644 --- a/doc/guides/rel_notes/release_24_03.rst +++ b/doc/guides/rel_notes/release_24_03.rst @@ -101,6 +101,10 @@ New Features * ``rte_flow_template_table_resize_complete()``. Complete table resize. +* **Updated Amazon ena (Elastic Network Adapter) net driver.** + + * Removed the reporting of `rx_overruns` errors from xstats and instead updated `imissed` stat with its value. + * **Updated Atomic Rules' Arkville driver.** * Added support for Atomic Rules' TK242 packet-capture family of devices diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c index b1e7de0541..d3f395a832 100644 --- a/drivers/net/ena/ena_ethdev.c +++ b/drivers/net/ena/ena_ethdev.c @@ -93,7 +93,6 @@ static const struct ena_stats ena_stats_global_strings[] = { ENA_STAT_GLOBAL_ENTRY(dev_start), ENA_STAT_GLOBAL_ENTRY(dev_stop), ENA_STAT_GLOBAL_ENTRY(tx_drops), - ENA_STAT_GLOBAL_ENTRY(rx_overruns), }; /* @@ -4014,9 +4013,12 @@ static void ena_keep_alive(void *adapter_data, tx_drops = ((uint64_t)desc->tx_drops_high << 32) | desc->tx_drops_low; rx_overruns = ((uint64_t)desc->rx_overruns_high << 32) | desc->rx_overruns_low; - adapter->drv_stats->rx_drops = rx_drops; + /* + * Depending on its acceleration support, the device updates a different statistic when + * Rx packet is dropped because there are no available buffers to accommodate it. + */ + adapter->drv_stats->rx_drops = rx_drops + rx_overruns; adapter->dev_stats.tx_drops = tx_drops; - adapter->dev_stats.rx_overruns = rx_overruns; } /** diff --git a/drivers/net/ena/ena_ethdev.h b/drivers/net/ena/ena_ethdev.h index 4988fbffb5..20b8307836 100644 --- a/drivers/net/ena/ena_ethdev.h +++ b/drivers/net/ena/ena_ethdev.h @@ -219,7 +219,6 @@ struct ena_stats_dev { * As a workaround it is being published as an extended statistic. */ u64 tx_drops; - u64 rx_overruns; }; struct ena_stats_metrics { From patchwork Wed Mar 6 12:24:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138016 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3966B43C5B; Wed, 6 Mar 2024 13:25:17 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A691B42DFE; Wed, 6 Mar 2024 13:25:03 +0100 (CET) Received: from smtp-fw-6002.amazon.com (smtp-fw-6002.amazon.com [52.95.49.90]) by mails.dpdk.org (Postfix) with ESMTP id 106B142DFB for ; Wed, 6 Mar 2024 13:25:01 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727902; x=1741263902; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=yptce/OFr2/7WPbgq5E3PmVZ26eQ0UlKUoff1IDDeN0=; b=e0VcTrMxLP8D+TfWWc/XqVzZlatwVUpMoBd6FUISB21H0p1zvs9BdNnG m072TUBM7aeVkbUYsP3C7ASgLLp6dZMenCnR8yHiso6fGelTxLsdNq6tV DQhNMtuaGO1NJJIFKXsoWlI88qqiiLDd+JxfI/gS5gSyRoioZx44EzbCe w=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="391346606" Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.43.8.6]) by smtp-border-fw-6002.iad6.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:24:59 +0000 Received: from EX19MTAEUB002.ant.amazon.com [10.0.10.100:52319] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.9.254:2525] with esmtp (Farcaster) id 1dd60d35-7441-43ad-b58c-e948fea0d44f; Wed, 6 Mar 2024 12:24:58 +0000 (UTC) X-Farcaster-Flow-ID: 1dd60d35-7441-43ad-b58c-e948fea0d44f Received: from EX19D007EUA001.ant.amazon.com (10.252.50.133) by EX19MTAEUB002.ant.amazon.com (10.252.51.79) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:24:58 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUA001.ant.amazon.com (10.252.50.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:24:58 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:24:56 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 04/33] net/ena: sub-optimal configuration notifications support Date: Wed, 6 Mar 2024 14:24:16 +0200 Message-ID: <20240306122445.4350-5-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes ENA device will send asynchronous notifications to the driver in order to notify users about sub-optimal configurations and refer them to public AWS documentation for further action. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- doc/guides/rel_notes/release_24_03.rst | 1 + .../net/ena/base/ena_defs/ena_admin_defs.h | 11 +++++++- drivers/net/ena/ena_ethdev.c | 26 +++++++++++++++++-- 3 files changed, 35 insertions(+), 3 deletions(-) diff --git a/doc/guides/rel_notes/release_24_03.rst b/doc/guides/rel_notes/release_24_03.rst index fb66d67d32..f47073c7dc 100644 --- a/doc/guides/rel_notes/release_24_03.rst +++ b/doc/guides/rel_notes/release_24_03.rst @@ -104,6 +104,7 @@ New Features * **Updated Amazon ena (Elastic Network Adapter) net driver.** * Removed the reporting of `rx_overruns` errors from xstats and instead updated `imissed` stat with its value. + * Added support for sub-optimal configuration notifications from the device. * **Updated Atomic Rules' Arkville driver.** diff --git a/drivers/net/ena/base/ena_defs/ena_admin_defs.h b/drivers/net/ena/base/ena_defs/ena_admin_defs.h index fa43e22918..4172916551 100644 --- a/drivers/net/ena/base/ena_defs/ena_admin_defs.h +++ b/drivers/net/ena/base/ena_defs/ena_admin_defs.h @@ -1214,7 +1214,8 @@ enum ena_admin_aenq_group { ENA_ADMIN_NOTIFICATION = 3, ENA_ADMIN_KEEP_ALIVE = 4, ENA_ADMIN_REFRESH_CAPABILITIES = 5, - ENA_ADMIN_AENQ_GROUPS_NUM = 6, + ENA_ADMIN_CONF_NOTIFICATIONS = 6, + ENA_ADMIN_AENQ_GROUPS_NUM = 7, }; enum ena_admin_aenq_notification_syndrome { @@ -1251,6 +1252,14 @@ struct ena_admin_aenq_keep_alive_desc { uint32_t rx_overruns_high; }; +struct ena_admin_aenq_conf_notifications_desc { + struct ena_admin_aenq_common_desc aenq_common_desc; + + uint64_t notifications_bitmap; + + uint64_t reserved; +}; + struct ena_admin_ena_mmio_req_read_less_resp { uint16_t req_id; diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c index d3f395a832..3157237c0d 100644 --- a/drivers/net/ena/ena_ethdev.c +++ b/drivers/net/ena/ena_ethdev.c @@ -36,6 +36,10 @@ #define ENA_MIN_RING_DESC 128 +#define BITS_PER_BYTE 8 + +#define BITS_PER_TYPE(type) (sizeof(type) * BITS_PER_BYTE) + /* * We should try to keep ENA_CLEANUP_BUF_SIZE lower than * RTE_MEMPOOL_CACHE_MAX_SIZE, so we can fit this in mempool local cache. @@ -1842,7 +1846,8 @@ static int ena_device_init(struct ena_adapter *adapter, BIT(ENA_ADMIN_NOTIFICATION) | BIT(ENA_ADMIN_KEEP_ALIVE) | BIT(ENA_ADMIN_FATAL_ERROR) | - BIT(ENA_ADMIN_WARNING); + BIT(ENA_ADMIN_WARNING) | + BIT(ENA_ADMIN_CONF_NOTIFICATIONS); aenq_groups &= get_feat_ctx->aenq.supported_groups; @@ -4021,6 +4026,22 @@ static void ena_keep_alive(void *adapter_data, adapter->dev_stats.tx_drops = tx_drops; } +static void ena_suboptimal_configuration(__rte_unused void *adapter_data, + struct ena_admin_aenq_entry *aenq_e) +{ + struct ena_admin_aenq_conf_notifications_desc *desc; + int bit, num_bits; + + desc = (struct ena_admin_aenq_conf_notifications_desc *)aenq_e; + num_bits = BITS_PER_TYPE(desc->notifications_bitmap); + for (bit = 0; bit < num_bits; bit++) { + if (desc->notifications_bitmap & RTE_BIT64(bit)) { + PMD_DRV_LOG(WARNING, + "Sub-optimal configuration notification code: %d\n", bit + 1); + } + } +} + /** * This handler will called for unknown event group or unimplemented handlers **/ @@ -4035,7 +4056,8 @@ static struct ena_aenq_handlers aenq_handlers = { .handlers = { [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change, [ENA_ADMIN_NOTIFICATION] = ena_notification, - [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive + [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive, + [ENA_ADMIN_CONF_NOTIFICATIONS] = ena_suboptimal_configuration }, .unimplemented_handler = unimplemented_aenq_handler }; From patchwork Wed Mar 6 12:24:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138017 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id CA49743C5B; Wed, 6 Mar 2024 13:25:24 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id ED78142E09; Wed, 6 Mar 2024 13:25:05 +0100 (CET) Received: from smtp-fw-9105.amazon.com (smtp-fw-9105.amazon.com [207.171.188.204]) by mails.dpdk.org (Postfix) with ESMTP id 9F14F42DFC; Wed, 6 Mar 2024 13:25:03 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727904; x=1741263904; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=VKWLz4oDznq//Hd+/QwTpu816la+fimxjPhi3Vu/OHA=; b=UZIgRhllVqQwFJD6U+Q1G+PLdcePfYbrPgDt7m0s7uYGCSy1g8x0gcG+ VFP3nq9hqszV+h59gtsm09kPGunJKkeX0qPm1eQ6eUdC93eqV0rBPpMao TStH5W73WlHCINqB+sObMoBtl1HrhciPbS184rhwy/Rtig54Bj71JkQxX 0=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="709678927" Received: from pdx4-co-svc-p1-lb2-vlan2.amazon.com (HELO smtpout.prod.us-east-1.prod.farcaster.email.amazon.dev) ([10.25.36.210]) by smtp-border-fw-9105.sea19.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:02 +0000 Received: from EX19MTAEUC002.ant.amazon.com [10.0.10.100:16231] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.16.96:2525] with esmtp (Farcaster) id 83645b3d-1731-4a76-9524-a1b8ff4f37b6; Wed, 6 Mar 2024 12:25:00 +0000 (UTC) X-Farcaster-Flow-ID: 83645b3d-1731-4a76-9524-a1b8ff4f37b6 Received: from EX19D007EUA001.ant.amazon.com (10.252.50.133) by EX19MTAEUC002.ant.amazon.com (10.252.51.245) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:00 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUA001.ant.amazon.com (10.252.50.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:00 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:24:58 +0000 From: To: CC: , Shai Brandes , Subject: [PATCH v3 05/33] net/ena: fix fast mbuf free Date: Wed, 6 Mar 2024 14:24:17 +0200 Message-ID: <20240306122445.4350-6-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes In case the application enables fast mbuf release optimization, the driver releases 256 TX mbufs in bulk upon reaching the TX free threshold. The existing implementation utilizes rte_mempool_put_bulk for bulk freeing TXs, which exclusively supports direct mbufs. In case the application transmits indirect bufs, the driver must also decrement the mbuf reference count and unlink the mbuf segment. For such case, the driver should employ rte_pktmbuf_free_bulk. Fixes: c339f53823f3 ("net/ena: support fast mbuf free") Cc: stable@dpdk.org Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- doc/guides/rel_notes/release_24_03.rst | 1 + drivers/net/ena/ena_ethdev.c | 6 ++---- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/doc/guides/rel_notes/release_24_03.rst b/doc/guides/rel_notes/release_24_03.rst index f47073c7dc..6b73d4fedf 100644 --- a/doc/guides/rel_notes/release_24_03.rst +++ b/doc/guides/rel_notes/release_24_03.rst @@ -105,6 +105,7 @@ New Features * Removed the reporting of `rx_overruns` errors from xstats and instead updated `imissed` stat with its value. * Added support for sub-optimal configuration notifications from the device. + * Restructured fast release of mbufs when RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE optimization is enabled. * **Updated Atomic Rules' Arkville driver.** diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c index 3157237c0d..537ee9f8c3 100644 --- a/drivers/net/ena/ena_ethdev.c +++ b/drivers/net/ena/ena_ethdev.c @@ -3122,8 +3122,7 @@ ena_tx_cleanup_mbuf_fast(struct rte_mbuf **mbufs_to_clean, m_next = mbuf->next; mbufs_to_clean[mbuf_cnt++] = mbuf; if (mbuf_cnt == buf_size) { - rte_mempool_put_bulk(mbufs_to_clean[0]->pool, (void **)mbufs_to_clean, - (unsigned int)mbuf_cnt); + rte_pktmbuf_free_bulk(mbufs_to_clean, mbuf_cnt); mbuf_cnt = 0; } mbuf = m_next; @@ -3191,8 +3190,7 @@ static int ena_tx_cleanup(void *txp, uint32_t free_pkt_cnt) } if (mbuf_cnt != 0) - rte_mempool_put_bulk(mbufs_to_clean[0]->pool, - (void **)mbufs_to_clean, mbuf_cnt); + rte_pktmbuf_free_bulk(mbufs_to_clean, mbuf_cnt); /* Notify completion handler that full cleanup was performed */ if (free_pkt_cnt == 0 || total_tx_pkts < cleanup_budget) From patchwork Wed Mar 6 12:24:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138020 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0297643C5B; Wed, 6 Mar 2024 13:25:51 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 258ED42E1E; Wed, 6 Mar 2024 13:25:12 +0100 (CET) Received: from smtp-fw-33001.amazon.com (smtp-fw-33001.amazon.com [207.171.190.10]) by mails.dpdk.org (Postfix) with ESMTP id A1ECB42E21 for ; Wed, 6 Mar 2024 13:25:10 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727911; x=1741263911; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=aJVJZVhyg1QPDcCNZmVy1EXNxNlKhr5KKQb6j54ipg0=; b=GDmPrUp3mthvtQgSe6w2NBbt6DRpYYGWV7U+Bh2unsc1EAO7s22L2D9q 3sdH/XaKooR2g/SYiPxQV0L/H251QpGbL2Mkxr3DqxiPDV250YtyZ6Igt Dg7xjGnFYSdOepq2HlFrNOszE7xi+9wm6o40/+WFKBM3aceW0YemTdO1g 8=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="331160063" Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO smtpout.prod.us-east-1.prod.farcaster.email.amazon.dev) ([10.43.8.6]) by smtp-border-fw-33001.sea14.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:04 +0000 Received: from EX19MTAEUC002.ant.amazon.com [10.0.10.100:17615] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.23.38:2525] with esmtp (Farcaster) id 00b1f184-5926-43b0-b30e-0d3f88a03386; Wed, 6 Mar 2024 12:25:03 +0000 (UTC) X-Farcaster-Flow-ID: 00b1f184-5926-43b0-b30e-0d3f88a03386 Received: from EX19D007EUB001.ant.amazon.com (10.252.51.82) by EX19MTAEUC002.ant.amazon.com (10.252.51.181) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:02 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUB001.ant.amazon.com (10.252.51.82) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:02 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:00 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 06/33] net/ena: rename base folder to hal Date: Wed, 6 Mar 2024 14:24:18 +0200 Message-ID: <20240306122445.4350-7-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes Changed the base HAL folder to hal. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/{base => hal}/ena_com.c | 0 drivers/net/ena/{base => hal}/ena_com.h | 0 drivers/net/ena/{base => hal}/ena_defs/ena_admin_defs.h | 0 drivers/net/ena/{base => hal}/ena_defs/ena_common_defs.h | 0 drivers/net/ena/{base => hal}/ena_defs/ena_eth_io_defs.h | 0 drivers/net/ena/{base => hal}/ena_defs/ena_gen_info.h | 0 drivers/net/ena/{base => hal}/ena_defs/ena_includes.h | 0 drivers/net/ena/{base => hal}/ena_defs/ena_regs_defs.h | 0 drivers/net/ena/{base => hal}/ena_eth_com.c | 0 drivers/net/ena/{base => hal}/ena_eth_com.h | 0 drivers/net/ena/{base => hal}/ena_plat.h | 0 drivers/net/ena/{base => hal}/ena_plat_dpdk.h | 0 drivers/net/ena/meson.build | 6 +++--- 13 files changed, 3 insertions(+), 3 deletions(-) rename drivers/net/ena/{base => hal}/ena_com.c (100%) rename drivers/net/ena/{base => hal}/ena_com.h (100%) rename drivers/net/ena/{base => hal}/ena_defs/ena_admin_defs.h (100%) rename drivers/net/ena/{base => hal}/ena_defs/ena_common_defs.h (100%) rename drivers/net/ena/{base => hal}/ena_defs/ena_eth_io_defs.h (100%) rename drivers/net/ena/{base => hal}/ena_defs/ena_gen_info.h (100%) rename drivers/net/ena/{base => hal}/ena_defs/ena_includes.h (100%) rename drivers/net/ena/{base => hal}/ena_defs/ena_regs_defs.h (100%) rename drivers/net/ena/{base => hal}/ena_eth_com.c (100%) rename drivers/net/ena/{base => hal}/ena_eth_com.h (100%) rename drivers/net/ena/{base => hal}/ena_plat.h (100%) rename drivers/net/ena/{base => hal}/ena_plat_dpdk.h (100%) diff --git a/drivers/net/ena/base/ena_com.c b/drivers/net/ena/hal/ena_com.c similarity index 100% rename from drivers/net/ena/base/ena_com.c rename to drivers/net/ena/hal/ena_com.c diff --git a/drivers/net/ena/base/ena_com.h b/drivers/net/ena/hal/ena_com.h similarity index 100% rename from drivers/net/ena/base/ena_com.h rename to drivers/net/ena/hal/ena_com.h diff --git a/drivers/net/ena/base/ena_defs/ena_admin_defs.h b/drivers/net/ena/hal/ena_defs/ena_admin_defs.h similarity index 100% rename from drivers/net/ena/base/ena_defs/ena_admin_defs.h rename to drivers/net/ena/hal/ena_defs/ena_admin_defs.h diff --git a/drivers/net/ena/base/ena_defs/ena_common_defs.h b/drivers/net/ena/hal/ena_defs/ena_common_defs.h similarity index 100% rename from drivers/net/ena/base/ena_defs/ena_common_defs.h rename to drivers/net/ena/hal/ena_defs/ena_common_defs.h diff --git a/drivers/net/ena/base/ena_defs/ena_eth_io_defs.h b/drivers/net/ena/hal/ena_defs/ena_eth_io_defs.h similarity index 100% rename from drivers/net/ena/base/ena_defs/ena_eth_io_defs.h rename to drivers/net/ena/hal/ena_defs/ena_eth_io_defs.h diff --git a/drivers/net/ena/base/ena_defs/ena_gen_info.h b/drivers/net/ena/hal/ena_defs/ena_gen_info.h similarity index 100% rename from drivers/net/ena/base/ena_defs/ena_gen_info.h rename to drivers/net/ena/hal/ena_defs/ena_gen_info.h diff --git a/drivers/net/ena/base/ena_defs/ena_includes.h b/drivers/net/ena/hal/ena_defs/ena_includes.h similarity index 100% rename from drivers/net/ena/base/ena_defs/ena_includes.h rename to drivers/net/ena/hal/ena_defs/ena_includes.h diff --git a/drivers/net/ena/base/ena_defs/ena_regs_defs.h b/drivers/net/ena/hal/ena_defs/ena_regs_defs.h similarity index 100% rename from drivers/net/ena/base/ena_defs/ena_regs_defs.h rename to drivers/net/ena/hal/ena_defs/ena_regs_defs.h diff --git a/drivers/net/ena/base/ena_eth_com.c b/drivers/net/ena/hal/ena_eth_com.c similarity index 100% rename from drivers/net/ena/base/ena_eth_com.c rename to drivers/net/ena/hal/ena_eth_com.c diff --git a/drivers/net/ena/base/ena_eth_com.h b/drivers/net/ena/hal/ena_eth_com.h similarity index 100% rename from drivers/net/ena/base/ena_eth_com.h rename to drivers/net/ena/hal/ena_eth_com.h diff --git a/drivers/net/ena/base/ena_plat.h b/drivers/net/ena/hal/ena_plat.h similarity index 100% rename from drivers/net/ena/base/ena_plat.h rename to drivers/net/ena/hal/ena_plat.h diff --git a/drivers/net/ena/base/ena_plat_dpdk.h b/drivers/net/ena/hal/ena_plat_dpdk.h similarity index 100% rename from drivers/net/ena/base/ena_plat_dpdk.h rename to drivers/net/ena/hal/ena_plat_dpdk.h diff --git a/drivers/net/ena/meson.build b/drivers/net/ena/meson.build index d02ed3f64f..c41f1b04a0 100644 --- a/drivers/net/ena/meson.build +++ b/drivers/net/ena/meson.build @@ -10,10 +10,10 @@ endif sources = files( 'ena_ethdev.c', 'ena_rss.c', - 'base/ena_com.c', - 'base/ena_eth_com.c', + 'hal/ena_com.c', + 'hal/ena_eth_com.c', ) deps += ['timer'] -includes += include_directories('base', 'base/ena_defs') +includes += include_directories('hal', 'hal/ena_defs') From patchwork Wed Mar 6 12:24:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138019 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B367343C5B; Wed, 6 Mar 2024 13:25:40 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 871CC42E1D; Wed, 6 Mar 2024 13:25:09 +0100 (CET) Received: from smtp-fw-52005.amazon.com (smtp-fw-52005.amazon.com [52.119.213.156]) by mails.dpdk.org (Postfix) with ESMTP id 8194742E0C for ; Wed, 6 Mar 2024 13:25:07 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727908; x=1741263908; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=7UQSSDqmdKSBNgDIXGO9tixo5/teodTwfbvGYd1BFa0=; b=YGek1qq4JY2zavp+0TON1H1uepbif//y5oIo5266YW+80baJql9iBQoW wvfqh0iRf+6FtDtqhF4Cd2AIBMlhybUeblf+yuFlm49d3IiQr5l74JB7K 5HnSPadI3k5ECzm2ubm3zvYOTxqZpj6ud8nxIo7BI0TtVPLTE/qvK/yFp E=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="638961940" Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO smtpout.prod.us-east-1.prod.farcaster.email.amazon.dev) ([10.43.8.6]) by smtp-border-fw-52005.iad7.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:06 +0000 Received: from EX19MTAEUC001.ant.amazon.com [10.0.10.100:23206] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.42.5:2525] with esmtp (Farcaster) id aa050950-ebb8-4a0f-a375-a6d3310df0d0; Wed, 6 Mar 2024 12:25:05 +0000 (UTC) X-Farcaster-Flow-ID: aa050950-ebb8-4a0f-a375-a6d3310df0d0 Received: from EX19D007EUB001.ant.amazon.com (10.252.51.82) by EX19MTAEUC001.ant.amazon.com (10.252.51.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:04 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUB001.ant.amazon.com (10.252.51.82) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:04 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:03 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 07/33] net/ena: restructure the llq policy setting process Date: Wed, 6 Mar 2024 14:24:19 +0200 Message-ID: <20240306122445.4350-8-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes The driver will set the size of the LLQ header size according to the recommendation from the device. Replaced `enable_llq` and `large_llq_hdr` devargs with a new devarg `llq_policy` that accepts the following values: 0 - Disable LLQ. Use with extreme caution as it leads to a huge performance degradation on AWS instances from 6th generation onwards. 1 - Accept device recommended LLQ policy (Default). Device can recommend normal or large LLQ policy. 2 - Enforce normal LLQ policy. 3 - Enforce large LLQ policy. Required for packets with header that exceed 96 bytes on AWS instances prior to 5th generation. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- doc/guides/nics/ena.rst | 21 ++--- doc/guides/rel_notes/release_24_03.rst | 1 + drivers/net/ena/ena_ethdev.c | 110 +++++++++++++------------ drivers/net/ena/ena_ethdev.h | 11 ++- 4 files changed, 77 insertions(+), 66 deletions(-) diff --git a/doc/guides/nics/ena.rst b/doc/guides/nics/ena.rst index b039e75ead..53c9341859 100644 --- a/doc/guides/nics/ena.rst +++ b/doc/guides/nics/ena.rst @@ -107,11 +107,15 @@ Configuration Runtime Configuration ^^^^^^^^^^^^^^^^^^^^^ - * **large_llq_hdr** (default 0) + * **llq_policy** (default 1) - Enables or disables usage of large LLQ headers. This option will have - effect only if the device also supports large LLQ headers. Otherwise, the - default value will be used. + Controls whether use device recommended header policy or override it. + 0 - Disable LLQ. + **Use with extreme caution as it leads to a huge performance + degradation on AWS instances from 6th generation onwards.** + 1 - Accept device recommended LLQ policy (Default). + 2 - Enforce normal LLQ policy. + 3 - Enforce large LLQ policy. * **miss_txc_to** (default 5) @@ -122,15 +126,6 @@ Runtime Configuration timer service. Setting this parameter to 0 disables this feature. Maximum allowed value is 60 seconds. - * **enable_llq** (default 1) - - Determines whenever the driver should use the LLQ (if it's available) or - not. - - **NOTE: On the 6th generation AWS instances disabling LLQ may lead to a - huge performance degradation. In general disabling LLQ is highly not - recommended!** - ENA Configuration Parameters ^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/doc/guides/rel_notes/release_24_03.rst b/doc/guides/rel_notes/release_24_03.rst index 6b73d4fedf..2a22bb07ed 100644 --- a/doc/guides/rel_notes/release_24_03.rst +++ b/doc/guides/rel_notes/release_24_03.rst @@ -106,6 +106,7 @@ New Features * Removed the reporting of `rx_overruns` errors from xstats and instead updated `imissed` stat with its value. * Added support for sub-optimal configuration notifications from the device. * Restructured fast release of mbufs when RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE optimization is enabled. + * Replaced `enable_llq` and `large_llq_hdr` devargs with a new devarg `llq_policy`. * **Updated Atomic Rules' Arkville driver.** diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c index 537ee9f8c3..2414f631c8 100644 --- a/drivers/net/ena/ena_ethdev.c +++ b/drivers/net/ena/ena_ethdev.c @@ -40,6 +40,8 @@ #define BITS_PER_TYPE(type) (sizeof(type) * BITS_PER_BYTE) +#define DECIMAL_BASE 10 + /* * We should try to keep ENA_CLEANUP_BUF_SIZE lower than * RTE_MEMPOOL_CACHE_MAX_SIZE, so we can fit this in mempool local cache. @@ -74,17 +76,23 @@ struct ena_stats { ENA_STAT_ENTRY(stat, srd) /* Device arguments */ -#define ENA_DEVARG_LARGE_LLQ_HDR "large_llq_hdr" +/* Controls whether to disable LLQ, use device recommended header policy + * or overriding the device recommendation. + * 0 - Disable LLQ. + * Use with extreme caution as it leads to a huge performance + * degradation on AWS instances from 6th generation onwards. + * 1 - Accept device recommended LLQ policy (Default). + * Device can recommend normal or large LLQ policy. + * 2 - Enforce normal LLQ policy. + * 3 - Enforce large LLQ policy. + * Required for packets with header that exceed 96 bytes on + * AWS instances prior to 5th generation. + */ +#define ENA_DEVARG_LLQ_POLICY "llq_policy" /* Timeout in seconds after which a single uncompleted Tx packet should be * considered as a missing. */ #define ENA_DEVARG_MISS_TXC_TO "miss_txc_to" -/* - * Controls whether LLQ should be used (if available). Enabled by default. - * NOTE: It's highly not recommended to disable the LLQ, as it may lead to a - * huge performance degradation on 6th generation AWS instances. - */ -#define ENA_DEVARG_ENABLE_LLQ "enable_llq" /* * Each rte_memzone should have unique name. @@ -279,9 +287,9 @@ static int ena_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids, uint64_t *values, unsigned int n); -static int ena_process_bool_devarg(const char *key, - const char *value, - void *opaque); +static int ena_process_llq_policy_devarg(const char *key, + const char *value, + void *opaque); static int ena_parse_devargs(struct ena_adapter *adapter, struct rte_devargs *devargs); static void ena_copy_customer_metrics(struct ena_adapter *adapter, @@ -297,6 +305,7 @@ static int ena_rx_queue_intr_disable(struct rte_eth_dev *dev, static int ena_configure_aenq(struct ena_adapter *adapter); static int ena_mp_primary_handle(const struct rte_mp_msg *mp_msg, const void *peer); +static bool ena_use_large_llq_hdr(struct ena_adapter *adapter, uint8_t recommended_entry_size); static const struct eth_dev_ops ena_dev_ops = { .dev_configure = ena_dev_configure, @@ -1135,6 +1144,7 @@ ena_calc_io_queue_size(struct ena_calc_queue_size_ctx *ctx, ctx->max_tx_queue_size = max_tx_queue_size; ctx->max_rx_queue_size = max_rx_queue_size; + PMD_DRV_LOG(INFO, "tx queue size %u\n", max_tx_queue_size); return 0; } @@ -2034,7 +2044,7 @@ ena_set_queues_placement_policy(struct ena_adapter *adapter, int rc; u32 llq_feature_mask; - if (!adapter->enable_llq) { + if (adapter->llq_header_policy == ENA_LLQ_POLICY_DISABLED) { PMD_DRV_LOG(WARNING, "NOTE: LLQ has been disabled as per user's request. " "This may lead to a huge performance degradation!\n"); @@ -2239,8 +2249,7 @@ static int eth_ena_dev_init(struct rte_eth_dev *eth_dev) /* Assign default devargs values */ adapter->missing_tx_completion_to = ENA_TX_TIMEOUT; - adapter->enable_llq = true; - adapter->use_large_llq_hdr = false; + adapter->llq_header_policy = ENA_LLQ_POLICY_RECOMMENDED; rc = ena_parse_devargs(adapter, pci_dev->device.devargs); if (rc != 0) { @@ -2264,8 +2273,9 @@ static int eth_ena_dev_init(struct rte_eth_dev *eth_dev) if (!(adapter->all_aenq_groups & BIT(ENA_ADMIN_LINK_CHANGE))) adapter->edev_data->dev_flags &= ~RTE_ETH_DEV_INTR_LSC; - set_default_llq_configurations(&llq_config, &get_feat_ctx.llq, - adapter->use_large_llq_hdr); + bool use_large_llq_hdr = ena_use_large_llq_hdr(adapter, + get_feat_ctx.llq.entry_size_recommended); + set_default_llq_configurations(&llq_config, &get_feat_ctx.llq, use_large_llq_hdr); rc = ena_set_queues_placement_policy(adapter, ena_dev, &get_feat_ctx.llq, &llq_config); if (unlikely(rc)) { @@ -2273,18 +2283,19 @@ static int eth_ena_dev_init(struct rte_eth_dev *eth_dev) return rc; } - if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST) + if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST) { queue_type_str = "Regular"; - else + } else { queue_type_str = "Low latency"; + PMD_DRV_LOG(INFO, "LLQ entry size %uB\n", llq_config.llq_ring_entry_size_value); + } PMD_DRV_LOG(INFO, "Placement policy: %s\n", queue_type_str); calc_queue_ctx.ena_dev = ena_dev; calc_queue_ctx.get_feat_ctx = &get_feat_ctx; max_num_io_queues = ena_calc_max_io_queue_num(ena_dev, &get_feat_ctx); - rc = ena_calc_io_queue_size(&calc_queue_ctx, - adapter->use_large_llq_hdr); + rc = ena_calc_io_queue_size(&calc_queue_ctx, use_large_llq_hdr); if (unlikely((rc != 0) || (max_num_io_queues == 0))) { rc = -EFAULT; goto err_device_destroy; @@ -3632,7 +3643,7 @@ static int ena_process_uint_devarg(const char *key, char *str_end; uint64_t uint_value; - uint_value = strtoull(value, &str_end, 10); + uint_value = strtoull(value, &str_end, DECIMAL_BASE); if (value == str_end) { PMD_INIT_LOG(ERR, "Invalid value for key '%s'. Only uint values are accepted.\n", @@ -3663,41 +3674,29 @@ static int ena_process_uint_devarg(const char *key, return 0; } -static int ena_process_bool_devarg(const char *key, - const char *value, - void *opaque) +static int ena_process_llq_policy_devarg(const char *key, const char *value, void *opaque) { struct ena_adapter *adapter = opaque; - bool bool_value; + uint32_t policy; - /* Parse the value. */ - if (strcmp(value, "1") == 0) { - bool_value = true; - } else if (strcmp(value, "0") == 0) { - bool_value = false; + policy = strtoul(value, NULL, DECIMAL_BASE); + if (policy < ENA_LLQ_POLICY_LAST) { + adapter->llq_header_policy = policy; } else { - PMD_INIT_LOG(ERR, - "Invalid value: '%s' for key '%s'. Accepted: '0' or '1'\n", - value, key); + PMD_INIT_LOG(ERR, "Invalid value: '%s' for key '%s'. valid [0-3]\n", value, key); return -EINVAL; } - - /* Now, assign it to the proper adapter field. */ - if (strcmp(key, ENA_DEVARG_LARGE_LLQ_HDR) == 0) - adapter->use_large_llq_hdr = bool_value; - else if (strcmp(key, ENA_DEVARG_ENABLE_LLQ) == 0) - adapter->enable_llq = bool_value; - + PMD_DRV_LOG(INFO, + "LLQ policy is %u [0 - disabled, 1 - device recommended, 2 - normal, 3 - large]\n", + adapter->llq_header_policy); return 0; } -static int ena_parse_devargs(struct ena_adapter *adapter, - struct rte_devargs *devargs) +static int ena_parse_devargs(struct ena_adapter *adapter, struct rte_devargs *devargs) { static const char * const allowed_args[] = { - ENA_DEVARG_LARGE_LLQ_HDR, + ENA_DEVARG_LLQ_POLICY, ENA_DEVARG_MISS_TXC_TO, - ENA_DEVARG_ENABLE_LLQ, NULL, }; struct rte_kvargs *kvlist; @@ -3708,21 +3707,18 @@ static int ena_parse_devargs(struct ena_adapter *adapter, kvlist = rte_kvargs_parse(devargs->args, allowed_args); if (kvlist == NULL) { - PMD_INIT_LOG(ERR, "Invalid device arguments: %s\n", - devargs->args); + PMD_INIT_LOG(ERR, "Invalid device arguments: %s\n", devargs->args); return -EINVAL; } - rc = rte_kvargs_process(kvlist, ENA_DEVARG_LARGE_LLQ_HDR, - ena_process_bool_devarg, adapter); + rc = rte_kvargs_process(kvlist, ENA_DEVARG_LLQ_POLICY, + ena_process_llq_policy_devarg, adapter); if (rc != 0) goto exit; rc = rte_kvargs_process(kvlist, ENA_DEVARG_MISS_TXC_TO, ena_process_uint_devarg, adapter); if (rc != 0) goto exit; - rc = rte_kvargs_process(kvlist, ENA_DEVARG_ENABLE_LLQ, - ena_process_bool_devarg, adapter); exit: rte_kvargs_free(kvlist); @@ -3942,8 +3938,7 @@ RTE_PMD_REGISTER_PCI(net_ena, rte_ena_pmd); RTE_PMD_REGISTER_PCI_TABLE(net_ena, pci_id_ena_map); RTE_PMD_REGISTER_KMOD_DEP(net_ena, "* igb_uio | uio_pci_generic | vfio-pci"); RTE_PMD_REGISTER_PARAM_STRING(net_ena, - ENA_DEVARG_LARGE_LLQ_HDR "=<0|1> " - ENA_DEVARG_ENABLE_LLQ "=<0|1> " + ENA_DEVARG_LLQ_POLICY "=<0|1|2|3> " ENA_DEVARG_MISS_TXC_TO "="); RTE_LOG_REGISTER_SUFFIX(ena_logtype_init, init, NOTICE); RTE_LOG_REGISTER_SUFFIX(ena_logtype_driver, driver, NOTICE); @@ -4129,3 +4124,16 @@ ena_mp_primary_handle(const struct rte_mp_msg *mp_msg, const void *peer) /* Return just IPC processing status */ return rte_mp_reply(&mp_rsp, peer); } + +static bool ena_use_large_llq_hdr(struct ena_adapter *adapter, uint8_t recommended_entry_size) +{ + if (adapter->llq_header_policy == ENA_LLQ_POLICY_LARGE) { + return true; + } else if (adapter->llq_header_policy == ENA_LLQ_POLICY_RECOMMENDED) { + PMD_DRV_LOG(INFO, "Recommended device entry size policy %u\n", + recommended_entry_size); + if (recommended_entry_size == ENA_ADMIN_LIST_ENTRY_SIZE_256B) + return true; + } + return false; +} diff --git a/drivers/net/ena/ena_ethdev.h b/drivers/net/ena/ena_ethdev.h index 20b8307836..6716f01ba5 100644 --- a/drivers/net/ena/ena_ethdev.h +++ b/drivers/net/ena/ena_ethdev.h @@ -85,6 +85,14 @@ enum ena_ring_type { ENA_RING_TYPE_TX = 2, }; +typedef enum ena_llq_policy_t { + ENA_LLQ_POLICY_DISABLED = 0, /* Host queues */ + ENA_LLQ_POLICY_RECOMMENDED = 1, /* Device recommendation */ + ENA_LLQ_POLICY_NORMAL = 2, /* 128B long LLQ entry */ + ENA_LLQ_POLICY_LARGE = 3, /* 256B long LLQ entry */ + ENA_LLQ_POLICY_LAST, +} ena_llq_policy; + struct ena_tx_buffer { struct rte_mbuf *mbuf; unsigned int tx_descs; @@ -329,8 +337,7 @@ struct ena_adapter { bool trigger_reset; - bool enable_llq; - bool use_large_llq_hdr; + ena_llq_policy llq_header_policy; uint32_t last_tx_comp_qid; uint64_t missing_tx_completion_to; From patchwork Wed Mar 6 12:24:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138023 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0FA7A43C5B; Wed, 6 Mar 2024 13:26:14 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E814642E3D; Wed, 6 Mar 2024 13:25:16 +0100 (CET) Received: from smtp-fw-9102.amazon.com (smtp-fw-9102.amazon.com [207.171.184.29]) by mails.dpdk.org (Postfix) with ESMTP id C9A1242E33 for ; Wed, 6 Mar 2024 13:25:13 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727914; x=1741263914; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=FZmDg4xVRi3SD31Eo2wDny8J6S9toq3YNz8af5Yom5s=; b=E044/Rl7tWObIY5AQTyk3vgANJtU4gTCo83soH/bkNQnNB1+fdgglWCR il80Nd9unA83wDcIbgQQUvA5PCvZc/83UB43hm0gUCKxDGuk77l3N7GCW Z8InGncOBl2eivN0RBpp4D/ju39cNo4eIYRlHChZZDkiIwio0MPzrvSaq o=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="401934666" Received: from pdx4-co-svc-p1-lb2-vlan3.amazon.com (HELO smtpout.prod.us-east-1.prod.farcaster.email.amazon.dev) ([10.25.36.214]) by smtp-border-fw-9102.sea19.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:07 +0000 Received: from EX19MTAEUB001.ant.amazon.com [10.0.10.100:10373] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.11.111:2525] with esmtp (Farcaster) id 94cf99aa-b2ab-4d7d-bd84-257fc4aa1d9e; Wed, 6 Mar 2024 12:25:07 +0000 (UTC) X-Farcaster-Flow-ID: 94cf99aa-b2ab-4d7d-bd84-257fc4aa1d9e Received: from EX19D007EUA004.ant.amazon.com (10.252.50.76) by EX19MTAEUB001.ant.amazon.com (10.252.51.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:06 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUA004.ant.amazon.com (10.252.50.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:06 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:04 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 08/33] net/ena/hal: exponential backoff exp limit Date: Wed, 6 Mar 2024 14:24:20 +0200 Message-ID: <20240306122445.4350-9-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes limits the exponent in the exponential backoff mechanism in order to avoid the value overflowing. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/hal/ena_com.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/net/ena/hal/ena_com.c b/drivers/net/ena/hal/ena_com.c index 6953a1fa33..31c37b0ab3 100644 --- a/drivers/net/ena/hal/ena_com.c +++ b/drivers/net/ena/hal/ena_com.c @@ -34,6 +34,8 @@ #define ENA_REGS_ADMIN_INTR_MASK 1 +#define ENA_MAX_BACKOFF_DELAY_EXP 16U + #define ENA_MIN_ADMIN_POLL_US 100 #define ENA_MAX_ADMIN_POLL_US 5000 @@ -545,8 +547,9 @@ static int ena_com_comp_status_to_errno(struct ena_com_admin_queue *admin_queue, static void ena_delay_exponential_backoff_us(u32 exp, u32 delay_us) { + exp = ENA_MIN32(ENA_MAX_BACKOFF_DELAY_EXP, exp); delay_us = ENA_MAX32(ENA_MIN_ADMIN_POLL_US, delay_us); - delay_us = ENA_MIN32(delay_us * (1U << exp), ENA_MAX_ADMIN_POLL_US); + delay_us = ENA_MIN32(ENA_MAX_ADMIN_POLL_US, delay_us * (1U << exp)); ENA_USLEEP(delay_us); } From patchwork Wed Mar 6 12:24:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138021 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9D27E43C5B; Wed, 6 Mar 2024 13:25:57 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4D7E542E31; Wed, 6 Mar 2024 13:25:13 +0100 (CET) Received: from smtp-fw-9105.amazon.com (smtp-fw-9105.amazon.com [207.171.188.204]) by mails.dpdk.org (Postfix) with ESMTP id 63FAE42DE5 for ; Wed, 6 Mar 2024 13:25:11 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727912; x=1741263912; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=KGO13ItRAPhpoepcEAJpQyJsUlGBjsgQye3PWKxAe/Y=; b=mW67y8RUWIr73CRLPHDuFCa/yIUcYgZGaJc9DUEwxKBXrxccPxvCdkfS XWAOsVRuQHxszqsBLoHYh4nVCON2MRHOTQmfd2Ar7rKHIyxOum02TNccC NuXidC+KNSe7lUq5ubAabekK0o2Hu4TQKHbeyvYjONHPu/OtMyHkMJgV9 Y=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="709678936" Received: from pdx4-co-svc-p1-lb2-vlan2.amazon.com (HELO smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.25.36.210]) by smtp-border-fw-9105.sea19.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:10 +0000 Received: from EX19MTAEUB002.ant.amazon.com [10.0.10.100:19201] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.16.96:2525] with esmtp (Farcaster) id 03dc5e53-0271-410a-b3e5-2247f6f5bd3f; Wed, 6 Mar 2024 12:25:09 +0000 (UTC) X-Farcaster-Flow-ID: 03dc5e53-0271-410a-b3e5-2247f6f5bd3f Received: from EX19D007EUA004.ant.amazon.com (10.252.50.76) by EX19MTAEUB002.ant.amazon.com (10.252.51.79) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:08 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUA004.ant.amazon.com (10.252.50.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:08 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:07 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 09/33] net/ena/hal: add a new csum offload bit Date: Wed, 6 Mar 2024 14:24:21 +0200 Message-ID: <20240306122445.4350-10-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes Add a new driver supported feature bit for TX IPv6 checksum offload. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/hal/ena_defs/ena_admin_defs.h | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/net/ena/hal/ena_defs/ena_admin_defs.h b/drivers/net/ena/hal/ena_defs/ena_admin_defs.h index 4172916551..670e794c98 100644 --- a/drivers/net/ena/hal/ena_defs/ena_admin_defs.h +++ b/drivers/net/ena/hal/ena_defs/ena_admin_defs.h @@ -985,7 +985,8 @@ struct ena_admin_host_info { * 4 : rss_configurable_function_key * 5 : reserved * 6 : rx_page_reuse - * 31:7 : reserved + * 7 : tx_ipv6_csum_offload + * 31:8 : reserved */ uint32_t driver_supported_features; }; @@ -1377,6 +1378,8 @@ struct ena_admin_phc_resp { #define ENA_ADMIN_HOST_INFO_RSS_CONFIGURABLE_FUNCTION_KEY_MASK BIT(4) #define ENA_ADMIN_HOST_INFO_RX_PAGE_REUSE_SHIFT 6 #define ENA_ADMIN_HOST_INFO_RX_PAGE_REUSE_MASK BIT(6) +#define ENA_ADMIN_HOST_INFO_TX_IPV6_CSUM_OFFLOAD_SHIFT 7 +#define ENA_ADMIN_HOST_INFO_TX_IPV6_CSUM_OFFLOAD_MASK BIT(7) /* feature_rss_ind_table */ #define ENA_ADMIN_FEATURE_RSS_IND_TABLE_ONE_ENTRY_UPDATE_MASK BIT(0) @@ -1851,6 +1854,20 @@ static inline void set_ena_admin_host_info_rx_page_reuse(struct ena_admin_host_i ENA_ADMIN_HOST_INFO_RX_PAGE_REUSE_MASK; } +static inline +uint32_t get_ena_admin_host_info_tx_ipv6_csum_offload(const struct ena_admin_host_info *p) +{ + return (p->driver_supported_features & ENA_ADMIN_HOST_INFO_TX_IPV6_CSUM_OFFLOAD_MASK) >> + ENA_ADMIN_HOST_INFO_TX_IPV6_CSUM_OFFLOAD_SHIFT; +} + +static inline void set_ena_admin_host_info_tx_ipv6_csum_offload(struct ena_admin_host_info *p, + uint32_t val) +{ + p->driver_supported_features |= (val << ENA_ADMIN_HOST_INFO_TX_IPV6_CSUM_OFFLOAD_SHIFT) & + ENA_ADMIN_HOST_INFO_TX_IPV6_CSUM_OFFLOAD_MASK; +} + static inline uint8_t get_ena_admin_feature_rss_ind_table_one_entry_update(const struct ena_admin_feature_rss_ind_table *p) { return p->flags & ENA_ADMIN_FEATURE_RSS_IND_TABLE_ONE_ENTRY_UPDATE_MASK; From patchwork Wed Mar 6 12:24:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138022 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4327543C5B; Wed, 6 Mar 2024 13:26:05 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C353342DE4; Wed, 6 Mar 2024 13:25:15 +0100 (CET) Received: from smtp-fw-52004.amazon.com (smtp-fw-52004.amazon.com [52.119.213.154]) by mails.dpdk.org (Postfix) with ESMTP id BBA3042E32 for ; Wed, 6 Mar 2024 13:25:13 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727914; x=1741263914; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=2vVSjWSRvxszLqtLMVmYotpoM0VZkDq60QhuYD8vM90=; b=vsZ9HQQgmE41aaJqnkT8/HzB+XhsBUWCix7kL9NEqumUIpdGZ681zeVR rGoxl8QL5Hh7NaZa5dGCpFBaJGkL/Kd1kbaNSWRy/qSpX6Eo6DK/7pwpe eWoXR5MeIElc7zfL3diibmUeqg16EaRLU/frEM1YlKYRLwZZrl2FB4fkQ U=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="189623241" Received: from iad12-co-svc-p1-lb1-vlan2.amazon.com (HELO smtpout.prod.us-east-1.prod.farcaster.email.amazon.dev) ([10.43.8.2]) by smtp-border-fw-52004.iad7.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:12 +0000 Received: from EX19MTAEUA001.ant.amazon.com [10.0.43.254:25084] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.9.254:2525] with esmtp (Farcaster) id c54c7c9b-7216-49ef-86c1-df64a58279fd; Wed, 6 Mar 2024 12:25:11 +0000 (UTC) X-Farcaster-Flow-ID: c54c7c9b-7216-49ef-86c1-df64a58279fd Received: from EX19D007EUB001.ant.amazon.com (10.252.51.82) by EX19MTAEUA001.ant.amazon.com (10.252.50.192) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:10 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUB001.ant.amazon.com (10.252.51.82) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:10 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:09 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 10/33] net/ena/hal: added a bus parameter to ena memcpy macro Date: Wed, 6 Mar 2024 14:24:22 +0200 Message-ID: <20240306122445.4350-11-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes ENA_MEMCPY_TO_DEVICE_64 macro needs pci bus id in order to write to the device memory when using llq. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/hal/ena_eth_com.c | 3 ++- drivers/net/ena/hal/ena_plat_dpdk.h | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/ena/hal/ena_eth_com.c b/drivers/net/ena/hal/ena_eth_com.c index 32090259cd..d6811c7b48 100644 --- a/drivers/net/ena/hal/ena_eth_com.c +++ b/drivers/net/ena/hal/ena_eth_com.c @@ -74,7 +74,8 @@ static int ena_com_write_bounce_buffer_to_dev(struct ena_com_io_sq *io_sq, wmb(); /* The line is completed. Copy it to dev */ - ENA_MEMCPY_TO_DEVICE_64(io_sq->desc_addr.pbuf_dev_addr + dst_offset, + ENA_MEMCPY_TO_DEVICE_64(io_sq->bus, + io_sq->desc_addr.pbuf_dev_addr + dst_offset, bounce_buffer, llq_info->desc_list_entry_size); diff --git a/drivers/net/ena/hal/ena_plat_dpdk.h b/drivers/net/ena/hal/ena_plat_dpdk.h index 14bf582a45..5f7cbd1ee7 100644 --- a/drivers/net/ena/hal/ena_plat_dpdk.h +++ b/drivers/net/ena/hal/ena_plat_dpdk.h @@ -301,11 +301,12 @@ ena_mem_alloc_coherent(struct rte_eth_dev_data *data, size_t size, #define ENA_WAIT_EVENTS_DESTROY(admin_queue) ((void)(admin_queue)) /* The size must be 8 byte align */ -#define ENA_MEMCPY_TO_DEVICE_64(dst, src, size) \ +#define ENA_MEMCPY_TO_DEVICE_64(bus, dst, src, size) \ do { \ int count, i; \ uint64_t *to = (uint64_t *)(dst); \ const uint64_t *from = (const uint64_t *)(src); \ + (void)(bus); \ count = (size) / 8; \ for (i = 0; i < count; i++, from++, to++) \ rte_write64_relaxed(*from, to); \ From patchwork Wed Mar 6 12:24:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138024 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 55FBF43C5B; Wed, 6 Mar 2024 13:26:21 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3134742E47; Wed, 6 Mar 2024 13:25:19 +0100 (CET) Received: from smtp-fw-52003.amazon.com (smtp-fw-52003.amazon.com [52.119.213.152]) by mails.dpdk.org (Postfix) with ESMTP id CD5DB42E3B for ; Wed, 6 Mar 2024 13:25:16 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727917; x=1741263917; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=esilZkeoYx3BW4n7Z8Lk/G/rK4AxwqZp+CW/Ijc+K9g=; b=giAwi0K4FiOK4HEcta13CaaNzuilONZlspYHStGefYOgZXe4QhRJHEy3 Ok1BiWpfOs4GFMQakkCWrkA7o1H2jVm87jZt261SlhrYu83bvquWadSBd Pouy+a/L82NMGK2EshUPTlahqSsZw1PGAcBMJNoGs++3sY6Y4sd3XdNNE E=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="642739696" Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.43.8.6]) by smtp-border-fw-52003.iad7.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:15 +0000 Received: from EX19MTAEUC002.ant.amazon.com [10.0.10.100:31728] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.42.123:2525] with esmtp (Farcaster) id 31885fa1-d8c6-4821-ba1f-a080647ba205; Wed, 6 Mar 2024 12:25:13 +0000 (UTC) X-Farcaster-Flow-ID: 31885fa1-d8c6-4821-ba1f-a080647ba205 Received: from EX19D007EUA004.ant.amazon.com (10.252.50.76) by EX19MTAEUC002.ant.amazon.com (10.252.51.245) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:13 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUA004.ant.amazon.com (10.252.50.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:12 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:11 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 11/33] net/ena/hal: optimize Rx ring submission queue Date: Wed, 6 Mar 2024 14:24:23 +0200 Message-ID: <20240306122445.4350-12-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes RX ring submission queue descriptors are always located in host memory This optimization replaces the generic descriptor retrieval method with a tailored method for host memory type descriptors to avoid unnecessary if statement. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/hal/ena_eth_com.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/net/ena/hal/ena_eth_com.c b/drivers/net/ena/hal/ena_eth_com.c index d6811c7b48..dc2935a53e 100644 --- a/drivers/net/ena/hal/ena_eth_com.c +++ b/drivers/net/ena/hal/ena_eth_com.c @@ -631,9 +631,8 @@ int ena_com_add_single_rx_desc(struct ena_com_io_sq *io_sq, if (unlikely(!ena_com_sq_have_enough_space(io_sq, 1))) return ENA_COM_NO_SPACE; - desc = get_sq_desc(io_sq); - if (unlikely(!desc)) - return ENA_COM_FAULT; + /* virt_addr allocation success is checked before calling this function */ + desc = get_sq_desc_regular_queue(io_sq); memset(desc, 0x0, sizeof(struct ena_eth_io_rx_desc)); From patchwork Wed Mar 6 12:24:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138025 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0E94D43C5B; Wed, 6 Mar 2024 13:26:29 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4FEF742E4D; Wed, 6 Mar 2024 13:25:20 +0100 (CET) Received: from smtp-fw-33001.amazon.com (smtp-fw-33001.amazon.com [207.171.190.10]) by mails.dpdk.org (Postfix) with ESMTP id 1D8DF42E42 for ; Wed, 6 Mar 2024 13:25:16 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727917; x=1741263917; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=wwbSIexFtHbaJk0TowRcxhCLpA4fyiMDrVsWrK5MRis=; b=rl65lML31jci0pC3Q69wixPRbVbmxam1/i+MPiUL0UYay0ZosHpAdEq0 amoYSvKtzDz1ofcFMGhlrGcL5hTSTBiexEEa9yfyBvIcPO/cVCw3MbBNo MnZQAFnIAmb7Wm8Ffi2+P6H0dhwN2DRw3F9z8lTBelo6Im/cxwb3gLYUg E=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="331160073" Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO smtpout.prod.us-east-1.prod.farcaster.email.amazon.dev) ([10.43.8.6]) by smtp-border-fw-33001.sea14.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:16 +0000 Received: from EX19MTAEUA002.ant.amazon.com [10.0.43.254:45650] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.20.189:2525] with esmtp (Farcaster) id 4ff1d4b4-d5b6-4b40-bf88-b5eadb7c2ca6; Wed, 6 Mar 2024 12:25:15 +0000 (UTC) X-Farcaster-Flow-ID: 4ff1d4b4-d5b6-4b40-bf88-b5eadb7c2ca6 Received: from EX19D007EUB001.ant.amazon.com (10.252.51.82) by EX19MTAEUA002.ant.amazon.com (10.252.50.126) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:15 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUB001.ant.amazon.com (10.252.51.82) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:14 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:13 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 12/33] net/ena/hal: rename fields in completion descriptors Date: Wed, 6 Mar 2024 14:24:24 +0200 Message-ID: <20240306122445.4350-13-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes Several reserved bits in ena_eth_io_tx_cdesc and ena_eth_io_rx_cdesc_base have been renamed explicitly to MBZ (Must Be Zero). These bits are set by the device to zero before being sent to the driver. The fields are used as an integrity check in order to ensure that the received descriptor is not corrupted. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/hal/ena_defs/ena_admin_defs.h | 1 + .../net/ena/hal/ena_defs/ena_eth_io_defs.h | 49 +++++++++++++++++-- 2 files changed, 47 insertions(+), 3 deletions(-) diff --git a/drivers/net/ena/hal/ena_defs/ena_admin_defs.h b/drivers/net/ena/hal/ena_defs/ena_admin_defs.h index 670e794c98..438e4a1085 100644 --- a/drivers/net/ena/hal/ena_defs/ena_admin_defs.h +++ b/drivers/net/ena/hal/ena_defs/ena_admin_defs.h @@ -84,6 +84,7 @@ enum ena_admin_aq_caps_id { ENA_ADMIN_ENA_SRD_INFO = 1, ENA_ADMIN_CUSTOMER_METRICS = 2, ENA_ADMIN_EXTENDED_RESET_REASONS = 3, + ENA_ADMIN_CDESC_MBZ = 4, }; enum ena_admin_placement_policy_type { diff --git a/drivers/net/ena/hal/ena_defs/ena_eth_io_defs.h b/drivers/net/ena/hal/ena_defs/ena_eth_io_defs.h index 2107d17fdf..f811dd261e 100644 --- a/drivers/net/ena/hal/ena_defs/ena_eth_io_defs.h +++ b/drivers/net/ena/hal/ena_defs/ena_eth_io_defs.h @@ -152,7 +152,8 @@ struct ena_eth_io_tx_cdesc { /* flags * 0 : phase - * 7:1 : reserved1 + * 5:1 : reserved1 + * 7:6 : mbz6 - MBZ */ uint8_t flags; @@ -198,7 +199,7 @@ struct ena_eth_io_rx_desc { struct ena_eth_io_rx_cdesc_base { /* 4:0 : l3_proto_idx * 6:5 : src_vlan_cnt - * 7 : reserved7 - MBZ + * 7 : mbz7 - MBZ * 12:8 : l4_proto_idx * 13 : l3_csum_err - when set, either the L3 * checksum error detected, or, the controller didn't @@ -214,7 +215,8 @@ struct ena_eth_io_rx_cdesc_base { * 16 : l4_csum_checked - L4 checksum was verified * (could be OK or error), when cleared the status of * checksum is unknown - * 23:17 : reserved17 - MBZ + * 17 : mbz17 - MBZ + * 23:18 : reserved18 * 24 : phase * 25 : l3_csum2 - second checksum engine result * 26 : first - Indicates first descriptor in @@ -341,6 +343,8 @@ struct ena_eth_io_numa_node_cfg_reg { /* tx_cdesc */ #define ENA_ETH_IO_TX_CDESC_PHASE_MASK BIT(0) +#define ENA_ETH_IO_TX_CDESC_MBZ6_SHIFT 6 +#define ENA_ETH_IO_TX_CDESC_MBZ6_MASK GENMASK(7, 6) /* rx_desc */ #define ENA_ETH_IO_RX_DESC_PHASE_MASK BIT(0) @@ -355,6 +359,8 @@ struct ena_eth_io_numa_node_cfg_reg { #define ENA_ETH_IO_RX_CDESC_BASE_L3_PROTO_IDX_MASK GENMASK(4, 0) #define ENA_ETH_IO_RX_CDESC_BASE_SRC_VLAN_CNT_SHIFT 5 #define ENA_ETH_IO_RX_CDESC_BASE_SRC_VLAN_CNT_MASK GENMASK(6, 5) +#define ENA_ETH_IO_RX_CDESC_BASE_MBZ7_SHIFT 7 +#define ENA_ETH_IO_RX_CDESC_BASE_MBZ7_MASK BIT(7) #define ENA_ETH_IO_RX_CDESC_BASE_L4_PROTO_IDX_SHIFT 8 #define ENA_ETH_IO_RX_CDESC_BASE_L4_PROTO_IDX_MASK GENMASK(12, 8) #define ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM_ERR_SHIFT 13 @@ -365,6 +371,8 @@ struct ena_eth_io_numa_node_cfg_reg { #define ENA_ETH_IO_RX_CDESC_BASE_IPV4_FRAG_MASK BIT(15) #define ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_CHECKED_SHIFT 16 #define ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_CHECKED_MASK BIT(16) +#define ENA_ETH_IO_RX_CDESC_BASE_MBZ17_SHIFT 17 +#define ENA_ETH_IO_RX_CDESC_BASE_MBZ17_MASK BIT(17) #define ENA_ETH_IO_RX_CDESC_BASE_PHASE_SHIFT 24 #define ENA_ETH_IO_RX_CDESC_BASE_PHASE_MASK BIT(24) #define ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM2_SHIFT 25 @@ -731,6 +739,15 @@ static inline void set_ena_eth_io_tx_cdesc_phase(struct ena_eth_io_tx_cdesc *p, p->flags |= val & ENA_ETH_IO_TX_CDESC_PHASE_MASK; } +static inline uint8_t get_ena_eth_io_tx_cdesc_mbz6(const struct ena_eth_io_tx_cdesc *p) +{ + return (p->flags & ENA_ETH_IO_TX_CDESC_MBZ6_MASK) >> ENA_ETH_IO_TX_CDESC_MBZ6_SHIFT; +} +static inline void set_ena_eth_io_tx_cdesc_mbz6(struct ena_eth_io_tx_cdesc *p, uint8_t val) +{ + p->flags |= (val << ENA_ETH_IO_TX_CDESC_MBZ6_SHIFT) & ENA_ETH_IO_TX_CDESC_MBZ6_MASK; +} + static inline uint8_t get_ena_eth_io_rx_desc_phase(const struct ena_eth_io_rx_desc *p) { return p->ctrl & ENA_ETH_IO_RX_DESC_PHASE_MASK; @@ -791,6 +808,19 @@ static inline void set_ena_eth_io_rx_cdesc_base_src_vlan_cnt(struct ena_eth_io_r p->status |= (val << ENA_ETH_IO_RX_CDESC_BASE_SRC_VLAN_CNT_SHIFT) & ENA_ETH_IO_RX_CDESC_BASE_SRC_VLAN_CNT_MASK; } +static inline uint32_t get_ena_eth_io_rx_cdesc_base_mbz7(const struct ena_eth_io_rx_cdesc_base *p) +{ + return (p->status & ENA_ETH_IO_RX_CDESC_BASE_MBZ7_MASK) >> + ENA_ETH_IO_RX_CDESC_BASE_MBZ7_SHIFT; +} + +static inline void set_ena_eth_io_rx_cdesc_base_mbz7(struct ena_eth_io_rx_cdesc_base *p, + uint32_t val) +{ + p->status |= (val << ENA_ETH_IO_RX_CDESC_BASE_MBZ7_SHIFT) & + ENA_ETH_IO_RX_CDESC_BASE_MBZ7_MASK; +} + static inline uint32_t get_ena_eth_io_rx_cdesc_base_l4_proto_idx(const struct ena_eth_io_rx_cdesc_base *p) { return (p->status & ENA_ETH_IO_RX_CDESC_BASE_L4_PROTO_IDX_MASK) >> ENA_ETH_IO_RX_CDESC_BASE_L4_PROTO_IDX_SHIFT; @@ -841,6 +871,19 @@ static inline void set_ena_eth_io_rx_cdesc_base_l4_csum_checked(struct ena_eth_i p->status |= (val << ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_CHECKED_SHIFT) & ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_CHECKED_MASK; } +static inline uint32_t get_ena_eth_io_rx_cdesc_base_mbz17(const struct ena_eth_io_rx_cdesc_base *p) +{ + return (p->status & ENA_ETH_IO_RX_CDESC_BASE_MBZ17_MASK) >> + ENA_ETH_IO_RX_CDESC_BASE_MBZ17_SHIFT; +} + +static inline void set_ena_eth_io_rx_cdesc_base_mbz17(struct ena_eth_io_rx_cdesc_base *p, + uint32_t val) +{ + p->status |= (val << ENA_ETH_IO_RX_CDESC_BASE_MBZ17_SHIFT) & + ENA_ETH_IO_RX_CDESC_BASE_MBZ17_MASK; +} + static inline uint32_t get_ena_eth_io_rx_cdesc_base_phase(const struct ena_eth_io_rx_cdesc_base *p) { return (p->status & ENA_ETH_IO_RX_CDESC_BASE_PHASE_MASK) >> ENA_ETH_IO_RX_CDESC_BASE_PHASE_SHIFT; From patchwork Wed Mar 6 12:24:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138027 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 493FE43C5B; Wed, 6 Mar 2024 13:26:47 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 09BF342E57; Wed, 6 Mar 2024 13:25:26 +0100 (CET) Received: from smtp-fw-52005.amazon.com (smtp-fw-52005.amazon.com [52.119.213.156]) by mails.dpdk.org (Postfix) with ESMTP id 1A94C42E54 for ; Wed, 6 Mar 2024 13:25:24 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727925; x=1741263925; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=dI/+4j50ym1i6p7Y/+jdESCGnAYK60J+dlv/WbcCxD4=; b=hSdOUv/GDyzbJtUg0nldq60hlyxdjQcEg6fS34wckRsjTclaUptc1OEI ct6ylf4bF0FaDkBjkmwU2zjDS8BIR3UTPPeF0IvotYonpQR8sXEzEoijF pm3vuMXDTs1jYUOHaJa/bfci6V7g0rFIdgWX6md1gx4SqqN2/m3yHcwPp 0=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="638961965" Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO smtpout.prod.us-east-1.prod.farcaster.email.amazon.dev) ([10.43.8.6]) by smtp-border-fw-52005.iad7.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:24 +0000 Received: from EX19MTAEUA001.ant.amazon.com [10.0.43.254:17957] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.41.19:2525] with esmtp (Farcaster) id 293ef85b-ec66-44d7-a251-2fcb8d688509; Wed, 6 Mar 2024 12:25:22 +0000 (UTC) X-Farcaster-Flow-ID: 293ef85b-ec66-44d7-a251-2fcb8d688509 Received: from EX19D007EUA001.ant.amazon.com (10.252.50.133) by EX19MTAEUA001.ant.amazon.com (10.252.50.50) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:22 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUA001.ant.amazon.com (10.252.50.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:16 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:15 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 13/33] net/ena/hal: use correct read once on u8 field Date: Wed, 6 Mar 2024 14:24:25 +0200 Message-ID: <20240306122445.4350-14-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes The flags field in ena_eth_io_tx_cdesc is 8-bits long. The current macro used is READ_ONCE16. Switching to READ_ONCE8 to avoid reading extra data. Given that there's an implicit cast to u8 in the assignment, the correct value is being read, but this change makes it even more accurate. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/hal/ena_eth_com.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ena/hal/ena_eth_com.h b/drivers/net/ena/hal/ena_eth_com.h index cee4f35124..6a7c17f84f 100644 --- a/drivers/net/ena/hal/ena_eth_com.h +++ b/drivers/net/ena/hal/ena_eth_com.h @@ -219,7 +219,7 @@ static inline int ena_com_tx_comp_req_id_get(struct ena_com_io_cq *io_cq, * expected, it mean that the device still didn't update * this completion. */ - cdesc_phase = READ_ONCE16(cdesc->flags) & ENA_ETH_IO_TX_CDESC_PHASE_MASK; + cdesc_phase = READ_ONCE8(cdesc->flags) & ENA_ETH_IO_TX_CDESC_PHASE_MASK; if (cdesc_phase != expected_phase) return ENA_COM_TRY_AGAIN; From patchwork Wed Mar 6 12:24:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138026 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4E60943C5B; Wed, 6 Mar 2024 13:26:39 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D970842E61; Wed, 6 Mar 2024 13:25:21 +0100 (CET) Received: from smtp-fw-52004.amazon.com (smtp-fw-52004.amazon.com [52.119.213.154]) by mails.dpdk.org (Postfix) with ESMTP id C1E8D42E52 for ; Wed, 6 Mar 2024 13:25:20 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727921; x=1741263921; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=vT9uLUa6L4PATln0gi7ELKwa4TTMi+RHT6LRmHl0bBY=; b=dIU/Ea/Ov973/UoQzEiterzShEar75J7coh42pfXp+x8pIH5IlYXjBVU ncFsaUozXZwWgeiJqUEAwxlUDxkdx7vkVsPmceqZvKFwPBQGbKb6GHT5y I77E8dYhEqR8cfEf5wj5+n5s1dYdQd+dJ70H7xMZaXoUBgcxTwf9NM5Rt g=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="189623252" Received: from iad12-co-svc-p1-lb1-vlan2.amazon.com (HELO smtpout.prod.us-east-1.prod.farcaster.email.amazon.dev) ([10.43.8.2]) by smtp-border-fw-52004.iad7.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:21 +0000 Received: from EX19MTAEUC001.ant.amazon.com [10.0.10.100:59170] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.3.166:2525] with esmtp (Farcaster) id 7085228b-2f84-4b78-874b-59e87824be37; Wed, 6 Mar 2024 12:25:19 +0000 (UTC) X-Farcaster-Flow-ID: 7085228b-2f84-4b78-874b-59e87824be37 Received: from EX19D007EUA004.ant.amazon.com (10.252.50.76) by EX19MTAEUC001.ant.amazon.com (10.252.51.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:19 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUA004.ant.amazon.com (10.252.50.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:18 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:17 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 14/33] net/ena/hal: add completion descriptor corruption check Date: Wed, 6 Mar 2024 14:24:26 +0200 Message-ID: <20240306122445.4350-15-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes Adding a check of the MBZ (Must Be Zero) fields in the incoming tx and rx completion descriptors in order to identify corrupted descriptors. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/hal/ena_eth_com.c | 13 +++++++++++-- drivers/net/ena/hal/ena_eth_com.h | 14 +++++++++++++- 2 files changed, 24 insertions(+), 3 deletions(-) diff --git a/drivers/net/ena/hal/ena_eth_com.c b/drivers/net/ena/hal/ena_eth_com.c index dc2935a53e..988fa013a7 100644 --- a/drivers/net/ena/hal/ena_eth_com.c +++ b/drivers/net/ena/hal/ena_eth_com.c @@ -237,6 +237,7 @@ static int ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq, u16 *first_cdesc_idx, u16 *num_descs) { + struct ena_com_dev *dev = ena_com_io_cq_to_ena_dev(io_cq); u16 count = io_cq->cur_rx_pkt_cdesc_count, head_masked; struct ena_eth_io_rx_cdesc_base *cdesc; u32 last = 0; @@ -252,13 +253,21 @@ static int ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq, ena_com_cq_inc_head(io_cq); if (unlikely((status & ENA_ETH_IO_RX_CDESC_BASE_FIRST_MASK) >> ENA_ETH_IO_RX_CDESC_BASE_FIRST_SHIFT && count != 0)) { - struct ena_com_dev *dev = ena_com_io_cq_to_ena_dev(io_cq); - ena_trc_err(dev, "First bit is on in descriptor #%d on q_id: %d, req_id: %u\n", count, io_cq->qid, cdesc->req_id); return ENA_COM_FAULT; } + + if (unlikely((status & (ENA_ETH_IO_RX_CDESC_BASE_MBZ7_MASK | + ENA_ETH_IO_RX_CDESC_BASE_MBZ17_MASK)) && + ena_com_get_cap(dev, ENA_ADMIN_CDESC_MBZ))) { + ena_trc_err(dev, + "Corrupted RX descriptor #%d on q_id: %d, req_id: %u\n", + count, io_cq->qid, cdesc->req_id); + return ENA_COM_FAULT; + } + count++; last = (status & ENA_ETH_IO_RX_CDESC_BASE_LAST_MASK) >> ENA_ETH_IO_RX_CDESC_BASE_LAST_SHIFT; diff --git a/drivers/net/ena/hal/ena_eth_com.h b/drivers/net/ena/hal/ena_eth_com.h index 6a7c17f84f..2fac10e678 100644 --- a/drivers/net/ena/hal/ena_eth_com.h +++ b/drivers/net/ena/hal/ena_eth_com.h @@ -204,9 +204,11 @@ static inline void ena_com_cq_inc_head(struct ena_com_io_cq *io_cq) static inline int ena_com_tx_comp_req_id_get(struct ena_com_io_cq *io_cq, u16 *req_id) { + struct ena_com_dev *dev = ena_com_io_cq_to_ena_dev(io_cq); u8 expected_phase, cdesc_phase; struct ena_eth_io_tx_cdesc *cdesc; u16 masked_head; + u8 flags; masked_head = io_cq->head & (io_cq->q_depth - 1); expected_phase = io_cq->phase; @@ -215,14 +217,24 @@ static inline int ena_com_tx_comp_req_id_get(struct ena_com_io_cq *io_cq, ((uintptr_t)io_cq->cdesc_addr.virt_addr + (masked_head * io_cq->cdesc_entry_size_in_bytes)); + flags = READ_ONCE8(cdesc->flags); + /* When the current completion descriptor phase isn't the same as the * expected, it mean that the device still didn't update * this completion. */ - cdesc_phase = READ_ONCE8(cdesc->flags) & ENA_ETH_IO_TX_CDESC_PHASE_MASK; + cdesc_phase = flags & ENA_ETH_IO_TX_CDESC_PHASE_MASK; if (cdesc_phase != expected_phase) return ENA_COM_TRY_AGAIN; + if (unlikely((flags & ENA_ETH_IO_TX_CDESC_MBZ6_MASK) && + ena_com_get_cap(dev, ENA_ADMIN_CDESC_MBZ))) { + ena_trc_err(dev, + "Corrupted TX descriptor on q_id: %d, req_id: %u\n", + io_cq->qid, cdesc->req_id); + return ENA_COM_FAULT; + } + dma_rmb(); *req_id = READ_ONCE16(cdesc->req_id); From patchwork Wed Mar 6 12:24:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138028 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0624F43C5B; Wed, 6 Mar 2024 13:26:55 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4906542E70; Wed, 6 Mar 2024 13:25:27 +0100 (CET) Received: from smtp-fw-52002.amazon.com (smtp-fw-52002.amazon.com [52.119.213.150]) by mails.dpdk.org (Postfix) with ESMTP id C7AA142E54 for ; Wed, 6 Mar 2024 13:25:25 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727926; x=1741263926; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=Jk2W44zHl9blBPvPZ3kez/j1TZ0u4YrdMs/JltPPGHU=; b=P6Jo/mGsY045M0z2Wu2dxhQBJMj1QuAl3R5a8e2O0LP111vDOdUWkHYW Dis8Vj8oDzBD+3buyfSaCGOtblg8+k5lMslKgSXnlfrGOrMs2Rgi5WpLR DcLcKKFP8OjjrZeiHhrwRoQWPZh5Xm2oFpT3on7vP84jozz/rPXzZ+cOv o=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="617755734" Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.43.8.6]) by smtp-border-fw-52002.iad7.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:23 +0000 Received: from EX19MTAEUB001.ant.amazon.com [10.0.10.100:27182] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.42.5:2525] with esmtp (Farcaster) id 7502521d-990e-4096-abb9-c385e7e46f68; Wed, 6 Mar 2024 12:25:21 +0000 (UTC) X-Farcaster-Flow-ID: 7502521d-990e-4096-abb9-c385e7e46f68 Received: from EX19D007EUB001.ant.amazon.com (10.252.51.82) by EX19MTAEUB001.ant.amazon.com (10.252.51.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:21 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUB001.ant.amazon.com (10.252.51.82) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:20 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:19 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 15/33] net/ena/hal: malformed Tx descriptor error reason Date: Wed, 6 Mar 2024 14:24:27 +0200 Message-ID: <20240306122445.4350-16-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes Adding ENA_REGS_RESET_TX_DESCRIPTOR_MALFORMED to identify cases where the returned TX completion descriptors are corrupted. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/hal/ena_defs/ena_regs_defs.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/ena/hal/ena_defs/ena_regs_defs.h b/drivers/net/ena/hal/ena_defs/ena_regs_defs.h index 6a33f74812..a94025dc77 100644 --- a/drivers/net/ena/hal/ena_defs/ena_regs_defs.h +++ b/drivers/net/ena/hal/ena_defs/ena_regs_defs.h @@ -23,6 +23,7 @@ enum ena_regs_reset_reason_types { ENA_REGS_RESET_MISS_INTERRUPT = 14, ENA_REGS_RESET_SUSPECTED_POLL_STARVATION = 15, ENA_REGS_RESET_RX_DESCRIPTOR_MALFORMED = 16, + ENA_REGS_RESET_TX_DESCRIPTOR_MALFORMED = 17, ENA_REGS_RESET_LAST, }; From patchwork Wed Mar 6 12:24:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138029 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1CF5E43C5B; Wed, 6 Mar 2024 13:27:02 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8E80342E74; Wed, 6 Mar 2024 13:25:28 +0100 (CET) Received: from smtp-fw-80007.amazon.com (smtp-fw-80007.amazon.com [99.78.197.218]) by mails.dpdk.org (Postfix) with ESMTP id C018242E52 for ; Wed, 6 Mar 2024 13:25:25 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727926; x=1741263926; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=DXBZC0Ueaihdx3mG/eqHKPbviKqviZar25VktAcTTcI=; b=jyQ/7AJC9YRL9bgwEruNvjjnDf7ReZ5zbLyNMzjfSM8sifcqGGSYzmlI VkgI54FAT2rbcREfWwtyu6m/W/JoGk8G2etYo6Rg7kSANeZDBOsWlusAp DJZWNGlQTFioiIhuhw0A8g4eotCptpYLeTsvTG1MbVjE6oFQ9gnfjipXN s=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="279007508" Received: from pdx4-co-svc-p1-lb2-vlan2.amazon.com (HELO smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.25.36.210]) by smtp-border-fw-80007.pdx80.corp.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:25 +0000 Received: from EX19MTAEUB002.ant.amazon.com [10.0.10.100:28870] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.0.36:2525] with esmtp (Farcaster) id f5e6e973-ad9d-4c49-ac42-beccb7455634; Wed, 6 Mar 2024 12:25:23 +0000 (UTC) X-Farcaster-Flow-ID: f5e6e973-ad9d-4c49-ac42-beccb7455634 Received: from EX19D007EUB001.ant.amazon.com (10.252.51.82) by EX19MTAEUB002.ant.amazon.com (10.252.51.59) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:23 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUB001.ant.amazon.com (10.252.51.82) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:22 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:21 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 16/33] net/ena/hal: phc feature modifications Date: Wed, 6 Mar 2024 14:24:28 +0200 Message-ID: <20240306122445.4350-17-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes 1. PHC algorithm is updated to support reading new PHC values. 2. Update default PHC expiration timeout. 3. Fix a theoretical PHC destroy race. 4. Adjust PHC for multiple devices. 5. PHC activation version check point. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/hal/ena_com.c | 111 ++++++++++++------ drivers/net/ena/hal/ena_com.h | 31 +++-- drivers/net/ena/hal/ena_defs/ena_admin_defs.h | 45 +++++-- 3 files changed, 135 insertions(+), 52 deletions(-) diff --git a/drivers/net/ena/hal/ena_com.c b/drivers/net/ena/hal/ena_com.c index 31c37b0ab3..fb3ad27d0a 100644 --- a/drivers/net/ena/hal/ena_com.c +++ b/drivers/net/ena/hal/ena_com.c @@ -41,10 +41,12 @@ #define ENA_MAX_ADMIN_POLL_US 5000 /* PHC definitions */ -#define ENA_PHC_DEFAULT_EXPIRE_TIMEOUT_USEC 20 +#define ENA_PHC_DEFAULT_EXPIRE_TIMEOUT_USEC 10 #define ENA_PHC_DEFAULT_BLOCK_TIMEOUT_USEC 1000 -#define ENA_PHC_TIMESTAMP_ERROR 0xFFFFFFFFFFFFFFFF +#define ENA_PHC_MAX_ERROR_BOUND 0xFFFFFFFF #define ENA_PHC_REQ_ID_OFFSET 0xDEAD +#define ENA_PHC_ERROR_FLAGS (ENA_ADMIN_PHC_ERROR_FLAG_TIMESTAMP | \ + ENA_ADMIN_PHC_ERROR_FLAG_ERROR_BOUND) /*****************************************************************************/ /*****************************************************************************/ @@ -1778,16 +1780,21 @@ int ena_com_phc_config(struct ena_com_dev *ena_dev) struct ena_admin_set_feat_cmd set_feat_cmd; int ret = 0; - /* Get device PHC default configuration */ - ret = ena_com_get_feature(ena_dev, &get_feat_resp, ENA_ADMIN_PHC_CONFIG, 0); + /* Get default device PHC configuration */ + ret = ena_com_get_feature(ena_dev, + &get_feat_resp, + ENA_ADMIN_PHC_CONFIG, + ENA_ADMIN_PHC_FEATURE_VERSION_0); if (unlikely(ret)) { ena_trc_err(ena_dev, "Failed to get PHC feature configuration, error: %d\n", ret); return ret; } - /* Supporting only readless PHC retrieval */ - if (get_feat_resp.u.phc.type != ENA_ADMIN_PHC_TYPE_READLESS) { - ena_trc_err(ena_dev, "Unsupported PHC type, error: %d\n", ENA_COM_UNSUPPORTED); + /* Supporting only PHC V0 (readless mode with error bound) */ + if (get_feat_resp.u.phc.version != ENA_ADMIN_PHC_FEATURE_VERSION_0) { + ena_trc_err(ena_dev, "Unsupported PHC version (0x%X), error: %d\n", + get_feat_resp.u.phc.version, + ENA_COM_UNSUPPORTED); return ENA_COM_UNSUPPORTED; } @@ -1804,11 +1811,11 @@ int ena_com_phc_config(struct ena_com_dev *ena_dev) get_feat_resp.u.phc.block_timeout_usec : ENA_PHC_DEFAULT_BLOCK_TIMEOUT_USEC; - /* Sanity check - expire timeout must not be above skip timeout */ + /* Sanity check - expire timeout must not exceed block timeout */ if (phc->expire_timeout_usec > phc->block_timeout_usec) phc->expire_timeout_usec = phc->block_timeout_usec; - /* Prepare PHC feature command with PHC output address */ + /* Prepare PHC config feature command */ memset(&set_feat_cmd, 0x0, sizeof(set_feat_cmd)); set_feat_cmd.aq_common_descriptor.opcode = ENA_ADMIN_SET_FEATURE; set_feat_cmd.feat_common.feature_id = ENA_ADMIN_PHC_CONFIG; @@ -1840,13 +1847,16 @@ int ena_com_phc_config(struct ena_com_dev *ena_dev) void ena_com_phc_destroy(struct ena_com_dev *ena_dev) { struct ena_com_phc_info *phc = &ena_dev->phc; - - phc->active = false; + unsigned long flags = 0; /* In case PHC is not supported by the device, silently exiting */ if (!phc->virt_addr) return; + ENA_SPINLOCK_LOCK(phc->lock, flags); + phc->active = false; + ENA_SPINLOCK_UNLOCK(phc->lock, flags); + ENA_MEM_FREE_COHERENT(ena_dev->dmadev, sizeof(*phc->virt_addr), phc->virt_addr, @@ -1857,15 +1867,14 @@ void ena_com_phc_destroy(struct ena_com_dev *ena_dev) ENA_SPINLOCK_DESTROY(phc->lock); } -int ena_com_phc_get(struct ena_com_dev *ena_dev, u64 *timestamp) +int ena_com_phc_get_timestamp(struct ena_com_dev *ena_dev, u64 *timestamp) { volatile struct ena_admin_phc_resp *read_resp = ena_dev->phc.virt_addr; + const ena_time_high_res_t zero_system_time = ENA_TIME_INIT_HIGH_RES(); struct ena_com_phc_info *phc = &ena_dev->phc; - ena_time_high_res_t initial_time = ENA_TIME_INIT_HIGH_RES(); - static ena_time_high_res_t start_time; - unsigned long flags = 0; ena_time_high_res_t expire_time; ena_time_high_res_t block_time; + unsigned long flags = 0; int ret = ENA_COM_OK; if (!phc->active) { @@ -1876,9 +1885,10 @@ int ena_com_phc_get(struct ena_com_dev *ena_dev, u64 *timestamp) ENA_SPINLOCK_LOCK(phc->lock, flags); /* Check if PHC is in blocked state */ - if (unlikely(ENA_TIME_COMPARE_HIGH_RES(start_time, initial_time))) { + if (unlikely(ENA_TIME_COMPARE_HIGH_RES(phc->system_time, zero_system_time))) { /* Check if blocking time expired */ - block_time = ENA_GET_SYSTEM_TIMEOUT_HIGH_RES(start_time, phc->block_timeout_usec); + block_time = ENA_GET_SYSTEM_TIMEOUT_HIGH_RES(phc->system_time, + phc->block_timeout_usec); if (!ENA_TIME_EXPIRE_HIGH_RES(block_time)) { /* PHC is still in blocked state, skip PHC request */ phc->stats.phc_skp++; @@ -1886,22 +1896,23 @@ int ena_com_phc_get(struct ena_com_dev *ena_dev, u64 *timestamp) goto skip; } - /* PHC is in active state, update statistics according to req_id and timestamp */ + /* PHC is in active state, update statistics according to req_id and error_flags */ if ((READ_ONCE16(read_resp->req_id) != phc->req_id) || - read_resp->timestamp == ENA_PHC_TIMESTAMP_ERROR) + (read_resp->error_flags & ENA_PHC_ERROR_FLAGS)) { /* Device didn't update req_id during blocking time or timestamp is invalid, * this indicates on a device error */ phc->stats.phc_err++; - else + } else { /* Device updated req_id during blocking time with valid timestamp */ phc->stats.phc_exp++; + } } /* Setting relative timeouts */ - start_time = ENA_GET_SYSTEM_TIME_HIGH_RES(); - block_time = ENA_GET_SYSTEM_TIMEOUT_HIGH_RES(start_time, phc->block_timeout_usec); - expire_time = ENA_GET_SYSTEM_TIMEOUT_HIGH_RES(start_time, phc->expire_timeout_usec); + phc->system_time = ENA_GET_SYSTEM_TIME_HIGH_RES(); + block_time = ENA_GET_SYSTEM_TIMEOUT_HIGH_RES(phc->system_time, phc->block_timeout_usec); + expire_time = ENA_GET_SYSTEM_TIMEOUT_HIGH_RES(phc->system_time, phc->expire_timeout_usec); /* We expect the device to return this req_id once the new PHC timestamp is updated */ phc->req_id++; @@ -1918,35 +1929,45 @@ int ena_com_phc_get(struct ena_com_dev *ena_dev, u64 *timestamp) while (1) { if (unlikely(ENA_TIME_EXPIRE_HIGH_RES(expire_time))) { /* Gave up waiting for updated req_id, PHC enters into blocked state until - * passing blocking time + * passing blocking time, during this time any get PHC timestamp or + * error bound requests will fail with device busy error */ + phc->error_bound = ENA_PHC_MAX_ERROR_BOUND; ret = ENA_COM_DEVICE_BUSY; break; } /* Check if req_id was updated by the device */ if (READ_ONCE16(read_resp->req_id) != phc->req_id) { - /* req_id was not updated by the device, check again on next loop */ + /* req_id was not updated by the device yet, check again on next loop */ continue; } - /* req_id was updated which indicates that PHC timestamp was updated too */ - *timestamp = read_resp->timestamp; - - /* PHC timestamp validty check */ - if (unlikely(*timestamp == ENA_PHC_TIMESTAMP_ERROR)) { - /* Retrieved invalid PHC timestamp, PHC enters into blocked state until - * passing blocking time + /* req_id was updated by the device which indicates that PHC timestamp, error_bound + * and error_flags are updated too, checking errors before retrieving timestamp and + * error_bound values + */ + if (unlikely(read_resp->error_flags & ENA_PHC_ERROR_FLAGS)) { + /* Retrieved timestamp or error bound errors, PHC enters into blocked state + * until passing blocking time, during this time any get PHC timestamp or + * error bound requests will fail with device busy error */ + phc->error_bound = ENA_PHC_MAX_ERROR_BOUND; ret = ENA_COM_DEVICE_BUSY; break; } - /* Retrieved valid PHC timestamp */ + /* PHC timestamp value is returned to the caller */ + *timestamp = read_resp->timestamp; + + /* Error bound value is cached for future retrieval by caller */ + phc->error_bound = read_resp->error_bound; + + /* Update statistic on valid PHC timestamp retrieval */ phc->stats.phc_cnt++; /* This indicates PHC state is active */ - start_time = initial_time; + phc->system_time = zero_system_time; break; } @@ -1956,6 +1977,24 @@ int ena_com_phc_get(struct ena_com_dev *ena_dev, u64 *timestamp) return ret; } +int ena_com_phc_get_error_bound(struct ena_com_dev *ena_dev, u32 *error_bound) +{ + struct ena_com_phc_info *phc = &ena_dev->phc; + u32 local_error_bound = phc->error_bound; + + if (!phc->active) { + ena_trc_err(ena_dev, "PHC feature is not active in the device\n"); + return ENA_COM_UNSUPPORTED; + } + + if (local_error_bound == ENA_PHC_MAX_ERROR_BOUND) + return ENA_COM_DEVICE_BUSY; + + *error_bound = local_error_bound; + + return ENA_COM_OK; +} + int ena_com_mmio_reg_read_request_init(struct ena_com_dev *ena_dev) { struct ena_com_mmio_read *mmio_read = &ena_dev->mmio_read; @@ -2453,9 +2492,9 @@ int ena_com_dev_reset(struct ena_com_dev *ena_dev, reset_val |= reset_reason_lsb << ENA_REGS_DEV_CTL_RESET_REASON_SHIFT; - if (ena_com_get_cap(ena_dev, ENA_ADMIN_EXTENDED_RESET_REASONS)) { + if (ena_com_get_cap(ena_dev, ENA_ADMIN_EXTENDED_RESET_REASONS)) reset_val |= reset_reason_msb << ENA_REGS_DEV_CTL_RESET_REASON_EXT_SHIFT; - } else if (reset_reason_msb) { + else if (reset_reason_msb) { /* In case the device does not support intended * extended reset reason fallback to generic */ diff --git a/drivers/net/ena/hal/ena_com.h b/drivers/net/ena/hal/ena_com.h index cd054595d7..c62016cc06 100644 --- a/drivers/net/ena/hal/ena_com.h +++ b/drivers/net/ena/hal/ena_com.h @@ -274,6 +274,9 @@ struct ena_com_phc_info { /* PHC shared memory - virtual address */ struct ena_admin_phc_resp *virt_addr; + /* System time of last PHC request */ + ena_time_high_res_t system_time; + /* Spin lock to ensure a single outstanding PHC read */ ena_spinlock_t lock; @@ -293,17 +296,20 @@ struct ena_com_phc_info { */ u32 block_timeout_usec; + /* PHC shared memory - physical address */ + dma_addr_t phys_addr; + + /* PHC shared memory handle */ + ena_mem_handle_t mem_handle; + + /* Cached error bound per timestamp sample */ + u32 error_bound; + /* Request id sent to the device */ u16 req_id; /* True if PHC is active in the device */ bool active; - - /* PHC shared memory - memory handle */ - ena_mem_handle_t mem_handle; - - /* PHC shared memory - physical address */ - dma_addr_t phys_addr; }; struct ena_rss { @@ -468,12 +474,19 @@ int ena_com_phc_config(struct ena_com_dev *ena_dev); */ void ena_com_phc_destroy(struct ena_com_dev *ena_dev); -/* ena_com_phc_get - Retrieve PHC timestamp +/* ena_com_phc_get_timestamp - Retrieve PHC timestamp + * @ena_dev: ENA communication layer struct + * @timestamp: Retrieved PHC timestamp + * @return - 0 on success, negative value on failure + */ +int ena_com_phc_get_timestamp(struct ena_com_dev *ena_dev, u64 *timestamp); + +/* ena_com_phc_get_error_bound - Retrieve cached PHC error bound * @ena_dev: ENA communication layer struct - * @timestamp: Retrieve PHC timestamp + * @error_bound: Cached PHC error bound * @return - 0 on success, negative value on failure */ -int ena_com_phc_get(struct ena_com_dev *ena_dev, u64 *timestamp); +int ena_com_phc_get_error_bound(struct ena_com_dev *ena_dev, u32 *error_bound); /* ena_com_set_mmio_read_mode - Enable/disable the indirect mmio reg read mechanism * @ena_dev: ENA communication layer struct diff --git a/drivers/net/ena/hal/ena_defs/ena_admin_defs.h b/drivers/net/ena/hal/ena_defs/ena_admin_defs.h index 438e4a1085..ce8a26721e 100644 --- a/drivers/net/ena/hal/ena_defs/ena_admin_defs.h +++ b/drivers/net/ena/hal/ena_defs/ena_admin_defs.h @@ -144,8 +144,14 @@ enum ena_admin_get_stats_scope { ENA_ADMIN_ETH_TRAFFIC = 1, }; -enum ena_admin_get_phc_type { - ENA_ADMIN_PHC_TYPE_READLESS = 0, +enum ena_admin_phc_feature_version { + /* Readless with error_bound */ + ENA_ADMIN_PHC_FEATURE_VERSION_0 = 0, +}; + +enum ena_admin_phc_error_flags { + ENA_ADMIN_PHC_ERROR_FLAG_TIMESTAMP = BIT(0), + ENA_ADMIN_PHC_ERROR_FLAG_ERROR_BOUND = BIT(1), }; /* ENA SRD configuration for ENI */ @@ -987,7 +993,8 @@ struct ena_admin_host_info { * 5 : reserved * 6 : rx_page_reuse * 7 : tx_ipv6_csum_offload - * 31:8 : reserved + * 8 : phc + * 31:9 : reserved */ uint32_t driver_supported_features; }; @@ -1073,10 +1080,10 @@ struct ena_admin_queue_ext_feature_desc { }; struct ena_admin_feature_phc_desc { - /* PHC type as defined in enum ena_admin_get_phc_type, - * used only for GET command. + /* PHC version as defined in enum ena_admin_phc_feature_version, + * used only for GET command as max supported PHC version by the device. */ - uint8_t type; + uint8_t version; /* Reserved - MBZ */ uint8_t reserved1[3]; @@ -1272,13 +1279,23 @@ struct ena_admin_ena_mmio_req_read_less_resp { }; struct ena_admin_phc_resp { + /* Request Id, received from DB register */ uint16_t req_id; uint8_t reserved1[6]; + /* PHC timestamp (nsec) */ uint64_t timestamp; - uint8_t reserved2[48]; + uint8_t reserved2[8]; + + /* Timestamp error limit (nsec) */ + uint32_t error_bound; + + /* Bit field of enum ena_admin_phc_error_flags */ + uint32_t error_flags; + + uint8_t reserved3[32]; }; /* aq_common_desc */ @@ -1381,6 +1398,8 @@ struct ena_admin_phc_resp { #define ENA_ADMIN_HOST_INFO_RX_PAGE_REUSE_MASK BIT(6) #define ENA_ADMIN_HOST_INFO_TX_IPV6_CSUM_OFFLOAD_SHIFT 7 #define ENA_ADMIN_HOST_INFO_TX_IPV6_CSUM_OFFLOAD_MASK BIT(7) +#define ENA_ADMIN_HOST_INFO_PHC_SHIFT 8 +#define ENA_ADMIN_HOST_INFO_PHC_MASK BIT(8) /* feature_rss_ind_table */ #define ENA_ADMIN_FEATURE_RSS_IND_TABLE_ONE_ENTRY_UPDATE_MASK BIT(0) @@ -1879,6 +1898,18 @@ static inline void set_ena_admin_feature_rss_ind_table_one_entry_update(struct e p->flags |= val & ENA_ADMIN_FEATURE_RSS_IND_TABLE_ONE_ENTRY_UPDATE_MASK; } +static inline uint32_t get_ena_admin_host_info_phc(const struct ena_admin_host_info *p) +{ + return (p->driver_supported_features & + ENA_ADMIN_HOST_INFO_PHC_MASK) >> ENA_ADMIN_HOST_INFO_PHC_SHIFT; +} + +static inline void set_ena_admin_host_info_phc(struct ena_admin_host_info *p, uint32_t val) +{ + p->driver_supported_features |= (val << ENA_ADMIN_HOST_INFO_PHC_SHIFT) & + ENA_ADMIN_HOST_INFO_PHC_MASK; +} + static inline uint8_t get_ena_admin_aenq_common_desc_phase(const struct ena_admin_aenq_common_desc *p) { return p->flags & ENA_ADMIN_AENQ_COMMON_DESC_PHASE_MASK; From patchwork Wed Mar 6 12:24:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138030 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4687A43C5B; Wed, 6 Mar 2024 13:27:12 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 39A2D42E6E; Wed, 6 Mar 2024 13:25:32 +0100 (CET) Received: from smtp-fw-52004.amazon.com (smtp-fw-52004.amazon.com [52.119.213.154]) by mails.dpdk.org (Postfix) with ESMTP id 57E2D42E6A for ; Wed, 6 Mar 2024 13:25:27 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727929; x=1741263929; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=uF/cr0gtC6d8HXRBMVg5YZljdZTmWnyKXRYY2RRx/cQ=; b=XNVqTWlcJS2XFIbagLCgNn71UupwiWSmx+r6fRj7/OPrzqt9z0k/ACbm YM/UlUDj9tkrHXs3018DZQghuZQICgo2MbR4HaXc2KCaRC96btafTcs/z ZauVVlpV4D1WriZm8TlrvWwrzkD5MVRFj5KXC4OmQ7Q8fFhv8VUx6WhRy M=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="189623259" Received: from iad12-co-svc-p1-lb1-vlan2.amazon.com (HELO smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.43.8.2]) by smtp-border-fw-52004.iad7.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:28 +0000 Received: from EX19MTAEUA002.ant.amazon.com [10.0.43.254:48628] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.42.5:2525] with esmtp (Farcaster) id 5c2c76de-76b5-419d-a73b-4abd75466e33; Wed, 6 Mar 2024 12:25:25 +0000 (UTC) X-Farcaster-Flow-ID: 5c2c76de-76b5-419d-a73b-4abd75466e33 Received: from EX19D007EUA004.ant.amazon.com (10.252.50.76) by EX19MTAEUA002.ant.amazon.com (10.252.50.126) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:25 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUA004.ant.amazon.com (10.252.50.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:25 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:23 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 17/33] net/ena/hal: restructure interrupt handling Date: Wed, 6 Mar 2024 14:24:29 +0200 Message-ID: <20240306122445.4350-18-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes When invoking an admin command, in interrupt mode, if the interrupt is received after timeout and also after the calling function finished running, the response will be written into a memory that is no longer valid. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/hal/ena_com.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/net/ena/hal/ena_com.c b/drivers/net/ena/hal/ena_com.c index fb3ad27d0a..a0c88b1a0e 100644 --- a/drivers/net/ena/hal/ena_com.c +++ b/drivers/net/ena/hal/ena_com.c @@ -181,6 +181,7 @@ static int ena_com_admin_init_aenq(struct ena_com_dev *ena_dev, static void comp_ctxt_release(struct ena_com_admin_queue *queue, struct ena_comp_ctx *comp_ctx) { + comp_ctx->user_cqe = NULL; comp_ctx->occupied = false; ATOMIC32_DEC(&queue->outstanding_cmds); } @@ -474,6 +475,9 @@ static void ena_com_handle_single_admin_completion(struct ena_com_admin_queue *a return; } + if (!comp_ctx->occupied) + return; + comp_ctx->status = ENA_CMD_COMPLETED; comp_ctx->comp_status = cqe->acq_common_descriptor.status; From patchwork Wed Mar 6 12:24:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138031 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2C7C543C5B; Wed, 6 Mar 2024 13:27:20 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4224342E7F; Wed, 6 Mar 2024 13:25:33 +0100 (CET) Received: from smtp-fw-9102.amazon.com (smtp-fw-9102.amazon.com [207.171.184.29]) by mails.dpdk.org (Postfix) with ESMTP id 69FF842E7F for ; Wed, 6 Mar 2024 13:25:30 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727930; x=1741263930; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=W/XY09LKHAfxeHeUsu35gK3VP2dCbMYwYzKcHfzr2sc=; b=NUBJvbdHbAroV4MUj4K/1A3DcEaw6SnsAfhLwSKfZljFVnoFu7Q5k5k9 0DOMqqFbEqGcHmaXaf8cxqBzHJA0alJOOSOBkek3707+YQgUfLuaYFEVo SMa4ACU4GJ/rmoWouumg1gY/cMNE3a71BPkVOzn/PN/C4lTRnwIBOhUzt I=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="401934692" Received: from pdx4-co-svc-p1-lb2-vlan3.amazon.com (HELO smtpout.prod.us-east-1.prod.farcaster.email.amazon.dev) ([10.25.36.214]) by smtp-border-fw-9102.sea19.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:29 +0000 Received: from EX19MTAEUA002.ant.amazon.com [10.0.43.254:20173] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.11.111:2525] with esmtp (Farcaster) id 00490787-463f-439a-8fac-63527d1bfaed; Wed, 6 Mar 2024 12:25:28 +0000 (UTC) X-Farcaster-Flow-ID: 00490787-463f-439a-8fac-63527d1bfaed Received: from EX19D007EUA001.ant.amazon.com (10.252.50.133) by EX19MTAEUA002.ant.amazon.com (10.252.50.124) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:27 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUA001.ant.amazon.com (10.252.50.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:27 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:25 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 18/33] net/ena/hal: add unlikely to error checks Date: Wed, 6 Mar 2024 14:24:30 +0200 Message-ID: <20240306122445.4350-19-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes The unlikely mechanism is used to reduce pipe flush, caused by a wrong branch prediction. Moreover, it increases readability by wrapping unexpected errors. This commit adds unlikely to error checks that are unlikely to happen. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/hal/ena_com.c | 56 +++++++++++++++---------------- drivers/net/ena/hal/ena_eth_com.c | 2 +- 2 files changed, 29 insertions(+), 29 deletions(-) diff --git a/drivers/net/ena/hal/ena_com.c b/drivers/net/ena/hal/ena_com.c index a0c88b1a0e..d2de5e172d 100644 --- a/drivers/net/ena/hal/ena_com.c +++ b/drivers/net/ena/hal/ena_com.c @@ -79,7 +79,7 @@ static int ena_com_mem_addr_set(struct ena_com_dev *ena_dev, struct ena_common_mem_addr *ena_addr, dma_addr_t addr) { - if ((addr & GENMASK_ULL(ena_dev->dma_addr_bits - 1, 0)) != addr) { + if (unlikely((addr & GENMASK_ULL(ena_dev->dma_addr_bits - 1, 0)) != addr)) { ena_trc_err(ena_dev, "DMA address has more bits than the device supports\n"); return ENA_COM_INVAL; } @@ -99,7 +99,7 @@ static int ena_com_admin_init_sq(struct ena_com_admin_queue *admin_queue) ENA_MEM_ALLOC_COHERENT(admin_queue->q_dmadev, size, sq->entries, sq->dma_addr, sq->mem_handle); - if (!sq->entries) { + if (unlikely(!sq->entries)) { ena_trc_err(ena_dev, "Memory allocation failed\n"); return ENA_COM_NO_MEM; } @@ -122,7 +122,7 @@ static int ena_com_admin_init_cq(struct ena_com_admin_queue *admin_queue) ENA_MEM_ALLOC_COHERENT(admin_queue->q_dmadev, size, cq->entries, cq->dma_addr, cq->mem_handle); - if (!cq->entries) { + if (unlikely(!cq->entries)) { ena_trc_err(ena_dev, "Memory allocation failed\n"); return ENA_COM_NO_MEM; } @@ -147,7 +147,7 @@ static int ena_com_admin_init_aenq(struct ena_com_dev *ena_dev, aenq->dma_addr, aenq->mem_handle); - if (!aenq->entries) { + if (unlikely(!aenq->entries)) { ena_trc_err(ena_dev, "Memory allocation failed\n"); return ENA_COM_NO_MEM; } @@ -233,7 +233,7 @@ static struct ena_comp_ctx *__ena_com_submit_admin_cmd(struct ena_com_admin_queu /* In case of queue FULL */ cnt = (u16)ATOMIC32_READ(&admin_queue->outstanding_cmds); - if (cnt >= admin_queue->q_depth) { + if (unlikely(cnt >= admin_queue->q_depth)) { ena_trc_dbg(admin_queue->ena_dev, "Admin queue is full.\n"); admin_queue->stats.out_of_space++; return ERR_PTR(ENA_COM_NO_SPACE); @@ -357,7 +357,7 @@ static int ena_com_init_io_sq(struct ena_com_dev *ena_dev, io_sq->desc_addr.mem_handle); } - if (!io_sq->desc_addr.virt_addr) { + if (unlikely(!io_sq->desc_addr.virt_addr)) { ena_trc_err(ena_dev, "Memory allocation failed\n"); return ENA_COM_NO_MEM; } @@ -382,7 +382,7 @@ static int ena_com_init_io_sq(struct ena_com_dev *ena_dev, if (!io_sq->bounce_buf_ctrl.base_buffer) io_sq->bounce_buf_ctrl.base_buffer = ENA_MEM_ALLOC(ena_dev->dmadev, size); - if (!io_sq->bounce_buf_ctrl.base_buffer) { + if (unlikely(!io_sq->bounce_buf_ctrl.base_buffer)) { ena_trc_err(ena_dev, "Bounce buffer memory allocation failed\n"); return ENA_COM_NO_MEM; } @@ -447,7 +447,7 @@ static int ena_com_init_io_cq(struct ena_com_dev *ena_dev, ENA_CDESC_RING_SIZE_ALIGNMENT); } - if (!io_cq->cdesc_addr.virt_addr) { + if (unlikely(!io_cq->cdesc_addr.virt_addr)) { ena_trc_err(ena_dev, "Memory allocation failed\n"); return ENA_COM_NO_MEM; } @@ -577,7 +577,7 @@ static int ena_com_wait_and_process_admin_cq_polling(struct ena_comp_ctx *comp_c if (comp_ctx->status != ENA_CMD_SUBMITTED) break; - if (ENA_TIME_EXPIRE(timeout)) { + if (unlikely(ENA_TIME_EXPIRE(timeout))) { ena_trc_err(admin_queue->ena_dev, "Wait for completion (polling) timeout\n"); /* ENA didn't have any completion */ @@ -776,7 +776,7 @@ static int ena_com_config_llq_info(struct ena_com_dev *ena_dev, llq_default_cfg->llq_ring_entry_size_value; rc = ena_com_set_llq(ena_dev); - if (rc) + if (unlikely(rc)) ena_trc_err(ena_dev, "Cannot set LLQ configuration: %d\n", rc); return rc; @@ -882,7 +882,7 @@ static u32 ena_com_reg_bar_read32(struct ena_com_dev *ena_dev, u16 offset) goto err; } - if (read_resp->reg_off != offset) { + if (unlikely(read_resp->reg_off != offset)) { ena_trc_err(ena_dev, "Read failure: wrong offset provided\n"); ret = ENA_MMIO_READ_TIMEOUT; } else { @@ -1006,7 +1006,7 @@ static int wait_for_reset_state(struct ena_com_dev *ena_dev, u32 timeout, exp_state) return 0; - if (ENA_TIME_EXPIRE(timeout_stamp)) + if (unlikely(ENA_TIME_EXPIRE(timeout_stamp))) return ENA_COM_TIMER_EXPIRED; ena_delay_exponential_backoff_us(exp++, ena_dev->ena_min_poll_delay_us); @@ -1467,7 +1467,7 @@ int ena_com_get_io_handlers(struct ena_com_dev *ena_dev, u16 qid, struct ena_com_io_sq **io_sq, struct ena_com_io_cq **io_cq) { - if (qid >= ENA_TOTAL_NUM_QUEUES) { + if (unlikely(qid >= ENA_TOTAL_NUM_QUEUES)) { ena_trc_err(ena_dev, "Invalid queue number %d but the max is %d\n", qid, ENA_TOTAL_NUM_QUEUES); return ENA_COM_INVAL; @@ -1575,7 +1575,7 @@ int ena_com_set_aenq_config(struct ena_com_dev *ena_dev, u32 groups_flag) int ret; ret = ena_com_get_feature(ena_dev, &get_resp, ENA_ADMIN_AENQ_CONFIG, 0); - if (ret) { + if (unlikely(ret)) { ena_trc_info(ena_dev, "Can't get aenq configuration\n"); return ret; } @@ -1622,7 +1622,7 @@ int ena_com_get_dma_width(struct ena_com_dev *ena_dev) ena_trc_dbg(ena_dev, "ENA dma width: %d\n", width); - if ((width < 32) || width > ENA_MAX_PHYS_ADDR_SIZE_BITS) { + if (unlikely(width < 32 || width > ENA_MAX_PHYS_ADDR_SIZE_BITS)) { ena_trc_err(ena_dev, "DMA width illegal value: %d\n", width); return ENA_COM_INVAL; } @@ -2092,15 +2092,15 @@ int ena_com_admin_init(struct ena_com_dev *ena_dev, ENA_SPINLOCK_INIT(admin_queue->q_lock); ret = ena_com_init_comp_ctxt(admin_queue); - if (ret) + if (unlikely(ret)) goto error; ret = ena_com_admin_init_sq(admin_queue); - if (ret) + if (unlikely(ret)) goto error; ret = ena_com_admin_init_cq(admin_queue); - if (ret) + if (unlikely(ret)) goto error; admin_queue->sq.db_addr = (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + @@ -2133,7 +2133,7 @@ int ena_com_admin_init(struct ena_com_dev *ena_dev, ENA_REG_WRITE32(ena_dev->bus, aq_caps, ena_dev->reg_bar + ENA_REGS_AQ_CAPS_OFF); ENA_REG_WRITE32(ena_dev->bus, acq_caps, ena_dev->reg_bar + ENA_REGS_ACQ_CAPS_OFF); ret = ena_com_admin_init_aenq(ena_dev, aenq_handlers); - if (ret) + if (unlikely(ret)) goto error; admin_queue->ena_dev = ena_dev; @@ -2153,7 +2153,7 @@ int ena_com_create_io_queue(struct ena_com_dev *ena_dev, struct ena_com_io_cq *io_cq; int ret; - if (ctx->qid >= ENA_TOTAL_NUM_QUEUES) { + if (unlikely(ctx->qid >= ENA_TOTAL_NUM_QUEUES)) { ena_trc_err(ena_dev, "Qid (%d) is bigger than max num of queues (%d)\n", ctx->qid, ENA_TOTAL_NUM_QUEUES); return ENA_COM_INVAL; @@ -2184,18 +2184,18 @@ int ena_com_create_io_queue(struct ena_com_dev *ena_dev, ENA_MIN32(ena_dev->tx_max_header_size, SZ_256); ret = ena_com_init_io_sq(ena_dev, ctx, io_sq); - if (ret) + if (unlikely(ret)) goto error; ret = ena_com_init_io_cq(ena_dev, ctx, io_cq); - if (ret) + if (unlikely(ret)) goto error; ret = ena_com_create_io_cq(ena_dev, io_cq); - if (ret) + if (unlikely(ret)) goto error; ret = ena_com_create_io_sq(ena_dev, io_sq, io_cq->idx); - if (ret) + if (unlikely(ret)) goto destroy_io_cq; return 0; @@ -2212,7 +2212,7 @@ void ena_com_destroy_io_queue(struct ena_com_dev *ena_dev, u16 qid) struct ena_com_io_sq *io_sq; struct ena_com_io_cq *io_cq; - if (qid >= ENA_TOTAL_NUM_QUEUES) { + if (unlikely(qid >= ENA_TOTAL_NUM_QUEUES)) { ena_trc_err(ena_dev, "Qid (%d) is bigger than max num of queues (%d)\n", qid, ENA_TOTAL_NUM_QUEUES); return; @@ -2513,7 +2513,7 @@ int ena_com_dev_reset(struct ena_com_dev *ena_dev, rc = wait_for_reset_state(ena_dev, timeout, ENA_REGS_DEV_STS_RESET_IN_PROGRESS_MASK); - if (rc != 0) { + if (unlikely(rc)) { ena_trc_err(ena_dev, "Reset indication didn't turn on\n"); return rc; } @@ -2521,7 +2521,7 @@ int ena_com_dev_reset(struct ena_com_dev *ena_dev, /* reset done */ ENA_REG_WRITE32(ena_dev->bus, 0, ena_dev->reg_bar + ENA_REGS_DEV_CTL_OFF); rc = wait_for_reset_state(ena_dev, timeout, 0); - if (rc != 0) { + if (unlikely(rc)) { ena_trc_err(ena_dev, "Reset indication didn't turn off\n"); return rc; } @@ -3383,7 +3383,7 @@ int ena_com_config_dev_mode(struct ena_com_dev *ena_dev, } rc = ena_com_config_llq_info(ena_dev, llq_features, llq_default_cfg); - if (rc) + if (unlikely(rc)) return rc; ena_dev->tx_max_header_size = llq_info->desc_list_entry_size - diff --git a/drivers/net/ena/hal/ena_eth_com.c b/drivers/net/ena/hal/ena_eth_com.c index 988fa013a7..b9123f84c3 100644 --- a/drivers/net/ena/hal/ena_eth_com.c +++ b/drivers/net/ena/hal/ena_eth_com.c @@ -455,7 +455,7 @@ int ena_com_prepare_tx(struct ena_com_io_sq *io_sq, /* If the caller doesn't want to send packets */ if (unlikely(!num_bufs && !header_len)) { rc = ena_com_close_bounce_buffer(io_sq); - if (rc) + if (unlikely(rc)) ena_trc_err(ena_com_io_sq_to_ena_dev(io_sq), "Failed to write buffers to LLQ\n"); *nb_hw_desc = io_sq->tail - start_tail; From patchwork Wed Mar 6 12:24:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138032 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id AD56543C5B; Wed, 6 Mar 2024 13:27:27 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8C18942E8B; Wed, 6 Mar 2024 13:25:34 +0100 (CET) Received: from smtp-fw-9106.amazon.com (smtp-fw-9106.amazon.com [207.171.188.206]) by mails.dpdk.org (Postfix) with ESMTP id B600842E2D for ; Wed, 6 Mar 2024 13:25:31 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727932; x=1741263932; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=O0+oR5JplhxY96zOHRd2LLJ5SaMRR4Ok/D1V4hIxZ0I=; b=Y4zeatQpuaDl2gamcw9lot99GP5/BE2AGMLi+IXugYDUNCj782BIzj9+ wvOfYq3OtNWo+hu8h9tPTFl5PmlRdi+aAcnttDPUZmJs/3qfmgm6SlE7Y fv/iCw/AGSfIfysowyXeT+GMvWqYQX8gnoh1/kV9FsrtfZyjuzvusPp5B 0=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="709065867" Received: from pdx4-co-svc-p1-lb2-vlan2.amazon.com (HELO smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.25.36.210]) by smtp-border-fw-9106.sea19.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:31 +0000 Received: from EX19MTAEUC002.ant.amazon.com [10.0.10.100:16435] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.20.189:2525] with esmtp (Farcaster) id 2f19aa9a-f364-429c-a958-eddf79339485; Wed, 6 Mar 2024 12:25:29 +0000 (UTC) X-Farcaster-Flow-ID: 2f19aa9a-f364-429c-a958-eddf79339485 Received: from EX19D007EUB001.ant.amazon.com (10.252.51.82) by EX19MTAEUC002.ant.amazon.com (10.252.51.181) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:29 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUB001.ant.amazon.com (10.252.51.82) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:29 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:27 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 19/33] net/ena/hal: missing admin interrupt reset reason Date: Wed, 6 Mar 2024 14:24:31 +0200 Message-ID: <20240306122445.4350-20-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes There can be cases when we trigger reset if an admin interrupt is missing. In order to identify this use-case specifically, this commit adds a new reset reason. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/hal/ena_com.c | 2 ++ drivers/net/ena/hal/ena_com.h | 12 ++++++++++++ drivers/net/ena/hal/ena_defs/ena_regs_defs.h | 1 + 3 files changed, 15 insertions(+) diff --git a/drivers/net/ena/hal/ena_com.c b/drivers/net/ena/hal/ena_com.c index d2de5e172d..8e9c112715 100644 --- a/drivers/net/ena/hal/ena_com.c +++ b/drivers/net/ena/hal/ena_com.c @@ -803,6 +803,7 @@ static int ena_com_wait_and_process_admin_cq_interrupts(struct ena_comp_ctx *com ENA_SPINLOCK_UNLOCK(admin_queue->q_lock, flags); if (comp_ctx->status == ENA_CMD_COMPLETED) { + admin_queue->is_missing_admin_interrupt = true; ena_trc_err(admin_queue->ena_dev, "The ena device sent a completion but the driver didn't receive a MSI-X interrupt (cmd %d), autopolling mode is %s\n", comp_ctx->cmd_opcode, admin_queue->auto_polling ? "ON" : "OFF"); @@ -2138,6 +2139,7 @@ int ena_com_admin_init(struct ena_com_dev *ena_dev, admin_queue->ena_dev = ena_dev; admin_queue->running_state = true; + admin_queue->is_missing_admin_interrupt = false; return 0; error: diff --git a/drivers/net/ena/hal/ena_com.h b/drivers/net/ena/hal/ena_com.h index c62016cc06..c999cd2381 100644 --- a/drivers/net/ena/hal/ena_com.h +++ b/drivers/net/ena/hal/ena_com.h @@ -237,6 +237,8 @@ struct ena_com_admin_queue { */ bool running_state; + bool is_missing_admin_interrupt; + /* Count the number of outstanding admin commands */ ena_atomic32_t outstanding_cmds; @@ -1089,6 +1091,16 @@ int ena_com_config_dev_mode(struct ena_com_dev *ena_dev, struct ena_admin_feature_llq_desc *llq_features, struct ena_llq_configurations *llq_default_config); +/* ena_com_get_missing_admin_interrupt - Return if there is a missing admin interrupt + * @ena_dev: ENA communication layer struct + * + * @return - true if there is a missing admin interrupt or false otherwise + */ +static inline bool ena_com_get_missing_admin_interrupt(struct ena_com_dev *ena_dev) +{ + return ena_dev->admin_queue.is_missing_admin_interrupt; +} + /* ena_com_io_sq_to_ena_dev - Extract ena_com_dev using contained field io_sq. * @io_sq: IO submit queue struct * diff --git a/drivers/net/ena/hal/ena_defs/ena_regs_defs.h b/drivers/net/ena/hal/ena_defs/ena_regs_defs.h index a94025dc77..db6a97d675 100644 --- a/drivers/net/ena/hal/ena_defs/ena_regs_defs.h +++ b/drivers/net/ena/hal/ena_defs/ena_regs_defs.h @@ -24,6 +24,7 @@ enum ena_regs_reset_reason_types { ENA_REGS_RESET_SUSPECTED_POLL_STARVATION = 15, ENA_REGS_RESET_RX_DESCRIPTOR_MALFORMED = 16, ENA_REGS_RESET_TX_DESCRIPTOR_MALFORMED = 17, + ENA_REGS_RESET_MISSING_ADMIN_INTERRUPT = 18, ENA_REGS_RESET_LAST, }; From patchwork Wed Mar 6 12:24:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138033 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BF0B143C5B; Wed, 6 Mar 2024 13:27:35 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id EAC9C42E32; Wed, 6 Mar 2024 13:25:38 +0100 (CET) Received: from smtp-fw-80006.amazon.com (smtp-fw-80006.amazon.com [99.78.197.217]) by mails.dpdk.org (Postfix) with ESMTP id 80DA142E32 for ; Wed, 6 Mar 2024 13:25:36 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727937; x=1741263937; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=azDsQZDJ5DIx6Co3D7wRMUIGOPYB9uwdmora3denVlY=; b=QqOzHq3sDg3xiGzDN5JwZ03xKsFo1dcE+tETkUX3HSCTEc6Ciucrmt+9 tvJ9En+WqyE7aif/Y4i6jHsI0Fw2+tWCVdLdhfYobn+IBp/+JBX4YOomE dsOuJBRXR+DCTaw9nTs8l4AFTmnkVZevwyUC+8Cn+zBOz8qFTnuvkrrzG 8=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="278107779" Received: from pdx4-co-svc-p1-lb2-vlan3.amazon.com (HELO smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.25.36.214]) by smtp-border-fw-80006.pdx80.corp.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:33 +0000 Received: from EX19MTAEUC001.ant.amazon.com [10.0.10.100:7786] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.11.111:2525] with esmtp (Farcaster) id 0cde6cda-0f01-47a4-91d2-ba04c7cfed9a; Wed, 6 Mar 2024 12:25:32 +0000 (UTC) X-Farcaster-Flow-ID: 0cde6cda-0f01-47a4-91d2-ba04c7cfed9a Received: from EX19D007EUB001.ant.amazon.com (10.252.51.82) by EX19MTAEUC001.ant.amazon.com (10.252.51.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:31 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUB001.ant.amazon.com (10.252.51.82) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:31 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:29 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 20/33] net/ena/hal: check for existing keep alive notification Date: Wed, 6 Mar 2024 14:24:32 +0200 Message-ID: <20240306122445.4350-21-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes This commit adds an API to query the aenq on whether there is a pending keep alive notification. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/hal/ena_com.c | 39 +++++++++++++++++++++++++++++++++++ drivers/net/ena/hal/ena_com.h | 10 +++++++++ 2 files changed, 49 insertions(+) diff --git a/drivers/net/ena/hal/ena_com.c b/drivers/net/ena/hal/ena_com.c index 8e9c112715..f9613f7807 100644 --- a/drivers/net/ena/hal/ena_com.c +++ b/drivers/net/ena/hal/ena_com.c @@ -2456,6 +2456,45 @@ void ena_com_aenq_intr_handler(struct ena_com_dev *ena_dev, void *data) mmiowb(); } +bool ena_com_aenq_has_keep_alive(struct ena_com_dev *ena_dev) +{ + struct ena_admin_aenq_common_desc *aenq_common; + struct ena_com_aenq *aenq = &ena_dev->aenq; + struct ena_admin_aenq_entry *aenq_e; + u8 phase = aenq->phase; + u16 masked_head; + + masked_head = aenq->head & (aenq->q_depth - 1); + aenq_e = &aenq->entries[masked_head]; /* Get first entry */ + aenq_common = &aenq_e->aenq_common_desc; + + /* Go over all the events */ + while ((READ_ONCE8(aenq_common->flags) & + ENA_ADMIN_AENQ_COMMON_DESC_PHASE_MASK) == phase) { + /* Make sure the device finished writing the rest of the descriptor + * before reading it. + */ + dma_rmb(); + + if (aenq_common->group == ENA_ADMIN_KEEP_ALIVE) + return true; + + /* Get next event entry */ + masked_head++; + + if (unlikely(masked_head == aenq->q_depth)) { + masked_head = 0; + phase = !phase; + } + + aenq_e = &aenq->entries[masked_head]; + aenq_common = &aenq_e->aenq_common_desc; + } + + return false; +} + + int ena_com_dev_reset(struct ena_com_dev *ena_dev, enum ena_regs_reset_reason_types reset_reason) { diff --git a/drivers/net/ena/hal/ena_com.h b/drivers/net/ena/hal/ena_com.h index c999cd2381..737747f64b 100644 --- a/drivers/net/ena/hal/ena_com.h +++ b/drivers/net/ena/hal/ena_com.h @@ -639,6 +639,16 @@ void ena_com_admin_q_comp_intr_handler(struct ena_com_dev *ena_dev); */ void ena_com_aenq_intr_handler(struct ena_com_dev *ena_dev, void *data); +/* ena_com_aenq_has_keep_alive - Retrieve if there is a keep alive notification in the aenq + * @ena_dev: ENA communication layer struct + * + * This method goes over the async event notification queue and returns if there + * is a keep alive notification. + * + * @return - true if there is a keep alive notification in the aenq or false otherwise + */ +bool ena_com_aenq_has_keep_alive(struct ena_com_dev *ena_dev); + /* ena_com_abort_admin_commands - Abort all the outstanding admin commands. * @ena_dev: ENA communication layer struct * From patchwork Wed Mar 6 12:24:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138034 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 05D5D43C5B; Wed, 6 Mar 2024 13:27:44 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1A5B042E95; Wed, 6 Mar 2024 13:25:40 +0100 (CET) Received: from smtp-fw-6002.amazon.com (smtp-fw-6002.amazon.com [52.95.49.90]) by mails.dpdk.org (Postfix) with ESMTP id 1C2CF42DD7 for ; Wed, 6 Mar 2024 13:25:38 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727938; x=1741263938; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=NWkeGrTJ2WQWasfUcGcM1ZXkgf/MY7eFj0fBtuxbwbk=; b=jClAN+zLQ8P7AOd86mHgft5qwHT8VAyP60kMxc1Ncv1SeOZD+dUubmlZ CbIggrSMCbAs1iqpBNFCEMWwI8Je8ijl1nZBOSNA6rCFDXUKD8WbnsQHv oqJkIsLAtLKkoGO7ivy1pHcbNN10JulLSEtcJfAEZm3RZr+XHh6nUUD8T M=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="391346676" Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.43.8.6]) by smtp-border-fw-6002.iad6.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:37 +0000 Received: from EX19MTAEUA001.ant.amazon.com [10.0.43.254:52402] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.0.36:2525] with esmtp (Farcaster) id 9ed2b5fa-a962-466a-991b-8aacd6fe4687; Wed, 6 Mar 2024 12:25:36 +0000 (UTC) X-Farcaster-Flow-ID: 9ed2b5fa-a962-466a-991b-8aacd6fe4687 Received: from EX19D007EUB001.ant.amazon.com (10.252.51.82) by EX19MTAEUA001.ant.amazon.com (10.252.50.192) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:33 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUB001.ant.amazon.com (10.252.51.82) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:33 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:32 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 21/33] net/ena/hal: modify memory barrier comment Date: Wed, 6 Mar 2024 14:24:33 +0200 Message-ID: <20240306122445.4350-22-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes The dma_rmb() memory barrier guarantees that the device set the phase bit before continuing to read the rest of the descriptor. Because the phase bit and the rest of the descriptor are in the same cache line this ensures coherency of the data from the descriptor. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/hal/ena_com.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/ena/hal/ena_com.c b/drivers/net/ena/hal/ena_com.c index f9613f7807..053e095585 100644 --- a/drivers/net/ena/hal/ena_com.c +++ b/drivers/net/ena/hal/ena_com.c @@ -2412,8 +2412,8 @@ void ena_com_aenq_intr_handler(struct ena_com_dev *ena_dev, void *data) /* Go over all the events */ while ((READ_ONCE8(aenq_common->flags) & ENA_ADMIN_AENQ_COMMON_DESC_PHASE_MASK) == phase) { - /* Make sure the phase bit (ownership) is as expected before - * reading the rest of the descriptor. + /* Make sure the device finished writing the rest of the descriptor + * before reading it. */ dma_rmb(); From patchwork Wed Mar 6 12:24:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138035 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3DA1A43C5B; Wed, 6 Mar 2024 13:27:54 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A469142EA4; Wed, 6 Mar 2024 13:25:41 +0100 (CET) Received: from smtp-fw-6002.amazon.com (smtp-fw-6002.amazon.com [52.95.49.90]) by mails.dpdk.org (Postfix) with ESMTP id 4565E42E84 for ; Wed, 6 Mar 2024 13:25:39 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727939; x=1741263939; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=Zai/BgUaGSoqifZiR4OiBXewPTuqqcgz+ZmvIeSN9fM=; b=fVB7BCO/zY+146b0NB+bEYLepGRkky8UAVKZ9Cr3epJoe5RmktwbggtE pFucig0am09PArXxfnDhI4Inn4nIRf8bEH+6gLZXtQynBLxbNo5ghzfme 4l1fE4coOCZDaY8dUmXAGCFr8Ms3orDT4XuCtzvNxCwihcsRZSRzzj1DY Q=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="391346682" Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.43.8.6]) by smtp-border-fw-6002.iad6.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:38 +0000 Received: from EX19MTAEUB002.ant.amazon.com [10.0.10.100:53528] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.42.5:2525] with esmtp (Farcaster) id 2b432284-11e1-4a07-ae03-c8bbb5597bf2; Wed, 6 Mar 2024 12:25:37 +0000 (UTC) X-Farcaster-Flow-ID: 2b432284-11e1-4a07-ae03-c8bbb5597bf2 Received: from EX19D007EUA001.ant.amazon.com (10.252.50.133) by EX19MTAEUB002.ant.amazon.com (10.252.51.79) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:36 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUA001.ant.amazon.com (10.252.50.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:35 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:34 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 22/33] net/ena/hal: rework Rx ring submission queue Date: Wed, 6 Mar 2024 14:24:34 +0200 Message-ID: <20240306122445.4350-23-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes RX ring submission queue descriptors are always located in host memory This optimization replaces the generic update tail method with a tailored method for host memory type descriptors to avoid unnecessary if statement. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/hal/ena_eth_com.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/net/ena/hal/ena_eth_com.c b/drivers/net/ena/hal/ena_eth_com.c index b9123f84c3..ebad38d15a 100644 --- a/drivers/net/ena/hal/ena_eth_com.c +++ b/drivers/net/ena/hal/ena_eth_com.c @@ -210,11 +210,8 @@ static int ena_com_sq_update_llq_tail(struct ena_com_io_sq *io_sq) return ENA_COM_OK; } -static int ena_com_sq_update_tail(struct ena_com_io_sq *io_sq) +static int ena_com_sq_update_reqular_queue_tail(struct ena_com_io_sq *io_sq) { - if (io_sq->mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) - return ena_com_sq_update_llq_tail(io_sq); - io_sq->tail++; /* Switch phase bit in case of wrap around */ @@ -224,6 +221,14 @@ static int ena_com_sq_update_tail(struct ena_com_io_sq *io_sq) return ENA_COM_OK; } +static int ena_com_sq_update_tail(struct ena_com_io_sq *io_sq) +{ + if (io_sq->mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) + return ena_com_sq_update_llq_tail(io_sq); + + return ena_com_sq_update_reqular_queue_tail(io_sq); +} + static struct ena_eth_io_rx_cdesc_base * ena_com_rx_cdesc_idx_to_ptr(struct ena_com_io_cq *io_cq, u16 idx) { @@ -662,7 +667,7 @@ int ena_com_add_single_rx_desc(struct ena_com_io_sq *io_sq, desc->buff_addr_hi = ((ena_buf->paddr & GENMASK_ULL(io_sq->dma_addr_bits - 1, 32)) >> 32); - return ena_com_sq_update_tail(io_sq); + return ena_com_sq_update_reqular_queue_tail(io_sq); } bool ena_com_cq_empty(struct ena_com_io_cq *io_cq) From patchwork Wed Mar 6 12:24:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138039 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4E3B643C5B; Wed, 6 Mar 2024 13:28:23 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3AA5D42EAC; Wed, 6 Mar 2024 13:25:56 +0100 (CET) Received: from smtp-fw-9102.amazon.com (smtp-fw-9102.amazon.com [207.171.184.29]) by mails.dpdk.org (Postfix) with ESMTP id 284D442E9C for ; Wed, 6 Mar 2024 13:25:54 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727954; x=1741263954; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=BovAflE5j7bwJDDkj5wJhK3mULG5QIAuRwrWVyY8Uj8=; b=AO0nbQ5XLq8AuNygoRIKFALoyERoNmZ8yJixeB9zjPzyfspqOZJhM2rU 9/fatzeY5Kaj24b6hTJQAr5QN5pMOVRFDn/oUK2wsBeRupFynfBjsfhsr g341d7nPLmopmEN7CAbH9VwcM55T4RQPaSe0KrhXDoSE9YomnF7hnPrP5 M=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="401934839" Received: from pdx4-co-svc-p1-lb2-vlan3.amazon.com (HELO smtpout.prod.us-east-1.prod.farcaster.email.amazon.dev) ([10.25.36.214]) by smtp-border-fw-9102.sea19.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:53 +0000 Received: from EX19MTAEUA001.ant.amazon.com [10.0.43.254:36772] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.42.5:2525] with esmtp (Farcaster) id cf615592-bbb6-4fe1-8c30-622a69a8b374; Wed, 6 Mar 2024 12:25:52 +0000 (UTC) X-Farcaster-Flow-ID: cf615592-bbb6-4fe1-8c30-622a69a8b374 Received: from EX19D007EUA001.ant.amazon.com (10.252.50.133) by EX19MTAEUA001.ant.amazon.com (10.252.50.50) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:38 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUA001.ant.amazon.com (10.252.50.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:37 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:36 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 23/33] net/ena/hal: remove operating system type enum Date: Wed, 6 Mar 2024 14:24:35 +0200 Message-ID: <20240306122445.4350-24-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes remove all other operating system enumeration as they are unrelated to DPDK. Use a constant value instead. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/hal/ena_defs/ena_admin_defs.h | 13 +------------ drivers/net/ena/hal/ena_plat_dpdk.h | 1 + 2 files changed, 2 insertions(+), 12 deletions(-) diff --git a/drivers/net/ena/hal/ena_defs/ena_admin_defs.h b/drivers/net/ena/hal/ena_defs/ena_admin_defs.h index ce8a26721e..c3910c50cc 100644 --- a/drivers/net/ena/hal/ena_defs/ena_admin_defs.h +++ b/drivers/net/ena/hal/ena_defs/ena_admin_defs.h @@ -933,19 +933,8 @@ struct ena_admin_feature_rss_flow_hash_input { uint16_t enabled_input_sort; }; -enum ena_admin_os_type { - ENA_ADMIN_OS_LINUX = 1, - ENA_ADMIN_OS_WIN = 2, - ENA_ADMIN_OS_DPDK = 3, - ENA_ADMIN_OS_FREEBSD = 4, - ENA_ADMIN_OS_IPXE = 5, - ENA_ADMIN_OS_ESXI = 6, - ENA_ADMIN_OS_MACOS = 7, - ENA_ADMIN_OS_GROUPS_NUM = 7, -}; - struct ena_admin_host_info { - /* defined in enum ena_admin_os_type */ + /* Host OS type defined as ENA_ADMIN_OS_* */ uint32_t os_type; /* os distribution string format */ diff --git a/drivers/net/ena/hal/ena_plat_dpdk.h b/drivers/net/ena/hal/ena_plat_dpdk.h index 5f7cbd1ee7..aa8fbb0cd9 100644 --- a/drivers/net/ena/hal/ena_plat_dpdk.h +++ b/drivers/net/ena/hal/ena_plat_dpdk.h @@ -341,5 +341,6 @@ static __rte_always_inline int ena_bits_per_u64(uint64_t bitmap) return count; } +#define ENA_ADMIN_OS_DPDK 3 #endif /* DPDK_ENA_COM_ENA_PLAT_DPDK_H_ */ From patchwork Wed Mar 6 12:24:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138036 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E852143C5B; Wed, 6 Mar 2024 13:28:01 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D3E2742DF6; Wed, 6 Mar 2024 13:25:47 +0100 (CET) Received: from smtp-fw-80009.amazon.com (smtp-fw-80009.amazon.com [99.78.197.220]) by mails.dpdk.org (Postfix) with ESMTP id A6C6A42DE9 for ; Wed, 6 Mar 2024 13:25:45 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727945; x=1741263945; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=GoS8TERay/ij48nRuXt/uG2U5nXux23ICXr+CMAiw8I=; b=GO/Taawmnhc5S4YLfQXAETxOQJTzH9OgRaQ0EunVk3clWtIo8SGRN59c +H/yugoSHYmrvIQxsHygo9L3mFTdgjpkmfwtDs7jsX7QdqQFHIdjgX1jq XmV4viXjFrGeOQl1jLLsMIu/C9ilxOsJMJkqIjG2Hz/CLBbqLMpQrx3pY c=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="71125416" Received: from pdx4-co-svc-p1-lb2-vlan2.amazon.com (HELO smtpout.prod.us-east-1.prod.farcaster.email.amazon.dev) ([10.25.36.210]) by smtp-border-fw-80009.pdx80.corp.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:41 +0000 Received: from EX19MTAEUB001.ant.amazon.com [10.0.10.100:38030] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.16.96:2525] with esmtp (Farcaster) id 00a7a222-e9b1-4f64-acf2-4ee72586733d; Wed, 6 Mar 2024 12:25:40 +0000 (UTC) X-Farcaster-Flow-ID: 00a7a222-e9b1-4f64-acf2-4ee72586733d Received: from EX19D007EUA004.ant.amazon.com (10.252.50.76) by EX19MTAEUB001.ant.amazon.com (10.252.51.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:39 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUA004.ant.amazon.com (10.252.50.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:39 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:38 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 24/33] net/ena/hal: handle command abort Date: Wed, 6 Mar 2024 14:24:36 +0200 Message-ID: <20240306122445.4350-25-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes Currently admin_queue->stats.aborted_cmd counter is incremented if an admin command status is ENA_CMD_ABORTED and only if the admin queue is in polling mode. This commit fixes handling the case of incrementing admin_queue->stats.aborted_cmd if the admin queue is in interrupt mode as well. Also added a verification that the command status is a valid completion status which is currently verified only if the admin queue is in polling mode. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/hal/ena_com.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/net/ena/hal/ena_com.c b/drivers/net/ena/hal/ena_com.c index 053e095585..b98540ba63 100644 --- a/drivers/net/ena/hal/ena_com.c +++ b/drivers/net/ena/hal/ena_com.c @@ -824,8 +824,19 @@ static int ena_com_wait_and_process_admin_cq_interrupts(struct ena_comp_ctx *com ret = ENA_COM_TIMER_EXPIRED; goto err; } + } else if (unlikely(comp_ctx->status == ENA_CMD_ABORTED)) { + ena_trc_err(admin_queue->ena_dev, "Command was aborted\n"); + ENA_SPINLOCK_LOCK(admin_queue->q_lock, flags); + admin_queue->stats.aborted_cmd++; + ENA_SPINLOCK_UNLOCK(admin_queue->q_lock, flags); + ret = ENA_COM_NO_DEVICE; + goto err; } + ENA_WARN(comp_ctx->status != ENA_CMD_COMPLETED, + admin_queue->ena_dev, "Invalid comp status %d\n", + comp_ctx->status); + ret = ena_com_comp_status_to_errno(admin_queue, comp_ctx->comp_status); err: comp_ctxt_release(admin_queue, comp_ctx); From patchwork Wed Mar 6 12:24:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138037 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1E2B843C5B; Wed, 6 Mar 2024 13:28:09 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0EF0E42E24; Wed, 6 Mar 2024 13:25:53 +0100 (CET) Received: from smtp-fw-52003.amazon.com (smtp-fw-52003.amazon.com [52.119.213.152]) by mails.dpdk.org (Postfix) with ESMTP id 482A542DF5 for ; Wed, 6 Mar 2024 13:25:51 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727951; x=1741263951; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=4oASsGkxBjllyAMWhoTCNrdRQYLl3/6Se8B3IoEj2/Y=; b=Tdsf5hUmHVaJ8dw3QuyOzz+FCKScrV47yzAzLuK+xuhby+oEc1W7IMnL jEW2pfFKU3TK8liMF//Tcsq4a9ASP3Qq1oBuzQGSaz3DofUlulEZYa6Rh yWl6sV5j9krSQpGlvrB7mtYPc+zJ6OMI4lReZ8v6LHL941oZJUmQ/3i+w c=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="642739799" Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO smtpout.prod.us-east-1.prod.farcaster.email.amazon.dev) ([10.43.8.6]) by smtp-border-fw-52003.iad7.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:51 +0000 Received: from EX19MTAEUA002.ant.amazon.com [10.0.43.254:23814] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.0.36:2525] with esmtp (Farcaster) id 244c4213-2d07-4ad0-99d4-ae18183aac88; Wed, 6 Mar 2024 12:25:50 +0000 (UTC) X-Farcaster-Flow-ID: 244c4213-2d07-4ad0-99d4-ae18183aac88 Received: from EX19D007EUB001.ant.amazon.com (10.252.51.82) by EX19MTAEUA002.ant.amazon.com (10.252.50.126) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:41 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUB001.ant.amazon.com (10.252.51.82) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:41 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:40 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 25/33] net/ena/hal: add support for device reset request Date: Wed, 6 Mar 2024 14:24:37 +0200 Message-ID: <20240306122445.4350-26-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes Adds support for reset request message from the device to the driver, over AENQ, which in turn should cause the driver to trigger reset. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/hal/ena_defs/ena_admin_defs.h | 3 ++- drivers/net/ena/hal/ena_defs/ena_regs_defs.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/net/ena/hal/ena_defs/ena_admin_defs.h b/drivers/net/ena/hal/ena_defs/ena_admin_defs.h index c3910c50cc..2adce75ed3 100644 --- a/drivers/net/ena/hal/ena_defs/ena_admin_defs.h +++ b/drivers/net/ena/hal/ena_defs/ena_admin_defs.h @@ -1213,7 +1213,8 @@ enum ena_admin_aenq_group { ENA_ADMIN_KEEP_ALIVE = 4, ENA_ADMIN_REFRESH_CAPABILITIES = 5, ENA_ADMIN_CONF_NOTIFICATIONS = 6, - ENA_ADMIN_AENQ_GROUPS_NUM = 7, + ENA_ADMIN_DEVICE_REQUEST_RESET = 7, + ENA_ADMIN_AENQ_GROUPS_NUM = 8, }; enum ena_admin_aenq_notification_syndrome { diff --git a/drivers/net/ena/hal/ena_defs/ena_regs_defs.h b/drivers/net/ena/hal/ena_defs/ena_regs_defs.h index db6a97d675..dd9b629f10 100644 --- a/drivers/net/ena/hal/ena_defs/ena_regs_defs.h +++ b/drivers/net/ena/hal/ena_defs/ena_regs_defs.h @@ -25,6 +25,7 @@ enum ena_regs_reset_reason_types { ENA_REGS_RESET_RX_DESCRIPTOR_MALFORMED = 16, ENA_REGS_RESET_TX_DESCRIPTOR_MALFORMED = 17, ENA_REGS_RESET_MISSING_ADMIN_INTERRUPT = 18, + ENA_REGS_RESET_DEVICE_REQUEST = 19, ENA_REGS_RESET_LAST, }; From patchwork Wed Mar 6 12:24:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138040 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C85FE43C5B; Wed, 6 Mar 2024 13:28:31 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6A66742EBA; Wed, 6 Mar 2024 13:25:59 +0100 (CET) Received: from smtp-fw-52004.amazon.com (smtp-fw-52004.amazon.com [52.119.213.154]) by mails.dpdk.org (Postfix) with ESMTP id E057942E41 for ; Wed, 6 Mar 2024 13:25:57 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727958; x=1741263958; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=dlm6VTopozRTtgsRxyisTZw4RPfugWax+gsYpfrByuM=; b=BRjhSgHTxa2vSQlc1A+BouawZQdr0nk+InErkYu41sR7XGIIx/1JVyNW rA4oZMZ35lQayCruusFsIzS4xUiWspiiujWqebBQ8yFRe0ZGnAnFAgOmi 3c/8H8V5I6X7aqquTDapoot0HC6+nDPbrVfNRITHEZaELrQhwD1VfeJ7B g=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="189623397" Received: from iad12-co-svc-p1-lb1-vlan2.amazon.com (HELO smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.43.8.2]) by smtp-border-fw-52004.iad7.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:58 +0000 Received: from EX19MTAEUC001.ant.amazon.com [10.0.10.100:13917] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.11.111:2525] with esmtp (Farcaster) id 0aad8b78-4fa2-4a45-8cc3-b00bb44f939d; Wed, 6 Mar 2024 12:25:56 +0000 (UTC) X-Farcaster-Flow-ID: 0aad8b78-4fa2-4a45-8cc3-b00bb44f939d Received: from EX19D007EUA001.ant.amazon.com (10.252.50.133) by EX19MTAEUC001.ant.amazon.com (10.252.51.155) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:44 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUA001.ant.amazon.com (10.252.50.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:43 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:42 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 26/33] net/ena: cosmetic changes Date: Wed, 6 Mar 2024 14:24:38 +0200 Message-ID: <20240306122445.4350-27-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes This patch makes several changes to improve the style and readability of the code. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/hal/ena_com.c | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/drivers/net/ena/hal/ena_com.c b/drivers/net/ena/hal/ena_com.c index b98540ba63..2db21e7895 100644 --- a/drivers/net/ena/hal/ena_com.c +++ b/drivers/net/ena/hal/ena_com.c @@ -1914,15 +1914,14 @@ int ena_com_phc_get_timestamp(struct ena_com_dev *ena_dev, u64 *timestamp) /* PHC is in active state, update statistics according to req_id and error_flags */ if ((READ_ONCE16(read_resp->req_id) != phc->req_id) || - (read_resp->error_flags & ENA_PHC_ERROR_FLAGS)) { + (read_resp->error_flags & ENA_PHC_ERROR_FLAGS)) /* Device didn't update req_id during blocking time or timestamp is invalid, * this indicates on a device error */ phc->stats.phc_err++; - } else { + else /* Device updated req_id during blocking time with valid timestamp */ phc->stats.phc_exp++; - } } /* Setting relative timeouts */ @@ -2431,7 +2430,7 @@ void ena_com_aenq_intr_handler(struct ena_com_dev *ena_dev, void *data) timestamp = (u64)aenq_common->timestamp_low | ((u64)aenq_common->timestamp_high << 32); - ena_trc_dbg(ena_dev, "AENQ! Group[%x] Syndrome[%x] timestamp: [%" ENA_PRIU64 "s]\n", + ena_trc_dbg(ena_dev, "AENQ! Group[%x] Syndrome[%x] timestamp: [%" ENA_PRIu64 "s]\n", aenq_common->group, aenq_common->syndrome, timestamp); @@ -3233,16 +3232,15 @@ int ena_com_allocate_customer_metrics_buffer(struct ena_com_dev *ena_dev) { struct ena_customer_metrics *customer_metrics = &ena_dev->customer_metrics; + customer_metrics->buffer_len = ENA_CUSTOMER_METRICS_BUFFER_SIZE; ENA_MEM_ALLOC_COHERENT(ena_dev->dmadev, customer_metrics->buffer_len, customer_metrics->buffer_virt_addr, customer_metrics->buffer_dma_addr, customer_metrics->buffer_dma_handle); - if (unlikely(customer_metrics->buffer_virt_addr == NULL)) + if (unlikely(!customer_metrics->buffer_virt_addr)) return ENA_COM_NO_MEM; - customer_metrics->buffer_len = ENA_CUSTOMER_METRICS_BUFFER_SIZE; - return 0; } @@ -3285,7 +3283,6 @@ void ena_com_delete_customer_metrics_buffer(struct ena_com_dev *ena_dev) customer_metrics->buffer_dma_addr, customer_metrics->buffer_dma_handle); customer_metrics->buffer_virt_addr = NULL; - customer_metrics->buffer_len = 0; } } From patchwork Wed Mar 6 12:24:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138038 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A216943C5B; Wed, 6 Mar 2024 13:28:15 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2844C42E63; Wed, 6 Mar 2024 13:25:55 +0100 (CET) Received: from smtp-fw-33001.amazon.com (smtp-fw-33001.amazon.com [207.171.190.10]) by mails.dpdk.org (Postfix) with ESMTP id B97CF42E1B for ; Wed, 6 Mar 2024 13:25:52 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727953; x=1741263953; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=Lgx6T8GaiUd+pGKdHCph8iOQWujbjxgXPslj7DIoynY=; b=Didg1/7PS840xL8huTmU0f9v6zgE2X/C/z1eLgiq2r8zjg7U3dXistjG FmfeVjrbn7HRl3buKLqgzDQRcfezLPNCap1AQzBYcUhZWl7+DVzTUs8xH 3fwBrKIIM7BqxOS42GINJ2T53as7pmIONBH6m1//XNwZK7ykno0ZEYudm I=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="331160194" Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO smtpout.prod.us-east-1.prod.farcaster.email.amazon.dev) ([10.43.8.6]) by smtp-border-fw-33001.sea14.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:52 +0000 Received: from EX19MTAEUA001.ant.amazon.com [10.0.43.254:50706] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.16.96:2525] with esmtp (Farcaster) id cc6b8b47-6bc5-4b1b-a449-b51974a8a2b8; Wed, 6 Mar 2024 12:25:50 +0000 (UTC) X-Farcaster-Flow-ID: cc6b8b47-6bc5-4b1b-a449-b51974a8a2b8 Received: from EX19D007EUA004.ant.amazon.com (10.252.50.76) by EX19MTAEUA001.ant.amazon.com (10.252.50.192) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:46 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUA004.ant.amazon.com (10.252.50.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:45 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:44 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 27/33] net/ena/hal: modify customer metrics memory management Date: Wed, 6 Mar 2024 14:24:39 +0200 Message-ID: <20240306122445.4350-28-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes 1. Set buffer length to zero in case memory allocation failed and after memory is released. 2. The driver checks buffer_virt_addr for customer allocation success. In case the allocation fails, buffer_virt_addr may not necessarily be NULL. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/hal/ena_com.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/net/ena/hal/ena_com.c b/drivers/net/ena/hal/ena_com.c index 2db21e7895..24756e5e76 100644 --- a/drivers/net/ena/hal/ena_com.c +++ b/drivers/net/ena/hal/ena_com.c @@ -3233,13 +3233,17 @@ int ena_com_allocate_customer_metrics_buffer(struct ena_com_dev *ena_dev) struct ena_customer_metrics *customer_metrics = &ena_dev->customer_metrics; customer_metrics->buffer_len = ENA_CUSTOMER_METRICS_BUFFER_SIZE; + customer_metrics->buffer_virt_addr = NULL; + ENA_MEM_ALLOC_COHERENT(ena_dev->dmadev, customer_metrics->buffer_len, customer_metrics->buffer_virt_addr, customer_metrics->buffer_dma_addr, customer_metrics->buffer_dma_handle); - if (unlikely(!customer_metrics->buffer_virt_addr)) + if (unlikely(!customer_metrics->buffer_virt_addr)) { + customer_metrics->buffer_len = 0; return ENA_COM_NO_MEM; + } return 0; } @@ -3283,6 +3287,7 @@ void ena_com_delete_customer_metrics_buffer(struct ena_com_dev *ena_dev) customer_metrics->buffer_dma_addr, customer_metrics->buffer_dma_handle); customer_metrics->buffer_virt_addr = NULL; + customer_metrics->buffer_len = 0; } } From patchwork Wed Mar 6 12:24:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138041 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 851D243C5B; Wed, 6 Mar 2024 13:28:39 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8143942EAE; Wed, 6 Mar 2024 13:26:00 +0100 (CET) Received: from smtp-fw-52003.amazon.com (smtp-fw-52003.amazon.com [52.119.213.152]) by mails.dpdk.org (Postfix) with ESMTP id 9376142EB3 for ; Wed, 6 Mar 2024 13:25:58 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727958; x=1741263958; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=JN4Cdp67AP725W6CBVT8Kd96v7Zzn8D7wLAc5SBHAVY=; b=K+QmP1gcPOzFbo76ajTxWWzMRwzfnAo7hRIzOfyyWnoA4zYbK2Ih8Gq8 58JRRO0pli1GlwX5w39Yk69ox2VMu7eVbo9vKx137/blOb7IxduWztTMN U7u6pJsW1iAkKcEImlw1CWheA3SWL4epsNq445dSNSxc4WAC3TaZoVRCl s=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="642739822" Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.43.8.6]) by smtp-border-fw-52003.iad7.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:58 +0000 Received: from EX19MTAEUA001.ant.amazon.com [10.0.43.254:14998] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.3.166:2525] with esmtp (Farcaster) id 55a2aa74-a67d-46f7-88ca-953077d18d9a; Wed, 6 Mar 2024 12:25:56 +0000 (UTC) X-Farcaster-Flow-ID: 55a2aa74-a67d-46f7-88ca-953077d18d9a Received: from EX19D007EUA001.ant.amazon.com (10.252.50.133) by EX19MTAEUA001.ant.amazon.com (10.252.50.50) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:48 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUA001.ant.amazon.com (10.252.50.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:47 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:46 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 28/33] net/ena/hal: cosmetic changes Date: Wed, 6 Mar 2024 14:24:40 +0200 Message-ID: <20240306122445.4350-29-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes 1. modify log prints to use correct format specifier for unsigned variables. 2. removed line breaks for lines that do not exceed maximal line length. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/hal/ena_eth_com.c | 22 +++++++++++----------- drivers/net/ena/hal/ena_plat_dpdk.h | 5 ++--- 2 files changed, 13 insertions(+), 14 deletions(-) diff --git a/drivers/net/ena/hal/ena_eth_com.c b/drivers/net/ena/hal/ena_eth_com.c index ebad38d15a..87a2dbfba1 100644 --- a/drivers/net/ena/hal/ena_eth_com.c +++ b/drivers/net/ena/hal/ena_eth_com.c @@ -64,7 +64,7 @@ static int ena_com_write_bounce_buffer_to_dev(struct ena_com_io_sq *io_sq, io_sq->entries_in_tx_burst_left--; ena_trc_dbg(ena_com_io_sq_to_ena_dev(io_sq), - "Decreasing entries_in_tx_burst_left of queue %d to %d\n", + "Decreasing entries_in_tx_burst_left of queue %u to %u\n", io_sq->qid, io_sq->entries_in_tx_burst_left); } @@ -259,7 +259,7 @@ static int ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq, if (unlikely((status & ENA_ETH_IO_RX_CDESC_BASE_FIRST_MASK) >> ENA_ETH_IO_RX_CDESC_BASE_FIRST_SHIFT && count != 0)) { ena_trc_err(dev, - "First bit is on in descriptor #%d on q_id: %d, req_id: %u\n", + "First bit is on in descriptor #%u on q_id: %u, req_id: %u\n", count, io_cq->qid, cdesc->req_id); return ENA_COM_FAULT; } @@ -268,7 +268,7 @@ static int ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq, ENA_ETH_IO_RX_CDESC_BASE_MBZ17_MASK)) && ena_com_get_cap(dev, ENA_ADMIN_CDESC_MBZ))) { ena_trc_err(dev, - "Corrupted RX descriptor #%d on q_id: %d, req_id: %u\n", + "Corrupted RX descriptor #%u on q_id: %u, req_id: %u\n", count, io_cq->qid, cdesc->req_id); return ENA_COM_FAULT; } @@ -288,7 +288,7 @@ static int ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq, io_cq->cur_rx_pkt_cdesc_start_idx = head_masked; ena_trc_dbg(ena_com_io_cq_to_ena_dev(io_cq), - "ENA q_id: %d packets were completed. first desc idx %u descs# %d\n", + "ENA q_id: %u packets were completed. first desc idx %u descs# %u\n", io_cq->qid, *first_cdesc_idx, count); } else { io_cq->cur_rx_pkt_cdesc_count = count; @@ -394,7 +394,7 @@ static void ena_com_rx_set_flags(struct ena_com_io_cq *io_cq, ENA_ETH_IO_RX_CDESC_BASE_IPV4_FRAG_SHIFT; ena_trc_dbg(ena_com_io_cq_to_ena_dev(io_cq), - "l3_proto %d l4_proto %d l3_csum_err %d l4_csum_err %d hash %d frag %d cdesc_status %x\n", + "l3_proto %d l4_proto %d l3_csum_err %d l4_csum_err %d hash %u frag %d cdesc_status %x\n", ena_rx_ctx->l3_proto, ena_rx_ctx->l4_proto, ena_rx_ctx->l3_csum_err, @@ -434,7 +434,7 @@ int ena_com_prepare_tx(struct ena_com_io_sq *io_sq, if (unlikely(header_len > io_sq->tx_max_header_size)) { ena_trc_err(ena_com_io_sq_to_ena_dev(io_sq), - "Header size is too large %d max header: %d\n", + "Header size is too large %u max header: %u\n", header_len, io_sq->tx_max_header_size); return ENA_COM_INVAL; } @@ -592,12 +592,12 @@ int ena_com_rx_pkt(struct ena_com_io_cq *io_cq, } ena_trc_dbg(ena_com_io_cq_to_ena_dev(io_cq), - "Fetch rx packet: queue %d completed desc: %d\n", + "Fetch rx packet: queue %u completed desc: %u\n", io_cq->qid, nb_hw_desc); if (unlikely(nb_hw_desc > ena_rx_ctx->max_bufs)) { ena_trc_err(ena_com_io_cq_to_ena_dev(io_cq), - "Too many RX cdescs (%d) > MAX(%d)\n", + "Too many RX cdescs (%u) > MAX(%u)\n", nb_hw_desc, ena_rx_ctx->max_bufs); return ENA_COM_NO_SPACE; } @@ -622,7 +622,7 @@ int ena_com_rx_pkt(struct ena_com_io_cq *io_cq, io_sq->next_to_comp += nb_hw_desc; ena_trc_dbg(ena_com_io_cq_to_ena_dev(io_cq), - "[%s][QID#%d] Updating SQ head to: %d\n", __func__, + "Updating Queue %u, SQ head to: %u\n", io_sq->qid, io_sq->next_to_comp); /* Get rx flags from the last pkt */ @@ -660,8 +660,8 @@ int ena_com_add_single_rx_desc(struct ena_com_io_sq *io_sq, desc->req_id = req_id; ena_trc_dbg(ena_com_io_sq_to_ena_dev(io_sq), - "[%s] Adding single RX desc, Queue: %u, req_id: %u\n", - __func__, io_sq->qid, req_id); + "Adding single RX desc, Queue: %u, req_id: %u\n", + io_sq->qid, req_id); desc->buff_addr_lo = (u32)ena_buf->paddr; desc->buff_addr_hi = diff --git a/drivers/net/ena/hal/ena_plat_dpdk.h b/drivers/net/ena/hal/ena_plat_dpdk.h index aa8fbb0cd9..fc602971d5 100644 --- a/drivers/net/ena/hal/ena_plat_dpdk.h +++ b/drivers/net/ena/hal/ena_plat_dpdk.h @@ -40,7 +40,7 @@ typedef uint64_t dma_addr_t; #define ETIME ETIMEDOUT #endif -#define ENA_PRIU64 PRIu64 +#define ENA_PRIu64 PRIu64 #define ena_atomic32_t rte_atomic32_t #define ena_mem_handle_t const struct rte_memzone * @@ -73,8 +73,7 @@ typedef uint64_t dma_addr_t; /* Redefine memcpy with caution: rte_memcpy can be simply aliased to memcpy, so * make the redefinition only if it's safe (and beneficial) to do so. */ -#if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64_MEMCPY) || \ - defined(RTE_ARCH_ARM_NEON_MEMCPY) +#if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64_MEMCPY) || defined(RTE_ARCH_ARM_NEON_MEMCPY) #undef memcpy #define memcpy rte_memcpy #endif From patchwork Wed Mar 6 12:24:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138044 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8E65A43C5B; Wed, 6 Mar 2024 13:29:06 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9DDDE42EC7; Wed, 6 Mar 2024 13:26:04 +0100 (CET) Received: from smtp-fw-80008.amazon.com (smtp-fw-80008.amazon.com [99.78.197.219]) by mails.dpdk.org (Postfix) with ESMTP id E20B442EB7 for ; Wed, 6 Mar 2024 13:25:58 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727959; x=1741263959; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=0EYeYUjFfx+Q0L3ZxL1Q10gJMlkXZ5YIDsViTfEFL5E=; b=AcdyViRjbl0JhNvXnfbo51ZTql+AmRr55JjVIfyepaDnYPk9KAdDZ86r bjWsF1e95OlytZEFdv7lafWB1ENgLUDPu84eorultwFhPdDEGUSp3OoU8 BSKioo0KDRKcmLQBl9O+1g4zKNigMLE5hdNXopRb7kfcWUJfqkNsrg3Pu k=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="71113704" Received: from pdx4-co-svc-p1-lb2-vlan3.amazon.com (HELO smtpout.prod.us-east-1.prod.farcaster.email.amazon.dev) ([10.25.36.214]) by smtp-border-fw-80008.pdx80.corp.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:55 +0000 Received: from EX19MTAEUA002.ant.amazon.com [10.0.43.254:45976] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.16.96:2525] with esmtp (Farcaster) id b0dc71af-a894-4f19-8e97-068c0f23fe44; Wed, 6 Mar 2024 12:25:55 +0000 (UTC) X-Farcaster-Flow-ID: b0dc71af-a894-4f19-8e97-068c0f23fe44 Received: from EX19D007EUA001.ant.amazon.com (10.252.50.133) by EX19MTAEUA002.ant.amazon.com (10.252.50.124) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:50 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUA001.ant.amazon.com (10.252.50.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:49 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:48 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 29/33] net/ena: update device-preferred size of rings Date: Wed, 6 Mar 2024 14:24:41 +0200 Message-ID: <20240306122445.4350-30-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes Update the device-preferred size of the Tx ring to fall within the valid range when a large LLQ is enabled. For consistency, align the device-preferred size of the Rx ring accordingly. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/ena_ethdev.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c index 2414f631c8..2a7b7c0cba 100644 --- a/drivers/net/ena/ena_ethdev.c +++ b/drivers/net/ena/ena_ethdev.c @@ -2595,8 +2595,10 @@ static int ena_infos_get(struct rte_eth_dev *dev, dev_info->tx_desc_lim.nb_mtu_seg_max = RTE_MIN(ENA_PKT_MAX_BUFS, adapter->max_tx_sgl_size); - dev_info->default_rxportconf.ring_size = ENA_DEFAULT_RING_SIZE; - dev_info->default_txportconf.ring_size = ENA_DEFAULT_RING_SIZE; + dev_info->default_rxportconf.ring_size = RTE_MIN(ENA_DEFAULT_RING_SIZE, + dev_info->rx_desc_lim.nb_max); + dev_info->default_txportconf.ring_size = RTE_MIN(ENA_DEFAULT_RING_SIZE, + dev_info->tx_desc_lim.nb_max); dev_info->err_handle_mode = RTE_ETH_ERROR_HANDLE_MODE_PASSIVE; From patchwork Wed Mar 6 12:24:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138043 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id EF5A443C5B; Wed, 6 Mar 2024 13:28:57 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 588B142EBF; Wed, 6 Mar 2024 13:26:03 +0100 (CET) Received: from smtp-fw-52005.amazon.com (smtp-fw-52005.amazon.com [52.119.213.156]) by mails.dpdk.org (Postfix) with ESMTP id 839F942EBB for ; Wed, 6 Mar 2024 13:25:59 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727960; x=1741263960; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=imMddOi02cP+x7fzEIddIAfYIdp2Tq1G/Eb+KN8IAM0=; b=QJwivZ60COcye9qcrqEz8P56IhTzpOGpkGP06yZBIgEr5MudZCjgDyNl ifLGoPQlVjraZzObOcSC1pK3jbcNYq/VjG2HyCJhX4xY3kFCGjgQ92zUe 2RRvbNTE5KnQnjfyvvrgBFLDyNJagFaB1MnfPDUW1e/c2SgsLSceY1/bC 4=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="638962104" Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.43.8.6]) by smtp-border-fw-52005.iad7.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:59 +0000 Received: from EX19MTAEUB002.ant.amazon.com [10.0.17.79:46673] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.42.123:2525] with esmtp (Farcaster) id a774c57e-0830-44d5-be86-c3cf7fd07939; Wed, 6 Mar 2024 12:25:57 +0000 (UTC) X-Farcaster-Flow-ID: a774c57e-0830-44d5-be86-c3cf7fd07939 Received: from EX19D007EUA001.ant.amazon.com (10.252.50.133) by EX19MTAEUB002.ant.amazon.com (10.252.51.79) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:52 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUA001.ant.amazon.com (10.252.50.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:51 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:50 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 30/33] net/ena: exhaust interrupt callbacks in device close Date: Wed, 6 Mar 2024 14:24:42 +0200 Message-ID: <20240306122445.4350-31-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes Change rte_intr_callback_unregister to its synchronous variant to ensure all active interrupt callbacks are completed before proceeding with the flow. Relocate the interrupt deregistration to precede the release of stats memory, thereby preventing the interrupt handler from accessing memory that has already been freed. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/ena_ethdev.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c index 2a7b7c0cba..d73e321d0f 100644 --- a/drivers/net/ena/ena_ethdev.c +++ b/drivers/net/ena/ena_ethdev.c @@ -871,6 +871,7 @@ static int ena_close(struct rte_eth_dev *dev) struct rte_intr_handle *intr_handle = pci_dev->intr_handle; struct ena_adapter *adapter = dev->data->dev_private; int ret = 0; + int rc; if (rte_eal_process_type() != RTE_PROC_PRIMARY) return 0; @@ -879,17 +880,17 @@ static int ena_close(struct rte_eth_dev *dev) ret = ena_stop(dev); adapter->state = ENA_ADAPTER_STATE_CLOSED; + rte_intr_disable(intr_handle); + rc = rte_intr_callback_unregister_sync(intr_handle, ena_interrupt_handler_rte, dev); + if (unlikely(rc != 0)) + PMD_INIT_LOG(ERR, "Failed to unregister interrupt handler\n"); + ena_rx_queue_release_all(dev); ena_tx_queue_release_all(dev); rte_free(adapter->drv_stats); adapter->drv_stats = NULL; - rte_intr_disable(intr_handle); - rte_intr_callback_unregister(intr_handle, - ena_interrupt_handler_rte, - dev); - /* * MAC is not allocated dynamically. Setting NULL should prevent from * release of the resource in the rte_eth_dev_release_port(). From patchwork Wed Mar 6 12:24:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138045 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B9ED943C5B; Wed, 6 Mar 2024 13:29:13 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D460442ECF; Wed, 6 Mar 2024 13:26:05 +0100 (CET) Received: from smtp-fw-52004.amazon.com (smtp-fw-52004.amazon.com [52.119.213.154]) by mails.dpdk.org (Postfix) with ESMTP id 71FE942EC2 for ; Wed, 6 Mar 2024 13:26:01 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727962; x=1741263962; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=tWOlgDV0YhYGZSQXEdxty05V+z6RxDwv9vnnB9hQBTk=; b=Qem5IBj8t9ES+bkpeySDKVPcAuISabob4s+lEkto1xhGhPlLGz4hxKm4 Rxx0aELPNOOlNScLnkG/51+uoltGxSD/4Ycpzwu7+IJ1e9fvWnmuZ/Nik pUe9E9P5Cpmc5y65L3389mStm80rVCrbEszDrn5/TLQhKkxlRT+oO8Dsc 4=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="189623401" Received: from iad12-co-svc-p1-lb1-vlan2.amazon.com (HELO smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.43.8.2]) by smtp-border-fw-52004.iad7.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:26:01 +0000 Received: from EX19MTAEUC002.ant.amazon.com [10.0.10.100:20992] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.11.111:2525] with esmtp (Farcaster) id 491dfaf4-b7cd-4dfa-abe8-d87989b83461; Wed, 6 Mar 2024 12:25:59 +0000 (UTC) X-Farcaster-Flow-ID: 491dfaf4-b7cd-4dfa-abe8-d87989b83461 Received: from EX19D007EUB001.ant.amazon.com (10.252.51.82) by EX19MTAEUC002.ant.amazon.com (10.252.51.181) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:54 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUB001.ant.amazon.com (10.252.51.82) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:53 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:52 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 31/33] net/ena: support max large llq depth from the device Date: Wed, 6 Mar 2024 14:24:43 +0200 Message-ID: <20240306122445.4350-32-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes Selected AWS instances from later generations enable large LLQ by default, allowing the transmission of packets with headers exceeding 96 bytes. Due to the overall ENA memory BAR size limitation, large LLQ has the side effect of halving the maximum number of LLQ entries (from 1024 to 512). ENA-Express, powered by AWS Scalable Reliable Datagram (SRD) technology, requires Tx queue with 1024 entries. Selected AWS instances from upcoming generations will have double the size of the ENA memory BAR, enabling ENA-Express to work with a large LLQ of 1024 entries. The initial default large LLQ size will remain 512. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- doc/guides/rel_notes/release_24_03.rst | 2 + drivers/net/ena/ena_ethdev.c | 38 ++++++++++++------- drivers/net/ena/hal/ena_defs/ena_admin_defs.h | 4 +- 3 files changed, 29 insertions(+), 15 deletions(-) diff --git a/doc/guides/rel_notes/release_24_03.rst b/doc/guides/rel_notes/release_24_03.rst index 2a22bb07ed..9823616eeb 100644 --- a/doc/guides/rel_notes/release_24_03.rst +++ b/doc/guides/rel_notes/release_24_03.rst @@ -107,6 +107,8 @@ New Features * Added support for sub-optimal configuration notifications from the device. * Restructured fast release of mbufs when RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE optimization is enabled. * Replaced `enable_llq` and `large_llq_hdr` devargs with a new devarg `llq_policy`. + * Added support for LLQ header size recommendation from the device. + * Allowed large LLQ with 1024 entries when the device supports enlarged memory BAR. * **Updated Atomic Rules' Arkville driver.** diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c index d73e321d0f..43693ee2ee 100644 --- a/drivers/net/ena/ena_ethdev.c +++ b/drivers/net/ena/ena_ethdev.c @@ -42,6 +42,8 @@ #define DECIMAL_BASE 10 +#define MAX_WIDE_LLQ_DEPTH_UNSUPPORTED 0 + /* * We should try to keep ENA_CLEANUP_BUF_SIZE lower than * RTE_MEMPOOL_CACHE_MAX_SIZE, so we can fit this in mempool local cache. @@ -1071,7 +1073,7 @@ static int ena_calc_io_queue_size(struct ena_calc_queue_size_ctx *ctx, bool use_large_llq_hdr) { - struct ena_admin_feature_llq_desc *llq = &ctx->get_feat_ctx->llq; + struct ena_admin_feature_llq_desc *dev = &ctx->get_feat_ctx->llq; struct ena_com_dev *ena_dev = ctx->ena_dev; uint32_t max_tx_queue_size; uint32_t max_rx_queue_size; @@ -1086,7 +1088,7 @@ ena_calc_io_queue_size(struct ena_calc_queue_size_ctx *ctx, if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { max_tx_queue_size = RTE_MIN(max_tx_queue_size, - llq->max_llq_depth); + dev->max_llq_depth); } else { max_tx_queue_size = RTE_MIN(max_tx_queue_size, max_queue_ext->max_tx_sq_depth); @@ -1106,7 +1108,7 @@ ena_calc_io_queue_size(struct ena_calc_queue_size_ctx *ctx, if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { max_tx_queue_size = RTE_MIN(max_tx_queue_size, - llq->max_llq_depth); + dev->max_llq_depth); } else { max_tx_queue_size = RTE_MIN(max_tx_queue_size, max_queues->max_sq_depth); @@ -1122,18 +1124,28 @@ ena_calc_io_queue_size(struct ena_calc_queue_size_ctx *ctx, max_rx_queue_size = rte_align32prevpow2(max_rx_queue_size); max_tx_queue_size = rte_align32prevpow2(max_tx_queue_size); - if (use_large_llq_hdr) { - if ((llq->entry_size_ctrl_supported & - ENA_ADMIN_LIST_ENTRY_SIZE_256B) && - (ena_dev->tx_mem_queue_type == - ENA_ADMIN_PLACEMENT_POLICY_DEV)) { - max_tx_queue_size /= 2; - PMD_INIT_LOG(INFO, - "Forcing large headers and decreasing maximum Tx queue size to %d\n", + if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV && use_large_llq_hdr) { + /* intersection between driver configuration and device capabilities */ + if (dev->entry_size_ctrl_supported & ENA_ADMIN_LIST_ENTRY_SIZE_256B) { + if (dev->max_wide_llq_depth == MAX_WIDE_LLQ_DEPTH_UNSUPPORTED) { + /* Devices that do not support the double-sized ENA memory BAR will + * report max_wide_llq_depth as 0. In such case, driver halves the + * queue depth when working in large llq policy. + */ + max_tx_queue_size >>= 1; + PMD_INIT_LOG(INFO, + "large LLQ policy requires limiting Tx queue size to %u entries\n", max_tx_queue_size); + } else if (dev->max_wide_llq_depth < max_tx_queue_size) { + /* In case the queue depth that the driver calculated exceeds + * the maximal value that the device allows, it will be limited + * to that maximal value + */ + max_tx_queue_size = dev->max_wide_llq_depth; + } } else { - PMD_INIT_LOG(ERR, - "Forcing large headers failed: LLQ is disabled or device does not support large headers\n"); + PMD_INIT_LOG(INFO, + "Forcing large LLQ headers failed since device lacks this support\n"); } } diff --git a/drivers/net/ena/hal/ena_defs/ena_admin_defs.h b/drivers/net/ena/hal/ena_defs/ena_admin_defs.h index 2adce75ed3..cff6451c96 100644 --- a/drivers/net/ena/hal/ena_defs/ena_admin_defs.h +++ b/drivers/net/ena/hal/ena_defs/ena_admin_defs.h @@ -696,8 +696,8 @@ struct ena_admin_feature_llq_desc { */ uint8_t entry_size_recommended; - /* reserved */ - uint8_t reserved1[2]; + /* max depth of wide llq, or 0 for N/A */ + uint16_t max_wide_llq_depth; /* accelerated low latency queues requirement. driver needs to * support those requirements in order to use accelerated llq From patchwork Wed Mar 6 12:24:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138042 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7D42343C5B; Wed, 6 Mar 2024 13:28:50 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1319942ED1; Wed, 6 Mar 2024 13:26:02 +0100 (CET) Received: from smtp-fw-80009.amazon.com (smtp-fw-80009.amazon.com [99.78.197.220]) by mails.dpdk.org (Postfix) with ESMTP id BA72D42EB6 for ; Wed, 6 Mar 2024 13:25:58 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727958; x=1741263958; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=F/GoXolMWVrc0PCb2kZK6jS7triUK0j1r67ARbRIYWg=; b=uv0wEpzG9onKeXeL7jUUcL19f7nMENMGQBP4eR5QEnwm39C7YznBg3D5 9yrMBKVZrufOEwo/MWonRabknOJXur0RSu610/Vrx54BkiBtiG2O9AycO KCZvx4rWQqW6DEw/GPO8gnYogMDeBp328Nb8GzhIFH8gZyGMEoY/dT9DM 8=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="71125519" Received: from pdx4-co-svc-p1-lb2-vlan2.amazon.com (HELO smtpout.prod.us-east-1.prod.farcaster.email.amazon.dev) ([10.25.36.210]) by smtp-border-fw-80009.pdx80.corp.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:25:57 +0000 Received: from EX19MTAEUB001.ant.amazon.com [10.0.10.100:55490] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.20.189:2525] with esmtp (Farcaster) id ff26eea1-cfcf-400a-8d3d-6b5b5f0a8e26; Wed, 6 Mar 2024 12:25:56 +0000 (UTC) X-Farcaster-Flow-ID: ff26eea1-cfcf-400a-8d3d-6b5b5f0a8e26 Received: from EX19D007EUA004.ant.amazon.com (10.252.50.76) by EX19MTAEUB001.ant.amazon.com (10.252.51.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:56 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUA004.ant.amazon.com (10.252.50.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:55 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:54 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 32/33] net/ena: control path pure polling mode Date: Wed, 6 Mar 2024 14:24:44 +0200 Message-ID: <20240306122445.4350-33-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes This commit implements a new operation mode that enables purely polling-based functionality, eliminating the need for interrupts in the control path. This mode is not activated by default and can be toggled using the "control_poll_interval" devarg. When operating in this mode, periodic alarms are used to monitor the control queues. A non-zero value for this devarg is mandatory for control path functionality when binding ports to uio_pci_generic kernel module which lacks interrupt support. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- doc/guides/nics/ena.rst | 52 +++++++++--- doc/guides/rel_notes/release_24_03.rst | 2 + drivers/net/ena/ena_ethdev.c | 113 ++++++++++++++++++++----- drivers/net/ena/ena_ethdev.h | 5 ++ 4 files changed, 136 insertions(+), 36 deletions(-) diff --git a/doc/guides/nics/ena.rst b/doc/guides/nics/ena.rst index 53c9341859..d2dd4fa4a0 100644 --- a/doc/guides/nics/ena.rst +++ b/doc/guides/nics/ena.rst @@ -109,12 +109,16 @@ Runtime Configuration * **llq_policy** (default 1) - Controls whether use device recommended header policy or override it. + Controls whether use device recommended header policy or override it: + 0 - Disable LLQ. - **Use with extreme caution as it leads to a huge performance - degradation on AWS instances from 6th generation onwards.** + **Use with extreme caution as it leads to a huge performance + degradation on AWS instances from 6th generation onwards.** + 1 - Accept device recommended LLQ policy (Default). + 2 - Enforce normal LLQ policy. + 3 - Enforce large LLQ policy. * **miss_txc_to** (default 5) @@ -126,6 +130,18 @@ Runtime Configuration timer service. Setting this parameter to 0 disables this feature. Maximum allowed value is 60 seconds. + * **control_poll_interval** (default 0) + + Enable polling-based functionality of the admin queues, eliminating the + need for interrupts in the control-path: + + 0 - Disable (Admin queue will work in interrupt mode). + + [1..1000] - Number of milliseconds to wait between periodic inspection of the admin queues. + + **A non-zero value for this devarg is mandatory for control path functionality + when binding ports to uio_pci_generic kernel module which lacks interrupt support.** + ENA Configuration Parameters ^^^^^^^^^^^^^^^^^^^^^^^^^^^^ @@ -164,23 +180,23 @@ Prerequisites #. Prepare the system as recommended by DPDK suite. This includes environment variables, hugepages configuration, tool-chains and configuration. -#. ENA PMD can operate with ``vfio-pci``(*) or ``igb_uio`` driver. +#. ENA PMD can operate with ``vfio-pci`` (*), ``igb_uio``, or ``uio_pci_generic`` driver. (*) ENAv2 hardware supports Low Latency Queue v2 (LLQv2). This feature reduces the latency of the packets by pushing the header directly through the PCI to the device, before the DMA is even triggered. For proper work - kernel PCI driver must support write combining (WC). + kernel PCI driver must support write-combining (WC). In DPDK ``igb_uio`` it must be enabled by loading module with ``wc_activate=1`` flag (example below). However, mainline's vfio-pci - driver in kernel doesn't have WC support yet (planed to be added). + driver in kernel doesn't have WC support yet (planned to be added). If vfio-pci is used user should follow `AWS ENA PMD documentation `_. -#. Insert ``vfio-pci`` or ``igb_uio`` kernel module using the command - ``modprobe vfio-pci`` or ``modprobe uio; insmod igb_uio.ko wc_activate=1`` - respectively. +#. For ``igb_uio``: + Insert ``igb_uio`` kernel module using the command ``modprobe uio; insmod igb_uio.ko wc_activate=1`` -#. For ``vfio-pci`` users only: +#. For ``vfio-pci``: + Insert ``vfio-pci`` kernel module using the command ``modprobe vfio-pci`` Please make sure that ``IOMMU`` is enabled in your system, or use ``vfio`` driver in ``noiommu`` mode:: @@ -189,7 +205,17 @@ Prerequisites To use ``noiommu`` mode, the ``vfio-pci`` must be built with flag ``CONFIG_VFIO_NOIOMMU``. -#. Bind the intended ENA device to ``vfio-pci`` or ``igb_uio`` module. +#. For ``uio_pci_generic``: + Insert ``uio_pci_generic`` kernel module using the command ``modprobe uio_pci_generic``. + Make sure that the IOMMU is disabled or is in passthrough mode. + For example: ``modprobe uio_pci_generic intel_iommu=off``. + + Note that when launching the application, the ``control_poll_interval`` devarg must be used with a non-zero value (1000 is recommended) + as ``uio_pci_generic`` lacks interrupt support. The control-path (admin queues) of the ENA require poll-mode + to process command completion and asynchronous notification from the device. + For example: ``dpdk-app -a "00:06.0,control_path_poll_interval=1000"``. + +#. Bind the intended ENA device to ``vfio-pci``, ``igb_uio``, or ``uio_pci_generic`` module. At this point the system should be ready to run DPDK applications. Once the application runs to completion, the ENA can be detached from attached module if @@ -198,7 +224,7 @@ necessary. **Rx interrupts support** ENA PMD supports Rx interrupts, which can be used to wake up lcores waiting for -input. Please note that it won't work with ``igb_uio``, so to use this feature, +input. Please note that it won't work with ``igb_uio`` and ``uio_pci_generic`` so to use this feature, the ``vfio-pci`` should be used. ENA handles admin interrupts and AENQ notifications on separate interrupt. @@ -209,7 +235,7 @@ will fail. **Note about usage on \*.metal instances** On AWS, the metal instances are supporting IOMMU for both arm64 and x86_64 -hosts. +hosts. Note that ``uio_pci_generic`` lacks IOMMU support and cannot be used for metal instances. * x86_64 (e.g. c5.metal, i3.metal): IOMMU should be disabled by default. In that situation, the ``igb_uio`` can diff --git a/doc/guides/rel_notes/release_24_03.rst b/doc/guides/rel_notes/release_24_03.rst index 9823616eeb..d01236097a 100644 --- a/doc/guides/rel_notes/release_24_03.rst +++ b/doc/guides/rel_notes/release_24_03.rst @@ -109,6 +109,8 @@ New Features * Replaced `enable_llq` and `large_llq_hdr` devargs with a new devarg `llq_policy`. * Added support for LLQ header size recommendation from the device. * Allowed large LLQ with 1024 entries when the device supports enlarged memory BAR. + * Added `control_poll_interval` devarg that configure control-path to work in poll-mode. + * Added support for binding ports to `uio_pci_generic` kernel module. * **Updated Atomic Rules' Arkville driver.** diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c index 43693ee2ee..a36efae38c 100644 --- a/drivers/net/ena/ena_ethdev.c +++ b/drivers/net/ena/ena_ethdev.c @@ -3,6 +3,7 @@ * All rights reserved. */ +#include #include #include #include @@ -36,6 +37,8 @@ #define ENA_MIN_RING_DESC 128 +#define USEC_PER_MSEC 1000UL + #define BITS_PER_BYTE 8 #define BITS_PER_TYPE(type) (sizeof(type) * BITS_PER_BYTE) @@ -95,6 +98,14 @@ struct ena_stats { * considered as a missing. */ #define ENA_DEVARG_MISS_TXC_TO "miss_txc_to" +/* + * Controls the period of time (in milliseconds) between two consecutive inspections of + * the control queues when the driver is in poll mode and not using interrupts. + * By default, this value is zero, indicating that the driver will not be in poll mode and will + * use interrupts. A non-zero value for this argument is mandatory when using uio_pci_generic + * driver. + */ +#define ENA_DEVARG_CONTROL_PATH_POLL_INTERVAL "control_path_poll_interval" /* * Each rte_memzone should have unique name. @@ -271,7 +282,8 @@ static uint64_t ena_get_rx_queue_offloads(struct ena_adapter *adapter); static uint64_t ena_get_tx_queue_offloads(struct ena_adapter *adapter); static int ena_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info); -static void ena_interrupt_handler_rte(void *cb_arg); +static void ena_control_path_handler(void *cb_arg); +static void ena_control_path_poll_handler(void *cb_arg); static void ena_timer_wd_callback(struct rte_timer *timer, void *arg); static void ena_destroy_device(struct rte_eth_dev *eth_dev); static int eth_ena_dev_init(struct rte_eth_dev *eth_dev); @@ -882,10 +894,14 @@ static int ena_close(struct rte_eth_dev *dev) ret = ena_stop(dev); adapter->state = ENA_ADAPTER_STATE_CLOSED; - rte_intr_disable(intr_handle); - rc = rte_intr_callback_unregister_sync(intr_handle, ena_interrupt_handler_rte, dev); - if (unlikely(rc != 0)) - PMD_INIT_LOG(ERR, "Failed to unregister interrupt handler\n"); + if (!adapter->control_path_poll_interval) { + rte_intr_disable(intr_handle); + rc = rte_intr_callback_unregister_sync(intr_handle, ena_control_path_handler, dev); + if (unlikely(rc != 0)) + PMD_INIT_LOG(ERR, "Failed to unregister interrupt handler\n"); + } else { + rte_eal_alarm_cancel(ena_control_path_poll_handler, dev); + } ena_rx_queue_release_all(dev); ena_tx_queue_release_all(dev); @@ -1889,15 +1905,33 @@ static int ena_device_init(struct ena_adapter *adapter, return rc; } -static void ena_interrupt_handler_rte(void *cb_arg) +static void ena_control_path_handler(void *cb_arg) { struct rte_eth_dev *dev = cb_arg; struct ena_adapter *adapter = dev->data->dev_private; struct ena_com_dev *ena_dev = &adapter->ena_dev; - ena_com_admin_q_comp_intr_handler(ena_dev); - if (likely(adapter->state != ENA_ADAPTER_STATE_CLOSED)) + if (likely(adapter->state != ENA_ADAPTER_STATE_CLOSED)) { + ena_com_admin_q_comp_intr_handler(ena_dev); ena_com_aenq_intr_handler(ena_dev, dev); + } +} + +static void ena_control_path_poll_handler(void *cb_arg) +{ + struct rte_eth_dev *dev = cb_arg; + struct ena_adapter *adapter = dev->data->dev_private; + int rc; + + if (likely(adapter->state != ENA_ADAPTER_STATE_CLOSED)) { + ena_control_path_handler(cb_arg); + rc = rte_eal_alarm_set(adapter->control_path_poll_interval, + ena_control_path_poll_handler, cb_arg); + if (unlikely(rc != 0)) { + PMD_DRV_LOG(ERR, "Failed to retrigger control path alarm\n"); + ena_trigger_reset(adapter, ENA_REGS_RESET_GENERIC); + } + } } static void check_for_missing_keep_alive(struct ena_adapter *adapter) @@ -2362,20 +2396,29 @@ static int eth_ena_dev_init(struct rte_eth_dev *eth_dev) rte_spinlock_init(&adapter->admin_lock); - rte_intr_callback_register(intr_handle, - ena_interrupt_handler_rte, - eth_dev); - rte_intr_enable(intr_handle); - ena_com_set_admin_polling_mode(ena_dev, false); + if (!adapter->control_path_poll_interval) { + /* Control path interrupt mode */ + rte_intr_callback_register(intr_handle, ena_control_path_handler, eth_dev); + rte_intr_enable(intr_handle); + ena_com_set_admin_polling_mode(ena_dev, false); + } else { + /* Control path polling mode */ + rc = rte_eal_alarm_set(adapter->control_path_poll_interval, + ena_control_path_poll_handler, eth_dev); + if (unlikely(rc != 0)) { + PMD_DRV_LOG(ERR, "Failed to set control path alarm\n"); + goto err_control_path_destroy; + } + } ena_com_admin_aenq_enable(ena_dev); - rte_timer_init(&adapter->timer_wd); adapters_found++; adapter->state = ENA_ADAPTER_STATE_INIT; return 0; - +err_control_path_destroy: + rte_free(adapter->drv_stats); err_rss_destroy: ena_com_rss_destroy(ena_dev); err_delete_debug_area: @@ -3656,9 +3699,9 @@ static int ena_process_uint_devarg(const char *key, { struct ena_adapter *adapter = opaque; char *str_end; - uint64_t uint_value; + uint64_t uint64_value; - uint_value = strtoull(value, &str_end, DECIMAL_BASE); + uint64_value = strtoull(value, &str_end, DECIMAL_BASE); if (value == str_end) { PMD_INIT_LOG(ERR, "Invalid value for key '%s'. Only uint values are accepted.\n", @@ -3667,12 +3710,12 @@ static int ena_process_uint_devarg(const char *key, } if (strcmp(key, ENA_DEVARG_MISS_TXC_TO) == 0) { - if (uint_value > ENA_MAX_TX_TIMEOUT_SECONDS) { + if (uint64_value > ENA_MAX_TX_TIMEOUT_SECONDS) { PMD_INIT_LOG(ERR, "Tx timeout too high: %" PRIu64 " sec. Maximum allowed: %d sec.\n", - uint_value, ENA_MAX_TX_TIMEOUT_SECONDS); + uint64_value, ENA_MAX_TX_TIMEOUT_SECONDS); return -EINVAL; - } else if (uint_value == 0) { + } else if (uint64_value == 0) { PMD_INIT_LOG(INFO, "Check for missing Tx completions has been disabled.\n"); adapter->missing_tx_completion_to = @@ -3680,9 +3723,27 @@ static int ena_process_uint_devarg(const char *key, } else { PMD_INIT_LOG(INFO, "Tx packet completion timeout set to %" PRIu64 " seconds.\n", - uint_value); + uint64_value); adapter->missing_tx_completion_to = - uint_value * rte_get_timer_hz(); + uint64_value * rte_get_timer_hz(); + } + } else if (strcmp(key, ENA_DEVARG_CONTROL_PATH_POLL_INTERVAL) == 0) { + if (uint64_value > ENA_MAX_CONTROL_PATH_POLL_INTERVAL_MSEC) { + PMD_INIT_LOG(ERR, + "Control path polling interval is too long: %" PRIu64 " msecs. " + "Maximum allowed: %d msecs.\n", + uint64_value, ENA_MAX_CONTROL_PATH_POLL_INTERVAL_MSEC); + return -EINVAL; + } else if (uint64_value == 0) { + PMD_INIT_LOG(INFO, + "Control path polling interval is set to zero. Operating in " + "interrupt mode.\n"); + adapter->control_path_poll_interval = 0; + } else { + PMD_INIT_LOG(INFO, + "Control path polling interval is set to %" PRIu64 " msecs.\n", + uint64_value); + adapter->control_path_poll_interval = uint64_value * USEC_PER_MSEC; } } @@ -3712,6 +3773,7 @@ static int ena_parse_devargs(struct ena_adapter *adapter, struct rte_devargs *de static const char * const allowed_args[] = { ENA_DEVARG_LLQ_POLICY, ENA_DEVARG_MISS_TXC_TO, + ENA_DEVARG_CONTROL_PATH_POLL_INTERVAL, NULL, }; struct rte_kvargs *kvlist; @@ -3734,6 +3796,10 @@ static int ena_parse_devargs(struct ena_adapter *adapter, struct rte_devargs *de ena_process_uint_devarg, adapter); if (rc != 0) goto exit; + rc = rte_kvargs_process(kvlist, ENA_DEVARG_CONTROL_PATH_POLL_INTERVAL, + ena_process_uint_devarg, adapter); + if (rc != 0) + goto exit; exit: rte_kvargs_free(kvlist); @@ -3954,7 +4020,8 @@ RTE_PMD_REGISTER_PCI_TABLE(net_ena, pci_id_ena_map); RTE_PMD_REGISTER_KMOD_DEP(net_ena, "* igb_uio | uio_pci_generic | vfio-pci"); RTE_PMD_REGISTER_PARAM_STRING(net_ena, ENA_DEVARG_LLQ_POLICY "=<0|1|2|3> " - ENA_DEVARG_MISS_TXC_TO "="); + ENA_DEVARG_MISS_TXC_TO "=" + ENA_DEVARG_CONTROL_PATH_POLL_INTERVAL "=<0-1000>"); RTE_LOG_REGISTER_SUFFIX(ena_logtype_init, init, NOTICE); RTE_LOG_REGISTER_SUFFIX(ena_logtype_driver, driver, NOTICE); #ifdef RTE_ETHDEV_DEBUG_RX diff --git a/drivers/net/ena/ena_ethdev.h b/drivers/net/ena/ena_ethdev.h index 6716f01ba5..85e816ae72 100644 --- a/drivers/net/ena/ena_ethdev.h +++ b/drivers/net/ena/ena_ethdev.h @@ -44,6 +44,8 @@ #define ENA_MONITORED_TX_QUEUES 3 #define ENA_DEFAULT_MISSING_COMP 256U +#define ENA_MAX_CONTROL_PATH_POLL_INTERVAL_MSEC 1000 + /* While processing submitted and completed descriptors (rx and tx path * respectively) in a loop it is desired to: * - perform batch submissions while populating submission queue @@ -346,6 +348,9 @@ struct ena_adapter { uint64_t memzone_cnt; + /* Time (in microseconds) of the control path queues monitoring interval */ + uint64_t control_path_poll_interval; + /* * Helper variables for holding the information about the supported * metrics. From patchwork Wed Mar 6 12:24:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Brandes, Shai" X-Patchwork-Id: 138046 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 053CD43C5B; Wed, 6 Mar 2024 13:29:23 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 889FA42EDC; Wed, 6 Mar 2024 13:26:07 +0100 (CET) Received: from smtp-fw-33001.amazon.com (smtp-fw-33001.amazon.com [207.171.190.10]) by mails.dpdk.org (Postfix) with ESMTP id A9DB542EC3 for ; Wed, 6 Mar 2024 13:26:03 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1709727964; x=1741263964; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=PmoDfOUYki+MeBiTdBtlyA9CP94LqP9cD3VyrmMK12Y=; b=pWX15zbCSQ7j7KieG+nL2LdntLAEOQhC9yFgqvds93b/iiftOlJAxmTX /nFQMp700widVGL6r7mNc5YT2TAlKNCSakVH6dnYjVUGE1xeJcuxsrC6Y kygq+iuP2Q+kiWdHYXKgGeva3opDkEJp1O4t9aI6zf5dzd9pZXAV3tAIn 0=; X-IronPort-AV: E=Sophos;i="6.06,208,1705363200"; d="scan'208";a="331160216" Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev) ([10.43.8.6]) by smtp-border-fw-33001.sea14.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 12:26:02 +0000 Received: from EX19MTAEUC002.ant.amazon.com [10.0.10.100:24735] by smtpin.naws.eu-west-1.prod.farcaster.email.amazon.dev [10.0.23.38:2525] with esmtp (Farcaster) id 540c6ff9-8f8e-4279-bd77-1b7ae9f80b80; Wed, 6 Mar 2024 12:26:01 +0000 (UTC) X-Farcaster-Flow-ID: 540c6ff9-8f8e-4279-bd77-1b7ae9f80b80 Received: from EX19D007EUA001.ant.amazon.com (10.252.50.133) by EX19MTAEUC002.ant.amazon.com (10.252.51.245) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:58 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D007EUA001.ant.amazon.com (10.252.50.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.28; Wed, 6 Mar 2024 12:25:57 +0000 Received: from HFA15-CG15235BS.amazon.com (10.1.213.21) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1258.28 via Frontend Transport; Wed, 6 Mar 2024 12:25:56 +0000 From: To: CC: , Shai Brandes Subject: [PATCH v3 33/33] net/ena: upgrade driver version to 2.9.0 Date: Wed, 6 Mar 2024 14:24:45 +0200 Message-ID: <20240306122445.4350-34-shaibran@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240306122445.4350-1-shaibran@amazon.com> References: <20240306122445.4350-1-shaibran@amazon.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shai Brandes upgrade driver version to 2.9.0. Signed-off-by: Shai Brandes Reviewed-by: Amit Bernstein --- drivers/net/ena/ena_ethdev.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c index a36efae38c..47f744a89d 100644 --- a/drivers/net/ena/ena_ethdev.c +++ b/drivers/net/ena/ena_ethdev.c @@ -22,7 +22,7 @@ #include #define DRV_MODULE_VER_MAJOR 2 -#define DRV_MODULE_VER_MINOR 8 +#define DRV_MODULE_VER_MINOR 9 #define DRV_MODULE_VER_SUBMINOR 0 #define __MERGE_64B_H_L(h, l) (((uint64_t)h << 32) | l)