From patchwork Tue Dec 12 11:32:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 135060 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 71F68436D2; Tue, 12 Dec 2023 12:32:38 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 490E942E1B; Tue, 12 Dec 2023 12:32:38 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id 252124026E for ; Tue, 12 Dec 2023 12:32:35 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702380756; x=1733916756; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=XxL+lwTbbj5h3+fPgAZHVUzH/LFKC2Y5KfeSxtqxMhk=; b=KMdYwbJFdxh5v3WL81wXFjb1TowDVLdE1kDn5JTnKNKuohNskoskpj5Z z+V47jFnvWo274NPbib5SeDUOYnTLYLdEyHMTuSfBJO37F7dSK/KGMua+ D/j4eLVLKeLU8MbRLg19Xqhccrh8Y62upIdKpre4Q852V/A8N6EX6ef6I GjkbA5l5CM7lqmBu/XWG9flFIpiZuevpm7eOr0MkZ7twjG3JStjYPggTt d47rFeubnv0dHzpbB09anToU2cxa+cQiATVI3J51JpPQ3NuxOJQFaa9bM KUy4R7DguKzB2L5XQJL0weWGn3nrt3W6vWa2VgcgcPfS6RJkAtu6fsFg3 g==; X-IronPort-AV: E=McAfee;i="6600,9927,10921"; a="398635840" X-IronPort-AV: E=Sophos;i="6.04,270,1695711600"; d="scan'208";a="398635840" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Dec 2023 03:32:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10921"; a="766794685" X-IronPort-AV: E=Sophos;i="6.04,270,1695711600"; d="scan'208";a="766794685" Received: from silpixa00401316.ir.intel.com (HELO silpixa00401385.ir.intel.com) ([10.237.214.22]) by orsmga007.jf.intel.com with ESMTP; 12 Dec 2023 03:32:34 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: jerinj@marvell.com, Bruce Richardson Subject: [PATCH v3 1/9] eventdev: add capability flags for supported sched types Date: Tue, 12 Dec 2023 11:32:15 +0000 Message-Id: <20231212113223.31147-2-bruce.richardson@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231212113223.31147-1-bruce.richardson@intel.com> References: <20231120172606.505579-1-bruce.richardson@intel.com> <20231212113223.31147-1-bruce.richardson@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Not all eventdev's support all scheduling types, for example, some may only support atomic scheduling or others only support ordered scheduling. There is currently no clear indication for each driver what sched types it supports, so add capability flags to be indicated on return from rte_event_dev_info_get() API. Similarly add the possible scheduling types to the capabilities table in the docs. Signed-off-by: Bruce Richardson Acked-by: Jerin Jacob --- doc/guides/eventdevs/features/default.ini | 3 +++ lib/eventdev/rte_eventdev.h | 21 +++++++++++++++++++++ 2 files changed, 24 insertions(+) diff --git a/doc/guides/eventdevs/features/default.ini b/doc/guides/eventdevs/features/default.ini index e980ae134a..1cc4303fe5 100644 --- a/doc/guides/eventdevs/features/default.ini +++ b/doc/guides/eventdevs/features/default.ini @@ -6,6 +6,9 @@ ; the features table in the documentation. ; [Scheduling Features] +atomic_scheduling = +ordered_scheduling = +parallel_scheduling = queue_qos = event_qos = distributed_sched = diff --git a/lib/eventdev/rte_eventdev.h b/lib/eventdev/rte_eventdev.h index ec9b02455d..d48957362c 100644 --- a/lib/eventdev/rte_eventdev.h +++ b/lib/eventdev/rte_eventdev.h @@ -326,6 +326,27 @@ struct rte_event; * than one. */ +#define RTE_EVENT_DEV_CAP_ATOMIC (1ULL << 13) +/**< Event device is capable of atomic scheduling. + * When this flag is set, the application can configure queues with scheduling type + * atomic on this event device. + * @see RTE_SCHED_TYPE_ATOMIC + */ + +#define RTE_EVENT_DEV_CAP_ORDERED (1ULL << 14) +/**< Event device is capable of ordered scheduling. + * When this flag is set, the application can configure queues with scheduling type + * ordered on this event device. + * @see RTE_SCHED_TYPE_ORDERED + */ + +#define RTE_EVENT_DEV_CAP_PARALLEL (1ULL << 15) +/**< Event device is capable of parallel scheduling. + * When this flag is set, the application can configure queues with scheduling type + * parallel on this event device. + * @see RTE_SCHED_TYPE_PARALLEL + */ + /* Event device priority levels */ #define RTE_EVENT_DEV_PRIORITY_HIGHEST 0 /**< Highest priority expressed across eventdev subsystem From patchwork Tue Dec 12 11:32:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 135062 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id AC76A436D3; Tue, 12 Dec 2023 12:32:45 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 944AA42E1F; Tue, 12 Dec 2023 12:32:39 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id C08584026E for ; Tue, 12 Dec 2023 12:32:37 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702380757; x=1733916757; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nSxDuu39w51a7L8t6vaUBmttdIKB+OmPX3007iEUhg4=; b=RioxlNzEaHxt3LvD1LOysK4+H49hHGTfiIt9szOVGUnyohDfEQlAD0mF 1N+4lWwkBKWR4EQ293Q5iGnik84E0NIDnDH/GevREMtT2GXzChbymTH3q fgcwJAhhNZuugBWjjM5Y+eMfUx6rM9XOxXFHqdLULVyGVG1MOWzubaFZ6 q+tOUuvEAmWqGv4XaQ0bgp+IdRF8kt/xI3wcrLXHyLYbF9lWlfxY0ETPH iTG2rdZqI6j0po7enbvgQIyWJIIMbSvJMqUFzjlslXmedH5q2ghUS6xQa 9yls7XGr0mM1y/gDoW9A8EmBh5d1H0gjXOU+vuRmS0g6c3XuZ+M0TB0zh A==; X-IronPort-AV: E=McAfee;i="6600,9927,10921"; a="398635853" X-IronPort-AV: E=Sophos;i="6.04,270,1695711600"; d="scan'208";a="398635853" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Dec 2023 03:32:37 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10921"; a="766794690" X-IronPort-AV: E=Sophos;i="6.04,270,1695711600"; d="scan'208";a="766794690" Received: from silpixa00401316.ir.intel.com (HELO silpixa00401385.ir.intel.com) ([10.237.214.22]) by orsmga007.jf.intel.com with ESMTP; 12 Dec 2023 03:32:35 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: jerinj@marvell.com, Bruce Richardson , =?utf-8?q?Mattias_R=C3=B6nnblom?= Subject: [PATCH v3 2/9] eventdev: clarify all-types flag documentation Date: Tue, 12 Dec 2023 11:32:16 +0000 Message-Id: <20231212113223.31147-3-bruce.richardson@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231212113223.31147-1-bruce.richardson@intel.com> References: <20231120172606.505579-1-bruce.richardson@intel.com> <20231212113223.31147-1-bruce.richardson@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Rather than requiring that any device advertising the RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES flag support all of atomic, ordered and parallel scheduling, we can redefine the field so that it basically means that you don't need to specify the queue scheduling type at config time. Instead all types of supported events can be sent to all queues. Suggested-by: Mattias Rönnblom Signed-off-by: Bruce Richardson Acked-by: Jerin Jacob --- lib/eventdev/rte_eventdev.h | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/lib/eventdev/rte_eventdev.h b/lib/eventdev/rte_eventdev.h index d48957362c..35865f017f 100644 --- a/lib/eventdev/rte_eventdev.h +++ b/lib/eventdev/rte_eventdev.h @@ -250,11 +250,22 @@ struct rte_event; * @see rte_event_dequeue_burst() */ #define RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES (1ULL << 3) -/**< Event device is capable of enqueuing events of any type to any queue. +/**< Event device is capable of accepting enqueued events, of any type + * advertised as supported by the device, to all destination queues. + * + * When this capability is set, the "schedule_type" field of the + * rte_event_queue_conf structure is ignored when a queue is being configured. + * Instead the the "sched_type" field of each event enqueued is used to + * select the scheduling to be performed on that event. + * * If this capability is not set, the queue only supports events of the - * *RTE_SCHED_TYPE_* type that it was created with. + * *RTE_SCHED_TYPE_* type specified in the rte_event_queue_conf structure + * at time of configuration. * - * @see RTE_SCHED_TYPE_* values + * @see RTE_SCHED_TYPE_ATOMIC + * @see RTE_SCHED_TYPE_ORDERED + * @see RTE_SCHED_TYPE_PARALLEL + * @see rte_event_queue_conf.schedule_type */ #define RTE_EVENT_DEV_CAP_BURST_MODE (1ULL << 4) /**< Event device is capable of operating in burst mode for enqueue(forward, From patchwork Tue Dec 12 11:32:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 135059 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D4C71436D4; Tue, 12 Dec 2023 12:32:52 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DB0A942E23; Tue, 12 Dec 2023 12:32:40 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id 5A1BF42E19 for ; Tue, 12 Dec 2023 12:32:39 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702380759; x=1733916759; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=g8AoRPmw883JwOWiGX1kxIQkW/402Y+KXiIlNodi4mM=; b=Ux+UaGJADznrCLYcYNUy5kltjqbfAn3Sl5EBP63tXEBJQfuJDHEbiP90 HHbMHT22AvrC0t1HZ25jw+7cRzRuvdEmQgl8T2CdUmutpSUYwhzd7xzoB mfyvm/cwzMxXrYcSKf89ZCRjk8yuWpPwIGWCs5o3kmsgaQs8BgzOSelYX mhvdAOPTKMs5bfsbNPT/K2fcksU2ETdK6cjoaZ8wOnb55UqfaYr3+J+P5 aRh1dAfAoY6pj+coAOSwDGGqbhbVbUlrCbs5qGaFfwg09RxeaBNeYpYsl sK6EujSiUX5L3jW2VzQkd39P23Hu/nQ7qPDg77nr0cUPoASsqSPrJlgKM Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10921"; a="398635858" X-IronPort-AV: E=Sophos;i="6.04,270,1695711600"; d="scan'208";a="398635858" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Dec 2023 03:32:39 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10921"; a="766794700" X-IronPort-AV: E=Sophos;i="6.04,270,1695711600"; d="scan'208";a="766794700" Received: from silpixa00401316.ir.intel.com (HELO silpixa00401385.ir.intel.com) ([10.237.214.22]) by orsmga007.jf.intel.com with ESMTP; 12 Dec 2023 03:32:37 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: jerinj@marvell.com, Bruce Richardson , Pavan Nikhilesh , Shijith Thotton Subject: [PATCH v3 3/9] event/cnxk: add schedule-type capability flags Date: Tue, 12 Dec 2023 11:32:17 +0000 Message-Id: <20231212113223.31147-4-bruce.richardson@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231212113223.31147-1-bruce.richardson@intel.com> References: <20231120172606.505579-1-bruce.richardson@intel.com> <20231212113223.31147-1-bruce.richardson@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Document explicitly the scheduling types supported by this driver, both via info_get() function, and via table in the documentation. Signed-off-by: Bruce Richardson --- doc/guides/eventdevs/features/cnxk.ini | 3 +++ drivers/event/cnxk/cnxk_eventdev.c | 5 ++++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/doc/guides/eventdevs/features/cnxk.ini b/doc/guides/eventdevs/features/cnxk.ini index 5d353e3670..d1516372fa 100644 --- a/doc/guides/eventdevs/features/cnxk.ini +++ b/doc/guides/eventdevs/features/cnxk.ini @@ -4,6 +4,9 @@ ; Refer to default.ini for the full list of available PMD features. ; [Scheduling Features] +atomic_scheduling = Y +ordered_scheduling = Y +parallel_scheduling = Y queue_qos = Y distributed_sched = Y queue_all_types = Y diff --git a/drivers/event/cnxk/cnxk_eventdev.c b/drivers/event/cnxk/cnxk_eventdev.c index 0c61f4c20e..e266ee2789 100644 --- a/drivers/event/cnxk/cnxk_eventdev.c +++ b/drivers/event/cnxk/cnxk_eventdev.c @@ -22,7 +22,10 @@ cnxk_sso_info_get(struct cnxk_sso_evdev *dev, dev_info->max_event_port_dequeue_depth = 1; dev_info->max_event_port_enqueue_depth = 1; dev_info->max_num_events = dev->max_num_events; - dev_info->event_dev_cap = RTE_EVENT_DEV_CAP_QUEUE_QOS | + dev_info->event_dev_cap = RTE_EVENT_DEV_CAP_ATOMIC | + RTE_EVENT_DEV_CAP_ORDERED | + RTE_EVENT_DEV_CAP_PARALLEL | + RTE_EVENT_DEV_CAP_QUEUE_QOS | RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED | RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES | RTE_EVENT_DEV_CAP_RUNTIME_PORT_LINK | From patchwork Tue Dec 12 11:32:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 135061 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6F880436D5; Tue, 12 Dec 2023 12:33:03 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 990D142E2F; Tue, 12 Dec 2023 12:32:43 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id D873542E22 for ; Tue, 12 Dec 2023 12:32:40 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702380761; x=1733916761; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8w/4HiOPtNMKRDu0MV+0pCEvWpBaKXv1eUSeUQppNTk=; b=ISfT7tvpRzKv/zUF05H9NcWeIZH2WhbIpP2fvvQSz8D281PlymOlANfZ rZh9Sq6LACmCdp7quEz95Q1Q8eQXsj0DMlaN5bxEY1XZplLsdQ6UBFraN v+3dE2yC7iNq0btGhDa8MEQSaIj2DSrUgN4r9W6t/Kypx+gFsCDDEkvEi v0QK8Gh248JDLCpH2e9yz5rpJlMLQyGkRnPI4VXiQXCzWbdo+rBl5nPWH 9hst5/4x46mEJ9j4fU2BLkvt0QsRadU9GQhcQXWFqg4YLw/5vQ3qF+cXm VYb4NNYO1SIopb8hcpYK7OL40sqDssYyUWHCW4B1tv+HR0cTnnbvqWYhA g==; X-IronPort-AV: E=McAfee;i="6600,9927,10921"; a="398635865" X-IronPort-AV: E=Sophos;i="6.04,270,1695711600"; d="scan'208";a="398635865" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Dec 2023 03:32:40 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10921"; a="766794704" X-IronPort-AV: E=Sophos;i="6.04,270,1695711600"; d="scan'208";a="766794704" Received: from silpixa00401316.ir.intel.com (HELO silpixa00401385.ir.intel.com) ([10.237.214.22]) by orsmga007.jf.intel.com with ESMTP; 12 Dec 2023 03:32:39 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: jerinj@marvell.com, Bruce Richardson , Abdullah Sevincer Subject: [PATCH v3 4/9] event/dlb2: add schedule-type capability flags Date: Tue, 12 Dec 2023 11:32:18 +0000 Message-Id: <20231212113223.31147-5-bruce.richardson@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231212113223.31147-1-bruce.richardson@intel.com> References: <20231120172606.505579-1-bruce.richardson@intel.com> <20231212113223.31147-1-bruce.richardson@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Document explicitly the scheduling types supported by this driver, both via info_get() function, and via table in the documentation. Signed-off-by: Bruce Richardson Acked-by: Abdullah Sevincer --- doc/guides/eventdevs/features/dlb2.ini | 3 +++ drivers/event/dlb2/dlb2.c | 5 ++++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/doc/guides/eventdevs/features/dlb2.ini b/doc/guides/eventdevs/features/dlb2.ini index 48a2a18aff..7b80286927 100644 --- a/doc/guides/eventdevs/features/dlb2.ini +++ b/doc/guides/eventdevs/features/dlb2.ini @@ -4,6 +4,9 @@ ; Refer to default.ini for the full list of available PMD features. ; [Scheduling Features] +atomic_scheduling = Y +ordered_scheduling = Y +parallel_scheduling = Y event_qos = Y distributed_sched = Y queue_all_types = Y diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c index 050ace0904..770bdcbd2d 100644 --- a/drivers/event/dlb2/dlb2.c +++ b/drivers/event/dlb2/dlb2.c @@ -71,7 +71,10 @@ static struct rte_event_dev_info evdev_dlb2_default_info = { .max_num_events = DLB2_MAX_NUM_LDB_CREDITS, .max_single_link_event_port_queue_pairs = DLB2_MAX_NUM_DIR_PORTS(DLB2_HW_V2), - .event_dev_cap = (RTE_EVENT_DEV_CAP_EVENT_QOS | + .event_dev_cap = (RTE_EVENT_DEV_CAP_ATOMIC | + RTE_EVENT_DEV_CAP_ORDERED | + RTE_EVENT_DEV_CAP_PARALLEL | + RTE_EVENT_DEV_CAP_EVENT_QOS | RTE_EVENT_DEV_CAP_NONSEQ_MODE | RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED | RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES | From patchwork Tue Dec 12 11:32:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 135063 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 010B6436D2; Tue, 12 Dec 2023 12:33:13 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0073C42E36; Tue, 12 Dec 2023 12:32:45 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id 2AEF042E1E for ; Tue, 12 Dec 2023 12:32:43 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702380763; x=1733916763; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=llfImbJBAtn66LFo9Rf8o+uWH1TMCKsdDP/7cedDm4Y=; b=EnrPRtmiSn+jlPQYK663CsFSXQkkmad0AUILntGzKb6FgXSM1GzmMLI2 XEZTU7eWCCtBJulG/8zCMg+r66frwreD+dyTp5nskXSHu53PddazULdrg tCFfTaPAk2TLpB1getMnCKZ6zhgKpcPXvkuyW7DEqvtEifUNV/37pQzvC 38C2PsOgZBYShCmBh1V2fWITZhGw5kRces2QduLWUSJCCGwAb73xboJ0s GkzTGUkkwQbxOJNK7J6f645QBHoIuHiRNZ1hGA152Kt1lVRag+tthlSPA AhaFGtI5a61O/J0xbub9o/Ld+e5X13NvSfX3ydZ0Weiw717V0IF/mMC63 g==; X-IronPort-AV: E=McAfee;i="6600,9927,10921"; a="398635880" X-IronPort-AV: E=Sophos;i="6.04,270,1695711600"; d="scan'208";a="398635880" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Dec 2023 03:32:42 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10921"; a="766794712" X-IronPort-AV: E=Sophos;i="6.04,270,1695711600"; d="scan'208";a="766794712" Received: from silpixa00401316.ir.intel.com (HELO silpixa00401385.ir.intel.com) ([10.237.214.22]) by orsmga007.jf.intel.com with ESMTP; 12 Dec 2023 03:32:40 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: jerinj@marvell.com, Bruce Richardson , Hemant Agrawal , Sachin Saxena Subject: [PATCH v3 5/9] event/dpaa*: add schedule-type capability flags Date: Tue, 12 Dec 2023 11:32:19 +0000 Message-Id: <20231212113223.31147-6-bruce.richardson@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231212113223.31147-1-bruce.richardson@intel.com> References: <20231120172606.505579-1-bruce.richardson@intel.com> <20231212113223.31147-1-bruce.richardson@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Document explicitly the scheduling types supported by these drivers, both via info_get() function, and via table in the documentation. Signed-off-by: Bruce Richardson Acked-by: Hemant Agrawal --- doc/guides/eventdevs/features/dpaa.ini | 2 ++ doc/guides/eventdevs/features/dpaa2.ini | 2 ++ drivers/event/dpaa/dpaa_eventdev.c | 2 ++ drivers/event/dpaa2/dpaa2_eventdev.c | 2 ++ 4 files changed, 8 insertions(+) diff --git a/doc/guides/eventdevs/features/dpaa.ini b/doc/guides/eventdevs/features/dpaa.ini index b73bfa02e5..b2ee6ed93a 100644 --- a/doc/guides/eventdevs/features/dpaa.ini +++ b/doc/guides/eventdevs/features/dpaa.ini @@ -4,6 +4,8 @@ ; Refer to default.ini for the full list of available PMD features. ; [Scheduling Features] +atomic_scheduling = Y +parallel_scheduling = Y distributed_sched = Y burst_mode = Y nonseq_mode = Y diff --git a/doc/guides/eventdevs/features/dpaa2.ini b/doc/guides/eventdevs/features/dpaa2.ini index c935bd0cfc..6d3c07ed66 100644 --- a/doc/guides/eventdevs/features/dpaa2.ini +++ b/doc/guides/eventdevs/features/dpaa2.ini @@ -4,6 +4,8 @@ ; Refer to default.ini for the full list of available PMD features. ; [Scheduling Features] +atomic_scheduling = Y +parallel_scheduling = Y distributed_sched = Y queue_all_types = Y burst_mode = Y diff --git a/drivers/event/dpaa/dpaa_eventdev.c b/drivers/event/dpaa/dpaa_eventdev.c index 46a9b88c73..57ddb85e52 100644 --- a/drivers/event/dpaa/dpaa_eventdev.c +++ b/drivers/event/dpaa/dpaa_eventdev.c @@ -353,6 +353,8 @@ dpaa_event_dev_info_get(struct rte_eventdev *dev, dev_info->max_num_events = DPAA_EVENT_MAX_NUM_EVENTS; dev_info->event_dev_cap = + RTE_EVENT_DEV_CAP_ATOMIC | + RTE_EVENT_DEV_CAP_PARALLEL | RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED | RTE_EVENT_DEV_CAP_BURST_MODE | RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT | diff --git a/drivers/event/dpaa2/dpaa2_eventdev.c b/drivers/event/dpaa2/dpaa2_eventdev.c index dd4e64395f..dd62c76c86 100644 --- a/drivers/event/dpaa2/dpaa2_eventdev.c +++ b/drivers/event/dpaa2/dpaa2_eventdev.c @@ -404,6 +404,8 @@ dpaa2_eventdev_info_get(struct rte_eventdev *dev, DPAA2_EVENT_MAX_PORT_ENQUEUE_DEPTH; dev_info->max_num_events = DPAA2_EVENT_MAX_NUM_EVENTS; dev_info->event_dev_cap = RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED | + RTE_EVENT_DEV_CAP_ATOMIC | + RTE_EVENT_DEV_CAP_PARALLEL | RTE_EVENT_DEV_CAP_BURST_MODE| RTE_EVENT_DEV_CAP_RUNTIME_PORT_LINK | RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT | From patchwork Tue Dec 12 11:32:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 135064 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C5241436D4; Tue, 12 Dec 2023 12:33:22 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3D5C742E28; Tue, 12 Dec 2023 12:32:47 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id 5520F42E33 for ; Tue, 12 Dec 2023 12:32:45 +0100 (CET) DKIM-Signature: v=1; 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d="scan'208";a="766794723" Received: from silpixa00401316.ir.intel.com (HELO silpixa00401385.ir.intel.com) ([10.237.214.22]) by orsmga007.jf.intel.com with ESMTP; 12 Dec 2023 03:32:42 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: jerinj@marvell.com, Bruce Richardson , =?utf-8?q?Mattias_R=C3=B6nnblom?= Subject: [PATCH v3 6/9] event/dsw: add schedule-type capability flags Date: Tue, 12 Dec 2023 11:32:20 +0000 Message-Id: <20231212113223.31147-7-bruce.richardson@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231212113223.31147-1-bruce.richardson@intel.com> References: <20231120172606.505579-1-bruce.richardson@intel.com> <20231212113223.31147-1-bruce.richardson@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Document explicitly the scheduling types supported by this driver, both via info_get() function, and via table in the documentation. Signed-off-by: Bruce Richardson --- doc/guides/eventdevs/features/dsw.ini | 2 ++ drivers/event/dsw/dsw_evdev.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/doc/guides/eventdevs/features/dsw.ini b/doc/guides/eventdevs/features/dsw.ini index c8bc6b3f1d..4038b9dd3d 100644 --- a/doc/guides/eventdevs/features/dsw.ini +++ b/doc/guides/eventdevs/features/dsw.ini @@ -4,6 +4,8 @@ ; Refer to default.ini for the full list of available PMD features. ; [Scheduling Features] +atomic_scheduling = Y +parallel_scheduling = Y distributed_sched = Y burst_mode = Y nonseq_mode = Y diff --git a/drivers/event/dsw/dsw_evdev.c b/drivers/event/dsw/dsw_evdev.c index 1209e73a9d..9bf7b46a24 100644 --- a/drivers/event/dsw/dsw_evdev.c +++ b/drivers/event/dsw/dsw_evdev.c @@ -220,6 +220,8 @@ dsw_info_get(struct rte_eventdev *dev __rte_unused, .max_num_events = DSW_MAX_EVENTS, .max_profiles_per_port = 1, .event_dev_cap = RTE_EVENT_DEV_CAP_BURST_MODE| + RTE_EVENT_DEV_CAP_ATOMIC | + RTE_EVENT_DEV_CAP_PARALLEL | RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED| RTE_EVENT_DEV_CAP_NONSEQ_MODE| RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT| From patchwork Tue Dec 12 11:32:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 135065 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A7934436D1; Tue, 12 Dec 2023 12:33:31 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8C2B342E39; Tue, 12 Dec 2023 12:32:48 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id 10FFB42E28 for ; Tue, 12 Dec 2023 12:32:45 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702380766; x=1733916766; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=QCRa+7M0Ymn7KK5NjNzk1ZAhUQ42VWX933TQOZZeX0k=; b=jsl3yYsREmUzbcKgXnJw8mjmSHfOarAYfGJh9Bn2ZB2stZe0PMzG0wMb 35CxvBU4X2IC41O4gJkefbw7HUZzY+zDQAmgY9cpCw/nlhFb4qrX2Yhhf Ow9aHbhxfQoSal+OHALxUovlZDZp/XfzWNMY/x9175k6zEGNLRUr4w8hJ d9WaziJw5vFbskUrTYf8IkLNCUr5CujofmkoAjA7YzVWNdG0GEHIy2H5Q 8c9vNUG/uYJA3WZDjrbibqCSDMHhUTJXCZOM7yyHFbU+WdAeJzcOk6PqY 15/eRliqVLtDdUorEcpN4BUx5J1kv8WK3w9QuueySwykqMk9zXw+pujcQ Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10921"; a="398635889" X-IronPort-AV: E=Sophos;i="6.04,270,1695711600"; d="scan'208";a="398635889" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Dec 2023 03:32:45 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10921"; a="766794733" X-IronPort-AV: E=Sophos;i="6.04,270,1695711600"; d="scan'208";a="766794733" Received: from silpixa00401316.ir.intel.com (HELO silpixa00401385.ir.intel.com) ([10.237.214.22]) by orsmga007.jf.intel.com with ESMTP; 12 Dec 2023 03:32:44 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: jerinj@marvell.com, Bruce Richardson Subject: [PATCH v3 7/9] event/octeontx: add schedule-type capability flags Date: Tue, 12 Dec 2023 11:32:21 +0000 Message-Id: <20231212113223.31147-8-bruce.richardson@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231212113223.31147-1-bruce.richardson@intel.com> References: <20231120172606.505579-1-bruce.richardson@intel.com> <20231212113223.31147-1-bruce.richardson@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Document explicitly the scheduling types supported by this driver, both via info_get() function, and via table in the documentation. Signed-off-by: Bruce Richardson --- doc/guides/eventdevs/features/octeontx.ini | 3 +++ drivers/event/octeontx/ssovf_evdev.c | 3 +++ 2 files changed, 6 insertions(+) diff --git a/doc/guides/eventdevs/features/octeontx.ini b/doc/guides/eventdevs/features/octeontx.ini index ec044e6289..06efae767a 100644 --- a/doc/guides/eventdevs/features/octeontx.ini +++ b/doc/guides/eventdevs/features/octeontx.ini @@ -4,6 +4,9 @@ ; Refer to default.ini for the full list of available PMD features. ; [Scheduling Features] +atomic_scheduling = Y +ordered_scheduling = Y +parallel_scheduling = Y queue_qos = Y distributed_sched = Y queue_all_types = Y diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c index a16f24e088..3a933b1db7 100644 --- a/drivers/event/octeontx/ssovf_evdev.c +++ b/drivers/event/octeontx/ssovf_evdev.c @@ -151,6 +151,9 @@ ssovf_info_get(struct rte_eventdev *dev, struct rte_event_dev_info *dev_info) dev_info->max_event_port_enqueue_depth = 1; dev_info->max_num_events = edev->max_num_events; dev_info->event_dev_cap = RTE_EVENT_DEV_CAP_QUEUE_QOS | + RTE_EVENT_DEV_CAP_ATOMIC | + RTE_EVENT_DEV_CAP_ORDERED | + RTE_EVENT_DEV_CAP_PARALLEL | RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED | RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES| RTE_EVENT_DEV_CAP_RUNTIME_PORT_LINK | From patchwork Tue Dec 12 11:32:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 135066 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id DEA9A436D1; Tue, 12 Dec 2023 12:33:38 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DEF2042E3E; Tue, 12 Dec 2023 12:32:50 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id DA72842E38 for ; Tue, 12 Dec 2023 12:32:47 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702380768; x=1733916768; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=q2f1yGNYclbKEw2dWeGkEvqYRxGzoL8uQgmu5Wud6ms=; b=EUzEZCAOeV3qHZl+yS6uLqTV6VszFupn3PflLLO+0AxiJmSGN3kL/dVC nsAS2SkIZV5MQOk4k00A33b+QDNLGxI+X15uz5/cG6SosLSTxF1FTM9jk gtMM7FvmMWnVFb69/Gz5noTJIrytH0wln8C05FdKlBiRkPqrEmyz6Edmt X+S5wMfg0RtoSiSnLTheqNXnjiRG3Feo36WQ6ni3Vr+2aYgyvAEP9HtSi 6VjJqLYJpGi+Jw5zRg99F5AB+iLVig67GwvbEIIp0zulJX5izP7De02am 65GDaxm1B1Vg/OIMQAc51n1YnaViGlP4Nwiy7awynwh539v6DxunKclUa w==; X-IronPort-AV: E=McAfee;i="6600,9927,10921"; a="398635901" X-IronPort-AV: E=Sophos;i="6.04,270,1695711600"; d="scan'208";a="398635901" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Dec 2023 03:32:46 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10921"; a="766794740" X-IronPort-AV: E=Sophos;i="6.04,270,1695711600"; d="scan'208";a="766794740" Received: from silpixa00401316.ir.intel.com (HELO silpixa00401385.ir.intel.com) ([10.237.214.22]) by orsmga007.jf.intel.com with ESMTP; 12 Dec 2023 03:32:45 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: jerinj@marvell.com, Bruce Richardson , Liang Ma , Peter Mccarthy Subject: [PATCH v3 8/9] event/opdl: add schedule-type capability flags Date: Tue, 12 Dec 2023 11:32:22 +0000 Message-Id: <20231212113223.31147-9-bruce.richardson@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231212113223.31147-1-bruce.richardson@intel.com> References: <20231120172606.505579-1-bruce.richardson@intel.com> <20231212113223.31147-1-bruce.richardson@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Document explicitly the scheduling types supported by this driver, both via info_get() function, and via table in the documentation. Signed-off-by: Bruce Richardson --- doc/guides/eventdevs/features/opdl.ini | 3 +++ drivers/event/opdl/opdl_evdev.c | 3 +++ 2 files changed, 6 insertions(+) diff --git a/doc/guides/eventdevs/features/opdl.ini b/doc/guides/eventdevs/features/opdl.ini index 5cc35d3c77..1a97fd54a6 100644 --- a/doc/guides/eventdevs/features/opdl.ini +++ b/doc/guides/eventdevs/features/opdl.ini @@ -4,6 +4,9 @@ ; Refer to default.ini for the full list of available PMD features. ; [Scheduling Features] +atomic_scheduling = Y +ordered_scheduling = Y +parallel_scheduling = Y burst_mode = Y carry_flow_id = Y maintenance_free = Y diff --git a/drivers/event/opdl/opdl_evdev.c b/drivers/event/opdl/opdl_evdev.c index 0cccaf7e97..b34a5fcacd 100644 --- a/drivers/event/opdl/opdl_evdev.c +++ b/drivers/event/opdl/opdl_evdev.c @@ -376,6 +376,9 @@ opdl_info_get(struct rte_eventdev *dev, struct rte_event_dev_info *info) .max_event_port_enqueue_depth = MAX_OPDL_CONS_Q_DEPTH, .max_num_events = OPDL_INFLIGHT_EVENTS_TOTAL, .event_dev_cap = RTE_EVENT_DEV_CAP_BURST_MODE | + RTE_EVENT_DEV_CAP_ORDERED | + RTE_EVENT_DEV_CAP_ATOMIC | + RTE_EVENT_DEV_CAP_PARALLEL | RTE_EVENT_DEV_CAP_CARRY_FLOW_ID | RTE_EVENT_DEV_CAP_MAINTENANCE_FREE, .max_profiles_per_port = 1, From patchwork Tue Dec 12 11:32:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 135067 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 91E03436D1; Tue, 12 Dec 2023 12:33:45 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 205B442E41; Tue, 12 Dec 2023 12:32:52 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id EDD6D42E3B for ; Tue, 12 Dec 2023 12:32:48 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702380769; x=1733916769; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=T//FIoZ2cCKNkWbKb1GbUv1u9bHVWpQDgwkoXqwvNc0=; b=Z+ER+qj8nDGRnASJ8AKEoFJ3s5W5zFi0+3p857+/CAgM6rojSY55FtCs mKP60y1wvu0iwAPK7N9Mj8Mc6biQfKLuKFJZ5wUEsW65V3OOPx7qpi42a /PQaFZ+QqkHtEoSbhoVBUxfqpMaoVFhXWAY7E2NsCJCT/ZLHrfWKiwW95 58mZS4umgRi3dSeKwA91rRQjCio48dLULTTUMhbR9zUnYWjmPxIIhlXRr tO9xt31p0eIpi8OyaJzLDDNk1LTlRwcMIyMsghhz1Ic9n/re7FR2+I/Lz ZW18gWhIXxsOsXrSAW+PP9wkcFYo3e3r8fSArXeEhuU7rAVu71t7cJ5mU Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10921"; a="398635906" X-IronPort-AV: E=Sophos;i="6.04,270,1695711600"; d="scan'208";a="398635906" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Dec 2023 03:32:48 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10921"; a="766794753" X-IronPort-AV: E=Sophos;i="6.04,270,1695711600"; d="scan'208";a="766794753" Received: from silpixa00401316.ir.intel.com (HELO silpixa00401385.ir.intel.com) ([10.237.214.22]) by orsmga007.jf.intel.com with ESMTP; 12 Dec 2023 03:32:47 -0800 From: Bruce Richardson To: dev@dpdk.org Cc: jerinj@marvell.com, Bruce Richardson , Harry van Haaren Subject: [PATCH v3 9/9] event/sw: add schedule-type capability flags Date: Tue, 12 Dec 2023 11:32:23 +0000 Message-Id: <20231212113223.31147-10-bruce.richardson@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231212113223.31147-1-bruce.richardson@intel.com> References: <20231120172606.505579-1-bruce.richardson@intel.com> <20231212113223.31147-1-bruce.richardson@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Document explicitly the scheduling types supported by this driver, both via info_get() function, and via table in the documentation. Signed-off-by: Bruce Richardson --- doc/guides/eventdevs/features/sw.ini | 3 +++ drivers/event/sw/sw_evdev.c | 3 +++ 2 files changed, 6 insertions(+) diff --git a/doc/guides/eventdevs/features/sw.ini b/doc/guides/eventdevs/features/sw.ini index 8c89d3b8d2..f4d46d79b8 100644 --- a/doc/guides/eventdevs/features/sw.ini +++ b/doc/guides/eventdevs/features/sw.ini @@ -4,6 +4,9 @@ ; Refer to default.ini for the full list of available PMD features. ; [Scheduling Features] +atomic_scheduling = Y +ordered_scheduling = Y +parallel_scheduling = Y queue_qos = Y event_qos = Y burst_mode = Y diff --git a/drivers/event/sw/sw_evdev.c b/drivers/event/sw/sw_evdev.c index 55e7735cb0..1c01b069fe 100644 --- a/drivers/event/sw/sw_evdev.c +++ b/drivers/event/sw/sw_evdev.c @@ -600,6 +600,9 @@ sw_info_get(struct rte_eventdev *dev, struct rte_event_dev_info *info) .max_event_port_enqueue_depth = MAX_SW_PROD_Q_DEPTH, .max_num_events = SW_INFLIGHT_EVENTS_TOTAL, .event_dev_cap = ( + RTE_EVENT_DEV_CAP_ATOMIC | + RTE_EVENT_DEV_CAP_ORDERED | + RTE_EVENT_DEV_CAP_PARALLEL | RTE_EVENT_DEV_CAP_QUEUE_QOS | RTE_EVENT_DEV_CAP_BURST_MODE | RTE_EVENT_DEV_CAP_EVENT_QOS |