From patchwork Fri Dec 8 07:44:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jie Hai X-Patchwork-Id: 134952 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9C56B436A6; Fri, 8 Dec 2023 08:48:00 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6FD2642F04; Fri, 8 Dec 2023 08:48:00 +0100 (CET) Received: from szxga01-in.huawei.com (szxga01-in.huawei.com [45.249.212.187]) by mails.dpdk.org (Postfix) with ESMTP id 5473B42E8D for ; Fri, 8 Dec 2023 08:47:58 +0100 (CET) Received: from kwepemd100004.china.huawei.com (unknown [172.30.72.56]) by szxga01-in.huawei.com (SkyGuard) with ESMTP id 4Smjnf1kdtzsRyL for ; Fri, 8 Dec 2023 15:44:06 +0800 (CST) Received: from localhost.localdomain (10.67.165.2) by kwepemd100004.china.huawei.com (7.221.188.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.1258.28; Fri, 8 Dec 2023 15:47:56 +0800 From: Jie Hai To: , Yisen Zhuang , Chunsong Feng , "Wei Hu (Xavier)" , Ferruh Yigit , "Min Hu (Connor)" , Huisong Li CC: , , Subject: [PATCH v3 1/3] net/hns3: fix VF multiple count on one reset Date: Fri, 8 Dec 2023 15:44:14 +0800 Message-ID: <20231208074416.2890279-2-haijie1@huawei.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20231208074416.2890279-1-haijie1@huawei.com> References: <20231111015915.2776769-1-haijie1@huawei.com> <20231208074416.2890279-1-haijie1@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.165.2] X-ClientProxiedBy: dggems704-chm.china.huawei.com (10.3.19.181) To kwepemd100004.china.huawei.com (7.221.188.31) X-CFilter-Loop: Reflected X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Dengdui Huang There are two ways for the hns3 VF driver to know reset event, namely, interrupt task and periodic detection task. For the latter, the real reset process will delay several microseconds to execute. Both tasks cause the count to increase by 1. However, the periodic detection task also detects a reset event A after interrupt task receive a reset event A. As a result, the reset count will be double. So this patch adds the comparison of reset level for VF in case of the multiple reset count. Fixes: a5475d61fa34 ("net/hns3: support VF") Cc: stable@dpdk.org Signed-off-by: Dengdui Huang Signed-off-by: Jie Hai --- drivers/net/hns3/hns3_ethdev_vf.c | 44 ++++++++++++++++++++----------- 1 file changed, 29 insertions(+), 15 deletions(-) diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c index 916cc0fb1b62..089df146f76e 100644 --- a/drivers/net/hns3/hns3_ethdev_vf.c +++ b/drivers/net/hns3/hns3_ethdev_vf.c @@ -563,13 +563,8 @@ hns3vf_check_event_cause(struct hns3_adapter *hns, uint32_t *clearval) val = hns3_read_dev(hw, HNS3_VF_RST_ING); hns3_write_dev(hw, HNS3_VF_RST_ING, val | HNS3_VF_RST_ING_BIT); val = cmdq_stat_reg & ~BIT(HNS3_VECTOR0_RST_INT_B); - if (clearval) { - hw->reset.stats.global_cnt++; - hns3_warn(hw, "Global reset detected, clear reset status"); - } else { - hns3_schedule_delayed_reset(hns); - hns3_warn(hw, "Global reset detected, don't clear reset status"); - } + hw->reset.stats.global_cnt++; + hns3_warn(hw, "Global reset detected, clear reset status"); ret = HNS3VF_VECTOR0_EVENT_RST; goto out; @@ -584,9 +579,9 @@ hns3vf_check_event_cause(struct hns3_adapter *hns, uint32_t *clearval) val = 0; ret = HNS3VF_VECTOR0_EVENT_OTHER; + out: - if (clearval) - *clearval = val; + *clearval = val; return ret; } @@ -1709,11 +1704,25 @@ is_vf_reset_done(struct hns3_hw *hw) return true; } +static enum hns3_reset_level +hns3vf_detect_reset_event(struct hns3_hw *hw) +{ + enum hns3_reset_level reset = HNS3_NONE_RESET; + uint32_t cmdq_stat_reg; + + cmdq_stat_reg = hns3_read_dev(hw, HNS3_VECTOR0_CMDQ_STAT_REG); + if (BIT(HNS3_VECTOR0_RST_INT_B) & cmdq_stat_reg) + reset = HNS3_VF_RESET; + + return reset; +} + bool hns3vf_is_reset_pending(struct hns3_adapter *hns) { + enum hns3_reset_level last_req; struct hns3_hw *hw = &hns->hw; - enum hns3_reset_level reset; + enum hns3_reset_level new_req; /* * According to the protocol of PCIe, FLR to a PF device resets the PF @@ -1736,13 +1745,18 @@ hns3vf_is_reset_pending(struct hns3_adapter *hns) if (rte_eal_process_type() != RTE_PROC_PRIMARY) return false; - hns3vf_check_event_cause(hns, NULL); - reset = hns3vf_get_reset_level(hw, &hw->reset.pending); - if (hw->reset.level != HNS3_NONE_RESET && reset != HNS3_NONE_RESET && - hw->reset.level < reset) { - hns3_warn(hw, "High level reset %d is pending", reset); + new_req = hns3vf_detect_reset_event(hw); + if (new_req == HNS3_NONE_RESET) + return false; + + last_req = hns3vf_get_reset_level(hw, &hw->reset.pending); + if (last_req == HNS3_NONE_RESET || last_req < new_req) { + __atomic_store_n(&hw->reset.disable_cmd, 1, __ATOMIC_RELAXED); + hns3_schedule_delayed_reset(hns); + hns3_warn(hw, "High level reset detected, delay do reset"); return true; } + return false; } From patchwork Fri Dec 8 07:44:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jie Hai X-Patchwork-Id: 134953 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8409F436A6; Fri, 8 Dec 2023 08:48:11 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 883A942FCB; Fri, 8 Dec 2023 08:48:02 +0100 (CET) Received: from szxga01-in.huawei.com (szxga01-in.huawei.com [45.249.212.187]) by mails.dpdk.org (Postfix) with ESMTP id DC74242FAB for ; Fri, 8 Dec 2023 08:47:58 +0100 (CET) Received: from kwepemd100004.china.huawei.com (unknown [172.30.72.54]) by szxga01-in.huawei.com (SkyGuard) with ESMTP id 4SmjsH6TMRzYstm for ; Fri, 8 Dec 2023 15:47:15 +0800 (CST) Received: from localhost.localdomain (10.67.165.2) by kwepemd100004.china.huawei.com (7.221.188.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.1258.28; Fri, 8 Dec 2023 15:47:56 +0800 From: Jie Hai To: , Yisen Zhuang , Dengdui Huang CC: , , , Subject: [PATCH v3 2/3] net/hns3: fix disable command with firmware Date: Fri, 8 Dec 2023 15:44:15 +0800 Message-ID: <20231208074416.2890279-3-haijie1@huawei.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20231208074416.2890279-1-haijie1@huawei.com> References: <20231111015915.2776769-1-haijie1@huawei.com> <20231208074416.2890279-1-haijie1@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.165.2] X-ClientProxiedBy: dggems704-chm.china.huawei.com (10.3.19.181) To kwepemd100004.china.huawei.com (7.221.188.31) X-CFilter-Loop: Reflected X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Dengdui Huang Disable command only when need to delay handle reset. This patch fixes it. Fixes: 5be38fc6c0fc ("net/hns3: fix multiple reset detected log") Cc: stable@dpdk.org Signed-off-by: Dengdui Huang Signed-off-by: Jie Hai --- drivers/net/hns3/hns3_ethdev.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c index ae81368f68ae..76fc401bd62c 100644 --- a/drivers/net/hns3/hns3_ethdev.c +++ b/drivers/net/hns3/hns3_ethdev.c @@ -5552,18 +5552,16 @@ hns3_detect_reset_event(struct hns3_hw *hw) last_req = hns3_get_reset_level(hns, &hw->reset.pending); vector0_intr_state = hns3_read_dev(hw, HNS3_VECTOR0_OTHER_INT_STS_REG); - if (BIT(HNS3_VECTOR0_IMPRESET_INT_B) & vector0_intr_state) { - __atomic_store_n(&hw->reset.disable_cmd, 1, __ATOMIC_RELAXED); + if (BIT(HNS3_VECTOR0_IMPRESET_INT_B) & vector0_intr_state) new_req = HNS3_IMP_RESET; - } else if (BIT(HNS3_VECTOR0_GLOBALRESET_INT_B) & vector0_intr_state) { - __atomic_store_n(&hw->reset.disable_cmd, 1, __ATOMIC_RELAXED); + else if (BIT(HNS3_VECTOR0_GLOBALRESET_INT_B) & vector0_intr_state) new_req = HNS3_GLOBAL_RESET; - } if (new_req == HNS3_NONE_RESET) return HNS3_NONE_RESET; if (last_req == HNS3_NONE_RESET || last_req < new_req) { + __atomic_store_n(&hw->reset.disable_cmd, 1, __ATOMIC_RELAXED); hns3_schedule_delayed_reset(hns); hns3_warn(hw, "High level reset detected, delay do reset"); } From patchwork Fri Dec 8 07:44:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jie Hai X-Patchwork-Id: 134954 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1C5A6436A6; Fri, 8 Dec 2023 08:48:17 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B01C142FD7; Fri, 8 Dec 2023 08:48:03 +0100 (CET) Received: from szxga03-in.huawei.com (szxga03-in.huawei.com [45.249.212.189]) by mails.dpdk.org (Postfix) with ESMTP id 65D1B42E8D for ; Fri, 8 Dec 2023 08:47:59 +0100 (CET) Received: from kwepemd100004.china.huawei.com (unknown [172.30.72.56]) by szxga03-in.huawei.com (SkyGuard) with ESMTP id 4Smjt35jXJz14L4m for ; Fri, 8 Dec 2023 15:47:55 +0800 (CST) Received: from localhost.localdomain (10.67.165.2) by kwepemd100004.china.huawei.com (7.221.188.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.1258.28; Fri, 8 Dec 2023 15:47:57 +0800 From: Jie Hai To: , Yisen Zhuang , Dengdui Huang CC: , , , Subject: [PATCH v3 3/3] net/hns3: fix incorrect reset level comparison Date: Fri, 8 Dec 2023 15:44:16 +0800 Message-ID: <20231208074416.2890279-4-haijie1@huawei.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20231208074416.2890279-1-haijie1@huawei.com> References: <20231111015915.2776769-1-haijie1@huawei.com> <20231208074416.2890279-1-haijie1@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.165.2] X-ClientProxiedBy: dggems704-chm.china.huawei.com (10.3.19.181) To kwepemd100004.china.huawei.com (7.221.188.31) X-CFilter-Loop: Reflected X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Dengdui Huang Currently, there are two problems in hns3vf_is_reset_pending(): 1. The new detect reset level is not HNS3_NONE_RESET, but the last reset level is HNS3_NONE_RESET, this function returns false. 2. Comparison between last_req and new_req is opposite. In addition, the reset level comparison in hns3_detect_reset_event() is similar to the hns3vf_is_reset_pending(). So this patch fixes above the problems and merges the logic of reset level comparison. Fixes: 5be38fc6c0fc ("net/hns3: fix multiple reset detected log") Cc: stable@dpdk.org Signed-off-by: Dengdui Huang Signed-off-by: Jie Hai --- drivers/net/hns3/hns3_ethdev.c | 22 +++++++--------------- 1 file changed, 7 insertions(+), 15 deletions(-) diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c index 76fc401bd62c..b8f7e408d1e0 100644 --- a/drivers/net/hns3/hns3_ethdev.c +++ b/drivers/net/hns3/hns3_ethdev.c @@ -5545,27 +5545,15 @@ is_pf_reset_done(struct hns3_hw *hw) static enum hns3_reset_level hns3_detect_reset_event(struct hns3_hw *hw) { - struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw); enum hns3_reset_level new_req = HNS3_NONE_RESET; - enum hns3_reset_level last_req; uint32_t vector0_intr_state; - last_req = hns3_get_reset_level(hns, &hw->reset.pending); vector0_intr_state = hns3_read_dev(hw, HNS3_VECTOR0_OTHER_INT_STS_REG); if (BIT(HNS3_VECTOR0_IMPRESET_INT_B) & vector0_intr_state) new_req = HNS3_IMP_RESET; else if (BIT(HNS3_VECTOR0_GLOBALRESET_INT_B) & vector0_intr_state) new_req = HNS3_GLOBAL_RESET; - if (new_req == HNS3_NONE_RESET) - return HNS3_NONE_RESET; - - if (last_req == HNS3_NONE_RESET || last_req < new_req) { - __atomic_store_n(&hw->reset.disable_cmd, 1, __ATOMIC_RELAXED); - hns3_schedule_delayed_reset(hns); - hns3_warn(hw, "High level reset detected, delay do reset"); - } - return new_req; } @@ -5584,10 +5572,14 @@ hns3_is_reset_pending(struct hns3_adapter *hns) return false; new_req = hns3_detect_reset_event(hw); + if (new_req == HNS3_NONE_RESET) + return false; + last_req = hns3_get_reset_level(hns, &hw->reset.pending); - if (last_req != HNS3_NONE_RESET && new_req != HNS3_NONE_RESET && - new_req < last_req) { - hns3_warn(hw, "High level reset %d is pending", last_req); + if (last_req == HNS3_NONE_RESET || last_req < new_req) { + __atomic_store_n(&hw->reset.disable_cmd, 1, __ATOMIC_RELAXED); + hns3_schedule_delayed_reset(hns); + hns3_warn(hw, "High level reset detected, delay do reset"); return true; } last_req = hns3_get_reset_level(hns, &hw->reset.request);