From patchwork Tue Oct 31 12:23:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jie Hai X-Patchwork-Id: 133662 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A190A43252; Tue, 31 Oct 2023 13:35:46 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8C5F64067C; Tue, 31 Oct 2023 13:35:42 +0100 (CET) Received: from szxga02-in.huawei.com (szxga02-in.huawei.com [45.249.212.188]) by mails.dpdk.org (Postfix) with ESMTP id 998DD4026C for ; Tue, 31 Oct 2023 13:35:39 +0100 (CET) Received: from kwepemi500020.china.huawei.com (unknown [172.30.72.55]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4SKTyr0DkHzPnb0 for ; Tue, 31 Oct 2023 20:31:32 +0800 (CST) Received: from localhost.localdomain (10.67.165.2) by kwepemi500020.china.huawei.com (7.221.188.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.31; Tue, 31 Oct 2023 20:35:37 +0800 From: Jie Hai To: , Yisen Zhuang , "Wei Hu (Xavier)" , Chengchang Tang , Chengwen Feng , Huisong Li CC: Subject: [PATCH 1/6] net/hns3: fix setting DCB capability Date: Tue, 31 Oct 2023 20:23:54 +0800 Message-ID: <20231031122359.3930935-2-haijie1@huawei.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20231031122359.3930935-1-haijie1@huawei.com> References: <20231031122359.3930935-1-haijie1@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.165.2] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To kwepemi500020.china.huawei.com (7.221.188.8) X-CFilter-Loop: Reflected X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Huisong Li The "hw->capability" is set after querying firmware and version. But the DCB capability of PF is set in other place. So this patch moves setting DCB capability to the place where all capabilities are set. Fixes: ab2e2e344163 ("net/hns3: get device capability in primary process") Cc: stable@dpdk.org Signed-off-by: Huisong Li Signed-off-by: Jie Hai --- drivers/net/hns3/hns3_cmd.c | 25 +++++++++++++++++++++++++ drivers/net/hns3/hns3_ethdev.c | 13 ------------- 2 files changed, 25 insertions(+), 13 deletions(-) diff --git a/drivers/net/hns3/hns3_cmd.c b/drivers/net/hns3/hns3_cmd.c index ca1d3f1b8c0d..62c55f347fa3 100644 --- a/drivers/net/hns3/hns3_cmd.c +++ b/drivers/net/hns3/hns3_cmd.c @@ -525,6 +525,28 @@ hns3_build_api_caps(void) return rte_cpu_to_le_32(api_caps); } +static void +hns3_set_dcb_capability(struct hns3_hw *hw) +{ + struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw); + struct rte_pci_device *pci_dev; + struct rte_eth_dev *eth_dev; + uint16_t device_id; + + if (hns->is_vf) + return; + + eth_dev = &rte_eth_devices[hw->data->port_id]; + pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); + device_id = pci_dev->id.device_id; + + if (device_id == HNS3_DEV_ID_25GE_RDMA || + device_id == HNS3_DEV_ID_50GE_RDMA || + device_id == HNS3_DEV_ID_100G_RDMA_MACSEC || + device_id == HNS3_DEV_ID_200G_RDMA) + hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_DCB_B, 1); +} + static int hns3_cmd_query_firmware_version_and_capability(struct hns3_hw *hw) { @@ -542,6 +564,9 @@ hns3_cmd_query_firmware_version_and_capability(struct hns3_hw *hw) return ret; hw->fw_version = rte_le_to_cpu_32(resp->firmware); + + hns3_set_dcb_capability(hw); + /* * Make sure mask the capability before parse capability because it * may overwrite resp's data. diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c index 964f47f1641e..29f9625b4036 100644 --- a/drivers/net/hns3/hns3_ethdev.c +++ b/drivers/net/hns3/hns3_ethdev.c @@ -2669,22 +2669,9 @@ static int hns3_get_capability(struct hns3_hw *hw) { struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw); - struct rte_pci_device *pci_dev; struct hns3_pf *pf = &hns->pf; - struct rte_eth_dev *eth_dev; - uint16_t device_id; int ret; - eth_dev = &rte_eth_devices[hw->data->port_id]; - pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); - device_id = pci_dev->id.device_id; - - if (device_id == HNS3_DEV_ID_25GE_RDMA || - device_id == HNS3_DEV_ID_50GE_RDMA || - device_id == HNS3_DEV_ID_100G_RDMA_MACSEC || - device_id == HNS3_DEV_ID_200G_RDMA) - hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_DCB_B, 1); - ret = hns3_get_pci_revision_id(hw, &hw->revision); if (ret) return ret; From patchwork Tue Oct 31 12:23:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jie Hai X-Patchwork-Id: 133661 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E842943252; Tue, 31 Oct 2023 13:35:41 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 67E27402E9; Tue, 31 Oct 2023 13:35:41 +0100 (CET) Received: from szxga02-in.huawei.com (szxga02-in.huawei.com [45.249.212.188]) by mails.dpdk.org (Postfix) with ESMTP id A86FB40294 for ; Tue, 31 Oct 2023 13:35:39 +0100 (CET) Received: from kwepemi500020.china.huawei.com (unknown [172.30.72.55]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4SKTyr5CwJzPnd8 for ; Tue, 31 Oct 2023 20:31:32 +0800 (CST) Received: from localhost.localdomain (10.67.165.2) by kwepemi500020.china.huawei.com (7.221.188.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.31; Tue, 31 Oct 2023 20:35:37 +0800 From: Jie Hai To: , Yisen Zhuang , Huisong Li , Chengwen Feng , Chengchang Tang , "Wei Hu (Xavier)" , "Min Hu (Connor)" CC: Subject: [PATCH 2/6] net/hns3: fix LRO offload to report Date: Tue, 31 Oct 2023 20:23:55 +0800 Message-ID: <20231031122359.3930935-3-haijie1@huawei.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20231031122359.3930935-1-haijie1@huawei.com> References: <20231031122359.3930935-1-haijie1@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.165.2] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To kwepemi500020.china.huawei.com (7.221.188.8) X-CFilter-Loop: Reflected X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Huisong Li Some network engines, like part of HIP09, may not support LRO offload, but this offload capability is also reported to user. So this patch determines whether driver reports this capability based on the capabilities from firmware. In addition, some network engines, like HIP08, always support LRO offload and their firmware don't report this capability. So this patch has to move getting revision ID codes to earlier stage and set default capabilities for these network engines based on revision ID. Fixes: ab2e2e344163 ("net/hns3: get device capability in primary process") Fixes: f5ed7d99cf45 ("net/hns3: extract common function to obtain revision ID") Cc: stable@dpdk.org Signed-off-by: Huisong Li Signed-off-by: Jie Hai --- drivers/net/hns3/hns3_cmd.c | 17 ++++++++++++++++- drivers/net/hns3/hns3_cmd.h | 1 + drivers/net/hns3/hns3_common.c | 5 +++-- drivers/net/hns3/hns3_dump.c | 3 ++- drivers/net/hns3/hns3_ethdev.c | 8 ++++---- drivers/net/hns3/hns3_ethdev.h | 1 + drivers/net/hns3/hns3_ethdev_vf.c | 8 ++++---- drivers/net/hns3/hns3_rxtx.c | 3 +++ 8 files changed, 34 insertions(+), 12 deletions(-) diff --git a/drivers/net/hns3/hns3_cmd.c b/drivers/net/hns3/hns3_cmd.c index 62c55f347fa3..a5c4c11dc8c4 100644 --- a/drivers/net/hns3/hns3_cmd.c +++ b/drivers/net/hns3/hns3_cmd.c @@ -513,6 +513,8 @@ hns3_parse_capability(struct hns3_hw *hw, hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_TM_B, 1); if (hns3_get_bit(caps, HNS3_CAPS_FC_AUTO_B)) hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_FC_AUTO_B, 1); + if (hns3_get_bit(caps, HNS3_CAPS_GRO_B)) + hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_GRO_B, 1); } static uint32_t @@ -547,6 +549,19 @@ hns3_set_dcb_capability(struct hns3_hw *hw) hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_DCB_B, 1); } +static void +hns3_set_default_capability(struct hns3_hw *hw) +{ + hns3_set_dcb_capability(hw); + + /* + * The firmware of the network engines with HIP08 do not report some + * capabilities, like GRO. Set default capabilities for it. + */ + if (hw->revision < PCI_REVISION_ID_HIP09_A) + hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_GRO_B, 1); +} + static int hns3_cmd_query_firmware_version_and_capability(struct hns3_hw *hw) { @@ -565,7 +580,7 @@ hns3_cmd_query_firmware_version_and_capability(struct hns3_hw *hw) hw->fw_version = rte_le_to_cpu_32(resp->firmware); - hns3_set_dcb_capability(hw); + hns3_set_default_capability(hw); /* * Make sure mask the capability before parse capability because it diff --git a/drivers/net/hns3/hns3_cmd.h b/drivers/net/hns3/hns3_cmd.h index 3f2bb4fd292c..79a8c1edad56 100644 --- a/drivers/net/hns3/hns3_cmd.h +++ b/drivers/net/hns3/hns3_cmd.h @@ -323,6 +323,7 @@ enum HNS3_CAPS_BITS { HNS3_CAPS_RAS_IMP_B, HNS3_CAPS_RXD_ADV_LAYOUT_B = 15, HNS3_CAPS_TM_B = 19, + HNS3_CAPS_GRO_B = 20, HNS3_CAPS_FC_AUTO_B = 30, }; diff --git a/drivers/net/hns3/hns3_common.c b/drivers/net/hns3/hns3_common.c index c4d47f43fe44..9327adbdc113 100644 --- a/drivers/net/hns3/hns3_common.c +++ b/drivers/net/hns3/hns3_common.c @@ -70,8 +70,7 @@ hns3_dev_infos_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *info) RTE_ETH_RX_OFFLOAD_SCATTER | RTE_ETH_RX_OFFLOAD_VLAN_STRIP | RTE_ETH_RX_OFFLOAD_VLAN_FILTER | - RTE_ETH_RX_OFFLOAD_RSS_HASH | - RTE_ETH_RX_OFFLOAD_TCP_LRO); + RTE_ETH_RX_OFFLOAD_RSS_HASH); info->tx_offload_capa = (RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM | RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | RTE_ETH_TX_OFFLOAD_TCP_CKSUM | @@ -99,6 +98,8 @@ hns3_dev_infos_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *info) if (hns3_dev_get_support(hw, PTP)) info->rx_offload_capa |= RTE_ETH_RX_OFFLOAD_TIMESTAMP; + if (hns3_dev_get_support(hw, GRO)) + info->rx_offload_capa |= RTE_ETH_RX_OFFLOAD_TCP_LRO; info->rx_desc_lim = (struct rte_eth_desc_lim) { .nb_max = HNS3_MAX_RING_DESC, diff --git a/drivers/net/hns3/hns3_dump.c b/drivers/net/hns3/hns3_dump.c index 5c21ff0a3318..cb369be5beb6 100644 --- a/drivers/net/hns3/hns3_dump.c +++ b/drivers/net/hns3/hns3_dump.c @@ -104,7 +104,8 @@ hns3_get_dev_feature_capability(FILE *file, struct hns3_hw *hw) {HNS3_DEV_SUPPORT_RAS_IMP_B, "RAS IMP"}, {HNS3_DEV_SUPPORT_TM_B, "TM"}, {HNS3_DEV_SUPPORT_VF_VLAN_FLT_MOD_B, "VF VLAN FILTER MOD"}, - {HNS3_DEV_SUPPORT_FC_AUTO_B, "FC AUTO"} + {HNS3_DEV_SUPPORT_FC_AUTO_B, "FC AUTO"}, + {HNS3_DEV_SUPPORT_GRO_B, "GRO"} }; uint32_t i; diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c index 29f9625b4036..08d6eed1990a 100644 --- a/drivers/net/hns3/hns3_ethdev.c +++ b/drivers/net/hns3/hns3_ethdev.c @@ -2672,10 +2672,6 @@ hns3_get_capability(struct hns3_hw *hw) struct hns3_pf *pf = &hns->pf; int ret; - ret = hns3_get_pci_revision_id(hw, &hw->revision); - if (ret) - return ret; - ret = hns3_query_mac_stats_reg_num(hw); if (ret) return ret; @@ -4532,6 +4528,10 @@ hns3_init_pf(struct rte_eth_dev *eth_dev) /* Get hardware io base address from pcie BAR2 IO space */ hw->io_base = pci_dev->mem_resource[2].addr; + ret = hns3_get_pci_revision_id(hw, &hw->revision); + if (ret) + return ret; + /* Firmware command queue initialize */ ret = hns3_cmd_init_queue(hw); if (ret) { diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h index c85a6912ada4..a3da395ea08d 100644 --- a/drivers/net/hns3/hns3_ethdev.h +++ b/drivers/net/hns3/hns3_ethdev.h @@ -888,6 +888,7 @@ enum hns3_dev_cap { HNS3_DEV_SUPPORT_TM_B, HNS3_DEV_SUPPORT_VF_VLAN_FLT_MOD_B, HNS3_DEV_SUPPORT_FC_AUTO_B, + HNS3_DEV_SUPPORT_GRO_B, }; #define hns3_dev_get_support(hw, _name) \ diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c index 007f5d619fbf..f5fc272a23bd 100644 --- a/drivers/net/hns3/hns3_ethdev_vf.c +++ b/drivers/net/hns3/hns3_ethdev_vf.c @@ -681,10 +681,6 @@ hns3vf_get_capability(struct hns3_hw *hw) { int ret; - ret = hns3_get_pci_revision_id(hw, &hw->revision); - if (ret) - return ret; - if (hw->revision < PCI_REVISION_ID_HIP09_A) { hns3_set_default_dev_specifications(hw); hw->intr.mapping_mode = HNS3_INTR_MAPPING_VEC_RSV_ONE; @@ -1337,6 +1333,10 @@ hns3vf_init_vf(struct rte_eth_dev *eth_dev) /* Get hardware io base address from pcie BAR2 IO space */ hw->io_base = pci_dev->mem_resource[2].addr; + ret = hns3_get_pci_revision_id(hw, &hw->revision); + if (ret) + return ret; + /* Firmware command queue initialize */ ret = hns3_cmd_init_queue(hw); if (ret) { diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c index f3c3b38c55d1..f31cf09c01d1 100644 --- a/drivers/net/hns3/hns3_rxtx.c +++ b/drivers/net/hns3/hns3_rxtx.c @@ -3119,6 +3119,9 @@ hns3_config_gro(struct hns3_hw *hw, bool en) struct hns3_cmd_desc desc; int ret; + if (!hns3_dev_get_support(hw, GRO)) + return 0; + hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_GRO_GENERIC_CONFIG, false); req = (struct hns3_cfg_gro_status_cmd *)desc.data; From patchwork Tue Oct 31 12:23:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jie Hai X-Patchwork-Id: 133666 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6AB2043252; Tue, 31 Oct 2023 13:36:20 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 7CEB9410E3; Tue, 31 Oct 2023 13:35:48 +0100 (CET) Received: from szxga01-in.huawei.com (szxga01-in.huawei.com [45.249.212.187]) by mails.dpdk.org (Postfix) with ESMTP id 81E3040608 for ; Tue, 31 Oct 2023 13:35:41 +0100 (CET) Received: from kwepemi500020.china.huawei.com (unknown [172.30.72.57]) by szxga01-in.huawei.com (SkyGuard) with ESMTP id 4SKTxq6p8LzvPyP; Tue, 31 Oct 2023 20:30:39 +0800 (CST) Received: from localhost.localdomain (10.67.165.2) by kwepemi500020.china.huawei.com (7.221.188.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.31; Tue, 31 Oct 2023 20:35:38 +0800 From: Jie Hai To: , Yisen Zhuang , "Min Hu (Connor)" , Hao Chen , Huisong Li , Chengwen Feng , Ferruh Yigit CC: Subject: [PATCH 3/6] net/hns3: fix return value Date: Tue, 31 Oct 2023 20:23:56 +0800 Message-ID: <20231031122359.3930935-4-haijie1@huawei.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20231031122359.3930935-1-haijie1@huawei.com> References: <20231031122359.3930935-1-haijie1@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.165.2] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To kwepemi500020.china.huawei.com (7.221.188.8) X-CFilter-Loop: Reflected X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org 1. Fix the return value of hns3_get_imissed_stats_num as 'uint16_t'. 2. Add some error check for return value. Fixes: fcba820d9b9e ("net/hns3: support flow director") Cc: stable@dpdk.org Signed-off-by: Jie Hai --- drivers/net/hns3/hns3_ethdev_vf.c | 5 ++++- drivers/net/hns3/hns3_fdir.c | 2 +- drivers/net/hns3/hns3_stats.c | 15 ++++++++++----- 3 files changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c index f5fc272a23bd..065eb63a893c 100644 --- a/drivers/net/hns3/hns3_ethdev_vf.c +++ b/drivers/net/hns3/hns3_ethdev_vf.c @@ -2082,8 +2082,11 @@ hns3vf_reinit_dev(struct hns3_adapter *hns) */ if (pci_dev->kdrv == RTE_PCI_KDRV_IGB_UIO || pci_dev->kdrv == RTE_PCI_KDRV_UIO_GENERIC) { - if (hns3vf_enable_msix(pci_dev, true)) + ret = hns3vf_enable_msix(pci_dev, true); + if (ret != 0) { hns3_err(hw, "Failed to enable msix"); + return ret; + } } rte_intr_enable(pci_dev->intr_handle); diff --git a/drivers/net/hns3/hns3_fdir.c b/drivers/net/hns3/hns3_fdir.c index c80fa59e63c8..d100e58d102b 100644 --- a/drivers/net/hns3/hns3_fdir.c +++ b/drivers/net/hns3/hns3_fdir.c @@ -978,7 +978,7 @@ int hns3_fdir_filter_program(struct hns3_adapter *hns, rule->key_conf.spec.src_port, rule->key_conf.spec.dst_port, ret); else - hns3_remove_fdir_filter(hw, fdir_info, &rule->key_conf); + ret = hns3_remove_fdir_filter(hw, fdir_info, &rule->key_conf); return ret; } diff --git a/drivers/net/hns3/hns3_stats.c b/drivers/net/hns3/hns3_stats.c index c2e692a2c50b..9a1e8935e5e4 100644 --- a/drivers/net/hns3/hns3_stats.c +++ b/drivers/net/hns3/hns3_stats.c @@ -771,7 +771,7 @@ hns3_mac_stats_reset(struct hns3_hw *hw) return 0; } -static int +static uint16_t hns3_get_imissed_stats_num(struct hns3_adapter *hns) { #define NO_IMISSED_STATS_NUM 0 @@ -993,7 +993,7 @@ hns3_imissed_stats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, struct hns3_adapter *hns = dev->data->dev_private; struct hns3_hw *hw = &hns->hw; struct hns3_rx_missed_stats *imissed_stats = &hw->imissed_stats; - int imissed_stats_num; + uint16_t imissed_stats_num; int cnt = *count; char *addr; uint16_t i; @@ -1170,7 +1170,7 @@ hns3_imissed_stats_name_get(struct rte_eth_dev *dev, { struct hns3_adapter *hns = dev->data->dev_private; uint32_t cnt = *count; - int imissed_stats_num; + uint16_t imissed_stats_num; uint16_t i; imissed_stats_num = hns3_get_imissed_stats_num(hns); @@ -1539,8 +1539,13 @@ hns3_stats_init(struct hns3_hw *hw) return ret; } - if (!hns->is_vf) - hns3_mac_stats_reset(hw); + if (!hns->is_vf) { + ret = hns3_mac_stats_reset(hw); + if (ret) { + hns3_err(hw, "reset mac stats failed, ret = %d", ret); + return ret; + } + } return hns3_tqp_stats_init(hw); } From patchwork Tue Oct 31 12:23:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jie Hai X-Patchwork-Id: 133665 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E6A0143252; Tue, 31 Oct 2023 13:36:12 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5EE3A40EDC; Tue, 31 Oct 2023 13:35:47 +0100 (CET) Received: from szxga08-in.huawei.com (szxga08-in.huawei.com [45.249.212.255]) by mails.dpdk.org (Postfix) with ESMTP id B48194026C for ; Tue, 31 Oct 2023 13:35:40 +0100 (CET) Received: from kwepemi500020.china.huawei.com (unknown [172.30.72.55]) by szxga08-in.huawei.com (SkyGuard) with ESMTP id 4SKV073CzZz1P7gM; Tue, 31 Oct 2023 20:32:39 +0800 (CST) Received: from localhost.localdomain (10.67.165.2) by kwepemi500020.china.huawei.com (7.221.188.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.31; Tue, 31 Oct 2023 20:35:39 +0800 From: Jie Hai To: , Yisen Zhuang , Huisong Li , Chunsong Feng , Hao Chen , Ferruh Yigit , "Min Hu (Connor)" CC: , Subject: [PATCH 4/6] net/hns3: fix some error log Date: Tue, 31 Oct 2023 20:23:57 +0800 Message-ID: <20231031122359.3930935-5-haijie1@huawei.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20231031122359.3930935-1-haijie1@huawei.com> References: <20231031122359.3930935-1-haijie1@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.165.2] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To kwepemi500020.china.huawei.com (7.221.188.8) X-CFilter-Loop: Reflected X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch fixes some error log. Fixes: 62e3ccc2b94c ("net/hns3: support flow control") Cc: stable@dpdk.org Signed-off-by: Jie Hai --- drivers/net/hns3/hns3_dcb.c | 2 +- drivers/net/hns3/hns3_flow.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/hns3/hns3_dcb.c b/drivers/net/hns3/hns3_dcb.c index 07b8c46a8137..2831d3dc6205 100644 --- a/drivers/net/hns3/hns3_dcb.c +++ b/drivers/net/hns3/hns3_dcb.c @@ -1082,7 +1082,7 @@ hns3_dcb_map_cfg(struct hns3_hw *hw) ret = hns3_pg_to_pri_map(hw); if (ret) { - hns3_err(hw, "pri_to_pg mapping fail: %d", ret); + hns3_err(hw, "pg_to_pri mapping fail: %d", ret); return ret; } diff --git a/drivers/net/hns3/hns3_flow.c b/drivers/net/hns3/hns3_flow.c index a5a7e452d8e3..7fbe65313ca2 100644 --- a/drivers/net/hns3/hns3_flow.c +++ b/drivers/net/hns3/hns3_flow.c @@ -927,7 +927,7 @@ hns3_parse_sctp(const struct rte_flow_item *item, struct hns3_fdir_rule *rule, return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM_MASK, item, - "Only support src & dst port in SCTP"); + "Only support src & dst port & v-tag in SCTP"); if (sctp_mask->hdr.src_port) { hns3_set_bit(rule->input_set, INNER_SRC_PORT, 1); rule->key_conf.mask.src_port = From patchwork Tue Oct 31 12:23:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jie Hai X-Patchwork-Id: 133663 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id F14B143252; Tue, 31 Oct 2023 13:35:58 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0C20240DDE; Tue, 31 Oct 2023 13:35:45 +0100 (CET) Received: from szxga02-in.huawei.com (szxga02-in.huawei.com [45.249.212.188]) by mails.dpdk.org (Postfix) with ESMTP id 180B240294 for ; Tue, 31 Oct 2023 13:35:41 +0100 (CET) Received: from kwepemi500020.china.huawei.com (unknown [172.30.72.55]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4SKTyt2gBczPnnh for ; Tue, 31 Oct 2023 20:31:34 +0800 (CST) Received: from localhost.localdomain (10.67.165.2) by kwepemi500020.china.huawei.com (7.221.188.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.31; Tue, 31 Oct 2023 20:35:39 +0800 From: Jie Hai To: , Yisen Zhuang , Dongdong Liu , Huisong Li CC: Subject: [PATCH 5/6] net/hns3: do not export API for setting and getting algo and key Date: Tue, 31 Oct 2023 20:23:58 +0800 Message-ID: <20231031122359.3930935-6-haijie1@huawei.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20231031122359.3930935-1-haijie1@huawei.com> References: <20231031122359.3930935-1-haijie1@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.165.2] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To kwepemi500020.china.huawei.com (7.221.188.8) X-CFilter-Loop: Reflected X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The functions "hns3_rss_set_algo_key()" and "hns3_rss_get_algo_key()" are the inner interfaces to set hardware. Driver already had an API, "hns3_update_rss_algo_key()", to export and to update RSS algo or key. So above two innter interface don't export. Fixes: 7da415d27d88 ("net/hns3: use hardware config to report hash key") Cc: stable@dpdk.org Signed-off-by: Jie Hai --- drivers/net/hns3/hns3_rss.c | 4 ++-- drivers/net/hns3/hns3_rss.h | 4 ---- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/net/hns3/hns3_rss.c b/drivers/net/hns3/hns3_rss.c index 6126512bd780..9bb84262563c 100644 --- a/drivers/net/hns3/hns3_rss.c +++ b/drivers/net/hns3/hns3_rss.c @@ -283,7 +283,7 @@ static const struct { * rss_generic_config command function, opcode:0x0D01. * Used to set algorithm and hash key of RSS. */ -int +static int hns3_rss_set_algo_key(struct hns3_hw *hw, uint8_t hash_algo, const uint8_t *key, uint8_t key_len) { @@ -324,7 +324,7 @@ hns3_rss_set_algo_key(struct hns3_hw *hw, uint8_t hash_algo, return 0; } -int +static int hns3_rss_get_algo_key(struct hns3_hw *hw, uint8_t *hash_algo, uint8_t *key, uint8_t key_len) { diff --git a/drivers/net/hns3/hns3_rss.h b/drivers/net/hns3/hns3_rss.h index 415430a39948..9d182a8025c5 100644 --- a/drivers/net/hns3/hns3_rss.h +++ b/drivers/net/hns3/hns3_rss.h @@ -190,10 +190,6 @@ bool hns3_check_rss_types_valid(struct hns3_hw *hw, uint64_t types); int hns3_set_rss_tuple_by_rss_hf(struct hns3_hw *hw, uint64_t rss_hf); int hns3_set_rss_tuple_field(struct hns3_hw *hw, uint64_t tuple_fields); int hns3_get_rss_tuple_field(struct hns3_hw *hw, uint64_t *tuple_fields); -int hns3_rss_set_algo_key(struct hns3_hw *hw, uint8_t hash_algo, - const uint8_t *key, uint8_t key_len); -int hns3_rss_get_algo_key(struct hns3_hw *hw, uint8_t *hash_algo, - uint8_t *key, uint8_t key_len); uint64_t hns3_rss_calc_tuple_filed(uint64_t rss_hf); int hns3_update_rss_algo_key(struct hns3_hw *hw, uint8_t hash_algo, uint8_t *key, uint8_t key_len); From patchwork Tue Oct 31 12:23:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jie Hai X-Patchwork-Id: 133664 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4D34843252; Tue, 31 Oct 2023 13:36:06 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2224140E36; Tue, 31 Oct 2023 13:35:46 +0100 (CET) Received: from szxga01-in.huawei.com (szxga01-in.huawei.com [45.249.212.187]) by mails.dpdk.org (Postfix) with ESMTP id 9285A40633 for ; Tue, 31 Oct 2023 13:35:41 +0100 (CET) Received: from kwepemi500020.china.huawei.com (unknown [172.30.72.55]) by szxga01-in.huawei.com (SkyGuard) with ESMTP id 4SKTxs3VTJzvQ7Q for ; Tue, 31 Oct 2023 20:30:41 +0800 (CST) Received: from localhost.localdomain (10.67.165.2) by kwepemi500020.china.huawei.com (7.221.188.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.31; Tue, 31 Oct 2023 20:35:40 +0800 From: Jie Hai To: , Yisen Zhuang , Dongdong Liu , Huisong Li CC: Subject: [PATCH 6/6] net/hns3: fix uninitialized value Date: Tue, 31 Oct 2023 20:23:59 +0800 Message-ID: <20231031122359.3930935-7-haijie1@huawei.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: <20231031122359.3930935-1-haijie1@huawei.com> References: <20231031122359.3930935-1-haijie1@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.165.2] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To kwepemi500020.china.huawei.com (7.221.188.8) X-CFilter-Loop: Reflected X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch initializes "hash_algo" as zero to avoid using it uninitialized. Fixes: e3069658da9f ("net/hns3: reimplement hash flow function" Cc: stable@dpdk.org Signed-off-by: Jie Hai --- drivers/net/hns3/hns3_rss.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/hns3/hns3_rss.c b/drivers/net/hns3/hns3_rss.c index 9bb84262563c..eeeca71a5c1a 100644 --- a/drivers/net/hns3/hns3_rss.c +++ b/drivers/net/hns3/hns3_rss.c @@ -771,7 +771,7 @@ hns3_dev_rss_hash_conf_get(struct rte_eth_dev *dev, { struct hns3_adapter *hns = dev->data->dev_private; struct hns3_hw *hw = &hns->hw; - uint8_t hash_algo; + uint8_t hash_algo = 0; int ret; rte_spinlock_lock(&hw->lock); @@ -993,7 +993,7 @@ hns3_update_rss_algo_key(struct hns3_hw *hw, uint8_t hash_func, { uint8_t rss_key[HNS3_RSS_KEY_SIZE_MAX] = {0}; bool modify_key, modify_algo; - uint8_t hash_algo; + uint8_t hash_algo = 0; int ret; modify_key = (key != NULL && key_len > 0);