From patchwork Mon Oct 9 12:02:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Amit Prakash Shukla X-Patchwork-Id: 132422 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A5A8E4233C; Mon, 9 Oct 2023 14:03:07 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 93AB040691; Mon, 9 Oct 2023 14:03:07 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 247FC40691 for ; Mon, 9 Oct 2023 14:03:05 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 398NU4ma010336; Mon, 9 Oct 2023 05:03:05 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type : content-transfer-encoding; s=pfpt0220; bh=6cHAIhPn9MrK8xuuZ3YvzO3/UZRbEigCrq/LMoZ8I84=; b=EaBKKzBxs/vXk8GKneHVGDNdklI86Up7c4KS0kunCm4aDaUWXecI8E1gPDSexYyvQ7Wp vAdIcD0A6/pKRjv34ud9QsSSu/A0HcxkPqvwlVFnpIN18X0sbjlNj8elNa8n3Xmnp741 M1rWPF0Il7HIyCxBUm7H+8S62GAYUKADaBr7xiXnRr1/livEkxLRdtthFzjXSkPxdh8t dsjNibQdSmjTor0QftFi12EUrkBp1IaINMzFSZVbr+GeW14TuyKwxi34nqsUU9l4taAO D7qktageoYxtNXKU9X+jDLAtT2I6N/FoV6rkY/rNbv/qEfLSMIRho5GxgzQA4eJtWqnB 1A== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3tkh9sm35k-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 09 Oct 2023 05:03:05 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Mon, 9 Oct 2023 05:03:03 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Mon, 9 Oct 2023 05:03:03 -0700 Received: from localhost.localdomain (unknown [10.28.36.157]) by maili.marvell.com (Postfix) with ESMTP id 30D353F7051; Mon, 9 Oct 2023 05:02:58 -0700 (PDT) From: Amit Prakash Shukla To: Chengwen Feng , Kevin Laatz , Bruce Richardson CC: , , , , , , , , , , , Amit Prakash Shukla Subject: [PATCH v4 1/2] dmadev: offload to auto free DMA buffer Date: Mon, 9 Oct 2023 17:32:35 +0530 Message-ID: <20231009120236.1641008-2-amitprakashs@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231009120236.1641008-1-amitprakashs@marvell.com> References: <20230928115031.259592-1-amitprakashs@marvell.com> <20231009120236.1641008-1-amitprakashs@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: 1wyXw3UQy8tjkXA3O4ty4EVqrATok_fB X-Proofpoint-ORIG-GUID: 1wyXw3UQy8tjkXA3O4ty4EVqrATok_fB X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-09_11,2023-10-09_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This changeset adds support in DMA library to auto free DMA buffer by hardware. On a supported hardware, application can pass on the mempool information as part of vchan config. Signed-off-by: Amit Prakash Shukla Acked-by: Morten Brørup Acked-by: Anoob Joseph Acked-by: Chengwen Feng Acked-by: Chengwen Feng Signed-off-by: Amit Prakash Shukla Acked-by: Morten Brørup Acked-by: Anoob Joseph --- lib/dmadev/rte_dmadev.h | 43 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/lib/dmadev/rte_dmadev.h b/lib/dmadev/rte_dmadev.h index b157ab7600..493263a5d6 100644 --- a/lib/dmadev/rte_dmadev.h +++ b/lib/dmadev/rte_dmadev.h @@ -269,6 +269,14 @@ int16_t rte_dma_next_dev(int16_t start_dev_id); * must ensure that all memory addresses are valid and accessible by HW. */ #define RTE_DMA_CAPA_HANDLES_ERRORS RTE_BIT64(6) +/** Support auto free for source buffer once mem to dev transfer is completed. + * + * @note Even though the DMA driver has this capability, it may not support all + * mempool drivers. If the mempool is not supported by the DMA driver, + * rte_dma_vchan_setup() will fail. + */ +#define RTE_DMA_CAPA_M2D_AUTO_FREE RTE_BIT64(7) + /** Support copy operation. * This capability start with index of 32, so that it could leave gap between * normal capability and ops capability. @@ -552,6 +560,26 @@ struct rte_dma_port_param { uint64_t reserved[2]; /**< Reserved for future fields. */ }; +/** + * A structure used for offload auto free params. + */ +struct rte_dma_auto_free_param { + union { + struct { + /** + * Mempool from which buffer is allocated. Mempool info + * is used for freeing buffer by hardware. + * + * @note If the mempool is not supported by the DMA device, + * rte_dma_vchan_setup() will fail. + */ + struct rte_mempool *pool; + } m2d; + }; + /** Reserved for future fields. */ + uint64_t reserved[2]; +}; + /** * A structure used to configure a virtual DMA channel. * @@ -581,6 +609,14 @@ struct rte_dma_vchan_conf { * @see struct rte_dma_port_param */ struct rte_dma_port_param dst_port; + /** Buffer params to auto free buffer by hardware. To free the buffer + * by hardware, RTE_DMA_OP_FLAG_AUTO_FREE must be set while calling + * rte_dma_copy and rte_dma_copy_sg(). + * + * @see RTE_DMA_OP_FLAG_AUTO_FREE + * @see struct rte_dma_auto_free_param + */ + struct rte_dma_auto_free_param auto_free; }; /** @@ -818,6 +854,13 @@ struct rte_dma_sge { * capability bit for this, driver should not return error if this flag was set. */ #define RTE_DMA_OP_FLAG_LLC RTE_BIT64(2) +/** Auto free buffer flag. + * Operation with this flag must issue command to hardware to free the DMA + * buffer after DMA transfer is completed. + * + * @see struct rte_dma_vchan_conf::auto_free + */ +#define RTE_DMA_OP_FLAG_AUTO_FREE RTE_BIT64(3) /**@}*/ /** From patchwork Mon Oct 9 12:02:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Prakash Shukla X-Patchwork-Id: 132423 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D222C4233C; Mon, 9 Oct 2023 14:03:16 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id BFE5D40689; Mon, 9 Oct 2023 14:03:16 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 810D64026B for ; Mon, 9 Oct 2023 14:03:15 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 399Bvni2019293; Mon, 9 Oct 2023 05:03:14 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=OuihhCm5Su8F5V7Nrs/35Dd01hm6gVeQvqfRsPJttco=; b=P155wV1AulbmZhML2SjOqEY/2Mfyj/D2Vbl7qa0Z9XP1CeKqM3GmoOIt3DZwWMkb/fSw AXHfsI+PmaUnL0tT/RWl3g68yVkyhmJ0e4dT7ne3ZMSoiRJXZjnYuApldiMQrbGg9l6V /SQYdIztE1a89oxHk4ECXj0dK9iHXIdXes126zVrp1Ll2F/QKMzJyg1Bgm6v4P94bgBd ovVw69EpfQLKqZx/j62Kxqgw8WpXyVEK6rBns9CIA4RHf9e02gLSkQ9atj+JxjOCOhGC SPsVcKl3CjBT8n+O9+r3QQgLI/55q7r3nFFS/5xdgByjz1garK2LKb5b9UjJQni59oWB LQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3tkh9sm36p-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 09 Oct 2023 05:03:14 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Mon, 9 Oct 2023 05:03:12 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Mon, 9 Oct 2023 05:03:12 -0700 Received: from localhost.localdomain (unknown [10.28.36.157]) by maili.marvell.com (Postfix) with ESMTP id 02D0B3F70AF; Mon, 9 Oct 2023 05:03:07 -0700 (PDT) From: Amit Prakash Shukla To: Chengwen Feng , Kevin Laatz , Bruce Richardson CC: , , , , , , , , , , , Amit Prakash Shukla Subject: [PATCH v4 2/2] test/dma: auto free offload test to free DMA buffer Date: Mon, 9 Oct 2023 17:32:36 +0530 Message-ID: <20231009120236.1641008-3-amitprakashs@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231009120236.1641008-1-amitprakashs@marvell.com> References: <20230928115031.259592-1-amitprakashs@marvell.com> <20231009120236.1641008-1-amitprakashs@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: PYW4JAcpRAM_aQGd7Hho2Mq97ryLAQM- X-Proofpoint-ORIG-GUID: PYW4JAcpRAM_aQGd7Hho2Mq97ryLAQM- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-09_11,2023-10-09_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add a test case to validate the functionality of drivers' dma buffer offload auto free. As part of dmadev_autotest, test case will be executed only if the driver supports buffer offload auto free and if the test is exported by env variable DPDK_ADD_DMA_TEST. Signed-off-by: Amit Prakash Shukla Acked-by: Anoob Joseph --- app/test/test_dmadev.c | 167 ++++++++++++++++++++++++++++++++++++++++- 1 file changed, 166 insertions(+), 1 deletion(-) diff --git a/app/test/test_dmadev.c b/app/test/test_dmadev.c index 6ef875e545..216f84b6bb 100644 --- a/app/test/test_dmadev.c +++ b/app/test/test_dmadev.c @@ -18,11 +18,37 @@ #define ERR_RETURN(...) do { print_err(__func__, __LINE__, __VA_ARGS__); return -1; } while (0) +#define TEST_RINGSIZE 512 #define COPY_LEN 1024 static struct rte_mempool *pool; static uint16_t id_count; +enum { + TEST_PARAM_REMOTE_ADDR = 0, + TEST_PARAM_MAX, +}; + +static const char * const dma_test_param[] = { + [TEST_PARAM_REMOTE_ADDR] = "remote_addr", +}; + +static uint64_t env_test_param[TEST_PARAM_MAX]; + +enum { + TEST_M2D_AUTO_FREE = 0, + TEST_MAX, +}; + +struct dma_add_test { + const char *name; + bool enabled; +}; + +struct dma_add_test dma_add_test[] = { + [TEST_M2D_AUTO_FREE] = {.name = "m2d_auto_free", .enabled = false}, +}; + static void __rte_format_printf(3, 4) print_err(const char *func, int lineno, const char *format, ...) @@ -797,10 +823,103 @@ test_burst_capacity(int16_t dev_id, uint16_t vchan) return 0; } +static int +test_m2d_auto_free(int16_t dev_id, uint16_t vchan) +{ +#define NR_MBUF 256 + struct rte_mbuf *src[NR_MBUF], *dst[NR_MBUF]; + const struct rte_dma_vchan_conf qconf = { + .direction = RTE_DMA_DIR_MEM_TO_DEV, + .nb_desc = TEST_RINGSIZE, + .auto_free.m2d.pool = pool, + .dst_port.port_type = RTE_DMA_PORT_PCIE, + .dst_port.pcie.coreid = 0, + }; + uint32_t buf_cnt1, buf_cnt2; + struct rte_mempool_ops *ops; + static bool dev_init; + uint16_t nb_done = 0; + bool dma_err = false; + int retry = 100; + int i, ret = 0; + + if (!dev_init) { + /* Stop the device to reconfigure vchan. */ + if (rte_dma_stop(dev_id) < 0) + ERR_RETURN("Error stopping device %u\n", dev_id); + + if (rte_dma_vchan_setup(dev_id, vchan, &qconf) < 0) + ERR_RETURN("Error with queue configuration\n"); + + if (rte_dma_start(dev_id) != 0) + ERR_RETURN("Error with rte_dma_start()\n"); + + dev_init = true; + } + + if (rte_pktmbuf_alloc_bulk(pool, dst, NR_MBUF) != 0) + ERR_RETURN("alloc dst mbufs failed.\n"); + + for (i = 0; i < NR_MBUF; i++) { + /* Using mbuf structure to hold remote iova address. */ + rte_mbuf_iova_set(dst[i], (rte_iova_t)env_test_param[TEST_PARAM_REMOTE_ADDR]); + dst[i]->data_off = 0; + } + + /* Capture buffer count before allocating source buffer. */ + ops = rte_mempool_get_ops(pool->ops_index); + buf_cnt1 = ops->get_count(pool); + + if (rte_pktmbuf_alloc_bulk(pool, src, NR_MBUF) != 0) { + printf("alloc src mbufs failed.\n"); + ret = -1; + goto done; + } + + if ((buf_cnt1 - NR_MBUF) != ops->get_count(pool)) { + printf("Buffer count check failed.\n"); + ret = -1; + goto done; + } + + for (i = 0; i < NR_MBUF; i++) { + ret = rte_dma_copy(dev_id, vchan, rte_mbuf_data_iova(src[i]), + rte_mbuf_data_iova(dst[i]), COPY_LEN, + RTE_DMA_OP_FLAG_AUTO_FREE); + + if (ret < 0) { + printf("rte_dma_copy returned error.\n"); + goto done; + } + } + + rte_dma_submit(dev_id, vchan); + do { + nb_done += rte_dma_completed(dev_id, vchan, (NR_MBUF - nb_done), NULL, &dma_err); + if (dma_err) + break; + /* Sleep for 1 millisecond */ + rte_delay_us_sleep(1000); + } while (retry-- && (nb_done < NR_MBUF)); + + buf_cnt2 = ops->get_count(pool); + if ((buf_cnt1 != buf_cnt2) || dma_err) { + printf("Free mem to dev buffer test failed.\n"); + ret = -1; + } + +done: + rte_pktmbuf_free_bulk(dst, NR_MBUF); + /* If the test passes source buffer will be freed in hardware. */ + if (ret < 0) + rte_pktmbuf_free_bulk(&src[nb_done], (NR_MBUF - nb_done)); + + return ret; +} + static int test_dmadev_instance(int16_t dev_id) { -#define TEST_RINGSIZE 512 #define CHECK_ERRS true struct rte_dma_stats stats; struct rte_dma_info info; @@ -890,6 +1009,13 @@ test_dmadev_instance(int16_t dev_id) else if (runtest("fill", test_enqueue_fill, 1, dev_id, vchan, CHECK_ERRS) < 0) goto err; + if ((info.dev_capa & RTE_DMA_CAPA_M2D_AUTO_FREE) && + dma_add_test[TEST_M2D_AUTO_FREE].enabled == true) { + if (runtest("m2d_auto_free", test_m2d_auto_free, 128, dev_id, vchan, + CHECK_ERRS) < 0) + goto err; + } + rte_mempool_free(pool); if (rte_dma_stop(dev_id) < 0) @@ -922,11 +1048,50 @@ test_apis(void) return ret; } +static void +parse_dma_env_var(void) +{ + char *dma_env_param_str = getenv("DPDK_ADD_DMA_TEST_PARAM"); + char *dma_env_test_str = getenv("DPDK_ADD_DMA_TEST"); + char *params[32] = {0}; + char *tests[32] = {0}; + char *var[2] = {0}; + int n_var = 0; + int i, j; + + /* Additional test from commandline. */ + if (dma_env_test_str && strlen(dma_env_test_str) > 0) { + n_var = rte_strsplit(dma_env_test_str, strlen(dma_env_test_str), tests, + RTE_DIM(tests), ','); + for (i = 0; i < n_var; i++) { + for (j = 0; j < TEST_MAX; j++) { + if (!strcmp(tests[i], dma_add_test[j].name)) + dma_add_test[j].enabled = true; + } + } + } + + /* Commandline variables for test */ + if (dma_env_param_str && strlen(dma_env_param_str) > 0) { + n_var = rte_strsplit(dma_env_param_str, strlen(dma_env_param_str), params, + RTE_DIM(params), ','); + for (i = 0; i < n_var; i++) { + rte_strsplit(params[i], strlen(params[i]), var, RTE_DIM(var), '='); + for (j = 0; j < TEST_PARAM_MAX; j++) { + if (!strcmp(var[0], dma_test_param[j])) + env_test_param[j] = strtoul(var[1], NULL, 16); + } + } + } +} + static int test_dma(void) { int i; + parse_dma_env_var(); + /* basic sanity on dmadev infrastructure */ if (test_apis() < 0) ERR_RETURN("Error performing API tests\n");