From patchwork Thu Jul 6 03:15:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhichao Zeng X-Patchwork-Id: 129324 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3EAC342DE1; Thu, 6 Jul 2023 05:09:19 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C2D0E40144; Thu, 6 Jul 2023 05:09:18 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mails.dpdk.org (Postfix) with ESMTP id 6D8B1400D5 for ; Thu, 6 Jul 2023 05:09:16 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1688612957; x=1720148957; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=MqY+vLmppYmtd5kzofiNLi3fMxupVxDic43g4a1tCgk=; b=UFISMdkP/D2d+5r4h8rDpK0XpFi6ZuMK0PMv0UO62HWKY73+1SN/w1+n /X6iJYKYo5dCg8WgmQxKlVOKyxbyj5z5wPue44olvr3Cpm/RzR9roI34Z JT6sr90s44sPmnGT8RxXPjBHkR7OsaCzPsMwRiM1Rldsgkm6fOfhJ/gSD fcqvwbu7brmTavJ79+C89w0UZS0FW9HtDVuveFMovnqGCfJvUiKrESqAr pRZLWgLGyHH8hL8AzdkFQkSjSVaXa22ru0GTwYhLKVlyuQpmXv7exheg0 28M59/7fwA7pQ0jw1Ep3io/t6+JlPXIRulb60U0lmchkd/DFueWKlhWw4 A==; X-IronPort-AV: E=McAfee;i="6600,9927,10762"; a="363521669" X-IronPort-AV: E=Sophos;i="6.01,184,1684825200"; d="scan'208";a="363521669" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Jul 2023 20:09:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10762"; a="748973256" X-IronPort-AV: E=Sophos;i="6.01,184,1684825200"; d="scan'208";a="748973256" Received: from unknown (HELO zhichao-dpdk..) ([10.239.252.103]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Jul 2023 20:09:11 -0700 From: Zhichao Zeng To: dev@dpdk.org Cc: qi.z.zhang@intel.com, ke1.xu@intel.com, Zhichao Zeng , Jingjing Wu , Beilei Xing , Wenzhuo Lu Subject: [PATCH] net/iavf: fix avx2 path selection Date: Thu, 6 Jul 2023 11:15:49 +0800 Message-Id: <20230706031549.1050771-1-zhichaox.zeng@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The AVX2 path does not support outer checksum offload, when AVX2 is forcibly selected and outer checksum offload is configured, the basic Tx path will be selected to ensure proper functionality. Fixes: 5712bf9d6e14 ("net/iavf: add Tx AVX2 offload path") Signed-off-by: Zhichao Zeng --- drivers/net/iavf/iavf_rxtx.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c index bf7e4546a8..f7df4665d1 100644 --- a/drivers/net/iavf/iavf_rxtx.c +++ b/drivers/net/iavf/iavf_rxtx.c @@ -3950,6 +3950,12 @@ iavf_set_tx_function(struct rte_eth_dev *dev) dev->tx_pkt_burst = iavf_xmit_pkts_vec_avx2; PMD_DRV_LOG(DEBUG, "Using AVX2 Vector Tx (port %d).", dev->data->port_id); + } else if (check_ret == IAVF_VECTOR_CTX_OFFLOAD_PATH) { + dev->tx_pkt_burst = iavf_xmit_pkts; + dev->tx_pkt_prepare = iavf_prep_pkts; + PMD_DRV_LOG(DEBUG, + "AVX2 does not support outer checksum offload, using Basic Tx (port %d).", + dev->data->port_id); } else { dev->tx_pkt_burst = iavf_xmit_pkts_vec_avx2_offload; dev->tx_pkt_prepare = iavf_prep_pkts;