From patchwork Tue Apr 18 05:30:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chenbo Xia X-Patchwork-Id: 126214 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5D3C142977; Tue, 18 Apr 2023 07:49:34 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4F6CE42D16; Tue, 18 Apr 2023 07:49:34 +0200 (CEST) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by mails.dpdk.org (Postfix) with ESMTP id 7618742D10 for ; Tue, 18 Apr 2023 07:49:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1681796972; x=1713332972; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=ptqq+PUJftEW6qyLtS2koiugOWVd9MPhOnycYbnI4iw=; b=PbPQh2bEUVIKzCGUqWcMWUMX9ZEyXJ6zXHOcW4UkiplEvbluI2UXpEzn y0J7gUbKgcXwFQr4nYZ1moZPHqXm4dNrZRcaf2BIrR1Wf93hYMM+VS+Ht bY1AqRIWpHq1tIeJ6aOYCNoPR1HFDcBD59N5ZkIk9NpNd4pQVND6BR137 +THjTqA06gWHlGuvIIKqBNzHN5/JWhP1r7usV5hiaaUAXT91ogHbArBSG iAayErKkvkH7Y/mVeFEwo7CKFAFfC+w7cO5XACyZXSoS0lbcl4Acmp/2b Q83yrIBC3Ofl1y+R6fgUghwX/2JtBDdZrK7CZMbGgr0cThSkwIbWSuXZ3 w==; X-IronPort-AV: E=McAfee;i="6600,9927,10683"; a="407978650" X-IronPort-AV: E=Sophos;i="5.99,206,1677571200"; d="scan'208";a="407978650" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2023 22:49:31 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10683"; a="668373208" X-IronPort-AV: E=Sophos;i="5.99,206,1677571200"; d="scan'208";a="668373208" Received: from npg-dpdk-virtio-xiachenbo-nw.sh.intel.com ([10.67.119.79]) by orsmga006.jf.intel.com with ESMTP; 17 Apr 2023 22:49:30 -0700 From: Chenbo Xia To: dev@dpdk.org Cc: skori@marvell.com Subject: [RFC 1/4] bus/pci: introduce an internal representation of PCI device Date: Tue, 18 Apr 2023 13:30:09 +0800 Message-Id: <20230418053012.10667-2-chenbo.xia@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230418053012.10667-1-chenbo.xia@intel.com> References: <20230418053012.10667-1-chenbo.xia@intel.com> X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch introduces an internal representation of the PCI device which will be used to store the internal information that don't have to be exposed to drivers, e.g., the VFIO region sizes/offsets. In this patch, the internal structure is simply a wrapper of the rte_pci_device structure. More fields will be added. Signed-off-by: Chenbo Xia --- drivers/bus/pci/bsd/pci.c | 13 ++++++++----- drivers/bus/pci/linux/pci.c | 28 ++++++++++++++++------------ drivers/bus/pci/pci_common.c | 12 ++++++------ drivers/bus/pci/private.h | 14 +++++++++++++- 4 files changed, 43 insertions(+), 24 deletions(-) diff --git a/drivers/bus/pci/bsd/pci.c b/drivers/bus/pci/bsd/pci.c index 7459d15c7e..a747eca58c 100644 --- a/drivers/bus/pci/bsd/pci.c +++ b/drivers/bus/pci/bsd/pci.c @@ -208,16 +208,19 @@ pci_uio_map_resource_by_index(struct rte_pci_device *dev, int res_idx, static int pci_scan_one(int dev_pci_fd, struct pci_conf *conf) { + struct rte_pci_device_internal *pdev; struct rte_pci_device *dev; struct pci_bar_io bar; unsigned i, max; - dev = malloc(sizeof(*dev)); - if (dev == NULL) { + pdev = malloc(sizeof(*pdev)); + if (pdev == NULL) { + RTE_LOG(ERR, EAL, "Cannot allocate memory for internal pci device\n"); return -1; } - memset(dev, 0, sizeof(*dev)); + memset(pdev, 0, sizeof(*pdev)); + dev = &pdev->device; dev->device.bus = &rte_pci_bus.bus; dev->addr.domain = conf->pc_sel.pc_domain; @@ -303,7 +306,7 @@ pci_scan_one(int dev_pci_fd, struct pci_conf *conf) memmove(dev2->mem_resource, dev->mem_resource, sizeof(dev->mem_resource)); - pci_free(dev); + pci_free(pdev); } return 0; } @@ -313,7 +316,7 @@ pci_scan_one(int dev_pci_fd, struct pci_conf *conf) return 0; skipdev: - pci_free(dev); + pci_free(pdev); return 0; } diff --git a/drivers/bus/pci/linux/pci.c b/drivers/bus/pci/linux/pci.c index ebd1395502..4c2c5ba382 100644 --- a/drivers/bus/pci/linux/pci.c +++ b/drivers/bus/pci/linux/pci.c @@ -211,22 +211,26 @@ pci_scan_one(const char *dirname, const struct rte_pci_addr *addr) { char filename[PATH_MAX]; unsigned long tmp; + struct rte_pci_device_internal *pdev; struct rte_pci_device *dev; char driver[PATH_MAX]; int ret; - dev = malloc(sizeof(*dev)); - if (dev == NULL) + pdev = malloc(sizeof(*pdev)); + if (pdev == NULL) { + RTE_LOG(ERR, EAL, "Cannot allocate memory for internal pci device\n"); return -1; + } - memset(dev, 0, sizeof(*dev)); + memset(pdev, 0, sizeof(*pdev)); + dev = &pdev->device; dev->device.bus = &rte_pci_bus.bus; dev->addr = *addr; /* get vendor id */ snprintf(filename, sizeof(filename), "%s/vendor", dirname); if (eal_parse_sysfs_value(filename, &tmp) < 0) { - pci_free(dev); + pci_free(pdev); return -1; } dev->id.vendor_id = (uint16_t)tmp; @@ -234,7 +238,7 @@ pci_scan_one(const char *dirname, const struct rte_pci_addr *addr) /* get device id */ snprintf(filename, sizeof(filename), "%s/device", dirname); if (eal_parse_sysfs_value(filename, &tmp) < 0) { - pci_free(dev); + pci_free(pdev); return -1; } dev->id.device_id = (uint16_t)tmp; @@ -243,7 +247,7 @@ pci_scan_one(const char *dirname, const struct rte_pci_addr *addr) snprintf(filename, sizeof(filename), "%s/subsystem_vendor", dirname); if (eal_parse_sysfs_value(filename, &tmp) < 0) { - pci_free(dev); + pci_free(pdev); return -1; } dev->id.subsystem_vendor_id = (uint16_t)tmp; @@ -252,7 +256,7 @@ pci_scan_one(const char *dirname, const struct rte_pci_addr *addr) snprintf(filename, sizeof(filename), "%s/subsystem_device", dirname); if (eal_parse_sysfs_value(filename, &tmp) < 0) { - pci_free(dev); + pci_free(pdev); return -1; } dev->id.subsystem_device_id = (uint16_t)tmp; @@ -261,7 +265,7 @@ pci_scan_one(const char *dirname, const struct rte_pci_addr *addr) snprintf(filename, sizeof(filename), "%s/class", dirname); if (eal_parse_sysfs_value(filename, &tmp) < 0) { - pci_free(dev); + pci_free(pdev); return -1; } /* the least 24 bits are valid: class, subclass, program interface */ @@ -297,7 +301,7 @@ pci_scan_one(const char *dirname, const struct rte_pci_addr *addr) snprintf(filename, sizeof(filename), "%s/resource", dirname); if (pci_parse_sysfs_resource(filename, dev) < 0) { RTE_LOG(ERR, EAL, "%s(): cannot parse resource\n", __func__); - pci_free(dev); + pci_free(pdev); return -1; } @@ -306,7 +310,7 @@ pci_scan_one(const char *dirname, const struct rte_pci_addr *addr) ret = pci_get_kernel_driver_by_path(filename, driver, sizeof(driver)); if (ret < 0) { RTE_LOG(ERR, EAL, "Fail to get kernel driver\n"); - pci_free(dev); + pci_free(pdev); return -1; } @@ -320,7 +324,7 @@ pci_scan_one(const char *dirname, const struct rte_pci_addr *addr) else dev->kdrv = RTE_PCI_KDRV_UNKNOWN; } else { - pci_free(dev); + pci_free(pdev); return 0; } /* device is valid, add in list (sorted) */ @@ -375,7 +379,7 @@ pci_scan_one(const char *dirname, const struct rte_pci_addr *addr) pci_common_set(dev2); } } - pci_free(dev); + pci_free(pdev); } return 0; } diff --git a/drivers/bus/pci/pci_common.c b/drivers/bus/pci/pci_common.c index e32a9d517a..52404ab0fe 100644 --- a/drivers/bus/pci/pci_common.c +++ b/drivers/bus/pci/pci_common.c @@ -121,12 +121,12 @@ pci_common_set(struct rte_pci_device *dev) } void -pci_free(struct rte_pci_device *dev) +pci_free(struct rte_pci_device_internal *pdev) { - if (dev == NULL) + if (pdev == NULL) return; - free(dev->bus_info); - free(dev); + free(pdev->device.bus_info); + free(pdev); } /* map a particular resource from a file */ @@ -465,7 +465,7 @@ pci_cleanup(void) rte_intr_instance_free(dev->vfio_req_intr_handle); dev->vfio_req_intr_handle = NULL; - pci_free(dev); + pci_free(RTE_PCI_DEVICE_INTERNAL(dev)); } return error; @@ -681,7 +681,7 @@ pci_unplug(struct rte_device *dev) if (ret == 0) { rte_pci_remove_device(pdev); rte_devargs_remove(dev->devargs); - pci_free(pdev); + pci_free(RTE_PCI_DEVICE_INTERNAL(pdev)); } return ret; } diff --git a/drivers/bus/pci/private.h b/drivers/bus/pci/private.h index c8161a1074..b564646e03 100644 --- a/drivers/bus/pci/private.h +++ b/drivers/bus/pci/private.h @@ -13,6 +13,14 @@ #include #include +/* + * Convert struct rte_pci_device to struct rte_pci_device_internal + */ +#define RTE_PCI_DEVICE_INTERNAL(ptr) \ + container_of(ptr, struct rte_pci_device_internal, device) +#define RTE_PCI_DEVICE_INTERNAL_CONST(ptr) \ + container_of(ptr, const struct rte_pci_device_internal, device) + /** * Structure describing the PCI bus */ @@ -34,6 +42,10 @@ extern struct rte_pci_bus rte_pci_bus; struct rte_pci_driver; struct rte_pci_device; +struct rte_pci_device_internal { + struct rte_pci_device device; +}; + /** * Scan the content of the PCI bus, and the devices in the devices * list @@ -53,7 +65,7 @@ pci_common_set(struct rte_pci_device *dev); * Free a PCI device. */ void -pci_free(struct rte_pci_device *dev); +pci_free(struct rte_pci_device_internal *pdev); /** * Validate whether a device with given PCI address should be ignored or not. From patchwork Tue Apr 18 05:30:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chenbo Xia X-Patchwork-Id: 126215 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 23B0C42977; Tue, 18 Apr 2023 07:49:39 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4C4FF42D29; Tue, 18 Apr 2023 07:49:35 +0200 (CEST) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by mails.dpdk.org (Postfix) with ESMTP id D1AD142D10 for ; Tue, 18 Apr 2023 07:49:33 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1681796974; x=1713332974; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=SAn7rdw9AMneRQmP86TF8zg4GLGstj0zZHx+ld05RmE=; b=YezY2IF8W78z/kJmk0SnGB7PoDu8iR+FQiqRMmYGl8HDJu0i4xlGFy5o XmYwhciGyUEJJ25mLZUdahHv+K4uqiYXK6ZGC2niTt1utzvl10J2UCC3r Z7FCZDdZ75JnCZje9c6JGdsImE23nepBaY+q79/zSMvHgxNSA6UztQeX/ CX6pDkucdrS8290jvU5hzMp2QQ8Owv2Zzm4U1nrvWL5Oc1wQV5iRDb9Ho b9w2q57PWSNEQdKBjSHyQv6E8PRs6/+i2gGlvlBXC84Y0MEaQqyW2P7d8 MiXV8HqgHgJPAjaI9QLpG74xjSUOWRZn+Ah1e9WApD5RdyqkcVvUo0wgh w==; X-IronPort-AV: E=McAfee;i="6600,9927,10683"; a="407978655" X-IronPort-AV: E=Sophos;i="5.99,206,1677571200"; d="scan'208";a="407978655" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2023 22:49:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10683"; a="668373213" X-IronPort-AV: E=Sophos;i="5.99,206,1677571200"; d="scan'208";a="668373213" Received: from npg-dpdk-virtio-xiachenbo-nw.sh.intel.com ([10.67.119.79]) by orsmga006.jf.intel.com with ESMTP; 17 Apr 2023 22:49:31 -0700 From: Chenbo Xia To: dev@dpdk.org Cc: skori@marvell.com, Anatoly Burakov Subject: [RFC 2/4] bus/pci: avoid depending on private value in kernel source Date: Tue, 18 Apr 2023 13:30:10 +0800 Message-Id: <20230418053012.10667-3-chenbo.xia@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230418053012.10667-1-chenbo.xia@intel.com> References: <20230418053012.10667-1-chenbo.xia@intel.com> X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The value 40 used in VFIO_GET_REGION_ADDR() is a private value (VFIO_PCI_OFFSET_SHIFT) defined in Linux kernel source [1]. It is not part of VFIO API, and we should not depend on it. [1] https://github.com/torvalds/linux/blob/v6.2/include/linux/vfio_pci_core.h Signed-off-by: Chenbo Xia --- drivers/bus/pci/linux/pci.c | 4 +- drivers/bus/pci/linux/pci_init.h | 4 +- drivers/bus/pci/linux/pci_vfio.c | 195 +++++++++++++++++++++++-------- drivers/bus/pci/private.h | 9 ++ lib/eal/include/rte_vfio.h | 1 - 5 files changed, 158 insertions(+), 55 deletions(-) diff --git a/drivers/bus/pci/linux/pci.c b/drivers/bus/pci/linux/pci.c index 4c2c5ba382..04e21ae20f 100644 --- a/drivers/bus/pci/linux/pci.c +++ b/drivers/bus/pci/linux/pci.c @@ -645,7 +645,7 @@ int rte_pci_read_config(const struct rte_pci_device *device, return pci_uio_read_config(intr_handle, buf, len, offset); #ifdef VFIO_PRESENT case RTE_PCI_KDRV_VFIO: - return pci_vfio_read_config(intr_handle, buf, len, offset); + return pci_vfio_read_config(device, buf, len, offset); #endif default: rte_pci_device_name(&device->addr, devname, @@ -669,7 +669,7 @@ int rte_pci_write_config(const struct rte_pci_device *device, return pci_uio_write_config(intr_handle, buf, len, offset); #ifdef VFIO_PRESENT case RTE_PCI_KDRV_VFIO: - return pci_vfio_write_config(intr_handle, buf, len, offset); + return pci_vfio_write_config(device, buf, len, offset); #endif default: rte_pci_device_name(&device->addr, devname, diff --git a/drivers/bus/pci/linux/pci_init.h b/drivers/bus/pci/linux/pci_init.h index dcea726186..9f6659ba6e 100644 --- a/drivers/bus/pci/linux/pci_init.h +++ b/drivers/bus/pci/linux/pci_init.h @@ -66,9 +66,9 @@ int pci_uio_ioport_unmap(struct rte_pci_ioport *p); #endif /* access config space */ -int pci_vfio_read_config(const struct rte_intr_handle *intr_handle, +int pci_vfio_read_config(const struct rte_pci_device *dev, void *buf, size_t len, off_t offs); -int pci_vfio_write_config(const struct rte_intr_handle *intr_handle, +int pci_vfio_write_config(const struct rte_pci_device *dev, const void *buf, size_t len, off_t offs); int pci_vfio_ioport_map(struct rte_pci_device *dev, int bar, diff --git a/drivers/bus/pci/linux/pci_vfio.c b/drivers/bus/pci/linux/pci_vfio.c index fab3483d9f..1748ad2ae0 100644 --- a/drivers/bus/pci/linux/pci_vfio.c +++ b/drivers/bus/pci/linux/pci_vfio.c @@ -43,45 +43,82 @@ static struct rte_tailq_elem rte_vfio_tailq = { }; EAL_REGISTER_TAILQ(rte_vfio_tailq) +static int +pci_vfio_get_region(const struct rte_pci_device *dev, int index, + uint64_t *size, uint64_t *offset) +{ + const struct rte_pci_device_internal *pdev = + RTE_PCI_DEVICE_INTERNAL_CONST(dev); + + if (index >= VFIO_PCI_NUM_REGIONS || index >= RTE_MAX_PCI_REGIONS) + return -1; + + if (pdev->region[index].size == 0 && pdev->region[index].offset == 0) + return -1; + + *size = pdev->region[index].size; + *offset = pdev->region[index].offset; + + return 0; +} + int -pci_vfio_read_config(const struct rte_intr_handle *intr_handle, +pci_vfio_read_config(const struct rte_pci_device *dev, void *buf, size_t len, off_t offs) { - int vfio_dev_fd = rte_intr_dev_fd_get(intr_handle); + uint64_t size, offset; + int fd; - if (vfio_dev_fd < 0) + fd = rte_intr_dev_fd_get(dev->intr_handle); + + if (pci_vfio_get_region(dev, VFIO_PCI_CONFIG_REGION_INDEX, + &size, &offset) != 0) + return -1; + + if ((uint64_t)len + offs > size) return -1; - return pread64(vfio_dev_fd, buf, len, - VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + offs); + return pread64(fd, buf, len, offset + offs); } int -pci_vfio_write_config(const struct rte_intr_handle *intr_handle, +pci_vfio_write_config(const struct rte_pci_device *dev, const void *buf, size_t len, off_t offs) { - int vfio_dev_fd = rte_intr_dev_fd_get(intr_handle); + uint64_t size, offset; + int fd; - if (vfio_dev_fd < 0) + fd = rte_intr_dev_fd_get(dev->intr_handle); + + if (pci_vfio_get_region(dev, VFIO_PCI_CONFIG_REGION_INDEX, + &size, &offset) != 0) return -1; - return pwrite64(vfio_dev_fd, buf, len, - VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + offs); + if ((uint64_t)len + offs > size) + return -1; + + return pwrite64(fd, buf, len, offset + offs); } /* get PCI BAR number where MSI-X interrupts are */ static int -pci_vfio_get_msix_bar(int fd, struct pci_msix_table *msix_table) +pci_vfio_get_msix_bar(const struct rte_pci_device *dev, int fd, + struct pci_msix_table *msix_table) { int ret; uint32_t reg; uint16_t flags; uint8_t cap_id, cap_offset; + uint64_t size, offset; + + if (pci_vfio_get_region(dev, VFIO_PCI_CONFIG_REGION_INDEX, + &size, &offset) != 0) { + RTE_LOG(ERR, EAL, "Cannot get offset of CONFIG region.\n"); + return -1; + } /* read PCI capability pointer from config space */ - ret = pread64(fd, ®, sizeof(reg), - VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + - PCI_CAPABILITY_LIST); + ret = pread64(fd, ®, sizeof(reg), offset + PCI_CAPABILITY_LIST); if (ret != sizeof(reg)) { RTE_LOG(ERR, EAL, "Cannot read capability pointer from PCI config space!\n"); @@ -94,9 +131,7 @@ pci_vfio_get_msix_bar(int fd, struct pci_msix_table *msix_table) while (cap_offset) { /* read PCI capability ID */ - ret = pread64(fd, ®, sizeof(reg), - VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + - cap_offset); + ret = pread64(fd, ®, sizeof(reg), offset + cap_offset); if (ret != sizeof(reg)) { RTE_LOG(ERR, EAL, "Cannot read capability ID from PCI config space!\n"); @@ -108,9 +143,7 @@ pci_vfio_get_msix_bar(int fd, struct pci_msix_table *msix_table) /* if we haven't reached MSI-X, check next capability */ if (cap_id != PCI_CAP_ID_MSIX) { - ret = pread64(fd, ®, sizeof(reg), - VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + - cap_offset); + ret = pread64(fd, ®, sizeof(reg), offset + cap_offset); if (ret != sizeof(reg)) { RTE_LOG(ERR, EAL, "Cannot read capability pointer from PCI config space!\n"); @@ -125,18 +158,14 @@ pci_vfio_get_msix_bar(int fd, struct pci_msix_table *msix_table) /* else, read table offset */ else { /* table offset resides in the next 4 bytes */ - ret = pread64(fd, ®, sizeof(reg), - VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + - cap_offset + 4); + ret = pread64(fd, ®, sizeof(reg), offset + cap_offset + 4); if (ret != sizeof(reg)) { RTE_LOG(ERR, EAL, "Cannot read table offset from PCI config space!\n"); return -1; } - ret = pread64(fd, &flags, sizeof(flags), - VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + - cap_offset + 2); + ret = pread64(fd, &flags, sizeof(flags), offset + cap_offset + 2); if (ret != sizeof(flags)) { RTE_LOG(ERR, EAL, "Cannot read table flags from PCI config space!\n"); @@ -156,14 +185,19 @@ pci_vfio_get_msix_bar(int fd, struct pci_msix_table *msix_table) /* enable PCI bus memory space */ static int -pci_vfio_enable_bus_memory(int dev_fd) +pci_vfio_enable_bus_memory(struct rte_pci_device *dev, int dev_fd) { + uint64_t size, offset; uint16_t cmd; int ret; - ret = pread64(dev_fd, &cmd, sizeof(cmd), - VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + - PCI_COMMAND); + if (pci_vfio_get_region(dev, VFIO_PCI_CONFIG_REGION_INDEX, + &size, &offset) != 0) { + RTE_LOG(ERR, EAL, "Cannot get offset of CONFIG region.\n"); + return -1; + } + + ret = pread64(dev_fd, &cmd, sizeof(cmd), offset + PCI_COMMAND); if (ret != sizeof(cmd)) { RTE_LOG(ERR, EAL, "Cannot read command from PCI config space!\n"); @@ -174,9 +208,7 @@ pci_vfio_enable_bus_memory(int dev_fd) return 0; cmd |= PCI_COMMAND_MEMORY; - ret = pwrite64(dev_fd, &cmd, sizeof(cmd), - VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + - PCI_COMMAND); + ret = pwrite64(dev_fd, &cmd, sizeof(cmd), offset + PCI_COMMAND); if (ret != sizeof(cmd)) { RTE_LOG(ERR, EAL, "Cannot write command to PCI config space!\n"); @@ -188,14 +220,19 @@ pci_vfio_enable_bus_memory(int dev_fd) /* set PCI bus mastering */ static int -pci_vfio_set_bus_master(int dev_fd, bool op) +pci_vfio_set_bus_master(const struct rte_pci_device *dev, int dev_fd, bool op) { + uint64_t size, offset; uint16_t reg; int ret; - ret = pread64(dev_fd, ®, sizeof(reg), - VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + - PCI_COMMAND); + if (pci_vfio_get_region(dev, VFIO_PCI_CONFIG_REGION_INDEX, + &size, &offset) != 0) { + RTE_LOG(ERR, EAL, "Cannot get offset of CONFIG region.\n"); + return -1; + } + + ret = pread64(dev_fd, ®, sizeof(reg), offset + PCI_COMMAND); if (ret != sizeof(reg)) { RTE_LOG(ERR, EAL, "Cannot read command from PCI config space!\n"); return -1; @@ -207,9 +244,7 @@ pci_vfio_set_bus_master(int dev_fd, bool op) else reg &= ~(PCI_COMMAND_MASTER); - ret = pwrite64(dev_fd, ®, sizeof(reg), - VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + - PCI_COMMAND); + ret = pwrite64(dev_fd, ®, sizeof(reg), offset + PCI_COMMAND); if (ret != sizeof(reg)) { RTE_LOG(ERR, EAL, "Cannot write command to PCI config space!\n"); @@ -458,14 +493,21 @@ pci_vfio_disable_notifier(struct rte_pci_device *dev) #endif static int -pci_vfio_is_ioport_bar(int vfio_dev_fd, int bar_index) +pci_vfio_is_ioport_bar(const struct rte_pci_device *dev, int vfio_dev_fd, + int bar_index) { + uint64_t size, offset; uint32_t ioport_bar; int ret; + if (pci_vfio_get_region(dev, VFIO_PCI_CONFIG_REGION_INDEX, + &size, &offset) != 0) { + RTE_LOG(ERR, EAL, "Cannot get offset of CONFIG region.\n"); + return -1; + } + ret = pread64(vfio_dev_fd, &ioport_bar, sizeof(ioport_bar), - VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) - + PCI_BASE_ADDRESS_0 + bar_index*4); + offset + PCI_BASE_ADDRESS_0 + bar_index * 4); if (ret != sizeof(ioport_bar)) { RTE_LOG(ERR, EAL, "Cannot read command (%x) from config space!\n", PCI_BASE_ADDRESS_0 + bar_index*4); @@ -483,13 +525,13 @@ pci_rte_vfio_setup_device(struct rte_pci_device *dev, int vfio_dev_fd) return -1; } - if (pci_vfio_enable_bus_memory(vfio_dev_fd)) { + if (pci_vfio_enable_bus_memory(dev, vfio_dev_fd)) { RTE_LOG(ERR, EAL, "Cannot enable bus memory!\n"); return -1; } /* set bus mastering for the device */ - if (pci_vfio_set_bus_master(vfio_dev_fd, true)) { + if (pci_vfio_set_bus_master(dev, vfio_dev_fd, true)) { RTE_LOG(ERR, EAL, "Cannot set up bus mastering!\n"); return -1; } @@ -719,11 +761,40 @@ pci_vfio_msix_is_mappable(int vfio_dev_fd, int msix_region) return ret; } +static int +pci_vfio_fill_regions(struct rte_pci_device *dev, int vfio_dev_fd, + struct vfio_device_info *device_info) +{ + struct rte_pci_device_internal *pdev = RTE_PCI_DEVICE_INTERNAL(dev); + struct vfio_region_info *reg = NULL; + int nb_maps, i, ret; + + nb_maps = RTE_MIN((int)device_info->num_regions, + VFIO_PCI_CONFIG_REGION_INDEX + 1); + + for (i = 0; i < nb_maps; i++) { + ret = pci_vfio_get_region_info(vfio_dev_fd, ®, i); + if (ret < 0) { + RTE_LOG(DEBUG, EAL, "%s cannot get device region info error %i (%s)\n", + dev->name, errno, strerror(errno)); + return -1; + } + + pdev->region[i].size = reg->size; + pdev->region[i].offset = reg->offset; + + free(reg); + } + + return 0; +} static int pci_vfio_map_resource_primary(struct rte_pci_device *dev) { + struct rte_pci_device_internal *pdev = RTE_PCI_DEVICE_INTERNAL(dev); struct vfio_device_info device_info = { .argsz = sizeof(device_info) }; + struct vfio_region_info *reg = NULL; char pci_addr[PATH_MAX] = {0}; int vfio_dev_fd; struct rte_pci_addr *loc = &dev->addr; @@ -767,11 +838,22 @@ pci_vfio_map_resource_primary(struct rte_pci_device *dev) /* map BARs */ maps = vfio_res->maps; + ret = pci_vfio_get_region_info(vfio_dev_fd, ®, + VFIO_PCI_CONFIG_REGION_INDEX); + if (ret < 0) { + RTE_LOG(ERR, EAL, "%s cannot get device region info error %i (%s)\n", + dev->name, errno, strerror(errno)); + goto err_vfio_res; + } + pdev->region[VFIO_PCI_CONFIG_REGION_INDEX].size = reg->size; + pdev->region[VFIO_PCI_CONFIG_REGION_INDEX].offset = reg->offset; + free(reg); + vfio_res->msix_table.bar_index = -1; /* get MSI-X BAR, if any (we have to know where it is because we can't * easily mmap it when using VFIO) */ - ret = pci_vfio_get_msix_bar(vfio_dev_fd, &vfio_res->msix_table); + ret = pci_vfio_get_msix_bar(dev, vfio_dev_fd, &vfio_res->msix_table); if (ret < 0) { RTE_LOG(ERR, EAL, "%s cannot get MSI-X BAR number!\n", pci_addr); @@ -792,7 +874,6 @@ pci_vfio_map_resource_primary(struct rte_pci_device *dev) } for (i = 0; i < vfio_res->nb_maps; i++) { - struct vfio_region_info *reg = NULL; void *bar_addr; ret = pci_vfio_get_region_info(vfio_dev_fd, ®, i); @@ -803,8 +884,11 @@ pci_vfio_map_resource_primary(struct rte_pci_device *dev) goto err_vfio_res; } + pdev->region[i].size = reg->size; + pdev->region[i].offset = reg->offset; + /* chk for io port region */ - ret = pci_vfio_is_ioport_bar(vfio_dev_fd, i); + ret = pci_vfio_is_ioport_bar(dev, vfio_dev_fd, i); if (ret < 0) { free(reg); goto err_vfio_res; @@ -916,6 +1000,10 @@ pci_vfio_map_resource_secondary(struct rte_pci_device *dev) if (ret) return ret; + ret = pci_vfio_fill_regions(dev, vfio_dev_fd, &device_info); + if (ret) + return ret; + /* map BARs */ maps = vfio_res->maps; @@ -1031,7 +1119,7 @@ pci_vfio_unmap_resource_primary(struct rte_pci_device *dev) if (vfio_dev_fd < 0) return -1; - if (pci_vfio_set_bus_master(vfio_dev_fd, false)) { + if (pci_vfio_set_bus_master(dev, vfio_dev_fd, false)) { RTE_LOG(ERR, EAL, "%s cannot unset bus mastering for PCI device!\n", pci_addr); return -1; @@ -1111,14 +1199,21 @@ int pci_vfio_ioport_map(struct rte_pci_device *dev, int bar, struct rte_pci_ioport *p) { + uint64_t size, offset; + if (bar < VFIO_PCI_BAR0_REGION_INDEX || bar > VFIO_PCI_BAR5_REGION_INDEX) { RTE_LOG(ERR, EAL, "invalid bar (%d)!\n", bar); return -1; } + if (pci_vfio_get_region(dev, bar, &size, &offset) != 0) { + RTE_LOG(ERR, EAL, "Cannot get offset of region %d.\n", bar); + return -1; + } + p->dev = dev; - p->base = VFIO_GET_REGION_ADDR(bar); + p->base = offset; return 0; } diff --git a/drivers/bus/pci/private.h b/drivers/bus/pci/private.h index b564646e03..2d6991ccb7 100644 --- a/drivers/bus/pci/private.h +++ b/drivers/bus/pci/private.h @@ -13,6 +13,8 @@ #include #include +#define RTE_MAX_PCI_REGIONS 9 + /* * Convert struct rte_pci_device to struct rte_pci_device_internal */ @@ -42,8 +44,15 @@ extern struct rte_pci_bus rte_pci_bus; struct rte_pci_driver; struct rte_pci_device; +struct rte_pci_region { + uint64_t size; + uint64_t offset; +}; + struct rte_pci_device_internal { struct rte_pci_device device; + /* PCI regions provided by e.g. VFIO. */ + struct rte_pci_region region[RTE_MAX_PCI_REGIONS]; }; /** diff --git a/lib/eal/include/rte_vfio.h b/lib/eal/include/rte_vfio.h index 7bdb8932b2..3487c4f2a2 100644 --- a/lib/eal/include/rte_vfio.h +++ b/lib/eal/include/rte_vfio.h @@ -38,7 +38,6 @@ extern "C" { #define VFIO_CONTAINER_PATH "/dev/vfio/vfio" #define VFIO_GROUP_FMT "/dev/vfio/%u" #define VFIO_NOIOMMU_GROUP_FMT "/dev/vfio/noiommu-%u" -#define VFIO_GET_REGION_ADDR(x) ((uint64_t) x << 40ULL) #define VFIO_GET_REGION_IDX(x) (x >> 40) #define VFIO_NOIOMMU_MODE \ "/sys/module/vfio/parameters/enable_unsafe_noiommu_mode" From patchwork Tue Apr 18 05:30:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chenbo Xia X-Patchwork-Id: 126216 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7BD0D42977; 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d="scan'208";a="407978661" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Apr 2023 22:49:35 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10683"; a="668373216" X-IronPort-AV: E=Sophos;i="5.99,206,1677571200"; d="scan'208";a="668373216" Received: from npg-dpdk-virtio-xiachenbo-nw.sh.intel.com ([10.67.119.79]) by orsmga006.jf.intel.com with ESMTP; 17 Apr 2023 22:49:33 -0700 From: Chenbo Xia To: dev@dpdk.org Cc: skori@marvell.com, Anatoly Burakov Subject: [RFC 3/4] bus/pci: introduce helper for MMIO read and write Date: Tue, 18 Apr 2023 13:30:11 +0800 Message-Id: <20230418053012.10667-4-chenbo.xia@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230418053012.10667-1-chenbo.xia@intel.com> References: <20230418053012.10667-1-chenbo.xia@intel.com> X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The MMIO regions may not be mmap-able for VFIO-PCI devices. In this case, the driver should explicitly do read and write to access these regions. Signed-off-by: Chenbo Xia --- drivers/bus/pci/bsd/pci.c | 22 +++++++++++++++ drivers/bus/pci/linux/pci.c | 46 ++++++++++++++++++++++++++++++ drivers/bus/pci/linux/pci_init.h | 10 +++++++ drivers/bus/pci/linux/pci_uio.c | 22 +++++++++++++++ drivers/bus/pci/linux/pci_vfio.c | 36 ++++++++++++++++++++++++ drivers/bus/pci/rte_bus_pci.h | 48 ++++++++++++++++++++++++++++++++ drivers/bus/pci/version.map | 3 ++ 7 files changed, 187 insertions(+) diff --git a/drivers/bus/pci/bsd/pci.c b/drivers/bus/pci/bsd/pci.c index a747eca58c..27f12590d4 100644 --- a/drivers/bus/pci/bsd/pci.c +++ b/drivers/bus/pci/bsd/pci.c @@ -489,6 +489,28 @@ int rte_pci_write_config(const struct rte_pci_device *dev, return -1; } +/* Read PCI MMIO space. */ +int rte_pci_mmio_read(const struct rte_pci_device *dev, int bar, + void *buf, size_t len, off_t offset) +{ + if (bar >= PCI_MAX_RESOURCE || dev->mem_resource[bar].addr == NULL || + (uint64_t)offset + len > dev->mem_resource[bar].len) + return -1; + memcpy(buf, (uint8_t *)dev->mem_resource[bar].addr + offset, len); + return len; +} + +/* Write PCI MMIO space. */ +int rte_pci_mmio_write(const struct rte_pci_device *dev, int bar, + const void *buf, size_t len, off_t offset) +{ + if (bar >= PCI_MAX_RESOURCE || dev->mem_resource[bar].addr == NULL || + (uint64_t)offset + len > dev->mem_resource[bar].len) + return -1; + memcpy((uint8_t *)dev->mem_resource[bar].addr + offset, buf, len); + return len; +} + int rte_pci_ioport_map(struct rte_pci_device *dev, int bar, struct rte_pci_ioport *p) diff --git a/drivers/bus/pci/linux/pci.c b/drivers/bus/pci/linux/pci.c index 04e21ae20f..3d237398d9 100644 --- a/drivers/bus/pci/linux/pci.c +++ b/drivers/bus/pci/linux/pci.c @@ -680,6 +680,52 @@ int rte_pci_write_config(const struct rte_pci_device *device, } } +/* Read PCI MMIO space. */ +int rte_pci_mmio_read(const struct rte_pci_device *device, int bar, + void *buf, size_t len, off_t offset) +{ + char devname[RTE_DEV_NAME_MAX_LEN] = ""; + + switch (device->kdrv) { + case RTE_PCI_KDRV_IGB_UIO: + case RTE_PCI_KDRV_UIO_GENERIC: + return pci_uio_mmio_read(device, bar, buf, len, offset); +#ifdef VFIO_PRESENT + case RTE_PCI_KDRV_VFIO: + return pci_vfio_mmio_read(device, bar, buf, len, offset); +#endif + default: + rte_pci_device_name(&device->addr, devname, + RTE_DEV_NAME_MAX_LEN); + RTE_LOG(ERR, EAL, + "Unknown driver type for %s\n", devname); + return -1; + } +} + +/* Write PCI MMIO space. */ +int rte_pci_mmio_write(const struct rte_pci_device *device, int bar, + const void *buf, size_t len, off_t offset) +{ + char devname[RTE_DEV_NAME_MAX_LEN] = ""; + + switch (device->kdrv) { + case RTE_PCI_KDRV_IGB_UIO: + case RTE_PCI_KDRV_UIO_GENERIC: + return pci_uio_mmio_write(device, bar, buf, len, offset); +#ifdef VFIO_PRESENT + case RTE_PCI_KDRV_VFIO: + return pci_vfio_mmio_write(device, bar, buf, len, offset); +#endif + default: + rte_pci_device_name(&device->addr, devname, + RTE_DEV_NAME_MAX_LEN); + RTE_LOG(ERR, EAL, + "Unknown driver type for %s\n", devname); + return -1; + } +} + int rte_pci_ioport_map(struct rte_pci_device *dev, int bar, struct rte_pci_ioport *p) diff --git a/drivers/bus/pci/linux/pci_init.h b/drivers/bus/pci/linux/pci_init.h index 9f6659ba6e..d842809ccd 100644 --- a/drivers/bus/pci/linux/pci_init.h +++ b/drivers/bus/pci/linux/pci_init.h @@ -37,6 +37,11 @@ int pci_uio_read_config(const struct rte_intr_handle *intr_handle, int pci_uio_write_config(const struct rte_intr_handle *intr_handle, const void *buf, size_t len, off_t offs); +int pci_uio_mmio_read(const struct rte_pci_device *dev, int bar, + void *buf, size_t len, off_t offset); +int pci_uio_mmio_write(const struct rte_pci_device *dev, int bar, + const void *buf, size_t len, off_t offset); + int pci_uio_ioport_map(struct rte_pci_device *dev, int bar, struct rte_pci_ioport *p); void pci_uio_ioport_read(struct rte_pci_ioport *p, @@ -71,6 +76,11 @@ int pci_vfio_read_config(const struct rte_pci_device *dev, int pci_vfio_write_config(const struct rte_pci_device *dev, const void *buf, size_t len, off_t offs); +int pci_vfio_mmio_read(const struct rte_pci_device *dev, int bar, + void *buf, size_t len, off_t offset); +int pci_vfio_mmio_write(const struct rte_pci_device *dev, int bar, + const void *buf, size_t len, off_t offset); + int pci_vfio_ioport_map(struct rte_pci_device *dev, int bar, struct rte_pci_ioport *p); void pci_vfio_ioport_read(struct rte_pci_ioport *p, diff --git a/drivers/bus/pci/linux/pci_uio.c b/drivers/bus/pci/linux/pci_uio.c index d52125e49b..2bf16e9369 100644 --- a/drivers/bus/pci/linux/pci_uio.c +++ b/drivers/bus/pci/linux/pci_uio.c @@ -55,6 +55,28 @@ pci_uio_write_config(const struct rte_intr_handle *intr_handle, return pwrite(uio_cfg_fd, buf, len, offset); } +int +pci_uio_mmio_read(const struct rte_pci_device *dev, int bar, + void *buf, size_t len, off_t offset) +{ + if (bar >= PCI_MAX_RESOURCE || dev->mem_resource[bar].addr == NULL || + (uint64_t)offset + len > dev->mem_resource[bar].len) + return -1; + memcpy(buf, (uint8_t *)dev->mem_resource[bar].addr + offset, len); + return len; +} + +int +pci_uio_mmio_write(const struct rte_pci_device *dev, int bar, + const void *buf, size_t len, off_t offset) +{ + if (bar >= PCI_MAX_RESOURCE || dev->mem_resource[bar].addr == NULL || + (uint64_t)offset + len > dev->mem_resource[bar].len) + return -1; + memcpy((uint8_t *)dev->mem_resource[bar].addr + offset, buf, len); + return len; +} + static int pci_uio_set_bus_master(int dev_fd) { diff --git a/drivers/bus/pci/linux/pci_vfio.c b/drivers/bus/pci/linux/pci_vfio.c index 1748ad2ae0..f6289c907f 100644 --- a/drivers/bus/pci/linux/pci_vfio.c +++ b/drivers/bus/pci/linux/pci_vfio.c @@ -1258,6 +1258,42 @@ pci_vfio_ioport_unmap(struct rte_pci_ioport *p) return -1; } +int +pci_vfio_mmio_read(const struct rte_pci_device *dev, int bar, + void *buf, size_t len, off_t offs) +{ + uint64_t size, offset; + int fd; + + fd = rte_intr_dev_fd_get(dev->intr_handle); + + if (pci_vfio_get_region(dev, bar, &size, &offset) != 0) + return -1; + + if ((uint64_t)len + offs > size) + return -1; + + return pread64(fd, buf, len, offset + offs); +} + +int +pci_vfio_mmio_write(const struct rte_pci_device *dev, int bar, + const void *buf, size_t len, off_t offs) +{ + uint64_t size, offset; + int fd; + + fd = rte_intr_dev_fd_get(dev->intr_handle); + + if (pci_vfio_get_region(dev, bar, &size, &offset) != 0) + return -1; + + if ((uint64_t)len + offs > size) + return -1; + + return pwrite64(fd, buf, len, offset + offs); +} + int pci_vfio_is_enabled(void) { diff --git a/drivers/bus/pci/rte_bus_pci.h b/drivers/bus/pci/rte_bus_pci.h index b193114fe5..82da087f24 100644 --- a/drivers/bus/pci/rte_bus_pci.h +++ b/drivers/bus/pci/rte_bus_pci.h @@ -135,6 +135,54 @@ int rte_pci_read_config(const struct rte_pci_device *device, int rte_pci_write_config(const struct rte_pci_device *device, const void *buf, size_t len, off_t offset); +/** + * @warning + * @b EXPERIMENTAL: this API may change without prior notice + * + * Read from a MMIO pci resource. + * + * @param device + * A pointer to a rte_pci_device structure describing the device + * to use + * @param bar + * Index of the io pci resource we want to access. + * @param buf + * A data buffer where the bytes should be read into + * @param len + * The length of the data buffer. + * @param offset + * The offset into MMIO space described by @bar + * @return + * Number of bytes read on success, negative on error. + */ +__rte_experimental +int rte_pci_mmio_read(const struct rte_pci_device *device, int bar, + void *buf, size_t len, off_t offset); + +/** + * @warning + * @b EXPERIMENTAL: this API may change without prior notice + * + * Write to a MMIO pci resource. + * + * @param device + * A pointer to a rte_pci_device structure describing the device + * to use + * @param bar + * Index of the io pci resource we want to access. + * @param buf + * A data buffer containing the bytes should be written + * @param len + * The length of the data buffer. + * @param offset + * The offset into MMIO space described by @bar + * @return + * Number of bytes written on success, negative on error. + */ +__rte_experimental +int rte_pci_mmio_write(const struct rte_pci_device *device, int bar, + const void *buf, size_t len, off_t offset); + /** * Initialize a rte_pci_ioport object for a pci device io resource. * diff --git a/drivers/bus/pci/version.map b/drivers/bus/pci/version.map index 161ab86d3b..00fde139ca 100644 --- a/drivers/bus/pci/version.map +++ b/drivers/bus/pci/version.map @@ -21,6 +21,9 @@ EXPERIMENTAL { # added in 21.08 rte_pci_set_bus_master; + # added in 23.07 + rte_pci_mmio_read; + rte_pci_mmio_write; }; INTERNAL { From patchwork Tue Apr 18 05:30:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chenbo Xia X-Patchwork-Id: 126217 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3353942977; Tue, 18 Apr 2023 07:50:07 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1950142D10; Tue, 18 Apr 2023 07:50:07 +0200 (CEST) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by mails.dpdk.org (Postfix) with ESMTP id 92AE4410EA for ; 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d="scan'208";a="668373248" Received: from npg-dpdk-virtio-xiachenbo-nw.sh.intel.com ([10.67.119.79]) by orsmga006.jf.intel.com with ESMTP; 17 Apr 2023 22:49:35 -0700 From: Chenbo Xia To: dev@dpdk.org Cc: skori@marvell.com, Nicolas Chautru , Anatoly Burakov , Nithin Dabilpuram , Kiran Kumar K , Satha Rao , Srikanth Yalavarthi , Kai Ji , Andrew Rybchenko , Ashish Gupta , Fan Zhang , Sunil Uttarwar , Ankur Dwivedi , Anoob Joseph , Tejasree Kondoj , Nagadheeraj Rottela , Srikanth Jampala , Jay Zhou , Radha Mohan Chintakuntla , Veerasenareddy Burru , Chengwen Feng , Bruce Richardson , Kevin Laatz , Conor Walsh , Timothy McDaniel , Jerin Jacob , Pavan Nikhilesh , Harman Kalra , Shepard Siegel , Ed Czeck , John Miller , Igor Russkikh , Steven Webster , Matt Peters , Chandubabu Namburu , Rasesh Mody , Shahed Shaikh , Ajit Khaparde , Somnath Kotur , Yuying Zhang , Beilei Xing , Rahul Lakkireddy , Simei Su , Wenjun Wu , Marcin Wojtas , Michal Krawczyk , Shai Brandes , Evgeny Schemeilin , Igor Chauskin , Gagandeep Singh , Sachin Saxena , John Daley , Hyong Youb Kim , Qi Zhang , Xiao Wang , Junfeng Guo , Ziyang Xuan , Xiaoyun Wang , Guoyang Zhou , Dongdong Liu , Yisen Zhuang , Jingjing Wu , Qiming Yang , Andrew Boyer , Shijith Thotton , Srisivasubramanian Srinivasan , Chaoyong He , =?utf-8?q?Niklas_S=C3=B6derlund?= , Jiawen Wu , Sathesh Edara , Devendra Singh Rawat , Alok Prasad , Maciej Czekaj , Jian Wang , Maxime Coquelin , Jochen Behrens , Jakub Palider , Tomasz Duszynski , Rosen Xu , Tianfei Zhang , Vijay Kumar Srivastava Subject: [RFC 4/4] bus/pci: add VFIO sparse mmap support Date: Tue, 18 Apr 2023 13:30:12 +0800 Message-Id: <20230418053012.10667-5-chenbo.xia@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230418053012.10667-1-chenbo.xia@intel.com> References: <20230418053012.10667-1-chenbo.xia@intel.com> X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch adds sparse mmap support in PCI bus. Sparse mmap is a capability defined in VFIO which allows multiple mmap areas in one VFIO region. Signed-off-by: Chenbo Xia --- drivers/baseband/acc/rte_acc100_pmd.c | 6 +- drivers/baseband/acc/rte_vrb_pmd.c | 6 +- .../fpga_5gnr_fec/rte_fpga_5gnr_fec.c | 6 +- drivers/baseband/fpga_lte_fec/fpga_lte_fec.c | 6 +- drivers/bus/pci/bsd/pci.c | 20 +- drivers/bus/pci/bus_pci_driver.h | 24 +- drivers/bus/pci/linux/pci.c | 13 +- drivers/bus/pci/linux/pci_uio.c | 24 +- drivers/bus/pci/linux/pci_vfio.c | 214 +++++++++++++++--- drivers/bus/pci/pci_common.c | 45 ++-- drivers/bus/pci/pci_common_uio.c | 12 +- drivers/bus/pci/private.h | 2 + drivers/common/cnxk/roc_dev.c | 4 +- drivers/common/cnxk/roc_dpi.c | 2 +- drivers/common/cnxk/roc_ml.c | 22 +- drivers/common/qat/dev/qat_dev_gen1.c | 2 +- drivers/common/qat/dev/qat_dev_gen4.c | 4 +- drivers/common/sfc_efx/sfc_efx.c | 2 +- drivers/compress/octeontx/otx_zip.c | 4 +- drivers/crypto/ccp/ccp_dev.c | 4 +- drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 2 +- drivers/crypto/nitrox/nitrox_device.c | 4 +- drivers/crypto/octeontx/otx_cryptodev_ops.c | 6 +- drivers/crypto/virtio/virtio_pci.c | 6 +- drivers/dma/cnxk/cnxk_dmadev.c | 2 +- drivers/dma/hisilicon/hisi_dmadev.c | 6 +- drivers/dma/idxd/idxd_pci.c | 4 +- drivers/dma/ioat/ioat_dmadev.c | 2 +- drivers/event/dlb2/pf/dlb2_main.c | 16 +- drivers/event/octeontx/ssovf_probe.c | 38 ++-- drivers/event/octeontx/timvf_probe.c | 18 +- drivers/event/skeleton/skeleton_eventdev.c | 2 +- drivers/mempool/octeontx/octeontx_fpavf.c | 6 +- drivers/net/ark/ark_ethdev.c | 4 +- drivers/net/atlantic/atl_ethdev.c | 2 +- drivers/net/avp/avp_ethdev.c | 20 +- drivers/net/axgbe/axgbe_ethdev.c | 4 +- drivers/net/bnx2x/bnx2x_ethdev.c | 6 +- drivers/net/bnxt/bnxt_ethdev.c | 8 +- drivers/net/cpfl/cpfl_ethdev.c | 4 +- drivers/net/cxgbe/cxgbe_ethdev.c | 2 +- drivers/net/cxgbe/cxgbe_main.c | 2 +- drivers/net/cxgbe/cxgbevf_ethdev.c | 2 +- drivers/net/cxgbe/cxgbevf_main.c | 2 +- drivers/net/e1000/em_ethdev.c | 4 +- drivers/net/e1000/igb_ethdev.c | 4 +- drivers/net/ena/ena_ethdev.c | 4 +- drivers/net/enetc/enetc_ethdev.c | 2 +- drivers/net/enic/enic_main.c | 4 +- drivers/net/fm10k/fm10k_ethdev.c | 2 +- drivers/net/gve/gve_ethdev.c | 4 +- drivers/net/hinic/base/hinic_pmd_hwif.c | 14 +- drivers/net/hns3/hns3_ethdev.c | 2 +- drivers/net/hns3/hns3_ethdev_vf.c | 2 +- drivers/net/hns3/hns3_rxtx.c | 4 +- drivers/net/i40e/i40e_ethdev.c | 2 +- drivers/net/iavf/iavf_ethdev.c | 2 +- drivers/net/ice/ice_dcf.c | 2 +- drivers/net/ice/ice_ethdev.c | 2 +- drivers/net/idpf/idpf_ethdev.c | 4 +- drivers/net/igc/igc_ethdev.c | 2 +- drivers/net/ionic/ionic_dev_pci.c | 2 +- drivers/net/ixgbe/ixgbe_ethdev.c | 4 +- drivers/net/liquidio/lio_ethdev.c | 4 +- drivers/net/nfp/nfp_ethdev.c | 2 +- drivers/net/nfp/nfp_ethdev_vf.c | 6 +- drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c | 4 +- drivers/net/ngbe/ngbe_ethdev.c | 2 +- drivers/net/octeon_ep/otx_ep_ethdev.c | 2 +- drivers/net/octeontx/base/octeontx_pkivf.c | 6 +- drivers/net/octeontx/base/octeontx_pkovf.c | 12 +- drivers/net/qede/qede_main.c | 6 +- drivers/net/sfc/sfc.c | 2 +- drivers/net/thunderx/nicvf_ethdev.c | 2 +- drivers/net/txgbe/txgbe_ethdev.c | 2 +- drivers/net/txgbe/txgbe_ethdev_vf.c | 2 +- drivers/net/virtio/virtio_pci.c | 6 +- drivers/net/vmxnet3/vmxnet3_ethdev.c | 4 +- drivers/raw/cnxk_bphy/cnxk_bphy.c | 10 +- drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c | 6 +- drivers/raw/ifpga/afu_pmd_n3000.c | 4 +- drivers/raw/ifpga/ifpga_rawdev.c | 6 +- drivers/raw/ntb/ntb_hw_intel.c | 8 +- drivers/vdpa/ifc/ifcvf_vdpa.c | 6 +- drivers/vdpa/sfc/sfc_vdpa_hw.c | 2 +- drivers/vdpa/sfc/sfc_vdpa_ops.c | 2 +- 86 files changed, 477 insertions(+), 285 deletions(-) diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c index 5362d39c30..7c22e3fad5 100644 --- a/drivers/baseband/acc/rte_acc100_pmd.c +++ b/drivers/baseband/acc/rte_acc100_pmd.c @@ -4260,12 +4260,12 @@ acc100_bbdev_init(struct rte_bbdev *dev, struct rte_pci_driver *drv) !strcmp(drv->driver.name, RTE_STR(ACC100PF_DRIVER_NAME)); ((struct acc_device *) dev->data->dev_private)->mmio_base = - pci_dev->mem_resource[0].addr; + pci_dev->pci_mem[0].mem_res.addr; rte_bbdev_log_debug("Init device %s [%s] @ vaddr %p paddr %#"PRIx64"", drv->driver.name, dev->data->name, - (void *)pci_dev->mem_resource[0].addr, - pci_dev->mem_resource[0].phys_addr); + (void *)pci_dev->pci_mem[0].mem_res.addr, + pci_dev->pci_mem[0].mem_res.phys_addr); } static int acc100_pci_probe(struct rte_pci_driver *pci_drv, diff --git a/drivers/baseband/acc/rte_vrb_pmd.c b/drivers/baseband/acc/rte_vrb_pmd.c index 9e5a73c9c7..5260ab75f4 100644 --- a/drivers/baseband/acc/rte_vrb_pmd.c +++ b/drivers/baseband/acc/rte_vrb_pmd.c @@ -3349,7 +3349,7 @@ vrb_bbdev_init(struct rte_bbdev *dev, struct rte_pci_driver *drv) dev->dequeue_fft_ops = vrb_dequeue_fft; d->pf_device = !strcmp(drv->driver.name, RTE_STR(VRB_PF_DRIVER_NAME)); - d->mmio_base = pci_dev->mem_resource[0].addr; + d->mmio_base = pci_dev->pci_mem[0].mem_res.addr; /* Device variant specific handling. */ if ((pci_dev->id.device_id == RTE_VRB1_PF_DEVICE_ID) || @@ -3367,8 +3367,8 @@ vrb_bbdev_init(struct rte_bbdev *dev, struct rte_pci_driver *drv) rte_bbdev_log_debug("Init device %s [%s] @ vaddr %p paddr %#"PRIx64"", drv->driver.name, dev->data->name, - (void *)pci_dev->mem_resource[0].addr, - pci_dev->mem_resource[0].phys_addr); + (void *)pci_dev->pci_mem[0].mem_res.addr, + pci_dev->pci_mem[0].mem_res.phys_addr); } static int vrb_pci_probe(struct rte_pci_driver *pci_drv, diff --git a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c index f29565af8c..9571119487 100644 --- a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c +++ b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c @@ -2149,13 +2149,13 @@ fpga_5gnr_fec_init(struct rte_bbdev *dev, struct rte_pci_driver *drv) !strcmp(drv->driver.name, RTE_STR(FPGA_5GNR_FEC_PF_DRIVER_NAME)); ((struct fpga_5gnr_fec_device *) dev->data->dev_private)->mmio_base = - pci_dev->mem_resource[0].addr; + pci_dev->pci_mem[0].mem_res.addr; rte_bbdev_log_debug( "Init device %s [%s] @ virtaddr %p phyaddr %#"PRIx64, drv->driver.name, dev->data->name, - (void *)pci_dev->mem_resource[0].addr, - pci_dev->mem_resource[0].phys_addr); + (void *)pci_dev->pci_mem[0].mem_res.addr, + pci_dev->pci_mem[0].mem_res.phys_addr); } static int diff --git a/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c b/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c index a4a963f74d..b2a937d2c5 100644 --- a/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c +++ b/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c @@ -2326,13 +2326,13 @@ fpga_lte_fec_init(struct rte_bbdev *dev, struct rte_pci_driver *drv) !strcmp(drv->driver.name, RTE_STR(FPGA_LTE_FEC_PF_DRIVER_NAME)); ((struct fpga_lte_fec_device *) dev->data->dev_private)->mmio_base = - pci_dev->mem_resource[0].addr; + pci_dev->pci_mem[0].mem_res.addr; rte_bbdev_log_debug( "Init device %s [%s] @ virtaddr %p phyaddr %#"PRIx64, drv->driver.name, dev->data->name, - (void *)pci_dev->mem_resource[0].addr, - pci_dev->mem_resource[0].phys_addr); + (void *)pci_dev->pci_mem[0].mem_res.addr, + pci_dev->pci_mem[0].mem_res.phys_addr); } static int diff --git a/drivers/bus/pci/bsd/pci.c b/drivers/bus/pci/bsd/pci.c index 27f12590d4..cf99b97e01 100644 --- a/drivers/bus/pci/bsd/pci.c +++ b/drivers/bus/pci/bsd/pci.c @@ -186,17 +186,17 @@ pci_uio_map_resource_by_index(struct rte_pci_device *dev, int res_idx, /* if matching map is found, then use it */ offset = res_idx * pagesz; mapaddr = pci_map_resource(NULL, fd, (off_t)offset, - (size_t)dev->mem_resource[res_idx].len, 0); + (size_t)dev->pci_mem[res_idx].mem_res.len, 0); close(fd); if (mapaddr == NULL) goto error; - maps[map_idx].phaddr = dev->mem_resource[res_idx].phys_addr; - maps[map_idx].size = dev->mem_resource[res_idx].len; + maps[map_idx].phaddr = dev->pci_mem[res_idx].mem_res.phys_addr; + maps[map_idx].size = dev->pci_mem[res_idx].mem_res.len; maps[map_idx].addr = mapaddr; maps[map_idx].offset = offset; strcpy(maps[map_idx].path, devname); - dev->mem_resource[res_idx].addr = mapaddr; + dev->pci_mem[res_idx].mem_res.addr = mapaddr; return 0; @@ -493,10 +493,10 @@ int rte_pci_write_config(const struct rte_pci_device *dev, int rte_pci_mmio_read(const struct rte_pci_device *dev, int bar, void *buf, size_t len, off_t offset) { - if (bar >= PCI_MAX_RESOURCE || dev->mem_resource[bar].addr == NULL || - (uint64_t)offset + len > dev->mem_resource[bar].len) + if (bar >= PCI_MAX_RESOURCE || dev->pci_mem[bar].mem_res.addr == NULL || + (uint64_t)offset + len > dev->pci_mem[bar].mem_res.len) return -1; - memcpy(buf, (uint8_t *)dev->mem_resource[bar].addr + offset, len); + memcpy(buf, (uint8_t *)dev->pci_mem[bar].mem_res.addr + offset, len); return len; } @@ -504,10 +504,10 @@ int rte_pci_mmio_read(const struct rte_pci_device *dev, int bar, int rte_pci_mmio_write(const struct rte_pci_device *dev, int bar, const void *buf, size_t len, off_t offset) { - if (bar >= PCI_MAX_RESOURCE || dev->mem_resource[bar].addr == NULL || - (uint64_t)offset + len > dev->mem_resource[bar].len) + if (bar >= PCI_MAX_RESOURCE || dev->pci_mem[bar].mem_res.addr == NULL || + (uint64_t)offset + len > dev->pci_mem[bar].mem_res.len) return -1; - memcpy((uint8_t *)dev->mem_resource[bar].addr + offset, buf, len); + memcpy((uint8_t *)dev->pci_mem[bar].mem_res.addr + offset, buf, len); return len; } diff --git a/drivers/bus/pci/bus_pci_driver.h b/drivers/bus/pci/bus_pci_driver.h index be32263a82..16be48348c 100644 --- a/drivers/bus/pci/bus_pci_driver.h +++ b/drivers/bus/pci/bus_pci_driver.h @@ -28,6 +28,27 @@ enum rte_pci_kernel_driver { RTE_PCI_KDRV_NET_UIO, /* NetUIO for Windows */ }; +struct rte_mem_map_area { + void *addr; + uint64_t offset; + uint64_t size; +}; + +struct rte_sparse_mem_map { + uint64_t phys_addr; + uint64_t len; + uint32_t nr_maps; + struct rte_mem_map_area *areas; +}; + +struct rte_pci_mem_resource { + bool is_sparse; + union { + struct rte_mem_resource mem_res; + struct rte_sparse_mem_map sparse_mem; + }; +}; + /** * A structure describing a PCI device. */ @@ -36,8 +57,7 @@ struct rte_pci_device { struct rte_device device; /**< Inherit core device */ struct rte_pci_addr addr; /**< PCI location. */ struct rte_pci_id id; /**< PCI ID. */ - struct rte_mem_resource mem_resource[PCI_MAX_RESOURCE]; - /**< PCI Memory Resource */ + struct rte_pci_mem_resource pci_mem[PCI_MAX_RESOURCE]; /**< PCI Memory Resource */ struct rte_intr_handle *intr_handle; /**< Interrupt handle */ struct rte_pci_driver *driver; /**< PCI driver used in probing */ uint16_t max_vfs; /**< sriov enable if not zero */ diff --git a/drivers/bus/pci/linux/pci.c b/drivers/bus/pci/linux/pci.c index 3d237398d9..98856b5df3 100644 --- a/drivers/bus/pci/linux/pci.c +++ b/drivers/bus/pci/linux/pci.c @@ -179,7 +179,7 @@ pci_parse_sysfs_resource(const char *filename, struct rte_pci_device *dev) return -1; } - for (i = 0; imem_resource[i].phys_addr = phys_addr; - dev->mem_resource[i].len = end_addr - phys_addr + 1; + dev->pci_mem[i].mem_res.phys_addr = phys_addr; + dev->pci_mem[i].mem_res.len = end_addr - phys_addr + 1; /* not mapped for now */ - dev->mem_resource[i].addr = NULL; + dev->pci_mem[i].mem_res.addr = NULL; } } fclose(f); @@ -347,9 +347,8 @@ pci_scan_one(const char *dirname, const struct rte_pci_addr *addr) dev2->max_vfs = dev->max_vfs; dev2->id = dev->id; pci_common_set(dev2); - memmove(dev2->mem_resource, - dev->mem_resource, - sizeof(dev->mem_resource)); + memmove(dev2->pci_mem, dev->pci_mem, + sizeof(dev->pci_mem)); } else { /** * If device is plugged and driver is diff --git a/drivers/bus/pci/linux/pci_uio.c b/drivers/bus/pci/linux/pci_uio.c index 2bf16e9369..45e174f305 100644 --- a/drivers/bus/pci/linux/pci_uio.c +++ b/drivers/bus/pci/linux/pci_uio.c @@ -59,10 +59,10 @@ int pci_uio_mmio_read(const struct rte_pci_device *dev, int bar, void *buf, size_t len, off_t offset) { - if (bar >= PCI_MAX_RESOURCE || dev->mem_resource[bar].addr == NULL || - (uint64_t)offset + len > dev->mem_resource[bar].len) + if (bar >= PCI_MAX_RESOURCE || dev->pci_mem[bar].mem_res.addr == NULL || + (uint64_t)offset + len > dev->pci_mem[bar].mem_res.len) return -1; - memcpy(buf, (uint8_t *)dev->mem_resource[bar].addr + offset, len); + memcpy(buf, (uint8_t *)dev->pci_mem[bar].mem_res.addr + offset, len); return len; } @@ -70,10 +70,10 @@ int pci_uio_mmio_write(const struct rte_pci_device *dev, int bar, const void *buf, size_t len, off_t offset) { - if (bar >= PCI_MAX_RESOURCE || dev->mem_resource[bar].addr == NULL || - (uint64_t)offset + len > dev->mem_resource[bar].len) + if (bar >= PCI_MAX_RESOURCE || dev->pci_mem[bar].mem_res.addr == NULL || + (uint64_t)offset + len > dev->pci_mem[bar].mem_res.len) return -1; - memcpy((uint8_t *)dev->mem_resource[bar].addr + offset, buf, len); + memcpy((uint8_t *)dev->pci_mem[bar].mem_res.addr + offset, buf, len); return len; } @@ -388,22 +388,22 @@ pci_uio_map_resource_by_index(struct rte_pci_device *dev, int res_idx, pci_map_addr = pci_find_max_end_va(); mapaddr = pci_map_resource(pci_map_addr, fd, 0, - (size_t)dev->mem_resource[res_idx].len, 0); + (size_t)dev->pci_mem[res_idx].mem_res.len, 0); close(fd); if (mapaddr == NULL) goto error; pci_map_addr = RTE_PTR_ADD(mapaddr, - (size_t)dev->mem_resource[res_idx].len); + (size_t)dev->pci_mem[res_idx].mem_res.len); pci_map_addr = RTE_PTR_ALIGN(pci_map_addr, sysconf(_SC_PAGE_SIZE)); - maps[map_idx].phaddr = dev->mem_resource[res_idx].phys_addr; - maps[map_idx].size = dev->mem_resource[res_idx].len; + maps[map_idx].phaddr = dev->pci_mem[res_idx].mem_res.phys_addr; + maps[map_idx].size = dev->pci_mem[res_idx].mem_res.len; maps[map_idx].addr = mapaddr; maps[map_idx].offset = 0; strcpy(maps[map_idx].path, devname); - dev->mem_resource[res_idx].addr = mapaddr; + dev->pci_mem[res_idx].mem_res.addr = mapaddr; return 0; @@ -463,7 +463,7 @@ pci_uio_ioport_map(struct rte_pci_device *dev, int bar, RTE_LOG(DEBUG, EAL, "%s(): PIO BAR %08lx detected\n", __func__, base); } else if (flags & IORESOURCE_MEM) { - base = (unsigned long)dev->mem_resource[bar].addr; + base = (unsigned long)dev->pci_mem[bar].mem_res.addr; RTE_LOG(DEBUG, EAL, "%s(): MMIO BAR %08lx detected\n", __func__, base); } else { RTE_LOG(ERR, EAL, "%s(): unknown BAR type\n", __func__); diff --git a/drivers/bus/pci/linux/pci_vfio.c b/drivers/bus/pci/linux/pci_vfio.c index f6289c907f..3c30055495 100644 --- a/drivers/bus/pci/linux/pci_vfio.c +++ b/drivers/bus/pci/linux/pci_vfio.c @@ -673,6 +673,82 @@ pci_vfio_mmap_bar(int vfio_dev_fd, struct mapped_pci_resource *vfio_res, return 0; } +static int +pci_vfio_sparse_mmap_bar(int vfio_dev_fd, struct mapped_pci_resource *vfio_res, + struct vfio_region_sparse_mmap_area *vfio_areas, + uint32_t nr_areas, int bar_index, int additional_flags, + int numa_node) +{ + struct pci_map *map = &vfio_res->maps[bar_index]; + struct rte_mem_map_area *area; + struct vfio_region_sparse_mmap_area *sparse; + void *bar_addr; + uint32_t i, j; + + map->nr_areas = nr_areas; + + if (map->size == 0) { + RTE_LOG(DEBUG, EAL, "Bar size is 0, skip BAR%d\n", bar_index); + return 0; + } + + if (!map->nr_areas) { + RTE_LOG(DEBUG, EAL, "Skip bar %d with no sparse mmap areas\n", + bar_index); + map->areas = NULL; + return 0; + } + + if (map->areas == NULL) { + map->areas = rte_zmalloc_socket(NULL, + sizeof(*map->areas) * nr_areas, + RTE_CACHE_LINE_SIZE, numa_node); + if (map->areas == NULL) { + RTE_LOG(ERR, EAL, + "Cannot alloc memory for sparse map areas\n"); + return -1; + } + } + + for (i = 0; i < map->nr_areas; i++) { + area = &map->areas[i]; + sparse = &vfio_areas[i]; + + bar_addr = mmap(map->addr, sparse->size, 0, MAP_PRIVATE | + MAP_ANONYMOUS | additional_flags, -1, 0); + if (bar_addr != MAP_FAILED) { + area->addr = pci_map_resource(bar_addr, vfio_dev_fd, + map->offset + sparse->offset, sparse->size, + RTE_MAP_FORCE_ADDRESS); + if (area->addr == NULL) { + munmap(bar_addr, sparse->size); + RTE_LOG(ERR, EAL, "Failed to map pci BAR%d\n", + bar_index); + goto err_map; + } + + area->offset = sparse->offset; + area->size = sparse->size; + } else { + RTE_LOG(ERR, EAL, "Failed to create inaccessible mapping for BAR%d\n", + bar_index); + goto err_map; + } + } + + return 0; + +err_map: + for (j = 0; j < i; j++) { + pci_unmap_resource(map->areas[j].addr, map->areas[j].size); + map->areas[j].offset = 0; + map->areas[j].size = 0; + } + rte_free(map->areas); + map->nr_areas = 0; + return -1; +} + /* * region info may contain capability headers, so we need to keep reallocating * the memory until we match allocated memory size with argsz. @@ -789,6 +865,31 @@ pci_vfio_fill_regions(struct rte_pci_device *dev, int vfio_dev_fd, return 0; } +static void +clean_up_pci_resource(struct mapped_pci_resource *vfio_res) +{ + struct pci_map *map; + uint32_t i, j; + + for (i = 0; i < PCI_MAX_RESOURCE; i++) { + map = &vfio_res->maps[i]; + if (map->nr_areas > 1) { + for (j = 0; j < map->nr_areas; j++) + pci_unmap_resource(map->areas[j].addr, + map->areas[j].size); + } else { + /* + * We do not need to be aware of MSI-X BAR mappings. + * Using current maps array is enough. + */ + if (map->addr) + pci_unmap_resource(map->addr, map->size); + } + } + + rte_free(map->areas); +} + static int pci_vfio_map_resource_primary(struct rte_pci_device *dev) { @@ -875,6 +976,8 @@ pci_vfio_map_resource_primary(struct rte_pci_device *dev) for (i = 0; i < vfio_res->nb_maps; i++) { void *bar_addr; + struct vfio_info_cap_header *hdr; + struct vfio_region_info_cap_sparse_mmap *sparse; ret = pci_vfio_get_region_info(vfio_dev_fd, ®, i); if (ret < 0) { @@ -920,15 +1023,39 @@ pci_vfio_map_resource_primary(struct rte_pci_device *dev) maps[i].size = reg->size; maps[i].path = NULL; /* vfio doesn't have per-resource paths */ - ret = pci_vfio_mmap_bar(vfio_dev_fd, vfio_res, i, 0); - if (ret < 0) { - RTE_LOG(ERR, EAL, "%s mapping BAR%i failed: %s\n", - pci_addr, i, strerror(errno)); - free(reg); - goto err_vfio_res; - } + hdr = pci_vfio_info_cap(reg, VFIO_REGION_INFO_CAP_SPARSE_MMAP); + + if (hdr != NULL) { + sparse = container_of(hdr, + struct vfio_region_info_cap_sparse_mmap, + header); + + ret = pci_vfio_sparse_mmap_bar(vfio_dev_fd, vfio_res, + sparse->areas, sparse->nr_areas, i, 0, + dev->device.numa_node); + if (ret < 0) { + RTE_LOG(ERR, EAL, "%s sparse mapping BAR%i failed: %s\n", + pci_addr, i, strerror(errno)); + free(reg); + goto err_vfio_res; + } - dev->mem_resource[i].addr = maps[i].addr; + dev->pci_mem[i].is_sparse = true; + dev->pci_mem[i].sparse_mem.len = maps[i].size; + dev->pci_mem[i].sparse_mem.nr_maps = maps[i].nr_areas; + dev->pci_mem[i].sparse_mem.areas = maps[i].areas; + } else { + ret = pci_vfio_mmap_bar(vfio_dev_fd, vfio_res, i, 0); + if (ret < 0) { + RTE_LOG(ERR, EAL, "%s mapping BAR%i failed: %s\n", + pci_addr, i, strerror(errno)); + free(reg); + goto err_vfio_res; + } + + dev->pci_mem[i].is_sparse = false; + dev->pci_mem[i].mem_res.addr = maps[i].addr; + } free(reg); } @@ -949,6 +1076,7 @@ pci_vfio_map_resource_primary(struct rte_pci_device *dev) return 0; err_vfio_res: + clean_up_pci_resource(vfio_res); rte_free(vfio_res); err_vfio_dev_fd: rte_vfio_release_device(rte_pci_get_sysfs_path(), @@ -968,7 +1096,7 @@ pci_vfio_map_resource_secondary(struct rte_pci_device *dev) struct mapped_pci_res_list *vfio_res_list = RTE_TAILQ_CAST(rte_vfio_tailq.head, mapped_pci_res_list); - struct pci_map *maps; + struct pci_map *maps, *cur; if (rte_intr_fd_set(dev->intr_handle, -1)) return -1; @@ -1008,14 +1136,50 @@ pci_vfio_map_resource_secondary(struct rte_pci_device *dev) maps = vfio_res->maps; for (i = 0; i < vfio_res->nb_maps; i++) { - ret = pci_vfio_mmap_bar(vfio_dev_fd, vfio_res, i, MAP_FIXED); - if (ret < 0) { - RTE_LOG(ERR, EAL, "%s mapping BAR%i failed: %s\n", - pci_addr, i, strerror(errno)); - goto err_vfio_dev_fd; - } + cur = &maps[i]; + if (cur->nr_areas > 1) { + struct vfio_region_sparse_mmap_area *areas; + uint32_t i; + + areas = malloc(sizeof(*areas) * cur->nr_areas); + if (areas == NULL) { + RTE_LOG(ERR, EAL, "Failed to alloc vfio areas for %s\n", + pci_addr); + goto err_vfio_dev_fd; + } + + for (i = 0; i < cur->nr_areas; i++) { + areas[i].offset = cur->areas[i].offset; + areas[i].size = cur->areas[i].size; + } + + ret = pci_vfio_sparse_mmap_bar(vfio_dev_fd, vfio_res, + areas, cur->nr_areas, i, MAP_FIXED, + dev->device.numa_node); + if (ret < 0) { + RTE_LOG(ERR, EAL, "%s sparse mapping BAR%i failed: %s\n", + pci_addr, i, strerror(errno)); + free(areas); + goto err_vfio_dev_fd; + } - dev->mem_resource[i].addr = maps[i].addr; + dev->pci_mem[i].is_sparse = true; + dev->pci_mem[i].sparse_mem.len = cur->size; + dev->pci_mem[i].sparse_mem.nr_maps = cur->nr_areas; + dev->pci_mem[i].sparse_mem.areas = cur->areas; + free(areas); + } else { + ret = pci_vfio_mmap_bar(vfio_dev_fd, vfio_res, + i, MAP_FIXED); + if (ret < 0) { + RTE_LOG(ERR, EAL, "%s mapping BAR%i failed: %s\n", + pci_addr, i, strerror(errno)); + goto err_vfio_dev_fd; + } + + dev->pci_mem[i].is_sparse = false; + dev->pci_mem[i].mem_res.addr = cur->addr; + } } /* we need save vfio_dev_fd, so it can be used during release */ @@ -1052,8 +1216,6 @@ find_and_unmap_vfio_resource(struct mapped_pci_res_list *vfio_res_list, const char *pci_addr) { struct mapped_pci_resource *vfio_res = NULL; - struct pci_map *maps; - int i; /* Get vfio_res */ TAILQ_FOREACH(vfio_res, vfio_res_list, next) { @@ -1062,25 +1224,13 @@ find_and_unmap_vfio_resource(struct mapped_pci_res_list *vfio_res_list, break; } - if (vfio_res == NULL) + if (vfio_res == NULL) return vfio_res; RTE_LOG(INFO, EAL, "Releasing PCI mapped resource for %s\n", pci_addr); - maps = vfio_res->maps; - for (i = 0; i < vfio_res->nb_maps; i++) { - - /* - * We do not need to be aware of MSI-X table BAR mappings as - * when mapping. Just using current maps array is enough - */ - if (maps[i].addr) { - RTE_LOG(INFO, EAL, "Calling pci_unmap_resource for %s at %p\n", - pci_addr, maps[i].addr); - pci_unmap_resource(maps[i].addr, maps[i].size); - } - } + clean_up_pci_resource(vfio_res); return vfio_res; } diff --git a/drivers/bus/pci/pci_common.c b/drivers/bus/pci/pci_common.c index 52404ab0fe..18a6b38fd8 100644 --- a/drivers/bus/pci/pci_common.c +++ b/drivers/bus/pci/pci_common.c @@ -482,11 +482,10 @@ pci_dump_one_device(FILE *f, struct rte_pci_device *dev) fprintf(f, " - vendor:%x device:%x\n", dev->id.vendor_id, dev->id.device_id); - for (i = 0; i != sizeof(dev->mem_resource) / - sizeof(dev->mem_resource[0]); i++) { + for (i = 0; i != PCI_MAX_RESOURCE; i++) { fprintf(f, " %16.16"PRIx64" %16.16"PRIx64"\n", - dev->mem_resource[i].phys_addr, - dev->mem_resource[i].len); + dev->pci_mem[i].mem_res.phys_addr, + dev->pci_mem[i].mem_res.len); } return 0; } @@ -582,20 +581,38 @@ pci_find_device_by_addr(const void *failure_addr) { struct rte_pci_device *pdev = NULL; uint64_t check_point, start, end, len; - int i; + struct rte_pci_mem_resource *pci_mem; + struct rte_mem_map_area *ar; + uint32_t i, j; check_point = (uint64_t)(uintptr_t)failure_addr; FOREACH_DEVICE_ON_PCIBUS(pdev) { - for (i = 0; i != RTE_DIM(pdev->mem_resource); i++) { - start = (uint64_t)(uintptr_t)pdev->mem_resource[i].addr; - len = pdev->mem_resource[i].len; - end = start + len; - if (check_point >= start && check_point < end) { - RTE_LOG(DEBUG, EAL, "Failure address %16.16" - PRIx64" belongs to device %s!\n", - check_point, pdev->device.name); - return pdev; + for (i = 0; i != PCI_MAX_RESOURCE; i++) { + pci_mem = &pdev->pci_mem[i]; + if (pci_mem->is_sparse) { + for (j = 0; j != pci_mem->sparse_mem.nr_maps; j++) { + ar = &pci_mem->sparse_mem.areas[j]; + start = (uint64_t)(uintptr_t)ar->addr; + len = ar->size; + end = start + len; + if (check_point >= start && check_point < end) { + RTE_LOG(DEBUG, EAL, "Failure address %16.16" + PRIx64" belongs to device %s!\n", + check_point, pdev->device.name); + return pdev; + } + } + } else { + start = (uint64_t)(uintptr_t)pci_mem->mem_res.addr; + len = pci_mem->mem_res.len; + end = start + len; + if (check_point >= start && check_point < end) { + RTE_LOG(DEBUG, EAL, "Failure address %16.16" + PRIx64" belongs to device %s!\n", + check_point, pdev->device.name); + return pdev; + } } } } diff --git a/drivers/bus/pci/pci_common_uio.c b/drivers/bus/pci/pci_common_uio.c index 76c661f054..d4ee42c0ca 100644 --- a/drivers/bus/pci/pci_common_uio.c +++ b/drivers/bus/pci/pci_common_uio.c @@ -71,7 +71,8 @@ pci_uio_map_secondary(struct rte_pci_device *dev) } return -1; } - dev->mem_resource[i].addr = mapaddr; + dev->pci_mem[i].is_sparse = false; + dev->pci_mem[i].mem_res.addr = mapaddr; } return 0; } @@ -108,7 +109,8 @@ pci_uio_map_resource(struct rte_pci_device *dev) /* Map all BARs */ for (i = 0; i != PCI_MAX_RESOURCE; i++) { /* skip empty BAR */ - phaddr = dev->mem_resource[i].phys_addr; + dev->pci_mem[i].is_sparse = false; + phaddr = dev->pci_mem[i].mem_res.phys_addr; if (phaddr == 0) continue; @@ -164,10 +166,10 @@ pci_uio_remap_resource(struct rte_pci_device *dev) /* Remap all BARs */ for (i = 0; i != PCI_MAX_RESOURCE; i++) { /* skip empty BAR */ - if (dev->mem_resource[i].phys_addr == 0) + if (dev->pci_mem[i].mem_res.phys_addr == 0) continue; - map_address = mmap(dev->mem_resource[i].addr, - (size_t)dev->mem_resource[i].len, + map_address = mmap(dev->pci_mem[i].mem_res.addr, + (size_t)dev->pci_mem[i].mem_res.len, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS | MAP_FIXED, -1, 0); if (map_address == MAP_FAILED) { diff --git a/drivers/bus/pci/private.h b/drivers/bus/pci/private.h index 2d6991ccb7..835964f3e4 100644 --- a/drivers/bus/pci/private.h +++ b/drivers/bus/pci/private.h @@ -121,6 +121,8 @@ struct pci_map { uint64_t offset; uint64_t size; uint64_t phaddr; + uint32_t nr_areas; + struct rte_mem_map_area *areas; }; struct pci_msix_table { diff --git a/drivers/common/cnxk/roc_dev.c b/drivers/common/cnxk/roc_dev.c index 2388237186..20bc514cf7 100644 --- a/drivers/common/cnxk/roc_dev.c +++ b/drivers/common/cnxk/roc_dev.c @@ -1151,8 +1151,8 @@ dev_init(struct dev *dev, struct plt_pci_device *pci_dev) if (!dev_cache_line_size_valid()) return -EFAULT; - bar2 = (uintptr_t)pci_dev->mem_resource[2].addr; - bar4 = (uintptr_t)pci_dev->mem_resource[4].addr; + bar2 = (uintptr_t)pci_dev->pci_mem[2].mem_res.addr; + bar4 = (uintptr_t)pci_dev->pci_mem[4].mem_res.addr; if (bar2 == 0 || bar4 == 0) { plt_err("Failed to get PCI bars"); rc = -ENODEV; diff --git a/drivers/common/cnxk/roc_dpi.c b/drivers/common/cnxk/roc_dpi.c index 93c8318a3d..bd6c87d353 100644 --- a/drivers/common/cnxk/roc_dpi.c +++ b/drivers/common/cnxk/roc_dpi.c @@ -152,7 +152,7 @@ roc_dpi_dev_init(struct roc_dpi *roc_dpi) struct plt_pci_device *pci_dev = roc_dpi->pci_dev; uint16_t vfid; - roc_dpi->rbase = pci_dev->mem_resource[0].addr; + roc_dpi->rbase = pci_dev->pci_mem[0].mem_res.addr; vfid = ((pci_dev->addr.devid & 0x1F) << 3) | (pci_dev->addr.function & 0x7); vfid -= 1; diff --git a/drivers/common/cnxk/roc_ml.c b/drivers/common/cnxk/roc_ml.c index 7390697b1d..e1d3f3dc38 100644 --- a/drivers/common/cnxk/roc_ml.c +++ b/drivers/common/cnxk/roc_ml.c @@ -100,9 +100,9 @@ roc_ml_addr_pa_to_offset(struct roc_ml *roc_ml, uint64_t phys_addr) struct ml *ml = roc_ml_to_ml_priv(roc_ml); if (roc_model_is_cn10ka()) - return phys_addr - ml->pci_dev->mem_resource[0].phys_addr; + return phys_addr - ml->pci_dev->pci_mem[0].mem_res.phys_addr; else - return phys_addr - ml->pci_dev->mem_resource[0].phys_addr - ML_MLAB_BLK_OFFSET; + return phys_addr - ml->pci_dev->pci_mem[0].mem_res.phys_addr - ML_MLAB_BLK_OFFSET; } uint64_t @@ -111,9 +111,9 @@ roc_ml_addr_offset_to_pa(struct roc_ml *roc_ml, uint64_t offset) struct ml *ml = roc_ml_to_ml_priv(roc_ml); if (roc_model_is_cn10ka()) - return ml->pci_dev->mem_resource[0].phys_addr + offset; + return ml->pci_dev->pci_mem[0].mem_res.phys_addr + offset; else - return ml->pci_dev->mem_resource[0].phys_addr + ML_MLAB_BLK_OFFSET + offset; + return ml->pci_dev->pci_mem[0].mem_res.phys_addr + ML_MLAB_BLK_OFFSET + offset; } void @@ -543,13 +543,14 @@ roc_ml_dev_init(struct roc_ml *roc_ml) ml->pci_dev = pci_dev; dev->roc_ml = roc_ml; - ml->ml_reg_addr = ml->pci_dev->mem_resource[0].addr; + ml->ml_reg_addr = ml->pci_dev->pci_mem[0].mem_res.addr; ml->ml_mlr_base = 0; ml->ml_mlr_base_saved = false; - plt_ml_dbg("ML: PCI Physical Address : 0x%016lx", ml->pci_dev->mem_resource[0].phys_addr); + plt_ml_dbg("ML: PCI Physical Address : 0x%016lx", + ml->pci_dev->pci_mem[0].mem_res.phys_addr); plt_ml_dbg("ML: PCI Virtual Address : 0x%016lx", - PLT_U64_CAST(ml->pci_dev->mem_resource[0].addr)); + PLT_U64_CAST(ml->pci_dev->pci_mem[0].mem_res.addr)); plt_spinlock_init(&roc_ml->sp_spinlock); plt_spinlock_init(&roc_ml->fp_spinlock); @@ -589,11 +590,12 @@ roc_ml_blk_init(struct roc_bphy *roc_bphy, struct roc_ml *roc_ml) plt_ml_dbg( "MLAB: Physical Address : 0x%016lx", - PLT_PTR_ADD_U64_CAST(ml->pci_dev->mem_resource[0].phys_addr, ML_MLAB_BLK_OFFSET)); + PLT_PTR_ADD_U64_CAST(ml->pci_dev->pci_mem[0].mem_res.phys_addr, + ML_MLAB_BLK_OFFSET)); plt_ml_dbg("MLAB: Virtual Address : 0x%016lx", - PLT_PTR_ADD_U64_CAST(ml->pci_dev->mem_resource[0].addr, ML_MLAB_BLK_OFFSET)); + PLT_PTR_ADD_U64_CAST(ml->pci_dev->pci_mem[0].mem_res.addr, ML_MLAB_BLK_OFFSET)); - ml->ml_reg_addr = PLT_PTR_ADD(ml->pci_dev->mem_resource[0].addr, ML_MLAB_BLK_OFFSET); + ml->ml_reg_addr = PLT_PTR_ADD(ml->pci_dev->pci_mem[0].mem_res.addr, ML_MLAB_BLK_OFFSET); ml->ml_mlr_base = 0; ml->ml_mlr_base_saved = false; diff --git a/drivers/common/qat/dev/qat_dev_gen1.c b/drivers/common/qat/dev/qat_dev_gen1.c index cf480dcba8..8fd069275d 100644 --- a/drivers/common/qat/dev/qat_dev_gen1.c +++ b/drivers/common/qat/dev/qat_dev_gen1.c @@ -214,7 +214,7 @@ qat_reset_ring_pairs_gen1(struct qat_pci_device *qat_pci_dev __rte_unused) const struct rte_mem_resource * qat_dev_get_transport_bar_gen1(struct rte_pci_device *pci_dev) { - return &pci_dev->mem_resource[0]; + return &pci_dev->pci_mem[0].mem_res; } int diff --git a/drivers/common/qat/dev/qat_dev_gen4.c b/drivers/common/qat/dev/qat_dev_gen4.c index 1b3a5deabf..2eff45db3a 100644 --- a/drivers/common/qat/dev/qat_dev_gen4.c +++ b/drivers/common/qat/dev/qat_dev_gen4.c @@ -271,14 +271,14 @@ qat_reset_ring_pairs_gen4(struct qat_pci_device *qat_pci_dev) static const struct rte_mem_resource * qat_dev_get_transport_bar_gen4(struct rte_pci_device *pci_dev) { - return &pci_dev->mem_resource[0]; + return &pci_dev->pci_mem[0].mem_res; } static int qat_dev_get_misc_bar_gen4(struct rte_mem_resource **mem_resource, struct rte_pci_device *pci_dev) { - *mem_resource = &pci_dev->mem_resource[2]; + *mem_resource = &pci_dev->pci_mem[2].mem_res; return 0; } diff --git a/drivers/common/sfc_efx/sfc_efx.c b/drivers/common/sfc_efx/sfc_efx.c index 2dc5545760..6eceede9aa 100644 --- a/drivers/common/sfc_efx/sfc_efx.c +++ b/drivers/common/sfc_efx/sfc_efx.c @@ -77,7 +77,7 @@ sfc_efx_find_mem_bar(efsys_pci_config_t *configp, int bar_index, result.esb_rid = bar_index; result.esb_dev = dev; - result.esb_base = dev->mem_resource[bar_index].addr; + result.esb_base = dev->pci_mem[bar_index].mem_res.addr; *barp = result; diff --git a/drivers/compress/octeontx/otx_zip.c b/drivers/compress/octeontx/otx_zip.c index 11471dcbb4..6c00fdbdaa 100644 --- a/drivers/compress/octeontx/otx_zip.c +++ b/drivers/compress/octeontx/otx_zip.c @@ -149,10 +149,10 @@ zipvf_create(struct rte_compressdev *compressdev) void *vbar0; uint64_t reg; - if (pdev->mem_resource[0].phys_addr == 0ULL) + if (pdev->pci_mem[0].mem_res.phys_addr == 0ULL) return -EIO; - vbar0 = pdev->mem_resource[0].addr; + vbar0 = pdev->pci_mem[0].mem_res.addr; if (!vbar0) { ZIP_PMD_ERR("Failed to map BAR0 of %s", dev_name); return -ENODEV; diff --git a/drivers/crypto/ccp/ccp_dev.c b/drivers/crypto/ccp/ccp_dev.c index ee30f5ac30..24874d92c0 100644 --- a/drivers/crypto/ccp/ccp_dev.c +++ b/drivers/crypto/ccp/ccp_dev.c @@ -67,7 +67,7 @@ ccp_read_hwrng(uint32_t *value) struct ccp_device *dev; TAILQ_FOREACH(dev, &ccp_list, next) { - void *vaddr = (void *)(dev->pci->mem_resource[2].addr); + void *vaddr = (void *)(dev->pci->pci_mem[2].mem_res.addr); while (dev->hwrng_retries++ < CCP_MAX_TRNG_RETRIES) { *value = CCP_READ_REG(vaddr, TRNG_OUT_REG); @@ -493,7 +493,7 @@ ccp_add_device(struct ccp_device *dev) dev->id = ccp_dev_id++; dev->qidx = 0; - vaddr = (void *)(dev->pci->mem_resource[2].addr); + vaddr = (void *)(dev->pci->pci_mem[2].mem_res.addr); if (dev->pci->id.device_id == AMD_PCI_CCP_5B) { CCP_WRITE_REG(vaddr, CMD_TRNG_CTL_OFFSET, 0x00012D57); diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c index 86efe75cc3..f5d41e3876 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c +++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c @@ -400,7 +400,7 @@ cnxk_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id, pci_dev = RTE_DEV_TO_PCI(dev->device); - if (pci_dev->mem_resource[2].addr == NULL) { + if (pci_dev->pci_mem[2].mem_res.addr == NULL) { plt_err("Invalid PCI mem address"); return -EIO; } diff --git a/drivers/crypto/nitrox/nitrox_device.c b/drivers/crypto/nitrox/nitrox_device.c index 5b319dd681..fc1e9ce6a5 100644 --- a/drivers/crypto/nitrox/nitrox_device.c +++ b/drivers/crypto/nitrox/nitrox_device.c @@ -35,7 +35,7 @@ ndev_init(struct nitrox_device *ndev, struct rte_pci_device *pdev) enum nitrox_vf_mode vf_mode; ndev->pdev = pdev; - ndev->bar_addr = pdev->mem_resource[0].addr; + ndev->bar_addr = pdev->pci_mem[0].mem_res.addr; vf_mode = vf_get_vf_config_mode(ndev->bar_addr); ndev->nr_queues = vf_config_mode_to_nr_queues(vf_mode); } @@ -70,7 +70,7 @@ nitrox_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, int err; /* Nitrox CSR space */ - if (!pdev->mem_resource[0].addr) + if (!pdev->pci_mem[0].mem_res.addr) return -EINVAL; ndev = ndev_allocate(pdev); diff --git a/drivers/crypto/octeontx/otx_cryptodev_ops.c b/drivers/crypto/octeontx/otx_cryptodev_ops.c index 947e1be385..645b2fd979 100644 --- a/drivers/crypto/octeontx/otx_cryptodev_ops.c +++ b/drivers/crypto/octeontx/otx_cryptodev_ops.c @@ -157,7 +157,7 @@ otx_cpt_que_pair_setup(struct rte_cryptodev *dev, pci_dev = RTE_DEV_TO_PCI(dev->device); - if (pci_dev->mem_resource[0].addr == NULL) { + if (pci_dev->pci_mem[0].mem_res.addr == NULL) { CPT_LOG_ERR("PCI mem address null"); return -EIO; } @@ -1004,7 +1004,7 @@ otx_cpt_dev_create(struct rte_cryptodev *c_dev) char dev_name[32]; int ret; - if (pdev->mem_resource[0].phys_addr == 0ULL) + if (pdev->pci_mem[0].mem_res.phys_addr == 0ULL) return -EIO; /* for secondary processes, we don't initialise any further as primary @@ -1025,7 +1025,7 @@ otx_cpt_dev_create(struct rte_cryptodev *c_dev) snprintf(dev_name, 32, "%02x:%02x.%x", pdev->addr.bus, pdev->addr.devid, pdev->addr.function); - reg_base = pdev->mem_resource[0].addr; + reg_base = pdev->pci_mem[0].mem_res.addr; if (!reg_base) { CPT_LOG_ERR("Failed to map BAR0 of %s", dev_name); ret = -ENODEV; diff --git a/drivers/crypto/virtio/virtio_pci.c b/drivers/crypto/virtio/virtio_pci.c index 95a43c8801..c27239b8f8 100644 --- a/drivers/crypto/virtio/virtio_pci.c +++ b/drivers/crypto/virtio/virtio_pci.c @@ -322,14 +322,14 @@ get_cfg_addr(struct rte_pci_device *dev, struct virtio_pci_cap *cap) return NULL; } - if (offset + length > dev->mem_resource[bar].len) { + if (offset + length > dev->pci_mem[bar].mem_res.len) { VIRTIO_CRYPTO_INIT_LOG_ERR( "invalid cap: overflows bar space: %u > %" PRIu64, - offset + length, dev->mem_resource[bar].len); + offset + length, dev->pci_mem[bar].mem_res.len); return NULL; } - base = dev->mem_resource[bar].addr; + base = dev->pci_mem[bar].mem_res.addr; if (base == NULL) { VIRTIO_CRYPTO_INIT_LOG_ERR("bar %u base addr is NULL", bar); return NULL; diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c index a6f4a31e0e..6294ed5ad5 100644 --- a/drivers/dma/cnxk/cnxk_dmadev.c +++ b/drivers/dma/cnxk/cnxk_dmadev.c @@ -637,7 +637,7 @@ cnxk_dmadev_probe(struct rte_pci_driver *pci_drv __rte_unused, struct roc_dpi *rdpi = NULL; int rc; - if (!pci_dev->mem_resource[0].addr) + if (!pci_dev->pci_mem[0].mem_res.addr) return -ENODEV; rc = roc_plt_init(); diff --git a/drivers/dma/hisilicon/hisi_dmadev.c b/drivers/dma/hisilicon/hisi_dmadev.c index 0e11ca14cc..ab2dfb63d8 100644 --- a/drivers/dma/hisilicon/hisi_dmadev.c +++ b/drivers/dma/hisilicon/hisi_dmadev.c @@ -894,7 +894,7 @@ hisi_dma_create(struct rte_pci_device *pci_dev, uint8_t queue_id, hw->data = dev->data; hw->revision = revision; hw->reg_layout = hisi_dma_reg_layout(revision); - hw->io_base = pci_dev->mem_resource[REG_PCI_BAR_INDEX].addr; + hw->io_base = pci_dev->pci_mem[REG_PCI_BAR_INDEX].mem_res.addr; hw->queue_id = queue_id; hw->sq_tail_reg = hisi_dma_queue_regaddr(hw, HISI_DMA_QUEUE_SQ_TAIL_REG); @@ -950,7 +950,7 @@ hisi_dma_probe(struct rte_pci_driver *pci_drv __rte_unused, rte_pci_device_name(&pci_dev->addr, name, sizeof(name)); - if (pci_dev->mem_resource[2].addr == NULL) { + if (pci_dev->pci_mem[2].mem_res.addr == NULL) { HISI_DMA_LOG(ERR, "%s BAR2 is NULL!\n", name); return -ENODEV; } @@ -961,7 +961,7 @@ hisi_dma_probe(struct rte_pci_driver *pci_drv __rte_unused, HISI_DMA_LOG(DEBUG, "%s read PCI revision: 0x%x", name, revision); if (rte_eal_process_type() == RTE_PROC_PRIMARY) - hisi_dma_init_gbl(pci_dev->mem_resource[2].addr, revision); + hisi_dma_init_gbl(pci_dev->pci_mem[2].mem_res.addr, revision); for (i = 0; i < HISI_DMA_MAX_HW_QUEUES; i++) { ret = hisi_dma_create(pci_dev, i, revision); diff --git a/drivers/dma/idxd/idxd_pci.c b/drivers/dma/idxd/idxd_pci.c index 781fa02db3..15eb3f22ef 100644 --- a/drivers/dma/idxd/idxd_pci.c +++ b/drivers/dma/idxd/idxd_pci.c @@ -188,12 +188,12 @@ init_pci_device(struct rte_pci_device *dev, struct idxd_dmadev *idxd, rte_spinlock_init(&pci->lk); /* assign the bar registers, and then configure device */ - pci->regs = dev->mem_resource[0].addr; + pci->regs = dev->pci_mem[0].mem_res.addr; grp_offset = (uint16_t)pci->regs->offsets[0]; pci->grp_regs = RTE_PTR_ADD(pci->regs, grp_offset * 0x100); wq_offset = (uint16_t)(pci->regs->offsets[0] >> 16); pci->wq_regs_base = RTE_PTR_ADD(pci->regs, wq_offset * 0x100); - pci->portals = dev->mem_resource[2].addr; + pci->portals = dev->pci_mem[2].mem_res.addr; pci->wq_cfg_sz = (pci->regs->wqcap >> 24) & 0x0F; /* sanity check device status */ diff --git a/drivers/dma/ioat/ioat_dmadev.c b/drivers/dma/ioat/ioat_dmadev.c index 5fc14bcf22..9fc6d73bb5 100644 --- a/drivers/dma/ioat/ioat_dmadev.c +++ b/drivers/dma/ioat/ioat_dmadev.c @@ -644,7 +644,7 @@ ioat_dmadev_create(const char *name, struct rte_pci_device *dev) ioat = dmadev->data->dev_private; ioat->dmadev = dmadev; - ioat->regs = dev->mem_resource[0].addr; + ioat->regs = dev->pci_mem[0].mem_res.addr; ioat->doorbell = &ioat->regs->dmacount; ioat->qcfg.nb_desc = 0; ioat->desc_ring = NULL; diff --git a/drivers/event/dlb2/pf/dlb2_main.c b/drivers/event/dlb2/pf/dlb2_main.c index 717aa4fc08..0bb90d6964 100644 --- a/drivers/event/dlb2/pf/dlb2_main.c +++ b/drivers/event/dlb2/pf/dlb2_main.c @@ -170,32 +170,32 @@ dlb2_probe(struct rte_pci_device *pdev, const void *probe_args) */ /* BAR 0 */ - if (pdev->mem_resource[0].addr == NULL) { + if (pdev->pci_mem[0].mem_res.addr == NULL) { DLB2_ERR(dlb2_dev, "probe: BAR 0 addr (csr_kva) is NULL\n"); ret = -EINVAL; goto pci_mmap_bad_addr; } - dlb2_dev->hw.func_kva = (void *)(uintptr_t)pdev->mem_resource[0].addr; - dlb2_dev->hw.func_phys_addr = pdev->mem_resource[0].phys_addr; + dlb2_dev->hw.func_kva = (void *)(uintptr_t)pdev->pci_mem[0].mem_res.addr; + dlb2_dev->hw.func_phys_addr = pdev->pci_mem[0].mem_res.phys_addr; DLB2_INFO(dlb2_dev, "DLB2 FUNC VA=%p, PA=%p, len=%p\n", (void *)dlb2_dev->hw.func_kva, (void *)dlb2_dev->hw.func_phys_addr, - (void *)(pdev->mem_resource[0].len)); + (void *)(pdev->pci_mem[0].mem_res.len)); /* BAR 2 */ - if (pdev->mem_resource[2].addr == NULL) { + if (pdev->pci_mem[2].mem_res.addr == NULL) { DLB2_ERR(dlb2_dev, "probe: BAR 2 addr (func_kva) is NULL\n"); ret = -EINVAL; goto pci_mmap_bad_addr; } - dlb2_dev->hw.csr_kva = (void *)(uintptr_t)pdev->mem_resource[2].addr; - dlb2_dev->hw.csr_phys_addr = pdev->mem_resource[2].phys_addr; + dlb2_dev->hw.csr_kva = (void *)(uintptr_t)pdev->pci_mem[2].mem_res.addr; + dlb2_dev->hw.csr_phys_addr = pdev->pci_mem[2].mem_res.phys_addr; DLB2_INFO(dlb2_dev, "DLB2 CSR VA=%p, PA=%p, len=%p\n", (void *)dlb2_dev->hw.csr_kva, (void *)dlb2_dev->hw.csr_phys_addr, - (void *)(pdev->mem_resource[2].len)); + (void *)(pdev->pci_mem[2].mem_res.len)); dlb2_dev->pdev = pdev; diff --git a/drivers/event/octeontx/ssovf_probe.c b/drivers/event/octeontx/ssovf_probe.c index 2c9601a8ff..04558471c1 100644 --- a/drivers/event/octeontx/ssovf_probe.c +++ b/drivers/event/octeontx/ssovf_probe.c @@ -148,23 +148,23 @@ ssowvf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) if (rte_eal_process_type() != RTE_PROC_PRIMARY) return 0; - if (pci_dev->mem_resource[0].addr == NULL || - pci_dev->mem_resource[2].addr == NULL || - pci_dev->mem_resource[4].addr == NULL) { + if (pci_dev->pci_mem[0].mem_res.addr == NULL || + pci_dev->pci_mem[2].mem_res.addr == NULL || + pci_dev->pci_mem[4].mem_res.addr == NULL) { mbox_log_err("Empty bars %p %p %p", - pci_dev->mem_resource[0].addr, - pci_dev->mem_resource[2].addr, - pci_dev->mem_resource[4].addr); + pci_dev->pci_mem[0].mem_res.addr, + pci_dev->pci_mem[2].mem_res.addr, + pci_dev->pci_mem[4].mem_res.addr); return -ENODEV; } - if (pci_dev->mem_resource[4].len != SSOW_BAR4_LEN) { + if (pci_dev->pci_mem[4].mem_res.len != SSOW_BAR4_LEN) { mbox_log_err("Bar4 len mismatch %d != %d", - SSOW_BAR4_LEN, (int)pci_dev->mem_resource[4].len); + SSOW_BAR4_LEN, (int)pci_dev->pci_mem[4].mem_res.len); return -EINVAL; } - id = pci_dev->mem_resource[4].addr; + id = pci_dev->pci_mem[4].mem_res.addr; vfid = id->vfid; if (vfid >= SSO_MAX_VHWS) { mbox_log_err("Invalid vfid(%d/%d)", vfid, SSO_MAX_VHWS); @@ -173,9 +173,9 @@ ssowvf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) res = &sdev.hws[vfid]; res->vfid = vfid; - res->bar0 = pci_dev->mem_resource[0].addr; - res->bar2 = pci_dev->mem_resource[2].addr; - res->bar4 = pci_dev->mem_resource[4].addr; + res->bar0 = pci_dev->pci_mem[0].mem_res.addr; + res->bar2 = pci_dev->pci_mem[2].mem_res.addr; + res->bar4 = pci_dev->pci_mem[4].mem_res.addr; res->domain = id->domain; sdev.total_ssowvfs++; @@ -229,14 +229,14 @@ ssovf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) if (rte_eal_process_type() != RTE_PROC_PRIMARY) return 0; - if (pci_dev->mem_resource[0].addr == NULL || - pci_dev->mem_resource[2].addr == NULL) { + if (pci_dev->pci_mem[0].mem_res.addr == NULL || + pci_dev->pci_mem[2].mem_res.addr == NULL) { mbox_log_err("Empty bars %p %p", - pci_dev->mem_resource[0].addr, - pci_dev->mem_resource[2].addr); + pci_dev->pci_mem[0].mem_res.addr, + pci_dev->pci_mem[2].mem_res.addr); return -ENODEV; } - idreg = pci_dev->mem_resource[0].addr; + idreg = pci_dev->pci_mem[0].mem_res.addr; idreg += SSO_VHGRP_AQ_THR; val = rte_read64(idreg); @@ -250,8 +250,8 @@ ssovf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) res = &sdev.grp[vfid]; res->vfid = vfid; - res->bar0 = pci_dev->mem_resource[0].addr; - res->bar2 = pci_dev->mem_resource[2].addr; + res->bar0 = pci_dev->pci_mem[0].mem_res.addr; + res->bar2 = pci_dev->pci_mem[2].mem_res.addr; res->domain = val & 0xffff; sdev.total_ssovfs++; diff --git a/drivers/event/octeontx/timvf_probe.c b/drivers/event/octeontx/timvf_probe.c index 7ce3eddd7e..9eeb03b9f2 100644 --- a/drivers/event/octeontx/timvf_probe.c +++ b/drivers/event/octeontx/timvf_probe.c @@ -112,15 +112,15 @@ timvf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) if (rte_eal_process_type() != RTE_PROC_PRIMARY) return 0; - if (pci_dev->mem_resource[0].addr == NULL || - pci_dev->mem_resource[4].addr == NULL) { + if (pci_dev->pci_mem[0].mem_res.addr == NULL || + pci_dev->pci_mem[4].mem_res.addr == NULL) { timvf_log_err("Empty bars %p %p", - pci_dev->mem_resource[0].addr, - pci_dev->mem_resource[4].addr); + pci_dev->pci_mem[0].mem_res.addr, + pci_dev->pci_mem[4].mem_res.addr); return -ENODEV; } - val = rte_read64((uint8_t *)pci_dev->mem_resource[0].addr + + val = rte_read64((uint8_t *)pci_dev->pci_mem[0].mem_res.addr + 0x100 /* TIM_VRINGX_BASE */); vfid = (val >> 23) & 0xff; if (vfid >= TIM_MAX_RINGS) { @@ -130,16 +130,16 @@ timvf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) res = &tdev.rings[tdev.total_timvfs]; res->vfid = vfid; - res->bar0 = pci_dev->mem_resource[0].addr; - res->bar2 = pci_dev->mem_resource[2].addr; - res->bar4 = pci_dev->mem_resource[4].addr; + res->bar0 = pci_dev->pci_mem[0].mem_res.addr; + res->bar2 = pci_dev->pci_mem[2].mem_res.addr; + res->bar4 = pci_dev->pci_mem[4].mem_res.addr; res->domain = (val >> 7) & 0xffff; res->in_use = false; tdev.total_timvfs++; rte_wmb(); timvf_log_dbg("Domain=%d VFid=%d bar0 %p total_timvfs=%d", res->domain, - res->vfid, pci_dev->mem_resource[0].addr, + res->vfid, pci_dev->pci_mem[0].mem_res.addr, tdev.total_timvfs); return 0; } diff --git a/drivers/event/skeleton/skeleton_eventdev.c b/drivers/event/skeleton/skeleton_eventdev.c index 8513b9a013..c92604d3cc 100644 --- a/drivers/event/skeleton/skeleton_eventdev.c +++ b/drivers/event/skeleton/skeleton_eventdev.c @@ -360,7 +360,7 @@ skeleton_eventdev_init(struct rte_eventdev *eventdev) pci_dev = RTE_DEV_TO_PCI(eventdev->dev); - skel->reg_base = (uintptr_t)pci_dev->mem_resource[0].addr; + skel->reg_base = (uintptr_t)pci_dev->pci_mem[0].mem_res.addr; if (!skel->reg_base) { PMD_DRV_ERR("Failed to map BAR0"); ret = -ENODEV; diff --git a/drivers/mempool/octeontx/octeontx_fpavf.c b/drivers/mempool/octeontx/octeontx_fpavf.c index 1513c632c6..287dad8021 100644 --- a/drivers/mempool/octeontx/octeontx_fpavf.c +++ b/drivers/mempool/octeontx/octeontx_fpavf.c @@ -785,11 +785,11 @@ fpavf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) if (rte_eal_process_type() != RTE_PROC_PRIMARY) return 0; - if (pci_dev->mem_resource[0].addr == NULL) { - fpavf_log_err("Empty bars %p ", pci_dev->mem_resource[0].addr); + if (pci_dev->pci_mem[0].mem_res.addr == NULL) { + fpavf_log_err("Empty bars %p ", pci_dev->pci_mem[0].mem_res.addr); return -ENODEV; } - idreg = pci_dev->mem_resource[0].addr; + idreg = pci_dev->pci_mem[0].mem_res.addr; octeontx_fpavf_setup(); diff --git a/drivers/net/ark/ark_ethdev.c b/drivers/net/ark/ark_ethdev.c index b2995427c8..c3f677029f 100644 --- a/drivers/net/ark/ark_ethdev.c +++ b/drivers/net/ark/ark_ethdev.c @@ -329,8 +329,8 @@ eth_ark_dev_init(struct rte_eth_dev *dev) dev->rx_pkt_burst = rte_eth_pkt_burst_dummy; dev->tx_pkt_burst = rte_eth_pkt_burst_dummy; - ark->bar0 = (uint8_t *)pci_dev->mem_resource[0].addr; - ark->a_bar = (uint8_t *)pci_dev->mem_resource[2].addr; + ark->bar0 = (uint8_t *)pci_dev->pci_mem[0].mem_res.addr; + ark->a_bar = (uint8_t *)pci_dev->pci_mem[2].mem_res.addr; ark->sysctrl.v = (void *)&ark->bar0[ARK_SYSCTRL_BASE]; ark->mpurx.v = (void *)&ark->bar0[ARK_MPU_RX_BASE]; diff --git a/drivers/net/atlantic/atl_ethdev.c b/drivers/net/atlantic/atl_ethdev.c index 3a028f4290..90ee505644 100644 --- a/drivers/net/atlantic/atl_ethdev.c +++ b/drivers/net/atlantic/atl_ethdev.c @@ -384,7 +384,7 @@ eth_atl_dev_init(struct rte_eth_dev *eth_dev) /* Vendor and Device ID need to be set before init of shared code */ hw->device_id = pci_dev->id.device_id; hw->vendor_id = pci_dev->id.vendor_id; - hw->mmio = (void *)pci_dev->mem_resource[0].addr; + hw->mmio = (void *)pci_dev->pci_mem[0].mem_res.addr; /* Hardware configuration - hardcode */ adapter->hw_cfg.is_lro = false; diff --git a/drivers/net/avp/avp_ethdev.c b/drivers/net/avp/avp_ethdev.c index b2a08f5635..2956233479 100644 --- a/drivers/net/avp/avp_ethdev.c +++ b/drivers/net/avp/avp_ethdev.c @@ -368,8 +368,8 @@ avp_dev_translate_address(struct rte_eth_dev *eth_dev, void *addr; unsigned int i; - addr = pci_dev->mem_resource[RTE_AVP_PCI_MEMORY_BAR].addr; - resource = &pci_dev->mem_resource[RTE_AVP_PCI_MEMMAP_BAR]; + addr = pci_dev->pci_mem[RTE_AVP_PCI_MEMORY_BAR].mem_res.addr; + resource = &pci_dev->pci_mem[RTE_AVP_PCI_MEMMAP_BAR].mem_res; info = (struct rte_avp_memmap_info *)resource->addr; offset = 0; @@ -421,7 +421,7 @@ avp_dev_check_regions(struct rte_eth_dev *eth_dev) /* Dump resource info for debug */ for (i = 0; i < PCI_MAX_RESOURCE; i++) { - resource = &pci_dev->mem_resource[i]; + resource = &pci_dev->pci_mem[i].mem_res; if ((resource->phys_addr == 0) || (resource->len == 0)) continue; @@ -554,7 +554,7 @@ _avp_set_queue_counts(struct rte_eth_dev *eth_dev) struct rte_avp_device_info *host_info; void *addr; - addr = pci_dev->mem_resource[RTE_AVP_PCI_DEVICE_BAR].addr; + addr = pci_dev->pci_mem[RTE_AVP_PCI_DEVICE_BAR].mem_res.addr; host_info = (struct rte_avp_device_info *)addr; /* @@ -664,7 +664,7 @@ avp_dev_interrupt_handler(void *data) { struct rte_eth_dev *eth_dev = data; struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); - void *registers = pci_dev->mem_resource[RTE_AVP_PCI_MMIO_BAR].addr; + void *registers = pci_dev->pci_mem[RTE_AVP_PCI_MMIO_BAR].mem_res.addr; uint32_t status, value; int ret; @@ -723,7 +723,7 @@ static int avp_dev_enable_interrupts(struct rte_eth_dev *eth_dev) { struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); - void *registers = pci_dev->mem_resource[RTE_AVP_PCI_MMIO_BAR].addr; + void *registers = pci_dev->pci_mem[RTE_AVP_PCI_MMIO_BAR].mem_res.addr; int ret; if (registers == NULL) @@ -748,7 +748,7 @@ static int avp_dev_disable_interrupts(struct rte_eth_dev *eth_dev) { struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); - void *registers = pci_dev->mem_resource[RTE_AVP_PCI_MMIO_BAR].addr; + void *registers = pci_dev->pci_mem[RTE_AVP_PCI_MMIO_BAR].mem_res.addr; int ret; if (registers == NULL) @@ -793,7 +793,7 @@ static int avp_dev_migration_pending(struct rte_eth_dev *eth_dev) { struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); - void *registers = pci_dev->mem_resource[RTE_AVP_PCI_MMIO_BAR].addr; + void *registers = pci_dev->pci_mem[RTE_AVP_PCI_MMIO_BAR].mem_res.addr; uint32_t value; if (registers == NULL) @@ -824,7 +824,7 @@ avp_dev_create(struct rte_pci_device *pci_dev, struct rte_mem_resource *resource; unsigned int i; - resource = &pci_dev->mem_resource[RTE_AVP_PCI_DEVICE_BAR]; + resource = &pci_dev->pci_mem[RTE_AVP_PCI_DEVICE_BAR].mem_res; if (resource->addr == NULL) { PMD_DRV_LOG(ERR, "BAR%u is not mapped\n", RTE_AVP_PCI_DEVICE_BAR); @@ -1992,7 +1992,7 @@ avp_dev_configure(struct rte_eth_dev *eth_dev) goto unlock; } - addr = pci_dev->mem_resource[RTE_AVP_PCI_DEVICE_BAR].addr; + addr = pci_dev->pci_mem[RTE_AVP_PCI_DEVICE_BAR].mem_res.addr; host_info = (struct rte_avp_device_info *)addr; /* Setup required number of queues */ diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c index 48714eebe6..30a3b62b05 100644 --- a/drivers/net/axgbe/axgbe_ethdev.c +++ b/drivers/net/axgbe/axgbe_ethdev.c @@ -2216,12 +2216,12 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev) pdata->pci_dev = pci_dev; pdata->xgmac_regs = - (void *)pci_dev->mem_resource[AXGBE_AXGMAC_BAR].addr; + (void *)pci_dev->pci_mem[AXGBE_AXGMAC_BAR].mem_res.addr; pdata->xprop_regs = (void *)((uint8_t *)pdata->xgmac_regs + AXGBE_MAC_PROP_OFFSET); pdata->xi2c_regs = (void *)((uint8_t *)pdata->xgmac_regs + AXGBE_I2C_CTRL_OFFSET); - pdata->xpcs_regs = (void *)pci_dev->mem_resource[AXGBE_XPCS_BAR].addr; + pdata->xpcs_regs = (void *)pci_dev->pci_mem[AXGBE_XPCS_BAR].mem_res.addr; /* version specific driver data*/ if (pci_dev->id.device_id == AMD_PCI_AXGBE_DEVICE_V2A) diff --git a/drivers/net/bnx2x/bnx2x_ethdev.c b/drivers/net/bnx2x/bnx2x_ethdev.c index 4448cf2de2..68fa27841d 100644 --- a/drivers/net/bnx2x/bnx2x_ethdev.c +++ b/drivers/net/bnx2x/bnx2x_ethdev.c @@ -656,12 +656,12 @@ bnx2x_common_dev_init(struct rte_eth_dev *eth_dev, int is_vf) sc->flags = BNX2X_IS_VF_FLAG; sc->pcie_func = pci_dev->addr.function; - sc->bar[BAR0].base_addr = (void *)pci_dev->mem_resource[0].addr; + sc->bar[BAR0].base_addr = (void *)pci_dev->pci_mem[0].mem_res.addr; if (is_vf) sc->bar[BAR1].base_addr = (void *) - ((uintptr_t)pci_dev->mem_resource[0].addr + PXP_VF_ADDR_DB_START); + ((uintptr_t)pci_dev->pci_mem[0].mem_res.addr + PXP_VF_ADDR_DB_START); else - sc->bar[BAR1].base_addr = pci_dev->mem_resource[2].addr; + sc->bar[BAR1].base_addr = pci_dev->pci_mem[2].mem_res.addr; assert(sc->bar[BAR0].base_addr); assert(sc->bar[BAR1].base_addr); diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c index ef7b8859d9..1772ced4a7 100644 --- a/drivers/net/bnxt/bnxt_ethdev.c +++ b/drivers/net/bnxt/bnxt_ethdev.c @@ -4682,8 +4682,8 @@ static int bnxt_map_pci_bars(struct rte_eth_dev *eth_dev) struct bnxt *bp = eth_dev->data->dev_private; /* enable device (incl. PCI PM wakeup), and bus-mastering */ - bp->bar0 = (void *)pci_dev->mem_resource[0].addr; - bp->doorbell_base = (void *)pci_dev->mem_resource[2].addr; + bp->bar0 = (void *)pci_dev->pci_mem[0].mem_res.addr; + bp->doorbell_base = (void *)pci_dev->pci_mem[2].mem_res.addr; if (!bp->bar0 || !bp->doorbell_base) { PMD_DRV_LOG(ERR, "Unable to access Hardware\n"); return -ENODEV; @@ -5932,8 +5932,8 @@ bnxt_dev_init(struct rte_eth_dev *eth_dev, void *params __rte_unused) PMD_DRV_LOG(INFO, "Found %s device at mem %" PRIX64 ", node addr %pM\n", DRV_MODULE_NAME, - pci_dev->mem_resource[0].phys_addr, - pci_dev->mem_resource[0].addr); + pci_dev->pci_mem[0].mem_res.phys_addr, + pci_dev->pci_mem[0].mem_res.addr); return 0; diff --git a/drivers/net/cpfl/cpfl_ethdev.c b/drivers/net/cpfl/cpfl_ethdev.c index ede730fd50..dbfb74123e 100644 --- a/drivers/net/cpfl/cpfl_ethdev.c +++ b/drivers/net/cpfl/cpfl_ethdev.c @@ -1172,8 +1172,8 @@ cpfl_adapter_ext_init(struct rte_pci_device *pci_dev, struct cpfl_adapter_ext *a struct idpf_hw *hw = &base->hw; int ret = 0; - hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; - hw->hw_addr_len = pci_dev->mem_resource[0].len; + hw->hw_addr = (void *)pci_dev->pci_mem[0].mem_res.addr; + hw->hw_addr_len = pci_dev->pci_mem[0].mem_res.len; hw->back = base; hw->vendor_id = pci_dev->id.vendor_id; hw->device_id = pci_dev->id.device_id; diff --git a/drivers/net/cxgbe/cxgbe_ethdev.c b/drivers/net/cxgbe/cxgbe_ethdev.c index 45bbeaef0c..f02f211100 100644 --- a/drivers/net/cxgbe/cxgbe_ethdev.c +++ b/drivers/net/cxgbe/cxgbe_ethdev.c @@ -1729,7 +1729,7 @@ static int eth_cxgbe_dev_init(struct rte_eth_dev *eth_dev) return -1; adapter->use_unpacked_mode = 1; - adapter->regs = (void *)pci_dev->mem_resource[0].addr; + adapter->regs = (void *)pci_dev->pci_mem[0].mem_res.addr; if (!adapter->regs) { dev_err(adapter, "%s: cannot map device registers\n", __func__); err = -ENOMEM; diff --git a/drivers/net/cxgbe/cxgbe_main.c b/drivers/net/cxgbe/cxgbe_main.c index f8dd833032..4a88f7a23e 100644 --- a/drivers/net/cxgbe/cxgbe_main.c +++ b/drivers/net/cxgbe/cxgbe_main.c @@ -2228,7 +2228,7 @@ int cxgbe_probe(struct adapter *adapter) if (qpp > num_seg) dev_warn(adapter, "Incorrect SGE EGRESS QUEUES_PER_PAGE configuration, continuing in debug mode\n"); - adapter->bar2 = (void *)adapter->pdev->mem_resource[2].addr; + adapter->bar2 = (void *)adapter->pdev->pci_mem[2].mem_res.addr; if (!adapter->bar2) { dev_err(adapter, "cannot map device bar2 region\n"); err = -ENOMEM; diff --git a/drivers/net/cxgbe/cxgbevf_ethdev.c b/drivers/net/cxgbe/cxgbevf_ethdev.c index a62c56c2b9..f966b20933 100644 --- a/drivers/net/cxgbe/cxgbevf_ethdev.c +++ b/drivers/net/cxgbe/cxgbevf_ethdev.c @@ -148,7 +148,7 @@ static int eth_cxgbevf_dev_init(struct rte_eth_dev *eth_dev) return -1; adapter->use_unpacked_mode = 1; - adapter->regs = (void *)pci_dev->mem_resource[0].addr; + adapter->regs = (void *)pci_dev->pci_mem[0].mem_res.addr; if (!adapter->regs) { dev_err(adapter, "%s: cannot map device registers\n", __func__); err = -ENOMEM; diff --git a/drivers/net/cxgbe/cxgbevf_main.c b/drivers/net/cxgbe/cxgbevf_main.c index d0c93f8ac3..d5f3b3fcd8 100644 --- a/drivers/net/cxgbe/cxgbevf_main.c +++ b/drivers/net/cxgbe/cxgbevf_main.c @@ -184,7 +184,7 @@ int cxgbevf_probe(struct adapter *adapter) return err; if (!is_t4(adapter->params.chip)) { - adapter->bar2 = (void *)adapter->pdev->mem_resource[2].addr; + adapter->bar2 = (void *)adapter->pdev->pci_mem[2].mem_res.addr; if (!adapter->bar2) { dev_err(adapter, "cannot map device bar2 region\n"); err = -ENOMEM; diff --git a/drivers/net/e1000/em_ethdev.c b/drivers/net/e1000/em_ethdev.c index 8ee9be12ad..995c78f6b5 100644 --- a/drivers/net/e1000/em_ethdev.c +++ b/drivers/net/e1000/em_ethdev.c @@ -265,13 +265,13 @@ eth_em_dev_init(struct rte_eth_dev *eth_dev) rte_eth_copy_pci_info(eth_dev, pci_dev); - hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; + hw->hw_addr = (void *)pci_dev->pci_mem[0].mem_res.addr; hw->device_id = pci_dev->id.device_id; adapter->stopped = 0; /* For ICH8 support we'll need to map the flash memory BAR */ if (eth_em_dev_is_ich8(hw)) - hw->flash_address = (void *)pci_dev->mem_resource[1].addr; + hw->flash_address = (void *)pci_dev->pci_mem[1].mem_res.addr; if (e1000_setup_init_funcs(hw, TRUE) != E1000_SUCCESS || em_hw_init(hw) != 0) { diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c index 8858f975f8..620192a015 100644 --- a/drivers/net/e1000/igb_ethdev.c +++ b/drivers/net/e1000/igb_ethdev.c @@ -743,7 +743,7 @@ eth_igb_dev_init(struct rte_eth_dev *eth_dev) rte_eth_copy_pci_info(eth_dev, pci_dev); - hw->hw_addr= (void *)pci_dev->mem_resource[0].addr; + hw->hw_addr = (void *)pci_dev->pci_mem[0].mem_res.addr; igb_identify_hardware(eth_dev, pci_dev); if (e1000_setup_init_funcs(hw, FALSE) != E1000_SUCCESS) { @@ -938,7 +938,7 @@ eth_igbvf_dev_init(struct rte_eth_dev *eth_dev) hw->device_id = pci_dev->id.device_id; hw->vendor_id = pci_dev->id.vendor_id; - hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; + hw->hw_addr = (void *)pci_dev->pci_mem[0].mem_res.addr; adapter->stopped = 0; /* Initialize the shared code (base driver) */ diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c index efcb163027..6733ae77ff 100644 --- a/drivers/net/ena/ena_ethdev.c +++ b/drivers/net/ena/ena_ethdev.c @@ -2121,8 +2121,8 @@ static int eth_ena_dev_init(struct rte_eth_dev *eth_dev) intr_handle = pci_dev->intr_handle; - adapter->regs = pci_dev->mem_resource[ENA_REGS_BAR].addr; - adapter->dev_mem_base = pci_dev->mem_resource[ENA_MEM_BAR].addr; + adapter->regs = pci_dev->pci_mem[ENA_REGS_BAR].mem_res.addr; + adapter->dev_mem_base = pci_dev->pci_mem[ENA_MEM_BAR].mem_res.addr; if (!adapter->regs) { PMD_INIT_LOG(CRIT, "Failed to access registers BAR(%d)\n", diff --git a/drivers/net/enetc/enetc_ethdev.c b/drivers/net/enetc/enetc_ethdev.c index 1b4337bc48..307d2cfd3b 100644 --- a/drivers/net/enetc/enetc_ethdev.c +++ b/drivers/net/enetc/enetc_ethdev.c @@ -883,7 +883,7 @@ enetc_dev_init(struct rte_eth_dev *eth_dev) eth_dev->tx_pkt_burst = &enetc_xmit_pkts; /* Retrieving and storing the HW base address of device */ - hw->hw.reg = (void *)pci_dev->mem_resource[0].addr; + hw->hw.reg = (void *)pci_dev->pci_mem[0].mem_res.addr; hw->device_id = pci_dev->id.device_id; error = enetc_hardware_init(hw); diff --git a/drivers/net/enic/enic_main.c b/drivers/net/enic/enic_main.c index 19a99a82c5..df5de9bf4f 100644 --- a/drivers/net/enic/enic_main.c +++ b/drivers/net/enic/enic_main.c @@ -1914,8 +1914,8 @@ int enic_probe(struct enic *enic) if (rte_eal_process_type() != RTE_PROC_PRIMARY) return 0; - enic->bar0.vaddr = (void *)pdev->mem_resource[0].addr; - enic->bar0.len = pdev->mem_resource[0].len; + enic->bar0.vaddr = (void *)pdev->pci_mem[0].mem_res.addr; + enic->bar0.len = pdev->pci_mem[0].mem_res.len; /* Register vNIC device */ enic->vdev = vnic_dev_register(NULL, enic, enic->pdev, &enic->bar0, 1); diff --git a/drivers/net/fm10k/fm10k_ethdev.c b/drivers/net/fm10k/fm10k_ethdev.c index 8b83063f0a..209140ac9c 100644 --- a/drivers/net/fm10k/fm10k_ethdev.c +++ b/drivers/net/fm10k/fm10k_ethdev.c @@ -3090,7 +3090,7 @@ eth_fm10k_dev_init(struct rte_eth_dev *dev) hw->subsystem_device_id = pdev->id.subsystem_device_id; hw->subsystem_vendor_id = pdev->id.subsystem_vendor_id; hw->revision_id = 0; - hw->hw_addr = (void *)pdev->mem_resource[0].addr; + hw->hw_addr = (void *)pdev->pci_mem[0].mem_res.addr; if (hw->hw_addr == NULL) { PMD_INIT_LOG(ERR, "Bad mem resource." " Try to refuse unused devices."); diff --git a/drivers/net/gve/gve_ethdev.c b/drivers/net/gve/gve_ethdev.c index cf28a4a3b7..d3e2f146b6 100644 --- a/drivers/net/gve/gve_ethdev.c +++ b/drivers/net/gve/gve_ethdev.c @@ -777,13 +777,13 @@ gve_dev_init(struct rte_eth_dev *eth_dev) pci_dev = RTE_DEV_TO_PCI(eth_dev->device); - reg_bar = pci_dev->mem_resource[GVE_REG_BAR].addr; + reg_bar = pci_dev->pci_mem[GVE_REG_BAR].mem_res.addr; if (!reg_bar) { PMD_DRV_LOG(ERR, "Failed to map pci bar!"); return -ENOMEM; } - db_bar = pci_dev->mem_resource[GVE_DB_BAR].addr; + db_bar = pci_dev->pci_mem[GVE_DB_BAR].mem_res.addr; if (!db_bar) { PMD_DRV_LOG(ERR, "Failed to map doorbell bar!"); return -ENOMEM; diff --git a/drivers/net/hinic/base/hinic_pmd_hwif.c b/drivers/net/hinic/base/hinic_pmd_hwif.c index 2d3f192b21..a10aa5780f 100644 --- a/drivers/net/hinic/base/hinic_pmd_hwif.c +++ b/drivers/net/hinic/base/hinic_pmd_hwif.c @@ -398,7 +398,7 @@ static int hinic_init_hwif(struct hinic_hwdev *hwdev, void *cfg_reg_base, int err; pci_dev = (struct rte_pci_device *)(hwdev->pcidev_hdl); - db_bar_len = pci_dev->mem_resource[HINIC_DB_MEM_BAR].len; + db_bar_len = pci_dev->pci_mem[HINIC_DB_MEM_BAR].mem_res.len; hwif = hwdev->hwif; @@ -470,16 +470,16 @@ static void hinic_get_mmio(struct hinic_hwdev *hwdev, void **cfg_regs_base, uint64_t bar0_phy_addr; uint64_t pagesize = sysconf(_SC_PAGESIZE); - *cfg_regs_base = pci_dev->mem_resource[HINIC_CFG_REGS_BAR].addr; - *intr_base = pci_dev->mem_resource[HINIC_INTR_MSI_BAR].addr; - *db_base = pci_dev->mem_resource[HINIC_DB_MEM_BAR].addr; + *cfg_regs_base = pci_dev->pci_mem[HINIC_CFG_REGS_BAR].mem_res.addr; + *intr_base = pci_dev->pci_mem[HINIC_INTR_MSI_BAR].mem_res.addr; + *db_base = pci_dev->pci_mem[HINIC_DB_MEM_BAR].mem_res.addr; - bar0_size = pci_dev->mem_resource[HINIC_CFG_REGS_BAR].len; - bar2_size = pci_dev->mem_resource[HINIC_INTR_MSI_BAR].len; + bar0_size = pci_dev->pci_mem[HINIC_CFG_REGS_BAR].mem_res.len; + bar2_size = pci_dev->pci_mem[HINIC_INTR_MSI_BAR].mem_res.len; if (pagesize == PAGE_SIZE_64K && (bar0_size % pagesize != 0)) { bar0_phy_addr = - pci_dev->mem_resource[HINIC_CFG_REGS_BAR].phys_addr; + pci_dev->pci_mem[HINIC_CFG_REGS_BAR].mem_res.phys_addr; if (bar0_phy_addr % pagesize != 0 && (bar0_size + bar2_size <= pagesize) && bar2_size >= bar0_size) { diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c index 36896f8989..b54945b575 100644 --- a/drivers/net/hns3/hns3_ethdev.c +++ b/drivers/net/hns3/hns3_ethdev.c @@ -4525,7 +4525,7 @@ hns3_init_pf(struct rte_eth_dev *eth_dev) PMD_INIT_FUNC_TRACE(); /* Get hardware io base address from pcie BAR2 IO space */ - hw->io_base = pci_dev->mem_resource[2].addr; + hw->io_base = pci_dev->pci_mem[2].mem_res.addr; /* Firmware command queue initialize */ ret = hns3_cmd_init_queue(hw); diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c index d051a1357b..490caf3a74 100644 --- a/drivers/net/hns3/hns3_ethdev_vf.c +++ b/drivers/net/hns3/hns3_ethdev_vf.c @@ -1414,7 +1414,7 @@ hns3vf_init_vf(struct rte_eth_dev *eth_dev) PMD_INIT_FUNC_TRACE(); /* Get hardware io base address from pcie BAR2 IO space */ - hw->io_base = pci_dev->mem_resource[2].addr; + hw->io_base = pci_dev->pci_mem[2].mem_res.addr; /* Firmware command queue initialize */ ret = hns3_cmd_init_queue(hw); diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c index 4065c519c3..d0b07265c1 100644 --- a/drivers/net/hns3/hns3_rxtx.c +++ b/drivers/net/hns3/hns3_rxtx.c @@ -2923,8 +2923,8 @@ hns3_tx_push_get_queue_tail_reg(struct rte_eth_dev *dev, uint16_t queue_id) * * The quick doorbell located at 64B offset in the TQP region. */ - return (char *)pci_dev->mem_resource[bar_id].addr + - (pci_dev->mem_resource[bar_id].len >> 1) + + return (char *)pci_dev->pci_mem[bar_id].mem_res.addr + + (pci_dev->pci_mem[bar_id].mem_res.len >> 1) + HNS3_TX_PUSH_TQP_REGION_SIZE * queue_id + HNS3_TX_PUSH_QUICK_DOORBELL_OFFSET; } diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index cb0070f94b..a1d56570df 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -1449,7 +1449,7 @@ eth_i40e_dev_init(struct rte_eth_dev *dev, void *init_params __rte_unused) pf->dev_data = dev->data; hw->back = I40E_PF_TO_ADAPTER(pf); - hw->hw_addr = (uint8_t *)(pci_dev->mem_resource[0].addr); + hw->hw_addr = (uint8_t *)(pci_dev->pci_mem[0].mem_res.addr); if (!hw->hw_addr) { PMD_INIT_LOG(ERR, "Hardware is not available, as address is NULL"); diff --git a/drivers/net/iavf/iavf_ethdev.c b/drivers/net/iavf/iavf_ethdev.c index f6d68403ce..a96d1f258b 100644 --- a/drivers/net/iavf/iavf_ethdev.c +++ b/drivers/net/iavf/iavf_ethdev.c @@ -2605,7 +2605,7 @@ iavf_dev_init(struct rte_eth_dev *eth_dev) hw->bus.bus_id = pci_dev->addr.bus; hw->bus.device = pci_dev->addr.devid; hw->bus.func = pci_dev->addr.function; - hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; + hw->hw_addr = (void *)pci_dev->pci_mem[0].mem_res.addr; hw->back = IAVF_DEV_PRIVATE_TO_ADAPTER(eth_dev->data->dev_private); adapter->dev_data = eth_dev->data; adapter->stopped = 1; diff --git a/drivers/net/ice/ice_dcf.c b/drivers/net/ice/ice_dcf.c index 1c3d22ae0f..e2be2064be 100644 --- a/drivers/net/ice/ice_dcf.c +++ b/drivers/net/ice/ice_dcf.c @@ -618,7 +618,7 @@ ice_dcf_init_hw(struct rte_eth_dev *eth_dev, struct ice_dcf_hw *hw) hw->resetting = false; - hw->avf.hw_addr = pci_dev->mem_resource[0].addr; + hw->avf.hw_addr = pci_dev->pci_mem[0].mem_res.addr; hw->avf.back = hw; hw->avf.bus.bus_id = pci_dev->addr.bus; diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c index 9a88cf9796..9150e077d2 100644 --- a/drivers/net/ice/ice_ethdev.c +++ b/drivers/net/ice/ice_ethdev.c @@ -2293,7 +2293,7 @@ ice_dev_init(struct rte_eth_dev *dev) pf->adapter = ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); pf->dev_data = dev->data; hw->back = pf->adapter; - hw->hw_addr = (uint8_t *)pci_dev->mem_resource[0].addr; + hw->hw_addr = (uint8_t *)pci_dev->pci_mem[0].mem_res.addr; hw->vendor_id = pci_dev->id.vendor_id; hw->device_id = pci_dev->id.device_id; hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id; diff --git a/drivers/net/idpf/idpf_ethdev.c b/drivers/net/idpf/idpf_ethdev.c index e02ec2ec5a..ab66ac4950 100644 --- a/drivers/net/idpf/idpf_ethdev.c +++ b/drivers/net/idpf/idpf_ethdev.c @@ -1135,8 +1135,8 @@ idpf_adapter_ext_init(struct rte_pci_device *pci_dev, struct idpf_adapter_ext *a struct idpf_hw *hw = &base->hw; int ret = 0; - hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; - hw->hw_addr_len = pci_dev->mem_resource[0].len; + hw->hw_addr = (void *)pci_dev->pci_mem[0].mem_res.addr; + hw->hw_addr_len = pci_dev->pci_mem[0].mem_res.len; hw->back = base; hw->vendor_id = pci_dev->id.vendor_id; hw->device_id = pci_dev->id.device_id; diff --git a/drivers/net/igc/igc_ethdev.c b/drivers/net/igc/igc_ethdev.c index fab2ab6d1c..091457cb23 100644 --- a/drivers/net/igc/igc_ethdev.c +++ b/drivers/net/igc/igc_ethdev.c @@ -1343,7 +1343,7 @@ eth_igc_dev_init(struct rte_eth_dev *dev) dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; hw->back = pci_dev; - hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; + hw->hw_addr = (void *)pci_dev->pci_mem[0].mem_res.addr; igc_identify_hardware(dev, pci_dev); if (igc_setup_init_funcs(hw, false) != IGC_SUCCESS) { diff --git a/drivers/net/ionic/ionic_dev_pci.c b/drivers/net/ionic/ionic_dev_pci.c index 5e74a6da71..7bd4b4961c 100644 --- a/drivers/net/ionic/ionic_dev_pci.c +++ b/drivers/net/ionic/ionic_dev_pci.c @@ -234,7 +234,7 @@ eth_ionic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, bars.num_bars = 0; for (i = 0; i < PCI_MAX_RESOURCE && i < IONIC_BARS_MAX; i++) { - resource = &pci_dev->mem_resource[i]; + resource = &pci_dev->pci_mem[i].mem_res; if (resource->phys_addr == 0 || resource->len == 0) continue; diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c index 88118bc305..9172bf4c55 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.c +++ b/drivers/net/ixgbe/ixgbe_ethdev.c @@ -1136,7 +1136,7 @@ eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused) /* Vendor and Device ID need to be set before init of shared code */ hw->device_id = pci_dev->id.device_id; hw->vendor_id = pci_dev->id.vendor_id; - hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; + hw->hw_addr = (void *)pci_dev->pci_mem[0].mem_res.addr; hw->allow_unsupported_sfp = 1; /* Initialize the shared code (base driver) */ @@ -1634,7 +1634,7 @@ eth_ixgbevf_dev_init(struct rte_eth_dev *eth_dev) hw->device_id = pci_dev->id.device_id; hw->vendor_id = pci_dev->id.vendor_id; - hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; + hw->hw_addr = (void *)pci_dev->pci_mem[0].mem_res.addr; /* initialize the vfta */ memset(shadow_vfta, 0, sizeof(*shadow_vfta)); diff --git a/drivers/net/liquidio/lio_ethdev.c b/drivers/net/liquidio/lio_ethdev.c index ebcfbb1a5c..49885a648c 100644 --- a/drivers/net/liquidio/lio_ethdev.c +++ b/drivers/net/liquidio/lio_ethdev.c @@ -2071,8 +2071,8 @@ lio_eth_dev_init(struct rte_eth_dev *eth_dev) rte_eth_copy_pci_info(eth_dev, pdev); - if (pdev->mem_resource[0].addr) { - lio_dev->hw_addr = pdev->mem_resource[0].addr; + if (pdev->pci_mem[0].mem_res.addr) { + lio_dev->hw_addr = pdev->pci_mem[0].mem_res.addr; } else { PMD_INIT_LOG(ERR, "ERROR: Failed to map BAR0\n"); return -ENODEV; diff --git a/drivers/net/nfp/nfp_ethdev.c b/drivers/net/nfp/nfp_ethdev.c index 56fb8e8c73..65a86ea35b 100644 --- a/drivers/net/nfp/nfp_ethdev.c +++ b/drivers/net/nfp/nfp_ethdev.c @@ -543,7 +543,7 @@ nfp_net_init(struct rte_eth_dev *eth_dev) pci_dev->addr.domain, pci_dev->addr.bus, pci_dev->addr.devid, pci_dev->addr.function); - hw->ctrl_bar = (uint8_t *)pci_dev->mem_resource[0].addr; + hw->ctrl_bar = (uint8_t *)pci_dev->pci_mem[0].mem_res.addr; if (hw->ctrl_bar == NULL) { PMD_DRV_LOG(ERR, "hw->ctrl_bar is NULL. BAR0 not configured"); diff --git a/drivers/net/nfp/nfp_ethdev_vf.c b/drivers/net/nfp/nfp_ethdev_vf.c index d69ac8cd37..14c9219e25 100644 --- a/drivers/net/nfp/nfp_ethdev_vf.c +++ b/drivers/net/nfp/nfp_ethdev_vf.c @@ -290,7 +290,7 @@ nfp_netvf_init(struct rte_eth_dev *eth_dev) hw = NFP_NET_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private); - hw->ctrl_bar = (uint8_t *)pci_dev->mem_resource[0].addr; + hw->ctrl_bar = (uint8_t *)pci_dev->pci_mem[0].mem_res.addr; if (hw->ctrl_bar == NULL) { PMD_DRV_LOG(ERR, "hw->ctrl_bar is NULL. BAR0 not configured"); @@ -351,9 +351,9 @@ nfp_netvf_init(struct rte_eth_dev *eth_dev) PMD_INIT_LOG(DEBUG, "tx_bar_off: 0x%" PRIx64 "", tx_bar_off); PMD_INIT_LOG(DEBUG, "rx_bar_off: 0x%" PRIx64 "", rx_bar_off); - hw->tx_bar = (uint8_t *)pci_dev->mem_resource[2].addr + + hw->tx_bar = (uint8_t *)pci_dev->pci_mem[2].mem_res.addr + tx_bar_off; - hw->rx_bar = (uint8_t *)pci_dev->mem_resource[2].addr + + hw->rx_bar = (uint8_t *)pci_dev->pci_mem[2].mem_res.addr + rx_bar_off; PMD_INIT_LOG(DEBUG, "ctrl_bar: %p, tx_bar: %p, rx_bar: %p", diff --git a/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c b/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c index 6029bd6c3a..9a9b357325 100644 --- a/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c +++ b/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c @@ -790,7 +790,7 @@ nfp6000_set_barsz(struct rte_pci_device *dev, struct nfp_pcie_user *desc) unsigned long tmp; int i = 0; - tmp = dev->mem_resource[0].len; + tmp = dev->pci_mem[0].mem_res.len; while (tmp >>= 1) i++; @@ -836,7 +836,7 @@ nfp6000_init(struct nfp_cpp *cpp, struct rte_pci_device *dev) if (nfp6000_set_barsz(dev, desc) < 0) goto error; - desc->cfg = (char *)dev->mem_resource[0].addr; + desc->cfg = (char *)dev->pci_mem[0].mem_res.addr; nfp_enable_bars(desc); diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c index c32d954769..573acbf85c 100644 --- a/drivers/net/ngbe/ngbe_ethdev.c +++ b/drivers/net/ngbe/ngbe_ethdev.c @@ -364,7 +364,7 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused) rte_eth_copy_pci_info(eth_dev, pci_dev); eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; - hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; + hw->hw_addr = (void *)pci_dev->pci_mem[0].mem_res.addr; /* Vendor and Device ID need to be set before init of shared code */ hw->back = pci_dev; diff --git a/drivers/net/octeon_ep/otx_ep_ethdev.c b/drivers/net/octeon_ep/otx_ep_ethdev.c index f43db1e398..e9fdda3993 100644 --- a/drivers/net/octeon_ep/otx_ep_ethdev.c +++ b/drivers/net/octeon_ep/otx_ep_ethdev.c @@ -490,7 +490,7 @@ otx_ep_eth_dev_init(struct rte_eth_dev *eth_dev) } rte_eth_random_addr(vf_mac_addr.addr_bytes); rte_ether_addr_copy(&vf_mac_addr, eth_dev->data->mac_addrs); - otx_epvf->hw_addr = pdev->mem_resource[0].addr; + otx_epvf->hw_addr = pdev->pci_mem[0].mem_res.addr; otx_epvf->pdev = pdev; otx_epdev_init(otx_epvf); diff --git a/drivers/net/octeontx/base/octeontx_pkivf.c b/drivers/net/octeontx/base/octeontx_pkivf.c index 6a48a22de6..a4708ee25d 100644 --- a/drivers/net/octeontx/base/octeontx_pkivf.c +++ b/drivers/net/octeontx/base/octeontx_pkivf.c @@ -195,13 +195,13 @@ pkivf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) if (rte_eal_process_type() != RTE_PROC_PRIMARY) return 0; - if (pci_dev->mem_resource[0].addr == NULL) { + if (pci_dev->pci_mem[0].mem_res.addr == NULL) { octeontx_log_err("PKI Empty bar[0] %p", - pci_dev->mem_resource[0].addr); + pci_dev->pci_mem[0].mem_res.addr); return -ENODEV; } - bar0 = pci_dev->mem_resource[0].addr; + bar0 = pci_dev->pci_mem[0].mem_res.addr; val = octeontx_read64(bar0); domain = val & 0xffff; vfid = (val >> 16) & 0xffff; diff --git a/drivers/net/octeontx/base/octeontx_pkovf.c b/drivers/net/octeontx/base/octeontx_pkovf.c index 5d445dfb49..aed1f06aee 100644 --- a/drivers/net/octeontx/base/octeontx_pkovf.c +++ b/drivers/net/octeontx/base/octeontx_pkovf.c @@ -586,15 +586,15 @@ pkovf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) if (rte_eal_process_type() != RTE_PROC_PRIMARY) return 0; - if (pci_dev->mem_resource[0].addr == NULL || - pci_dev->mem_resource[2].addr == NULL) { + if (pci_dev->pci_mem[0].mem_res.addr == NULL || + pci_dev->pci_mem[2].mem_res.addr == NULL) { octeontx_log_err("Empty bars %p %p", - pci_dev->mem_resource[0].addr, - pci_dev->mem_resource[2].addr); + pci_dev->pci_mem[0].mem_res.addr, + pci_dev->pci_mem[2].mem_res.addr); return -ENODEV; } - bar0 = pci_dev->mem_resource[0].addr; - bar2 = pci_dev->mem_resource[2].addr; + bar0 = pci_dev->pci_mem[0].mem_res.addr; + bar2 = pci_dev->pci_mem[2].mem_res.addr; octeontx_pkovf_setup(); diff --git a/drivers/net/qede/qede_main.c b/drivers/net/qede/qede_main.c index 03039038ad..62f7308dd8 100644 --- a/drivers/net/qede/qede_main.c +++ b/drivers/net/qede/qede_main.c @@ -37,9 +37,9 @@ qed_update_pf_params(struct ecore_dev *edev, struct ecore_pf_params *params) static void qed_init_pci(struct ecore_dev *edev, struct rte_pci_device *pci_dev) { - edev->regview = pci_dev->mem_resource[0].addr; - edev->doorbells = pci_dev->mem_resource[2].addr; - edev->db_size = pci_dev->mem_resource[2].len; + edev->regview = pci_dev->pci_mem[0].mem_res.addr; + edev->doorbells = pci_dev->pci_mem[2].mem_res.addr; + edev->db_size = pci_dev->pci_mem[2].mem_res.len; edev->pci_dev = pci_dev; } diff --git a/drivers/net/sfc/sfc.c b/drivers/net/sfc/sfc.c index 22753e3417..46132d81cb 100644 --- a/drivers/net/sfc/sfc.c +++ b/drivers/net/sfc/sfc.c @@ -773,7 +773,7 @@ sfc_mem_bar_init(struct sfc_adapter *sa, const efx_bar_region_t *mem_ebrp) struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); efsys_bar_t *ebp = &sa->mem_bar; struct rte_mem_resource *res = - &pci_dev->mem_resource[mem_ebrp->ebr_index]; + &pci_dev->pci_mem[mem_ebrp->ebr_index].mem_res; SFC_BAR_LOCK_INIT(ebp, eth_dev->data->name); ebp->esb_rid = mem_ebrp->ebr_index; diff --git a/drivers/net/thunderx/nicvf_ethdev.c b/drivers/net/thunderx/nicvf_ethdev.c index ab1e714d97..e15286feb2 100644 --- a/drivers/net/thunderx/nicvf_ethdev.c +++ b/drivers/net/thunderx/nicvf_ethdev.c @@ -2223,7 +2223,7 @@ nicvf_eth_dev_init(struct rte_eth_dev *eth_dev) pci_dev->addr.domain, pci_dev->addr.bus, pci_dev->addr.devid, pci_dev->addr.function); - nic->reg_base = (uintptr_t)pci_dev->mem_resource[0].addr; + nic->reg_base = (uintptr_t)pci_dev->pci_mem[0].mem_res.addr; if (!nic->reg_base) { PMD_INIT_LOG(ERR, "Failed to map BAR0"); ret = -ENODEV; diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c index a502618bc5..492184a5ff 100644 --- a/drivers/net/txgbe/txgbe_ethdev.c +++ b/drivers/net/txgbe/txgbe_ethdev.c @@ -594,7 +594,7 @@ eth_txgbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused) rte_eth_copy_pci_info(eth_dev, pci_dev); - hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; + hw->hw_addr = (void *)pci_dev->pci_mem[0].mem_res.addr; /* Vendor and Device ID need to be set before init of shared code */ hw->device_id = pci_dev->id.device_id; diff --git a/drivers/net/txgbe/txgbe_ethdev_vf.c b/drivers/net/txgbe/txgbe_ethdev_vf.c index 3b1f7c913b..779598ea9c 100644 --- a/drivers/net/txgbe/txgbe_ethdev_vf.c +++ b/drivers/net/txgbe/txgbe_ethdev_vf.c @@ -211,7 +211,7 @@ eth_txgbevf_dev_init(struct rte_eth_dev *eth_dev) hw->vendor_id = pci_dev->id.vendor_id; hw->subsystem_device_id = pci_dev->id.subsystem_device_id; hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id; - hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; + hw->hw_addr = (void *)pci_dev->pci_mem[0].mem_res.addr; /* initialize the vfta */ memset(shadow_vfta, 0, sizeof(*shadow_vfta)); diff --git a/drivers/net/virtio/virtio_pci.c b/drivers/net/virtio/virtio_pci.c index 29eb739b04..c7d05a2663 100644 --- a/drivers/net/virtio/virtio_pci.c +++ b/drivers/net/virtio/virtio_pci.c @@ -603,14 +603,14 @@ get_cfg_addr(struct rte_pci_device *dev, struct virtio_pci_cap *cap) return NULL; } - if (offset + length > dev->mem_resource[bar].len) { + if (offset + length > dev->pci_mem[bar].mem_res.len) { PMD_INIT_LOG(ERR, "invalid cap: overflows bar space: %u > %" PRIu64, - offset + length, dev->mem_resource[bar].len); + offset + length, dev->pci_mem[bar].mem_res.len); return NULL; } - base = dev->mem_resource[bar].addr; + base = dev->pci_mem[bar].mem_res.addr; if (base == NULL) { PMD_INIT_LOG(ERR, "bar %u base addr is NULL", bar); return NULL; diff --git a/drivers/net/vmxnet3/vmxnet3_ethdev.c b/drivers/net/vmxnet3/vmxnet3_ethdev.c index fd946dec5c..7d4ebaca14 100644 --- a/drivers/net/vmxnet3/vmxnet3_ethdev.c +++ b/drivers/net/vmxnet3/vmxnet3_ethdev.c @@ -345,8 +345,8 @@ eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev) /* Vendor and Device ID need to be set before init of shared code */ hw->device_id = pci_dev->id.device_id; hw->vendor_id = pci_dev->id.vendor_id; - hw->hw_addr0 = (void *)pci_dev->mem_resource[0].addr; - hw->hw_addr1 = (void *)pci_dev->mem_resource[1].addr; + hw->hw_addr0 = (void *)pci_dev->pci_mem[0].mem_res.addr; + hw->hw_addr1 = (void *)pci_dev->pci_mem[1].mem_res.addr; hw->num_rx_queues = 1; hw->num_tx_queues = 1; diff --git a/drivers/raw/cnxk_bphy/cnxk_bphy.c b/drivers/raw/cnxk_bphy/cnxk_bphy.c index d42cca649c..cef8006550 100644 --- a/drivers/raw/cnxk_bphy/cnxk_bphy.c +++ b/drivers/raw/cnxk_bphy/cnxk_bphy.c @@ -331,10 +331,10 @@ bphy_rawdev_probe(struct rte_pci_driver *pci_drv, if (rte_eal_process_type() != RTE_PROC_PRIMARY) return 0; - if (!pci_dev->mem_resource[0].addr) { + if (!pci_dev->pci_mem[0].mem_res.addr) { plt_err("BARs have invalid values: BAR0 %p\n BAR2 %p", - pci_dev->mem_resource[0].addr, - pci_dev->mem_resource[2].addr); + pci_dev->pci_mem[0].mem_res.addr, + pci_dev->pci_mem[2].mem_res.addr); return -ENODEV; } @@ -355,8 +355,8 @@ bphy_rawdev_probe(struct rte_pci_driver *pci_drv, bphy_rawdev->driver_name = pci_dev->driver->driver.name; bphy_dev = (struct bphy_device *)bphy_rawdev->dev_private; - bphy_dev->mem.res0 = pci_dev->mem_resource[0]; - bphy_dev->mem.res2 = pci_dev->mem_resource[2]; + bphy_dev->mem.res0 = pci_dev->pci_mem[0].mem_res; + bphy_dev->mem.res2 = pci_dev->pci_mem[2].mem_res; bphy_dev->bphy.pci_dev = pci_dev; ret = roc_bphy_dev_init(&bphy_dev->bphy); diff --git a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c index 2d8466ef91..5a3b8c329d 100644 --- a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c +++ b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c @@ -302,7 +302,7 @@ cnxk_bphy_cgx_rawdev_probe(struct rte_pci_driver *pci_drv, if (rte_eal_process_type() != RTE_PROC_PRIMARY) return 0; - if (!pci_dev->mem_resource[0].addr) + if (!pci_dev->pci_mem[0].mem_res.addr) return -ENODEV; ret = roc_plt_init(); @@ -326,8 +326,8 @@ cnxk_bphy_cgx_rawdev_probe(struct rte_pci_driver *pci_drv, } rcgx = cgx->rcgx; - rcgx->bar0_pa = pci_dev->mem_resource[0].phys_addr; - rcgx->bar0_va = pci_dev->mem_resource[0].addr; + rcgx->bar0_pa = pci_dev->pci_mem[0].mem_res.phys_addr; + rcgx->bar0_va = pci_dev->pci_mem[0].mem_res.addr; ret = roc_bphy_cgx_dev_init(rcgx); if (ret) goto out_free; diff --git a/drivers/raw/ifpga/afu_pmd_n3000.c b/drivers/raw/ifpga/afu_pmd_n3000.c index 67b3941265..ae60407516 100644 --- a/drivers/raw/ifpga/afu_pmd_n3000.c +++ b/drivers/raw/ifpga/afu_pmd_n3000.c @@ -1524,7 +1524,7 @@ static void *n3000_afu_get_port_addr(struct afu_rawdev *dev) if (!pci_dev) return NULL; - addr = (uint8_t *)pci_dev->mem_resource[0].addr; + addr = (uint8_t *)pci_dev->pci_mem[0].mem_res.addr; val = rte_read64(addr + PORT_ATTR_REG(dev->port)); if (!PORT_IMPLEMENTED(val)) { IFPGA_RAWDEV_PMD_INFO("FIU port %d is not implemented", dev->port); @@ -1537,7 +1537,7 @@ static void *n3000_afu_get_port_addr(struct afu_rawdev *dev) return NULL; } - addr = (uint8_t *)pci_dev->mem_resource[bar].addr + PORT_OFFSET(val); + addr = (uint8_t *)pci_dev->pci_mem[bar].mem_res.addr + PORT_OFFSET(val); return addr; } diff --git a/drivers/raw/ifpga/ifpga_rawdev.c b/drivers/raw/ifpga/ifpga_rawdev.c index 1020adcf6e..078d37d5df 100644 --- a/drivers/raw/ifpga/ifpga_rawdev.c +++ b/drivers/raw/ifpga/ifpga_rawdev.c @@ -1580,9 +1580,9 @@ ifpga_rawdev_create(struct rte_pci_device *pci_dev, /* init opae_adapter_data_pci for device specific information */ for (i = 0; i < PCI_MAX_RESOURCE; i++) { - data->region[i].phys_addr = pci_dev->mem_resource[i].phys_addr; - data->region[i].len = pci_dev->mem_resource[i].len; - data->region[i].addr = pci_dev->mem_resource[i].addr; + data->region[i].phys_addr = pci_dev->pci_mem[i].mem_res.phys_addr; + data->region[i].len = pci_dev->pci_mem[i].mem_res.len; + data->region[i].addr = pci_dev->pci_mem[i].mem_res.addr; } data->device_id = pci_dev->id.device_id; data->vendor_id = pci_dev->id.vendor_id; diff --git a/drivers/raw/ntb/ntb_hw_intel.c b/drivers/raw/ntb/ntb_hw_intel.c index 9b4465176a..65cbed335c 100644 --- a/drivers/raw/ntb/ntb_hw_intel.c +++ b/drivers/raw/ntb/ntb_hw_intel.c @@ -179,7 +179,7 @@ intel_ntb_dev_init(const struct rte_rawdev *dev) return -EINVAL; } - hw->hw_addr = (char *)hw->pci_dev->mem_resource[0].addr; + hw->hw_addr = (char *)hw->pci_dev->pci_mem[0].mem_res.addr; if (is_gen3_ntb(hw)) ret = intel_ntb3_check_ppd(hw); @@ -207,7 +207,7 @@ intel_ntb_dev_init(const struct rte_rawdev *dev) for (i = 0; i < hw->mw_cnt; i++) { bar = intel_ntb_bar[i]; - hw->mw_size[i] = hw->pci_dev->mem_resource[bar].len; + hw->mw_size[i] = hw->pci_dev->pci_mem[bar].mem_res.len; } /* Reserve the last 2 spad registers for users. */ @@ -238,7 +238,7 @@ intel_ntb_get_peer_mw_addr(const struct rte_rawdev *dev, int mw_idx) bar = intel_ntb_bar[mw_idx]; - return hw->pci_dev->mem_resource[bar].addr; + return hw->pci_dev->pci_mem[bar].mem_res.addr; } static int @@ -271,7 +271,7 @@ intel_ntb_mw_set_trans(const struct rte_rawdev *dev, int mw_idx, /* Limit reg val should be EMBAR base address plus MW size. */ base = addr; - limit = hw->pci_dev->mem_resource[bar].phys_addr + size; + limit = hw->pci_dev->pci_mem[bar].mem_res.phys_addr + size; rte_write64(base, xlat_addr); rte_write64(limit, limit_addr); diff --git a/drivers/vdpa/ifc/ifcvf_vdpa.c b/drivers/vdpa/ifc/ifcvf_vdpa.c index e4133568c1..a14b66e8cb 100644 --- a/drivers/vdpa/ifc/ifcvf_vdpa.c +++ b/drivers/vdpa/ifc/ifcvf_vdpa.c @@ -204,11 +204,11 @@ ifcvf_vfio_setup(struct ifcvf_internal *internal) for (i = 0; i < RTE_MIN(PCI_MAX_RESOURCE, IFCVF_PCI_MAX_RESOURCE); i++) { internal->hw.mem_resource[i].addr = - internal->pdev->mem_resource[i].addr; + internal->pdev->pci_mem[i].mem_res.addr; internal->hw.mem_resource[i].phys_addr = - internal->pdev->mem_resource[i].phys_addr; + internal->pdev->pci_mem[i].mem_res.phys_addr; internal->hw.mem_resource[i].len = - internal->pdev->mem_resource[i].len; + internal->pdev->pci_mem[i].mem_res.len; } return 0; diff --git a/drivers/vdpa/sfc/sfc_vdpa_hw.c b/drivers/vdpa/sfc/sfc_vdpa_hw.c index edb7e35c2c..dcdb21d4ce 100644 --- a/drivers/vdpa/sfc/sfc_vdpa_hw.c +++ b/drivers/vdpa/sfc/sfc_vdpa_hw.c @@ -192,7 +192,7 @@ sfc_vdpa_mem_bar_init(struct sfc_vdpa_adapter *sva, struct rte_pci_device *pci_dev = sva->pdev; efsys_bar_t *ebp = &sva->mem_bar; struct rte_mem_resource *res = - &pci_dev->mem_resource[mem_ebrp->ebr_index]; + &pci_dev->pci_mem[mem_ebrp->ebr_index].mem_res; SFC_BAR_LOCK_INIT(ebp, pci_dev->name); ebp->esb_rid = mem_ebrp->ebr_index; diff --git a/drivers/vdpa/sfc/sfc_vdpa_ops.c b/drivers/vdpa/sfc/sfc_vdpa_ops.c index e88c7eeaa6..78b5a7c9fa 100644 --- a/drivers/vdpa/sfc/sfc_vdpa_ops.c +++ b/drivers/vdpa/sfc/sfc_vdpa_ops.c @@ -861,7 +861,7 @@ sfc_vdpa_get_notify_area(int vid, int qid, uint64_t *offset, uint64_t *size) *offset); pci_dev = sfc_vdpa_adapter_by_dev_handle(dev)->pdev; - doorbell = (uint8_t *)pci_dev->mem_resource[reg.index].addr + *offset; + doorbell = (uint8_t *)pci_dev->pci_mem[reg.index].mem_res.addr + *offset; /* * virtio-net driver in VM sends queue notifications before