From patchwork Fri Apr 14 12:33:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Power, Ciara" X-Patchwork-Id: 126080 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1093E42941; Fri, 14 Apr 2023 14:33:13 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 01FA740144; Fri, 14 Apr 2023 14:33:13 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id 8B215400D5; Fri, 14 Apr 2023 14:33:10 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1681475590; x=1713011590; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=cisb8SOY/ZQ/DpbqH8L36FacQitg7tNYAQdN83Sq8nI=; b=h4rGPqi69BwWOhfXe+pBZU4pFsLsQFnvxFIG6VWsqC0Kh/pqrNjhiqdf rSQADhrCMM2CInJ7M5Wtbfyf77UA2TuBIlaIKlStPIQo+yY0uvxglgZjN T0JLIDnb8hjzoLEyljKD0fa7pCNuuBPZVqd/Yftco5D/bGFFcUuWsb/OO Cb9j9OsEDcELFFHbE+wQXkejR085HZSUpTQ+UD3tTmFZiiPZVyVSQXpbI 6nVWgxZ8Gb91LrvAczoUDJNmbGPqDeegBQ2TUw8KbAZyWJNfH3xmP+pL6 Bfv9CILTb7Bok/NtwVzpYqq2om7Hh7kiypre1PjRDm60vYEQLTNFovpCH A==; X-IronPort-AV: E=McAfee;i="6600,9927,10679"; a="346286986" X-IronPort-AV: E=Sophos;i="5.99,195,1677571200"; d="scan'208";a="346286986" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Apr 2023 05:33:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10679"; a="667184231" X-IronPort-AV: E=Sophos;i="5.99,195,1677571200"; d="scan'208";a="667184231" Received: from silpixa00400355.ir.intel.com (HELO silpixa00400355.ger.corp.intel.com) ([10.237.222.80]) by orsmga006.jf.intel.com with ESMTP; 14 Apr 2023 05:33:08 -0700 From: Ciara Power To: Kai Ji Cc: dev@dpdk.org, Ciara Power , fanzhang.oss@gmail.com, stable@dpdk.org Subject: [PATCH] crypto/scheduler: fix last element for valid args Date: Fri, 14 Apr 2023 12:33:06 +0000 Message-Id: <20230414123306.575977-1-ciara.power@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The list of valid arguments for Scheduler PMD should be terminated with a NULL entry, as expected by rte_kvargs_parse. Without this, if an invalid key name was used, a global buffer overflow occurred resulting in a segmentation fault. Fixes: 503e9c5afb38 ("crypto/scheduler: register as vdev driver") Cc: fanzhang.oss@gmail.com Cc: stable@dpdk.org Signed-off-by: Ciara Power Acked-by: Kai Ji --- drivers/crypto/scheduler/scheduler_pmd.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/crypto/scheduler/scheduler_pmd.c b/drivers/crypto/scheduler/scheduler_pmd.c index 9d1ce46622..4e8bbf0e09 100644 --- a/drivers/crypto/scheduler/scheduler_pmd.c +++ b/drivers/crypto/scheduler/scheduler_pmd.c @@ -50,7 +50,8 @@ static const char * const scheduler_valid_params[] = { RTE_CRYPTODEV_VDEV_MAX_NB_QP_ARG, RTE_CRYPTODEV_VDEV_SOCKET_ID, RTE_CRYPTODEV_VDEV_COREMASK, - RTE_CRYPTODEV_VDEV_CORELIST + RTE_CRYPTODEV_VDEV_CORELIST, + NULL }; struct scheduler_parse_map {