From patchwork Fri Nov 4 09:42:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Power, Ciara" X-Patchwork-Id: 119474 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7C39BA00C5; Fri, 4 Nov 2022 10:43:10 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 133BA42D10; Fri, 4 Nov 2022 10:43:10 +0100 (CET) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mails.dpdk.org (Postfix) with ESMTP id E885642D0E for ; Fri, 4 Nov 2022 10:43:08 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667554989; x=1699090989; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=OMu7mjfbzmiIrt6b6/yjIGch5zUJ0mMbtKQ5wvMY7Mw=; b=MXv3DElfaWs7i0ZeXdtcIbrtVfLeLiFkmSH7/4HzIcLH+hMS4YAD7C1H XUT8bDMOEBloT5Ypp8f9Ui7cezi299blyzc8p98rPjwWeGfGyn81awJWX X/KvBvbXES8lAGNykBrzHVq4qUtDAyQaAKkixsZb1vDOgpcvG0IzLv50x UGj1lRxLmkSXVziYIMt7DqBiiZhmdsNmBXPzAhsDAyN3YtINSHahzAlEt JicR+y4vqArfUu4yYaKoix1O0ND+rFH0a1Enp535sGFEwKUuUChJiXP0U oJ7GvwihhojWLiP9AdRfveckCMIMea58WKDiSS3fFhkzNy/mVcivKEUOW Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10520"; a="290316675" X-IronPort-AV: E=Sophos;i="5.96,137,1665471600"; d="scan'208";a="290316675" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Nov 2022 02:42:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10520"; a="668301111" X-IronPort-AV: E=Sophos;i="5.96,137,1665471600"; d="scan'208";a="668301111" Received: from silpixa00400355.ir.intel.com (HELO silpixa00400355.ger.corp.intel.com) ([10.237.222.163]) by orsmga001.jf.intel.com with ESMTP; 04 Nov 2022 02:42:48 -0700 From: Ciara Power To: Kai Ji , Pablo de Lara Cc: dev@dpdk.org, pablo.de.lara.guarch@intel.con, Ciara Power Subject: [PATCH] crypto/ipsec-mb: fix qp setup for secondary process Date: Fri, 4 Nov 2022 09:42:45 +0000 Message-Id: <20221104094246.347024-1-ciara.power@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org If a secondary process is using a queue pair that has been setup by the primary process, we need to reset mb_mgr pointers. This commit removes an error return in this case, allowing secondary to do the remaining setup for the existing qp. Fixes: b35848bc01f6 ("crypto/ipsec_mb: add multi-process IPC request handler") Cc: kai.ji@intel.com Signed-off-by: Ciara Power Acked-by: Kai Ji --- drivers/crypto/ipsec_mb/ipsec_mb_ops.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/crypto/ipsec_mb/ipsec_mb_ops.c b/drivers/crypto/ipsec_mb/ipsec_mb_ops.c index bf18d692bd..62be68a917 100644 --- a/drivers/crypto/ipsec_mb/ipsec_mb_ops.c +++ b/drivers/crypto/ipsec_mb/ipsec_mb_ops.c @@ -273,9 +273,6 @@ ipsec_mb_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id, return ipsec_mb_secondary_qp_op(dev->data->dev_id, qp_id, qp_conf, socket_id, RTE_IPSEC_MB_MP_REQ_QP_SET); } - - IPSEC_MB_LOG(ERR, "Queue pair already setup'ed."); - return -EINVAL; } else { /* Free memory prior to re-allocation if needed. */ if (dev->data->queue_pairs[qp_id] != NULL)