From patchwork Wed Nov 2 18:30:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chautru, Nicolas" X-Patchwork-Id: 119419 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 755C1A00C2; Wed, 2 Nov 2022 19:31:10 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 862AF40A80; Wed, 2 Nov 2022 19:31:04 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id 75E3840693 for ; Wed, 2 Nov 2022 19:31:03 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667413863; x=1698949863; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ClHiwQeNORN5wrysqXDLu/X/21zPdAYrmGlgTlEqvqg=; b=GS/k6cKZasNPQRB99/MOLjs6LsrRr1fBh2IYCibqWv8cslPxjUI5FIKC WEVkvS0drftLHUjYlaBvMuyTml6Ra5vkrtKA73Y1hCcgAoRWN3gbtpq4g ++uclbLfflQ3qaFB9IQ52o9+Z0GVN6NkKKl3ZfiqGcQZ3hRSn9CDFEYhb VQz1RjyijZa+ksgLyCeYiBCJSeZ/7GlvLIVYOPiaH6362g75YBcK0bB+K fWqReVt5N0K4P8B4aXuP6TooAnvI2u9RyMY1XCGjNiOEBRgYddCXfoY22 YGwTpdWL/YgH73cCEUlWKbppBcGyJGjta4j6wGfkWxZ0WOXOjcc2V6tLi A==; X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="296940173" X-IronPort-AV: E=Sophos;i="5.95,234,1661842800"; d="scan'208";a="296940173" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Nov 2022 11:31:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10519"; a="665662883" X-IronPort-AV: E=Sophos;i="5.95,234,1661842800"; d="scan'208";a="665662883" Received: from unknown (HELO icx-npg-scs1-cp1.localdomain) ([10.233.180.245]) by orsmga008.jf.intel.com with ESMTP; 02 Nov 2022 11:31:01 -0700 From: Nicolas Chautru To: dev@dpdk.org, gakhil@marvell.com, maxime.coquelin@redhat.com, hernan.vargas@intel.com Cc: Nicolas Chautru Subject: [PATCH v1 1/1] baseband/acc: fix to possible negative shift Date: Wed, 2 Nov 2022 11:30:50 -0700 Message-Id: <20221102183050.12785-2-nicolas.chautru@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20221102183050.12785-1-nicolas.chautru@intel.com> References: <20221102183050.12785-1-nicolas.chautru@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Potential occurrence of negative shift when using invalid configuration on ACC200. Enforcing that depth > 0. Coverity issue: 381636 Fixes: 40e3adbdd3 ("baseband/acc200: add queue configuration") Signed-off-by: Nicolas Chautru --- drivers/baseband/acc/rte_acc200_pmd.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/baseband/acc/rte_acc200_pmd.c b/drivers/baseband/acc/rte_acc200_pmd.c index 8ee9023451..7d7a6c6389 100644 --- a/drivers/baseband/acc/rte_acc200_pmd.c +++ b/drivers/baseband/acc/rte_acc200_pmd.c @@ -105,9 +105,9 @@ aqDepth(int qg_idx, struct rte_acc_conf *acc_conf) qtopFromAcc(&q_top, acc_enum, acc_conf); if (unlikely(q_top == NULL)) - return 0; + return 1; - return q_top->aq_depth_log2; + return RTE_MAX(1, q_top->aq_depth_log2); } /* Return the AQ depth for a Queue Group Index. */