From patchwork Fri Oct 7 19:30:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shijith Thotton X-Patchwork-Id: 117631 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 993B6A0542; Fri, 7 Oct 2022 21:30:57 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 896EA40DFB; Fri, 7 Oct 2022 21:30:57 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 8948C40DDC for ; Fri, 7 Oct 2022 21:30:55 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 297FLZZu006983; Fri, 7 Oct 2022 12:30:50 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=ZJoj0lTdAyRarQSkOa89l0Lm0+ntxJi3iXmZn6NpnyM=; b=lRLW0QbwkKK6jou6107+2FVj1cWjmQP5Ise1gqFVwM9No0jrGgdazrD55LIjSmK9w5pG ALFEJk4Kf4X+HAoCN2NpYgp6jY5YjIj8YrqmK8SrUCY5xUTHQwRIdjizCchzDHlX8Ikk HzlhF/03C/RM7uRfivZ5xkTkiA3tT9PK4UmzUk6ky0NOteIJffe2yV0Z7jxjJNAZ60eF c9Z41MC2RFQy6iLKE5GkyINfjOzBIdciUgQi7GmTlnj+rQFyPN6BaDK1GrDKJozShaS3 udi21Kuzj9h00wk/HtlggtzUkRenLMYJq3rJXiBercLRzAOY41wZC0BvGGjXea84clcS vw== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3k2ppes0gv-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 07 Oct 2022 12:30:50 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Fri, 7 Oct 2022 12:30:48 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Fri, 7 Oct 2022 12:30:48 -0700 Received: from localhost.localdomain (unknown [10.28.34.29]) by maili.marvell.com (Postfix) with ESMTP id D701A3F7057; Fri, 7 Oct 2022 12:30:41 -0700 (PDT) From: Shijith Thotton To: CC: Shijith Thotton , , , , , , , , , , Nicolas Chautru , Ciara Power , Konstantin Ananyev , Reshma Pattan , Cristian Dumitrescu , Maxime Coquelin , Chenbo Xia Subject: [PATCH v4 1/7] mbuf: add API to get and set mbuf physical address Date: Sat, 8 Oct 2022 01:00:23 +0530 Message-ID: <8380a296e1b5e7775691fbe20966e267a37dbf1f.1665170500.git.sthotton@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-Proofpoint-GUID: 5HaFBxzav2kNrZi_LE_FXmeRcIAuDdT_ X-Proofpoint-ORIG-GUID: 5HaFBxzav2kNrZi_LE_FXmeRcIAuDdT_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-10-07_04,2022-10-07_01,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Added APIs rte_mbuf_iova_set and rte_mbuf_iova_get to set and get the physical address of an mbuf respectively. Updated applications and library to use the same. Signed-off-by: Shijith Thotton --- app/test-bbdev/test_bbdev_perf.c | 2 +- app/test-crypto-perf/cperf_test_common.c | 5 ++--- app/test/test_bpf.c | 2 +- app/test/test_mbuf.c | 2 +- app/test/test_pcapng.c | 2 +- lib/kni/rte_kni.c | 3 +-- lib/mbuf/rte_mbuf.c | 12 +++++----- lib/mbuf/rte_mbuf.h | 28 +++++++++++++++++++----- lib/mbuf/rte_mbuf_core.h | 3 +-- lib/pipeline/rte_table_action.c | 2 +- lib/vhost/vhost.h | 2 +- lib/vhost/vhost_crypto.c | 25 ++++++++++----------- 12 files changed, 51 insertions(+), 37 deletions(-) diff --git a/app/test-bbdev/test_bbdev_perf.c b/app/test-bbdev/test_bbdev_perf.c index 311e5d1a96..e7fbf71f6d 100644 --- a/app/test-bbdev/test_bbdev_perf.c +++ b/app/test-bbdev/test_bbdev_perf.c @@ -1002,7 +1002,7 @@ init_op_data_objs(struct rte_bbdev_op_data *bufs, seg->length); memcpy(data, seg->addr, seg->length); m_head->buf_addr = data; - m_head->buf_iova = rte_malloc_virt2iova(data); + rte_mbuf_iova_set(m_head, rte_malloc_virt2iova(data)); m_head->data_off = 0; m_head->data_len = seg->length; } else { diff --git a/app/test-crypto-perf/cperf_test_common.c b/app/test-crypto-perf/cperf_test_common.c index 00aadc9a47..27646cd619 100644 --- a/app/test-crypto-perf/cperf_test_common.c +++ b/app/test-crypto-perf/cperf_test_common.c @@ -26,8 +26,7 @@ fill_single_seg_mbuf(struct rte_mbuf *m, struct rte_mempool *mp, /* start of buffer is after mbuf structure and priv data */ m->priv_size = 0; m->buf_addr = (char *)m + mbuf_hdr_size; - m->buf_iova = rte_mempool_virt2iova(obj) + - mbuf_offset + mbuf_hdr_size; + rte_mbuf_iova_set(m, rte_mempool_virt2iova(obj) + mbuf_offset + mbuf_hdr_size); m->buf_len = segment_sz; m->data_len = data_len; m->pkt_len = data_len; @@ -58,7 +57,7 @@ fill_multi_seg_mbuf(struct rte_mbuf *m, struct rte_mempool *mp, /* start of buffer is after mbuf structure and priv data */ m->priv_size = 0; m->buf_addr = (char *)m + mbuf_hdr_size; - m->buf_iova = next_seg_phys_addr; + rte_mbuf_iova_set(m, next_seg_phys_addr); next_seg_phys_addr += mbuf_hdr_size + segment_sz; m->buf_len = segment_sz; m->data_len = data_len; diff --git a/app/test/test_bpf.c b/app/test/test_bpf.c index 97f500809e..f5af5e8a3f 100644 --- a/app/test/test_bpf.c +++ b/app/test/test_bpf.c @@ -2600,7 +2600,7 @@ dummy_mbuf_prep(struct rte_mbuf *mb, uint8_t buf[], uint32_t buf_len, uint8_t *db; mb->buf_addr = buf; - mb->buf_iova = (uintptr_t)buf; + rte_mbuf_iova_set(mb, (uintptr_t)buf); mb->buf_len = buf_len; rte_mbuf_refcnt_set(mb, 1); diff --git a/app/test/test_mbuf.c b/app/test/test_mbuf.c index e09b2549ca..22e45e66c1 100644 --- a/app/test/test_mbuf.c +++ b/app/test/test_mbuf.c @@ -1233,7 +1233,7 @@ test_failing_mbuf_sanity_check(struct rte_mempool *pktmbuf_pool) } badbuf = *buf; - badbuf.buf_iova = 0; + rte_mbuf_iova_set(&badbuf, 0); if (verify_mbuf_check_panics(&badbuf)) { printf("Error with bad-physaddr mbuf test\n"); return -1; diff --git a/app/test/test_pcapng.c b/app/test/test_pcapng.c index 320dacea34..abbf00f6da 100644 --- a/app/test/test_pcapng.c +++ b/app/test/test_pcapng.c @@ -40,7 +40,7 @@ dummy_mbuf_prep(struct rte_mbuf *mb, uint8_t buf[], uint32_t buf_len, uint8_t *db; mb->buf_addr = buf; - mb->buf_iova = (uintptr_t)buf; + rte_mbuf_iova_set(mb, (uintptr_t)buf); mb->buf_len = buf_len; rte_mbuf_refcnt_set(mb, 1); diff --git a/lib/kni/rte_kni.c b/lib/kni/rte_kni.c index 7971c56bb4..3737a91de7 100644 --- a/lib/kni/rte_kni.c +++ b/lib/kni/rte_kni.c @@ -357,8 +357,7 @@ static void * va2pa(struct rte_mbuf *m) { return (void *)((unsigned long)m - - ((unsigned long)m->buf_addr - - (unsigned long)m->buf_iova)); + ((unsigned long)m->buf_addr - (unsigned long)rte_mbuf_iova_get(m))); } static void * diff --git a/lib/mbuf/rte_mbuf.c b/lib/mbuf/rte_mbuf.c index a2307cebe6..16f6ed6731 100644 --- a/lib/mbuf/rte_mbuf.c +++ b/lib/mbuf/rte_mbuf.c @@ -89,7 +89,7 @@ rte_pktmbuf_init(struct rte_mempool *mp, /* start of buffer is after mbuf structure and priv data */ m->priv_size = priv_size; m->buf_addr = (char *)m + mbuf_size; - m->buf_iova = rte_mempool_virt2iova(m) + mbuf_size; + rte_mbuf_iova_set(m, rte_mempool_virt2iova(m) + mbuf_size); m->buf_len = (uint16_t)buf_len; /* keep some headroom between start of buffer and data */ @@ -187,8 +187,8 @@ __rte_pktmbuf_init_extmem(struct rte_mempool *mp, RTE_ASSERT(ctx->off + ext_mem->elt_size <= ext_mem->buf_len); m->buf_addr = RTE_PTR_ADD(ext_mem->buf_ptr, ctx->off); - m->buf_iova = ext_mem->buf_iova == RTE_BAD_IOVA ? - RTE_BAD_IOVA : (ext_mem->buf_iova + ctx->off); + rte_mbuf_iova_set(m, ext_mem->buf_iova == RTE_BAD_IOVA ? RTE_BAD_IOVA : + (ext_mem->buf_iova + ctx->off)); ctx->off += ext_mem->elt_size; if (ctx->off + ext_mem->elt_size > ext_mem->buf_len) { @@ -388,7 +388,7 @@ int rte_mbuf_check(const struct rte_mbuf *m, int is_header, *reason = "bad mbuf pool"; return -1; } - if (m->buf_iova == 0) { + if (rte_mbuf_iova_get(m) == 0) { *reason = "bad IO addr"; return -1; } @@ -669,8 +669,8 @@ rte_pktmbuf_dump(FILE *f, const struct rte_mbuf *m, unsigned dump_len) __rte_mbuf_sanity_check(m, 1); - fprintf(f, "dump mbuf at %p, iova=%#"PRIx64", buf_len=%u\n", - m, m->buf_iova, m->buf_len); + fprintf(f, "dump mbuf at %p, iova=%#" PRIx64 ", buf_len=%u\n", m, rte_mbuf_iova_get(m), + m->buf_len); fprintf(f, " pkt_len=%u, ol_flags=%#"PRIx64", nb_segs=%u, port=%u", m->pkt_len, m->ol_flags, m->nb_segs, m->port); diff --git a/lib/mbuf/rte_mbuf.h b/lib/mbuf/rte_mbuf.h index 9811e8c760..c552dfbcac 100644 --- a/lib/mbuf/rte_mbuf.h +++ b/lib/mbuf/rte_mbuf.h @@ -135,6 +135,24 @@ rte_mbuf_prefetch_part2(struct rte_mbuf *m) static inline uint16_t rte_pktmbuf_priv_size(struct rte_mempool *mp); +/** + * Get the mbuf physical address. + */ +static inline rte_iova_t +rte_mbuf_iova_get(const struct rte_mbuf *m) +{ + return m->buf_iova; +} + +/** + * Set the mbuf physical address. + */ +static inline void +rte_mbuf_iova_set(struct rte_mbuf *m, rte_iova_t iova) +{ + m->buf_iova = iova; +} + /** * Return the IO address of the beginning of the mbuf data * @@ -146,7 +164,7 @@ static inline uint16_t rte_pktmbuf_priv_size(struct rte_mempool *mp); static inline rte_iova_t rte_mbuf_data_iova(const struct rte_mbuf *mb) { - return mb->buf_iova + mb->data_off; + return rte_mbuf_iova_get(mb) + mb->data_off; } /** @@ -164,7 +182,7 @@ rte_mbuf_data_iova(const struct rte_mbuf *mb) static inline rte_iova_t rte_mbuf_data_iova_default(const struct rte_mbuf *mb) { - return mb->buf_iova + RTE_PKTMBUF_HEADROOM; + return rte_mbuf_iova_get(mb) + RTE_PKTMBUF_HEADROOM; } /** @@ -1056,7 +1074,7 @@ rte_pktmbuf_attach_extbuf(struct rte_mbuf *m, void *buf_addr, RTE_ASSERT(shinfo->free_cb != NULL); m->buf_addr = buf_addr; - m->buf_iova = buf_iova; + rte_mbuf_iova_set(m, buf_iova); m->buf_len = buf_len; m->data_len = 0; @@ -1143,7 +1161,7 @@ static inline void rte_pktmbuf_attach(struct rte_mbuf *mi, struct rte_mbuf *m) mi->data_off = m->data_off; mi->data_len = m->data_len; - mi->buf_iova = m->buf_iova; + rte_mbuf_iova_set(mi, rte_mbuf_iova_get(m)); mi->buf_addr = m->buf_addr; mi->buf_len = m->buf_len; @@ -1245,7 +1263,7 @@ static inline void rte_pktmbuf_detach(struct rte_mbuf *m) m->priv_size = priv_size; m->buf_addr = (char *)m + mbuf_size; - m->buf_iova = rte_mempool_virt2iova(m) + mbuf_size; + rte_mbuf_iova_set(m, rte_mempool_virt2iova(m) + mbuf_size); m->buf_len = (uint16_t)buf_len; rte_pktmbuf_reset_headroom(m); m->data_len = 0; diff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h index e672d59b36..51a12a1fb9 100644 --- a/lib/mbuf/rte_mbuf_core.h +++ b/lib/mbuf/rte_mbuf_core.h @@ -736,8 +736,7 @@ struct rte_mbuf_ext_shared_info { * @param o * The offset into the data to calculate address from. */ -#define rte_pktmbuf_iova_offset(m, o) \ - (rte_iova_t)((m)->buf_iova + (m)->data_off + (o)) +#define rte_pktmbuf_iova_offset(m, o) (rte_iova_t)(rte_mbuf_iova_get(m) + (m)->data_off + (o)) /** * A macro that returns the IO address that points to the start of the diff --git a/lib/pipeline/rte_table_action.c b/lib/pipeline/rte_table_action.c index b1310be565..06a8cdcf05 100644 --- a/lib/pipeline/rte_table_action.c +++ b/lib/pipeline/rte_table_action.c @@ -1929,7 +1929,7 @@ pkt_work_sym_crypto(struct rte_mbuf *mbuf, struct sym_crypto_data *data, op->type = RTE_CRYPTO_OP_TYPE_SYMMETRIC; op->sess_type = RTE_CRYPTO_OP_WITH_SESSION; - op->phys_addr = mbuf->buf_iova + cfg->op_offset - sizeof(*mbuf); + op->phys_addr = rte_mbuf_iova_get(mbuf) + cfg->op_offset - sizeof(*mbuf); op->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED; sym->m_src = mbuf; sym->m_dst = NULL; diff --git a/lib/vhost/vhost.h b/lib/vhost/vhost.h index eeeda681cc..ef211ed519 100644 --- a/lib/vhost/vhost.h +++ b/lib/vhost/vhost.h @@ -971,7 +971,7 @@ restore_mbuf(struct rte_mbuf *m) /* start of buffer is after mbuf structure and priv data */ m->buf_addr = (char *)m + mbuf_size; - m->buf_iova = rte_mempool_virt2iova(m) + mbuf_size; + rte_mbuf_iova_set(m, rte_mempool_virt2iova(m) + mbuf_size); m = m->next; } } diff --git a/lib/vhost/vhost_crypto.c b/lib/vhost/vhost_crypto.c index 54946f46d9..3077a21ae8 100644 --- a/lib/vhost/vhost_crypto.c +++ b/lib/vhost/vhost_crypto.c @@ -823,11 +823,10 @@ prepare_sym_cipher_op(struct vhost_crypto *vcrypto, struct rte_crypto_op *op, switch (vcrypto->option) { case RTE_VHOST_CRYPTO_ZERO_COPY_ENABLE: m_src->data_len = cipher->para.src_data_len; - m_src->buf_iova = gpa_to_hpa(vcrypto->dev, desc->addr, - cipher->para.src_data_len); + rte_mbuf_iova_set(m_src, + gpa_to_hpa(vcrypto->dev, desc->addr, cipher->para.src_data_len)); m_src->buf_addr = get_data_ptr(vc_req, desc, VHOST_ACCESS_RO); - if (unlikely(m_src->buf_iova == 0 || - m_src->buf_addr == NULL)) { + if (unlikely(rte_mbuf_iova_get(m_src) == 0 || m_src->buf_addr == NULL)) { VC_LOG_ERR("zero_copy may fail due to cross page data"); ret = VIRTIO_CRYPTO_ERR; goto error_exit; @@ -867,10 +866,10 @@ prepare_sym_cipher_op(struct vhost_crypto *vcrypto, struct rte_crypto_op *op, switch (vcrypto->option) { case RTE_VHOST_CRYPTO_ZERO_COPY_ENABLE: - m_dst->buf_iova = gpa_to_hpa(vcrypto->dev, - desc->addr, cipher->para.dst_data_len); + rte_mbuf_iova_set(m_dst, + gpa_to_hpa(vcrypto->dev, desc->addr, cipher->para.dst_data_len)); m_dst->buf_addr = get_data_ptr(vc_req, desc, VHOST_ACCESS_RW); - if (unlikely(m_dst->buf_iova == 0 || m_dst->buf_addr == NULL)) { + if (unlikely(rte_mbuf_iova_get(m_dst) == 0 || m_dst->buf_addr == NULL)) { VC_LOG_ERR("zero_copy may fail due to cross page data"); ret = VIRTIO_CRYPTO_ERR; goto error_exit; @@ -981,10 +980,10 @@ prepare_sym_chain_op(struct vhost_crypto *vcrypto, struct rte_crypto_op *op, m_src->data_len = chain->para.src_data_len; m_dst->data_len = chain->para.dst_data_len; - m_src->buf_iova = gpa_to_hpa(vcrypto->dev, desc->addr, - chain->para.src_data_len); + rte_mbuf_iova_set(m_src, + gpa_to_hpa(vcrypto->dev, desc->addr, chain->para.src_data_len)); m_src->buf_addr = get_data_ptr(vc_req, desc, VHOST_ACCESS_RO); - if (unlikely(m_src->buf_iova == 0 || m_src->buf_addr == NULL)) { + if (unlikely(rte_mbuf_iova_get(m_src) == 0 || m_src->buf_addr == NULL)) { VC_LOG_ERR("zero_copy may fail due to cross page data"); ret = VIRTIO_CRYPTO_ERR; goto error_exit; @@ -1024,10 +1023,10 @@ prepare_sym_chain_op(struct vhost_crypto *vcrypto, struct rte_crypto_op *op, switch (vcrypto->option) { case RTE_VHOST_CRYPTO_ZERO_COPY_ENABLE: - m_dst->buf_iova = gpa_to_hpa(vcrypto->dev, - desc->addr, chain->para.dst_data_len); + rte_mbuf_iova_set(m_dst, + gpa_to_hpa(vcrypto->dev, desc->addr, chain->para.dst_data_len)); m_dst->buf_addr = get_data_ptr(vc_req, desc, VHOST_ACCESS_RW); - if (unlikely(m_dst->buf_iova == 0 || m_dst->buf_addr == NULL)) { + if (unlikely(rte_mbuf_iova_get(m_dst) == 0 || m_dst->buf_addr == NULL)) { VC_LOG_ERR("zero_copy may fail due to cross page data"); ret = VIRTIO_CRYPTO_ERR; goto error_exit; From patchwork Fri Oct 7 19:30:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shijith Thotton X-Patchwork-Id: 117632 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 100ADA0542; Fri, 7 Oct 2022 21:31:05 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D433E42684; Fri, 7 Oct 2022 21:31:02 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 7475542684 for ; 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Fri, 07 Oct 2022 12:30:56 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 7 Oct 2022 12:30:54 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Fri, 7 Oct 2022 12:30:53 -0700 Received: from localhost.localdomain (unknown [10.28.34.29]) by maili.marvell.com (Postfix) with ESMTP id 091933F704E; Fri, 7 Oct 2022 12:30:48 -0700 (PDT) From: Shijith Thotton To: CC: Shijith Thotton , , , , , , , , , , Chengwen Feng , "Kevin Laatz" Subject: [PATCH v4 2/7] test/dma: use API to get mbuf data physical address Date: Sat, 8 Oct 2022 01:00:24 +0530 Message-ID: <79cf69f1f413923dc4ea28bbb378b340f19778c2.1665170500.git.sthotton@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-Proofpoint-GUID: OgqeehNo5LeaR9i6fdJbpOyUMayly81p X-Proofpoint-ORIG-GUID: OgqeehNo5LeaR9i6fdJbpOyUMayly81p X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-10-07_04,2022-10-07_01,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Used rte_mbuf_data_iova API to get the physical address of mbuf data. Signed-off-by: Shijith Thotton --- app/test/test_dmadev.c | 33 ++++++++++++++------------------- 1 file changed, 14 insertions(+), 19 deletions(-) diff --git a/app/test/test_dmadev.c b/app/test/test_dmadev.c index 9e8e101f40..fe62e98af8 100644 --- a/app/test/test_dmadev.c +++ b/app/test/test_dmadev.c @@ -110,8 +110,8 @@ do_multi_copies(int16_t dev_id, uint16_t vchan, for (j = 0; j < COPY_LEN/sizeof(uint64_t); j++) src_data[j] = rte_rand(); - if (rte_dma_copy(dev_id, vchan, srcs[i]->buf_iova + srcs[i]->data_off, - dsts[i]->buf_iova + dsts[i]->data_off, COPY_LEN, 0) != id_count++) + if (rte_dma_copy(dev_id, vchan, rte_mbuf_data_iova(srcs[i]), + rte_mbuf_data_iova(dsts[i]), COPY_LEN, 0) != id_count++) ERR_RETURN("Error with rte_dma_copy for buffer %u\n", i); } rte_dma_submit(dev_id, vchan); @@ -317,9 +317,8 @@ test_failure_in_full_burst(int16_t dev_id, uint16_t vchan, bool fence, rte_dma_stats_get(dev_id, vchan, &baseline); /* get a baseline set of stats */ for (i = 0; i < COMP_BURST_SZ; i++) { int id = rte_dma_copy(dev_id, vchan, - (i == fail_idx ? 0 : (srcs[i]->buf_iova + srcs[i]->data_off)), - dsts[i]->buf_iova + dsts[i]->data_off, - COPY_LEN, OPT_FENCE(i)); + (i == fail_idx ? 0 : rte_mbuf_data_iova(srcs[i])), + rte_mbuf_data_iova(dsts[i]), COPY_LEN, OPT_FENCE(i)); if (id < 0) ERR_RETURN("Error with rte_dma_copy for buffer %u\n", i); if (i == fail_idx) @@ -407,9 +406,8 @@ test_individual_status_query_with_failure(int16_t dev_id, uint16_t vchan, bool f for (j = 0; j < COMP_BURST_SZ; j++) { int id = rte_dma_copy(dev_id, vchan, - (j == fail_idx ? 0 : (srcs[j]->buf_iova + srcs[j]->data_off)), - dsts[j]->buf_iova + dsts[j]->data_off, - COPY_LEN, OPT_FENCE(j)); + (j == fail_idx ? 0 : rte_mbuf_data_iova(srcs[j])), + rte_mbuf_data_iova(dsts[j]), COPY_LEN, OPT_FENCE(j)); if (id < 0) ERR_RETURN("Error with rte_dma_copy for buffer %u\n", j); if (j == fail_idx) @@ -470,9 +468,8 @@ test_single_item_status_query_with_failure(int16_t dev_id, uint16_t vchan, for (j = 0; j < COMP_BURST_SZ; j++) { int id = rte_dma_copy(dev_id, vchan, - (j == fail_idx ? 0 : (srcs[j]->buf_iova + srcs[j]->data_off)), - dsts[j]->buf_iova + dsts[j]->data_off, - COPY_LEN, 0); + (j == fail_idx ? 0 : rte_mbuf_data_iova(srcs[j])), + rte_mbuf_data_iova(dsts[j]), COPY_LEN, 0); if (id < 0) ERR_RETURN("Error with rte_dma_copy for buffer %u\n", j); if (j == fail_idx) @@ -529,15 +526,14 @@ test_multi_failure(int16_t dev_id, uint16_t vchan, struct rte_mbuf **srcs, struc /* enqueue and gather completions in one go */ for (j = 0; j < COMP_BURST_SZ; j++) { - uintptr_t src = srcs[j]->buf_iova + srcs[j]->data_off; + uintptr_t src = rte_mbuf_data_iova(srcs[j]); /* set up for failure if the current index is anywhere is the fails array */ for (i = 0; i < num_fail; i++) if (j == fail[i]) src = 0; - int id = rte_dma_copy(dev_id, vchan, - src, dsts[j]->buf_iova + dsts[j]->data_off, - COPY_LEN, 0); + int id = rte_dma_copy(dev_id, vchan, src, rte_mbuf_data_iova(dsts[j]), + COPY_LEN, 0); if (id < 0) ERR_RETURN("Error with rte_dma_copy for buffer %u\n", j); } @@ -565,15 +561,14 @@ test_multi_failure(int16_t dev_id, uint16_t vchan, struct rte_mbuf **srcs, struc /* enqueue and gather completions in bursts, but getting errors one at a time */ for (j = 0; j < COMP_BURST_SZ; j++) { - uintptr_t src = srcs[j]->buf_iova + srcs[j]->data_off; + uintptr_t src = rte_mbuf_data_iova(srcs[j]); /* set up for failure if the current index is anywhere is the fails array */ for (i = 0; i < num_fail; i++) if (j == fail[i]) src = 0; - int id = rte_dma_copy(dev_id, vchan, - src, dsts[j]->buf_iova + dsts[j]->data_off, - COPY_LEN, 0); + int id = rte_dma_copy(dev_id, vchan, src, rte_mbuf_data_iova(dsts[j]), + COPY_LEN, 0); if (id < 0) ERR_RETURN("Error with rte_dma_copy for buffer %u\n", j); } From patchwork Fri Oct 7 19:30:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shijith Thotton X-Patchwork-Id: 117633 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id DE860A0542; Fri, 7 Oct 2022 21:31:10 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D135A4280B; Fri, 7 Oct 2022 21:31:10 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id F339D42802 for ; Fri, 7 Oct 2022 21:31:08 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 297FCib5016019; Fri, 7 Oct 2022 12:31:02 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=JIFQ3a1AWCTzY5YSuNss6CNlppLjteVxMp1vKKXjzG4=; b=crRjG4F2AArOJ+qksF02bi6bQj9troCbVeQ2NxXYjP2M3NaBIOjfojdclNKrhWhwrg/V ElqaJN5+7lHJv8F/5qVnQxIAVaLm1IglJik/7g/7xZSZr63xp4GBP7QhA7vsSIkQzNHi fcT3wsfus0rC3Cba9JvYpukXqiDyCkvBnFdRuvJGXaM6HBMEn4ErKH60SQkVVAXq1JbU nLSkNJoLr61UnNlM0Q2doSTxZHZqr+yTTE9o7IiKrpAlj6g1gKxvPaLf5wpNzS26ore6 kUhgWbEuISaexeWree7+el9Fj90lgM7TmL3K8HeV2E363Y9NsD4jYJ8nUfg6NRSwM0iG OQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3k1d7gsjjt-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 07 Oct 2022 12:31:02 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Fri, 7 Oct 2022 12:30:59 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 7 Oct 2022 12:30:59 -0700 Received: from localhost.localdomain (unknown [10.28.34.29]) by maili.marvell.com (Postfix) with ESMTP id ADFA43F7051; Fri, 7 Oct 2022 12:30:54 -0700 (PDT) From: Shijith Thotton To: CC: Shijith Thotton , , , , , , , , , , Dongdong Liu , "Yisen Zhuang" Subject: [PATCH v4 3/7] build: add meson option to configure IOVA mode as PA Date: Sat, 8 Oct 2022 01:00:25 +0530 Message-ID: <3ef3f4ac3ce055b45bd6a10a92ffa7e0e594e62e.1665170500.git.sthotton@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-Proofpoint-GUID: HrEkVpbYqRxdcGtBodNkm9qdGT1F0mj5 X-Proofpoint-ORIG-GUID: HrEkVpbYqRxdcGtBodNkm9qdGT1F0mj5 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-10-07_04,2022-10-07_01,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org IOVA mode in DPDK is either PA or VA. The new build option enable_iova_as_pa configures the mode to PA at compile time. By default, this option is enabled. If the options is disabled, only drivers which supports it are enabled during build. Supported driver can set the flag pmd_supports_disable_iova_as_pa in its build file. mbuf structure holds the physical (PA) and virtual address (VA) of a buffer. if IOVA as PA is disabled at compile time, PA field (buf_iova) of mbuf is redundant as it is the same as VA and is replaced by a dummy field. Signed-off-by: Shijith Thotton --- app/test/test_mbuf.c | 12 +++++++----- config/meson.build | 1 + drivers/meson.build | 6 ++++++ drivers/net/hns3/meson.build | 6 ++++++ lib/eal/linux/eal.c | 6 ++++++ lib/mbuf/rte_mbuf.c | 2 +- lib/mbuf/rte_mbuf.h | 9 +++++++++ lib/mbuf/rte_mbuf_core.h | 6 ++++++ lib/meson.build | 3 +++ meson_options.txt | 2 ++ 10 files changed, 47 insertions(+), 6 deletions(-) diff --git a/app/test/test_mbuf.c b/app/test/test_mbuf.c index 22e45e66c1..2d66786ace 100644 --- a/app/test/test_mbuf.c +++ b/app/test/test_mbuf.c @@ -1232,11 +1232,13 @@ test_failing_mbuf_sanity_check(struct rte_mempool *pktmbuf_pool) return -1; } - badbuf = *buf; - rte_mbuf_iova_set(&badbuf, 0); - if (verify_mbuf_check_panics(&badbuf)) { - printf("Error with bad-physaddr mbuf test\n"); - return -1; + if (RTE_IOVA_AS_PA) { + badbuf = *buf; + rte_mbuf_iova_set(&badbuf, 0); + if (verify_mbuf_check_panics(&badbuf)) { + printf("Error with bad-physaddr mbuf test\n"); + return -1; + } } badbuf = *buf; diff --git a/config/meson.build b/config/meson.build index 7f7b6c92fd..0fc209db01 100644 --- a/config/meson.build +++ b/config/meson.build @@ -309,6 +309,7 @@ endif if get_option('mbuf_refcnt_atomic') dpdk_conf.set('RTE_MBUF_REFCNT_ATOMIC', true) endif +dpdk_conf.set10('RTE_IOVA_AS_PA', get_option('enable_iova_as_pa')) compile_time_cpuflags = [] subdir(arch_subdir) diff --git a/drivers/meson.build b/drivers/meson.build index f6ba5ba4fb..2a29c210b5 100644 --- a/drivers/meson.build +++ b/drivers/meson.build @@ -106,6 +106,7 @@ foreach subpath:subdirs ext_deps = [] pkgconfig_extra_libs = [] testpmd_sources = [] + pmd_supports_disable_iova_as_pa = false if not enable_drivers.contains(drv_path) build = false @@ -123,6 +124,11 @@ foreach subpath:subdirs # pull in driver directory which should update all the local variables subdir(drv_path) + if dpdk_conf.get('RTE_IOVA_AS_PA') == 0 and not pmd_supports_disable_iova_as_pa and not always_enable.contains(drv_path) + build = false + reason = 'driver does not support disabling IOVA as PA mode' + endif + # get dependency objs from strings shared_deps = ext_deps static_deps = ext_deps diff --git a/drivers/net/hns3/meson.build b/drivers/net/hns3/meson.build index f2aede94ed..39d426f232 100644 --- a/drivers/net/hns3/meson.build +++ b/drivers/net/hns3/meson.build @@ -13,6 +13,12 @@ if arch_subdir != 'x86' and arch_subdir != 'arm' or not dpdk_conf.get('RTE_ARCH_ subdir_done() endif +if dpdk_conf.get('RTE_IOVA_AS_PA') == 0 + build = false + reason = 'driver does not support disabling IOVA as PA mode' + subdir_done() +endif + sources = files( 'hns3_cmd.c', 'hns3_dcb.c', diff --git a/lib/eal/linux/eal.c b/lib/eal/linux/eal.c index 46bf52cef0..a6eb45c65a 100644 --- a/lib/eal/linux/eal.c +++ b/lib/eal/linux/eal.c @@ -1128,6 +1128,12 @@ rte_eal_init(int argc, char **argv) return -1; } + if (rte_eal_iova_mode() == RTE_IOVA_PA && !RTE_IOVA_AS_PA) { + rte_eal_init_alert("Cannot use IOVA as 'PA' as it is disabled during build"); + rte_errno = EINVAL; + return -1; + } + RTE_LOG(INFO, EAL, "Selected IOVA mode '%s'\n", rte_eal_iova_mode() == RTE_IOVA_PA ? "PA" : "VA"); diff --git a/lib/mbuf/rte_mbuf.c b/lib/mbuf/rte_mbuf.c index 16f6ed6731..cfd8062f1e 100644 --- a/lib/mbuf/rte_mbuf.c +++ b/lib/mbuf/rte_mbuf.c @@ -388,7 +388,7 @@ int rte_mbuf_check(const struct rte_mbuf *m, int is_header, *reason = "bad mbuf pool"; return -1; } - if (rte_mbuf_iova_get(m) == 0) { + if (RTE_IOVA_AS_PA && rte_mbuf_iova_get(m) == 0) { *reason = "bad IO addr"; return -1; } diff --git a/lib/mbuf/rte_mbuf.h b/lib/mbuf/rte_mbuf.h index c552dfbcac..481e1ec326 100644 --- a/lib/mbuf/rte_mbuf.h +++ b/lib/mbuf/rte_mbuf.h @@ -141,7 +141,11 @@ static inline uint16_t rte_pktmbuf_priv_size(struct rte_mempool *mp); static inline rte_iova_t rte_mbuf_iova_get(const struct rte_mbuf *m) { +#if RTE_IOVA_AS_PA return m->buf_iova; +#else + return (rte_iova_t)m->buf_addr; +#endif } /** @@ -150,7 +154,12 @@ rte_mbuf_iova_get(const struct rte_mbuf *m) static inline void rte_mbuf_iova_set(struct rte_mbuf *m, rte_iova_t iova) { +#if RTE_IOVA_AS_PA m->buf_iova = iova; +#else + RTE_SET_USED(m); + RTE_SET_USED(iova); +#endif } /** diff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h index 51a12a1fb9..91c2211b44 100644 --- a/lib/mbuf/rte_mbuf_core.h +++ b/lib/mbuf/rte_mbuf_core.h @@ -467,13 +467,19 @@ struct rte_mbuf { RTE_MARKER cacheline0; void *buf_addr; /**< Virtual address of segment buffer. */ +#if RTE_IOVA_AS_PA /** * Physical address of segment buffer. + * This field is undefined if the build is configured to use only + * virtual address as IOVA (i.e. RTE_IOVA_AS_PA is 0). * Force alignment to 8-bytes, so as to ensure we have the exact * same mbuf cacheline0 layout for 32-bit and 64-bit. This makes * working on vector drivers easier. */ rte_iova_t buf_iova __rte_aligned(sizeof(rte_iova_t)); +#else + uint64_t dummy; +#endif /* next 8 bytes are initialised on RX descriptor rearm */ RTE_MARKER64 rearm_data; diff --git a/lib/meson.build b/lib/meson.build index c648f7d800..c071a6c8e0 100644 --- a/lib/meson.build +++ b/lib/meson.build @@ -88,6 +88,9 @@ optional_libs = [ disabled_libs = [] opt_disabled_libs = run_command(list_dir_globs, get_option('disable_libs'), check: true).stdout().split() +if dpdk_conf.get('RTE_IOVA_AS_PA') == 0 + opt_disabled_libs += ['kni'] +endif foreach l:opt_disabled_libs if not optional_libs.contains(l) warning('Cannot disable mandatory library "@0@"'.format(l)) diff --git a/meson_options.txt b/meson_options.txt index 7c220ad68d..f6880410e2 100644 --- a/meson_options.txt +++ b/meson_options.txt @@ -44,6 +44,8 @@ option('platform', type: 'string', value: 'native', description: 'Platform to build, either "native", "generic" or a SoC. Please refer to the Linux build guide for more information.') option('enable_trace_fp', type: 'boolean', value: false, description: 'enable fast path trace points.') +option('enable_iova_as_pa', type: 'boolean', value: true, description: + 'Enable or disable support for IOVA as PA mode. Disabling this option removes the buf_iova field of mbuf.') option('tests', type: 'boolean', value: true, description: 'build unit tests') option('use_hpet', type: 'boolean', value: false, description: From patchwork Fri Oct 7 19:30:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shijith Thotton X-Patchwork-Id: 117634 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 508E0A0542; Fri, 7 Oct 2022 21:31:16 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id EED2842B6C; Fri, 7 Oct 2022 21:31:12 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id BAA9C4281C for ; Fri, 7 Oct 2022 21:31:11 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 297DvLL2017715; Fri, 7 Oct 2022 12:31:07 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=kcdKhsndleu5Od3WME7S5Je6T82Jsi9mm3+44ckij24=; b=Vd/T2W9o5s4urXovyu0MHDcfBVyHMzOy+Eeb1D3Yrikp1zLbMAehUWjxM+SnzECg1P3H 2xK5q26iBlUrTlEjuEtHdwtSYxA2l190F2SB6lqYh+FHzNxqEx8YkFD54xGW8+V0Ta4F s8aJjjBIxa1gGREtC7LWKTogy9uIXNxvKgf9oLMNjU1iNyUafZ2NF36e3bkQ8ePwClj4 PL2SSUBRYnxl8o0L3V3dq8EaHP4SqNmfd173Gp0INaCG/GSHmbfT89Gch17MJ3WxMgYU Bb7hKRrFNPFilAFgjiY69TZHvlMWlsE14QVnVO6ogjqssKrdUzbnYNPo2i5QJBeZrLnu hA== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3k1d7gsjk2-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 07 Oct 2022 12:31:07 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Fri, 7 Oct 2022 12:31:04 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 7 Oct 2022 12:31:04 -0700 Received: from localhost.localdomain (unknown [10.28.34.29]) by maili.marvell.com (Postfix) with ESMTP id 691863F704E; Fri, 7 Oct 2022 12:31:00 -0700 (PDT) From: Shijith Thotton To: CC: Shijith Thotton , , , , , , , , , Subject: [PATCH v4 4/7] mbuf: add second dynamic field member Date: Sat, 8 Oct 2022 01:00:26 +0530 Message-ID: <06eb658ad97daaf7c7a5d4c4077ce6fb552aaf7f.1665170500.git.sthotton@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-Proofpoint-GUID: VWt15i1mHjA6h9NLatjlsMk-SkAniwHQ X-Proofpoint-ORIG-GUID: VWt15i1mHjA6h9NLatjlsMk-SkAniwHQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-10-07_04,2022-10-07_01,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org If IOVA as PA is disabled during build, mbuf physical address field is undefined. This space is used to add the second dynamic field. Signed-off-by: Shijith Thotton --- lib/mbuf/rte_mbuf_core.h | 6 +++++- lib/mbuf/rte_mbuf_dyn.c | 3 +++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h index 91c2211b44..dc6c54015e 100644 --- a/lib/mbuf/rte_mbuf_core.h +++ b/lib/mbuf/rte_mbuf_core.h @@ -478,7 +478,11 @@ struct rte_mbuf { */ rte_iova_t buf_iova __rte_aligned(sizeof(rte_iova_t)); #else - uint64_t dummy; + /** + * Reserved for dynamic field in builds where physical address + * field is undefined. + */ + uint64_t dynfield2; #endif /* next 8 bytes are initialised on RX descriptor rearm */ diff --git a/lib/mbuf/rte_mbuf_dyn.c b/lib/mbuf/rte_mbuf_dyn.c index 4ae79383b5..35839e938c 100644 --- a/lib/mbuf/rte_mbuf_dyn.c +++ b/lib/mbuf/rte_mbuf_dyn.c @@ -128,6 +128,9 @@ init_shared_mem(void) */ memset(shm, 0, sizeof(*shm)); mark_free(dynfield1); +#if !RTE_IOVA_AS_PA + mark_free(dynfield2); +#endif /* init free_flags */ for (mask = RTE_MBUF_F_FIRST_FREE; mask <= RTE_MBUF_F_LAST_FREE; mask <<= 1) From patchwork Fri Oct 7 19:30:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shijith Thotton X-Patchwork-Id: 117635 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 11BADA0542; Fri, 7 Oct 2022 21:31:26 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0630640687; Fri, 7 Oct 2022 21:31:26 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 02D3440042 for ; Fri, 7 Oct 2022 21:31:23 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 297FLX0t006967; Fri, 7 Oct 2022 12:31:12 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=wq/sZ4oOnoxUv/WuVdNB8Eg/ujEHjrIOXnkE5622uwE=; b=d3DOUKHEBb38vBfOVtvaz07H/UlV9ETKkNmzKQbE4ZtngqiiK31NRnQ7Kqy7Le+6YA8k pkhONeMkANqc0mJLhFGTdoeCANXeS0xZMV5N0mnGcE4NFAQFrusUW/NZ9P/S1TT7R8D1 7OAgZKG0xzJbPvw5fw+C1y4u8mCSXTomSHGv6nquk8F3vdzMXa6r/bSWWgkwrNK1AaVi u6o/NRqK5x1vN4iT8jj95ecjyxskW4ALKuAx9KGTzx6z1e0J5hH0DGXRVGTIXGLkg2C4 RsLJN7NM9CkyweeFVWA9wX+DqpAg40TrIc+r0QsNYd8lbL/6RXgM8dZ+amjKtGl1nQxD Wg== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3k2ppes0jc-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 07 Oct 2022 12:31:11 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Fri, 7 Oct 2022 12:31:10 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 7 Oct 2022 12:31:10 -0700 Received: from localhost.localdomain (unknown [10.28.34.29]) by maili.marvell.com (Postfix) with ESMTP id 5F3495B6927; Fri, 7 Oct 2022 12:31:05 -0700 (PDT) From: Shijith Thotton To: CC: Shijith Thotton , , , , , , , , , Subject: [PATCH v4 5/7] lib: move mbuf next pointer to first cache line Date: Sat, 8 Oct 2022 01:00:27 +0530 Message-ID: <465a7303a72cc4a77c42d8479f727efd1dabbc46.1665170500.git.sthotton@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-Proofpoint-GUID: QFZlNAPHCtYnJXiNkTkXruJ0byYv37W8 X-Proofpoint-ORIG-GUID: QFZlNAPHCtYnJXiNkTkXruJ0byYv37W8 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-10-07_04,2022-10-07_01,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Swapped position of mbuf next pointer and second dynamic field (dynfield2) if the build is configured to disable IOVA as PA. This is to move the mbuf next pointer to first cache line. Signed-off-by: Shijith Thotton --- doc/guides/rel_notes/release_22_11.rst | 3 +++ lib/mbuf/rte_mbuf_core.h | 19 ++++++++++++++----- 2 files changed, 17 insertions(+), 5 deletions(-) diff --git a/doc/guides/rel_notes/release_22_11.rst b/doc/guides/rel_notes/release_22_11.rst index 0b4740abd1..006d1f5988 100644 --- a/doc/guides/rel_notes/release_22_11.rst +++ b/doc/guides/rel_notes/release_22_11.rst @@ -269,6 +269,9 @@ ABI Changes * eventdev: Added ``weight`` and ``affinity`` fields to ``rte_event_queue_conf`` structure. +* mbuf: Replaced ``buf_iova`` field with ``next`` field and added a new field + ``dynfield2`` at its place in second cacheline if ``RTE_IOVA_AS_PA`` is 0. + Known Issues ------------ diff --git a/lib/mbuf/rte_mbuf_core.h b/lib/mbuf/rte_mbuf_core.h index dc6c54015e..37d3fcc3b8 100644 --- a/lib/mbuf/rte_mbuf_core.h +++ b/lib/mbuf/rte_mbuf_core.h @@ -479,10 +479,11 @@ struct rte_mbuf { rte_iova_t buf_iova __rte_aligned(sizeof(rte_iova_t)); #else /** - * Reserved for dynamic field in builds where physical address - * field is undefined. + * Next segment of scattered packet. + * This field is valid when physical address field is undefined. + * Otherwise next pointer in the second cache line will be used. */ - uint64_t dynfield2; + struct rte_mbuf *next; #endif /* next 8 bytes are initialised on RX descriptor rearm */ @@ -599,11 +600,19 @@ struct rte_mbuf { /* second cache line - fields only used in slow path or on TX */ RTE_MARKER cacheline1 __rte_cache_min_aligned; +#if RTE_IOVA_AS_PA /** - * Next segment of scattered packet. Must be NULL in the last segment or - * in case of non-segmented packet. + * Next segment of scattered packet. Must be NULL in the last + * segment or in case of non-segmented packet. */ struct rte_mbuf *next; +#else + /** + * Reserved for dynamic field when the next pointer is in first + * cache line (i.e. RTE_IOVA_AS_PA is 0). + */ + uint64_t dynfield2; +#endif /* fields to support TX offloads */ RTE_STD_C11 From patchwork Fri Oct 7 19:30:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shijith Thotton X-Patchwork-Id: 117636 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E74F5A0542; Fri, 7 Oct 2022 21:31:30 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 30B364281E; Fri, 7 Oct 2022 21:31:30 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id CE86E40042 for ; Fri, 7 Oct 2022 21:31:28 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 297FLX0u006967; Fri, 7 Oct 2022 12:31:20 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=IDrDrpy1cIWtP8jKxqukSCRQcYdYENc05kFJP6V/AAI=; b=esU6JuiRWOw6rLwfNO0a5G+Q1Jk7nlWOK371Z0045WMiH784IFGBMjfX+vBpWQBZYBLn b/GIH4QGvC8GC8LmBE8grLgFqUWoqjSz9X7S6wfK09yCi3QYRU4l2JkNpLncU2U8+yXh IdFiVOOrV2F/Sgqvq2ta+PUxHMKlrrHcAl5FSHaBeN0h4JFkl9CcOFghus+eSG1Mb2Xr MCOhW825PMTzKmCYlw6NDmNIzela4p48gbOV5etSMmcoFC6cOCOUyrIKeisetzGkRt0r oOJtIcnT4Wbv8zneKXsg8msm5VpgDmf4BzoXotjKucq0PE5ir3yYPr7I/1FGM6DBmEko xA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3k2ppes0jm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 07 Oct 2022 12:31:20 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 7 Oct 2022 12:31:19 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 7 Oct 2022 12:31:19 -0700 Received: from localhost.localdomain (unknown [10.28.34.29]) by maili.marvell.com (Postfix) with ESMTP id 03A6D5B6932; Fri, 7 Oct 2022 12:31:10 -0700 (PDT) From: Shijith Thotton To: CC: Shijith Thotton , , , , , , , , , , Ruifeng Wang , "Nithin Dabilpuram" , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Ankur Dwivedi , Anoob Joseph , Tejasree Kondoj , "Radha Mohan Chintakuntla" , Veerasenareddy Burru , Ashwin Sekhar T K , Jakub Palider , Tomasz Duszynski Subject: [PATCH v4 6/7] drivers: mark cnxk PMDs work with IOVA as PA disabled Date: Sat, 8 Oct 2022 01:00:28 +0530 Message-ID: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-Proofpoint-GUID: MFGm2CcwvrltHzp76IMESc36xeOf3hJo X-Proofpoint-ORIG-GUID: MFGm2CcwvrltHzp76IMESc36xeOf3hJo X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-10-07_04,2022-10-07_01,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Enabled the flag pmd_supports_disable_iova_as_pa in cnxk driver build files as they work with IOVA as VA. Updated cn9k and cn10k soc build configurations to disable the IOVA as PA build by default. Signed-off-by: Shijith Thotton --- config/arm/meson.build | 8 +++- doc/guides/platform/cnxk.rst | 3 +- drivers/common/cnxk/meson.build | 1 + drivers/crypto/cnxk/cn10k_ipsec_la_ops.h | 4 +- drivers/crypto/cnxk/cn9k_ipsec_la_ops.h | 2 +- drivers/crypto/cnxk/meson.build | 2 + drivers/dma/cnxk/meson.build | 1 + drivers/event/cnxk/meson.build | 1 + drivers/mempool/cnxk/meson.build | 1 + drivers/net/cnxk/cn10k_ethdev.c | 4 +- drivers/net/cnxk/cn10k_tx.h | 55 +++++++----------------- drivers/net/cnxk/cn9k_ethdev.c | 4 +- drivers/net/cnxk/cn9k_tx.h | 55 +++++++----------------- drivers/net/cnxk/cnxk_ethdev.h | 1 - drivers/net/cnxk/meson.build | 1 + drivers/raw/cnxk_bphy/meson.build | 1 + drivers/raw/cnxk_gpio/meson.build | 1 + 17 files changed, 56 insertions(+), 89 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index 9f1636e0d5..6f55a36b56 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -294,7 +294,8 @@ soc_cn10k = { 'flags': [ ['RTE_MAX_LCORE', 24], ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MEMPOOL_ALIGN', 128] + ['RTE_MEMPOOL_ALIGN', 128], + ['RTE_IOVA_AS_PA', 0] ], 'part_number': '0xd49', 'extra_march_features': ['crypto'], @@ -370,7 +371,10 @@ soc_cn9k = { 'description': 'Marvell OCTEON 9', 'implementer': '0x43', 'part_number': '0xb2', - 'numa': false + 'numa': false, + 'flags': [ + ['RTE_IOVA_AS_PA', 0] + ] } soc_stingray = { diff --git a/doc/guides/platform/cnxk.rst b/doc/guides/platform/cnxk.rst index 97b2be5c37..d0fdf9011d 100644 --- a/doc/guides/platform/cnxk.rst +++ b/doc/guides/platform/cnxk.rst @@ -574,7 +574,8 @@ Compile DPDK ------------ DPDK may be compiled either natively on OCTEON CN9K/CN10K platform or cross-compiled on -an x86 based platform. +an x86 based platform. Meson build option ``enable_iova_as_pa`` is disabled on cnxk +platforms and only PMDs supporting this option are enabled on cnxk platform builds. Native Compilation ~~~~~~~~~~~~~~~~~~ diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build index 127fcbcdc5..849735921c 100644 --- a/drivers/common/cnxk/meson.build +++ b/drivers/common/cnxk/meson.build @@ -87,3 +87,4 @@ sources += files('cnxk_telemetry_bphy.c', ) deps += ['bus_pci', 'net', 'telemetry'] +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h b/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h index e220863799..21502e0eb2 100644 --- a/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h +++ b/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h @@ -86,7 +86,7 @@ process_outb_sa(struct roc_cpt_lf *lf, struct rte_crypto_op *cop, /* Prepare CPT instruction */ inst->w4.u64 = inst_w4_u64 | rte_pktmbuf_pkt_len(m_src); - dptr = rte_pktmbuf_iova(m_src); + dptr = rte_pktmbuf_mtod(m_src, uint64_t); inst->dptr = dptr; inst->rptr = dptr; @@ -103,7 +103,7 @@ process_inb_sa(struct rte_crypto_op *cop, struct cn10k_ipsec_sa *sa, /* Prepare CPT instruction */ inst->w4.u64 = sa->inst.w4 | rte_pktmbuf_pkt_len(m_src); - dptr = rte_pktmbuf_iova(m_src); + dptr = rte_pktmbuf_mtod(m_src, uint64_t); inst->dptr = dptr; inst->rptr = dptr; diff --git a/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h b/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h index e469596756..8b68e4c728 100644 --- a/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h +++ b/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h @@ -99,7 +99,7 @@ process_inb_sa(struct rte_crypto_op *cop, struct cn9k_ipsec_sa *sa, /* Prepare CPT instruction */ inst->w4.u64 = sa->inst.w4 | rte_pktmbuf_pkt_len(m_src); - inst->dptr = inst->rptr = rte_pktmbuf_iova(m_src); + inst->dptr = inst->rptr = rte_pktmbuf_mtod(m_src, uint64_t); inst->w7.u64 = sa->inst.w7; } #endif /* __CN9K_IPSEC_LA_OPS_H__ */ diff --git a/drivers/crypto/cnxk/meson.build b/drivers/crypto/cnxk/meson.build index 8db861f908..a5acabab2b 100644 --- a/drivers/crypto/cnxk/meson.build +++ b/drivers/crypto/cnxk/meson.build @@ -31,3 +31,5 @@ if get_option('buildtype').contains('debug') else cflags += [ '-ULA_IPSEC_DEBUG','-UCNXK_CRYPTODEV_DEBUG' ] endif + +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/dma/cnxk/meson.build b/drivers/dma/cnxk/meson.build index d4be4ee860..252e5ff78b 100644 --- a/drivers/dma/cnxk/meson.build +++ b/drivers/dma/cnxk/meson.build @@ -3,3 +3,4 @@ deps += ['bus_pci', 'common_cnxk', 'dmadev'] sources = files('cnxk_dmadev.c') +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/event/cnxk/meson.build b/drivers/event/cnxk/meson.build index b27bae7b12..aa42ab3a90 100644 --- a/drivers/event/cnxk/meson.build +++ b/drivers/event/cnxk/meson.build @@ -479,3 +479,4 @@ foreach flag: extra_flags endforeach deps += ['bus_pci', 'common_cnxk', 'net_cnxk', 'crypto_cnxk'] +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/mempool/cnxk/meson.build b/drivers/mempool/cnxk/meson.build index d5d1978569..d8bcc41ca0 100644 --- a/drivers/mempool/cnxk/meson.build +++ b/drivers/mempool/cnxk/meson.build @@ -17,3 +17,4 @@ sources = files( ) deps += ['eal', 'mbuf', 'kvargs', 'bus_pci', 'common_cnxk', 'mempool'] +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c index e8faeebe1f..0b33b3a496 100644 --- a/drivers/net/cnxk/cn10k_ethdev.c +++ b/drivers/net/cnxk/cn10k_ethdev.c @@ -67,9 +67,9 @@ nix_tx_offload_flags(struct rte_eth_dev *eth_dev) RTE_BUILD_BUG_ON(RTE_MBUF_OUTL2_LEN_BITS != 7); RTE_BUILD_BUG_ON(RTE_MBUF_OUTL3_LEN_BITS != 9); RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, data_off) != - offsetof(struct rte_mbuf, buf_iova) + 8); + offsetof(struct rte_mbuf, buf_addr) + 16); RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, ol_flags) != - offsetof(struct rte_mbuf, buf_iova) + 16); + offsetof(struct rte_mbuf, buf_addr) + 24); RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, pkt_len) != offsetof(struct rte_mbuf, ol_flags) + 12); RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, tx_offload) != diff --git a/drivers/net/cnxk/cn10k_tx.h b/drivers/net/cnxk/cn10k_tx.h index b87fb29951..3e7494a6b2 100644 --- a/drivers/net/cnxk/cn10k_tx.h +++ b/drivers/net/cnxk/cn10k_tx.h @@ -1900,14 +1900,6 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, uint64_t *ws, mbuf2 = (uint64_t *)tx_pkts[2]; mbuf3 = (uint64_t *)tx_pkts[3]; - mbuf0 = (uint64_t *)((uintptr_t)mbuf0 + - offsetof(struct rte_mbuf, buf_iova)); - mbuf1 = (uint64_t *)((uintptr_t)mbuf1 + - offsetof(struct rte_mbuf, buf_iova)); - mbuf2 = (uint64_t *)((uintptr_t)mbuf2 + - offsetof(struct rte_mbuf, buf_iova)); - mbuf3 = (uint64_t *)((uintptr_t)mbuf3 + - offsetof(struct rte_mbuf, buf_iova)); /* * Get mbuf's, olflags, iova, pktlen, dataoff * dataoff_iovaX.D[0] = iova, @@ -1915,28 +1907,24 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, uint64_t *ws, * len_olflagsX.D[0] = ol_flags, * len_olflagsX.D[1](63:32) = mbuf->pkt_len */ - dataoff_iova0 = vld1q_u64(mbuf0); - len_olflags0 = vld1q_u64(mbuf0 + 2); - dataoff_iova1 = vld1q_u64(mbuf1); - len_olflags1 = vld1q_u64(mbuf1 + 2); - dataoff_iova2 = vld1q_u64(mbuf2); - len_olflags2 = vld1q_u64(mbuf2 + 2); - dataoff_iova3 = vld1q_u64(mbuf3); - len_olflags3 = vld1q_u64(mbuf3 + 2); + dataoff_iova0 = + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off, vld1q_u64(mbuf0), 1); + len_olflags0 = vld1q_u64(mbuf0 + 3); + dataoff_iova1 = + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off, vld1q_u64(mbuf1), 1); + len_olflags1 = vld1q_u64(mbuf1 + 3); + dataoff_iova2 = + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off, vld1q_u64(mbuf2), 1); + len_olflags2 = vld1q_u64(mbuf2 + 3); + dataoff_iova3 = + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off, vld1q_u64(mbuf3), 1); + len_olflags3 = vld1q_u64(mbuf3 + 3); /* Move mbufs to point pool */ - mbuf0 = (uint64_t *)((uintptr_t)mbuf0 + - offsetof(struct rte_mbuf, pool) - - offsetof(struct rte_mbuf, buf_iova)); - mbuf1 = (uint64_t *)((uintptr_t)mbuf1 + - offsetof(struct rte_mbuf, pool) - - offsetof(struct rte_mbuf, buf_iova)); - mbuf2 = (uint64_t *)((uintptr_t)mbuf2 + - offsetof(struct rte_mbuf, pool) - - offsetof(struct rte_mbuf, buf_iova)); - mbuf3 = (uint64_t *)((uintptr_t)mbuf3 + - offsetof(struct rte_mbuf, pool) - - offsetof(struct rte_mbuf, buf_iova)); + mbuf0 = (uint64_t *)((uintptr_t)mbuf0 + offsetof(struct rte_mbuf, pool)); + mbuf1 = (uint64_t *)((uintptr_t)mbuf1 + offsetof(struct rte_mbuf, pool)); + mbuf2 = (uint64_t *)((uintptr_t)mbuf2 + offsetof(struct rte_mbuf, pool)); + mbuf3 = (uint64_t *)((uintptr_t)mbuf3 + offsetof(struct rte_mbuf, pool)); if (flags & (NIX_TX_OFFLOAD_OL3_OL4_CSUM_F | NIX_TX_OFFLOAD_L3_L4_CSUM_F)) { @@ -1986,17 +1974,6 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, uint64_t *ws, xtmp128 = vzip2q_u64(len_olflags0, len_olflags1); ytmp128 = vzip2q_u64(len_olflags2, len_olflags3); - /* Clear dataoff_iovaX.D[1] bits other than dataoff(15:0) */ - const uint64x2_t and_mask0 = { - 0xFFFFFFFFFFFFFFFF, - 0x000000000000FFFF, - }; - - dataoff_iova0 = vandq_u64(dataoff_iova0, and_mask0); - dataoff_iova1 = vandq_u64(dataoff_iova1, and_mask0); - dataoff_iova2 = vandq_u64(dataoff_iova2, and_mask0); - dataoff_iova3 = vandq_u64(dataoff_iova3, and_mask0); - /* * Pick only 16 bits of pktlen preset at bits 63:32 * and place them at bits 15:0. diff --git a/drivers/net/cnxk/cn9k_ethdev.c b/drivers/net/cnxk/cn9k_ethdev.c index 4fb0e2d94e..3b702d9696 100644 --- a/drivers/net/cnxk/cn9k_ethdev.c +++ b/drivers/net/cnxk/cn9k_ethdev.c @@ -67,9 +67,9 @@ nix_tx_offload_flags(struct rte_eth_dev *eth_dev) RTE_BUILD_BUG_ON(RTE_MBUF_OUTL2_LEN_BITS != 7); RTE_BUILD_BUG_ON(RTE_MBUF_OUTL3_LEN_BITS != 9); RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, data_off) != - offsetof(struct rte_mbuf, buf_iova) + 8); + offsetof(struct rte_mbuf, buf_addr) + 16); RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, ol_flags) != - offsetof(struct rte_mbuf, buf_iova) + 16); + offsetof(struct rte_mbuf, buf_addr) + 24); RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, pkt_len) != offsetof(struct rte_mbuf, ol_flags) + 12); RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, tx_offload) != diff --git a/drivers/net/cnxk/cn9k_tx.h b/drivers/net/cnxk/cn9k_tx.h index 6ce81f5c96..f5d99ccb5a 100644 --- a/drivers/net/cnxk/cn9k_tx.h +++ b/drivers/net/cnxk/cn9k_tx.h @@ -1005,14 +1005,6 @@ cn9k_nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf **tx_pkts, mbuf2 = (uint64_t *)tx_pkts[2]; mbuf3 = (uint64_t *)tx_pkts[3]; - mbuf0 = (uint64_t *)((uintptr_t)mbuf0 + - offsetof(struct rte_mbuf, buf_iova)); - mbuf1 = (uint64_t *)((uintptr_t)mbuf1 + - offsetof(struct rte_mbuf, buf_iova)); - mbuf2 = (uint64_t *)((uintptr_t)mbuf2 + - offsetof(struct rte_mbuf, buf_iova)); - mbuf3 = (uint64_t *)((uintptr_t)mbuf3 + - offsetof(struct rte_mbuf, buf_iova)); /* * Get mbuf's, olflags, iova, pktlen, dataoff * dataoff_iovaX.D[0] = iova, @@ -1020,28 +1012,24 @@ cn9k_nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf **tx_pkts, * len_olflagsX.D[0] = ol_flags, * len_olflagsX.D[1](63:32) = mbuf->pkt_len */ - dataoff_iova0 = vld1q_u64(mbuf0); - len_olflags0 = vld1q_u64(mbuf0 + 2); - dataoff_iova1 = vld1q_u64(mbuf1); - len_olflags1 = vld1q_u64(mbuf1 + 2); - dataoff_iova2 = vld1q_u64(mbuf2); - len_olflags2 = vld1q_u64(mbuf2 + 2); - dataoff_iova3 = vld1q_u64(mbuf3); - len_olflags3 = vld1q_u64(mbuf3 + 2); + dataoff_iova0 = + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off, vld1q_u64(mbuf0), 1); + len_olflags0 = vld1q_u64(mbuf0 + 3); + dataoff_iova1 = + vsetq_lane_u64(((struct rte_mbuf *)mbuf1)->data_off, vld1q_u64(mbuf1), 1); + len_olflags1 = vld1q_u64(mbuf1 + 3); + dataoff_iova2 = + vsetq_lane_u64(((struct rte_mbuf *)mbuf2)->data_off, vld1q_u64(mbuf2), 1); + len_olflags2 = vld1q_u64(mbuf2 + 3); + dataoff_iova3 = + vsetq_lane_u64(((struct rte_mbuf *)mbuf3)->data_off, vld1q_u64(mbuf3), 1); + len_olflags3 = vld1q_u64(mbuf3 + 3); /* Move mbufs to point pool */ - mbuf0 = (uint64_t *)((uintptr_t)mbuf0 + - offsetof(struct rte_mbuf, pool) - - offsetof(struct rte_mbuf, buf_iova)); - mbuf1 = (uint64_t *)((uintptr_t)mbuf1 + - offsetof(struct rte_mbuf, pool) - - offsetof(struct rte_mbuf, buf_iova)); - mbuf2 = (uint64_t *)((uintptr_t)mbuf2 + - offsetof(struct rte_mbuf, pool) - - offsetof(struct rte_mbuf, buf_iova)); - mbuf3 = (uint64_t *)((uintptr_t)mbuf3 + - offsetof(struct rte_mbuf, pool) - - offsetof(struct rte_mbuf, buf_iova)); + mbuf0 = (uint64_t *)((uintptr_t)mbuf0 + offsetof(struct rte_mbuf, pool)); + mbuf1 = (uint64_t *)((uintptr_t)mbuf1 + offsetof(struct rte_mbuf, pool)); + mbuf2 = (uint64_t *)((uintptr_t)mbuf2 + offsetof(struct rte_mbuf, pool)); + mbuf3 = (uint64_t *)((uintptr_t)mbuf3 + offsetof(struct rte_mbuf, pool)); if (flags & (NIX_TX_OFFLOAD_OL3_OL4_CSUM_F | NIX_TX_OFFLOAD_L3_L4_CSUM_F)) { @@ -1091,17 +1079,6 @@ cn9k_nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf **tx_pkts, xtmp128 = vzip2q_u64(len_olflags0, len_olflags1); ytmp128 = vzip2q_u64(len_olflags2, len_olflags3); - /* Clear dataoff_iovaX.D[1] bits other than dataoff(15:0) */ - const uint64x2_t and_mask0 = { - 0xFFFFFFFFFFFFFFFF, - 0x000000000000FFFF, - }; - - dataoff_iova0 = vandq_u64(dataoff_iova0, and_mask0); - dataoff_iova1 = vandq_u64(dataoff_iova1, and_mask0); - dataoff_iova2 = vandq_u64(dataoff_iova2, and_mask0); - dataoff_iova3 = vandq_u64(dataoff_iova3, and_mask0); - /* * Pick only 16 bits of pktlen preset at bits 63:32 * and place them at bits 15:0. diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h index c09e9bff8e..db8c9f59d3 100644 --- a/drivers/net/cnxk/cnxk_ethdev.h +++ b/drivers/net/cnxk/cnxk_ethdev.h @@ -697,7 +697,6 @@ cnxk_pktmbuf_detach(struct rte_mbuf *m) m->priv_size = priv_size; m->buf_addr = (char *)m + mbuf_size; - m->buf_iova = rte_mempool_virt2iova(m) + mbuf_size; m->buf_len = (uint16_t)buf_len; rte_pktmbuf_reset_headroom(m); m->data_len = 0; diff --git a/drivers/net/cnxk/meson.build b/drivers/net/cnxk/meson.build index f347e98fce..5efb2000cf 100644 --- a/drivers/net/cnxk/meson.build +++ b/drivers/net/cnxk/meson.build @@ -194,3 +194,4 @@ foreach flag: extra_flags endforeach headers = files('rte_pmd_cnxk.h') +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/raw/cnxk_bphy/meson.build b/drivers/raw/cnxk_bphy/meson.build index 14147feaf4..ffb0ee6b7e 100644 --- a/drivers/raw/cnxk_bphy/meson.build +++ b/drivers/raw/cnxk_bphy/meson.build @@ -10,3 +10,4 @@ sources = files( 'cnxk_bphy_irq.c', ) headers = files('rte_pmd_bphy.h') +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/raw/cnxk_gpio/meson.build b/drivers/raw/cnxk_gpio/meson.build index a75a5b9084..f52a7be9eb 100644 --- a/drivers/raw/cnxk_gpio/meson.build +++ b/drivers/raw/cnxk_gpio/meson.build @@ -9,3 +9,4 @@ sources = files( 'cnxk_gpio_selftest.c', ) headers = files('rte_pmd_cnxk_gpio.h') +pmd_supports_disable_iova_as_pa = true From patchwork Fri Oct 7 19:30:29 2022 Content-Type: text/plain; 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Fri, 7 Oct 2022 12:31:19 -0700 (PDT) From: Shijith Thotton To: CC: Shijith Thotton , , , , , , , , , , Ruifeng Wang , Kai Ji , Pablo de Lara , "Chengwen Feng" , Kevin Laatz , =?utf-8?q?Mattias_R=C3=B6nnblom?= , Liang Ma , Peter Mccarthy , "Harry van Haaren" , "Artem V. Andreev" , Andrew Rybchenko , "John W. Linville" , Ciara Loftus , Qi Zhang , "Chas Williams" , "Min Hu (Connor)" , "Gaetan Rivet" , Jakub Grajciar , Tetsuya Mukawa , Sachin Saxena , "Hemant Agrawal" Subject: [PATCH v4 7/7] drivers: mark software PMDs work with IOVA as PA disabled Date: Sat, 8 Oct 2022 01:00:29 +0530 Message-ID: <1167c00c203dfb1cab87317bcf83cfccd955edd2.1665170500.git.sthotton@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-Proofpoint-GUID: vZ2xdjcsO6wgvPppWpaDdNaFdagd6Gfr X-Proofpoint-ORIG-GUID: vZ2xdjcsO6wgvPppWpaDdNaFdagd6Gfr X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-10-07_04,2022-10-07_01,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Enabled software PMDs in IOVA as PA disabled build as they work with IOVA as VA. Signed-off-by: Shijith Thotton --- drivers/crypto/armv8/meson.build | 1 + drivers/crypto/ipsec_mb/meson.build | 1 + drivers/crypto/null/meson.build | 1 + drivers/crypto/openssl/meson.build | 1 + drivers/dma/skeleton/meson.build | 1 + drivers/event/dsw/meson.build | 1 + drivers/event/opdl/meson.build | 1 + drivers/event/skeleton/meson.build | 1 + drivers/event/sw/meson.build | 1 + drivers/mempool/bucket/meson.build | 1 + drivers/mempool/ring/meson.build | 1 + drivers/mempool/stack/meson.build | 1 + drivers/net/af_packet/meson.build | 1 + drivers/net/af_xdp/meson.build | 2 ++ drivers/net/bonding/meson.build | 1 + drivers/net/failsafe/meson.build | 1 + drivers/net/memif/meson.build | 1 + drivers/net/null/meson.build | 1 + drivers/net/pcap/meson.build | 1 + drivers/net/ring/meson.build | 1 + drivers/net/tap/meson.build | 1 + drivers/raw/skeleton/meson.build | 1 + 22 files changed, 23 insertions(+) diff --git a/drivers/crypto/armv8/meson.build b/drivers/crypto/armv8/meson.build index 5effba8bbc..700fb80eb2 100644 --- a/drivers/crypto/armv8/meson.build +++ b/drivers/crypto/armv8/meson.build @@ -17,3 +17,4 @@ endif ext_deps += dep deps += ['bus_vdev'] sources = files('rte_armv8_pmd.c', 'rte_armv8_pmd_ops.c') +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/crypto/ipsec_mb/meson.build b/drivers/crypto/ipsec_mb/meson.build index 64fc22611d..ec147d2110 100644 --- a/drivers/crypto/ipsec_mb/meson.build +++ b/drivers/crypto/ipsec_mb/meson.build @@ -41,3 +41,4 @@ sources = files( 'pmd_zuc.c', ) deps += ['bus_vdev', 'net', 'security'] +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/crypto/null/meson.build b/drivers/crypto/null/meson.build index acc16e7d81..59a7508f18 100644 --- a/drivers/crypto/null/meson.build +++ b/drivers/crypto/null/meson.build @@ -9,3 +9,4 @@ endif deps += 'bus_vdev' sources = files('null_crypto_pmd.c', 'null_crypto_pmd_ops.c') +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/crypto/openssl/meson.build b/drivers/crypto/openssl/meson.build index cd962da1d6..d165c32ae8 100644 --- a/drivers/crypto/openssl/meson.build +++ b/drivers/crypto/openssl/meson.build @@ -15,3 +15,4 @@ endif deps += 'bus_vdev' sources = files('rte_openssl_pmd.c', 'rte_openssl_pmd_ops.c') ext_deps += dep +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/dma/skeleton/meson.build b/drivers/dma/skeleton/meson.build index 8871b80956..2b0422ce61 100644 --- a/drivers/dma/skeleton/meson.build +++ b/drivers/dma/skeleton/meson.build @@ -5,3 +5,4 @@ deps += ['dmadev', 'kvargs', 'ring', 'bus_vdev'] sources = files( 'skeleton_dmadev.c', ) +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/event/dsw/meson.build b/drivers/event/dsw/meson.build index 2df0fac4ff..e6808c0f71 100644 --- a/drivers/event/dsw/meson.build +++ b/drivers/event/dsw/meson.build @@ -6,3 +6,4 @@ if cc.has_argument('-Wno-format-nonliteral') cflags += '-Wno-format-nonliteral' endif sources = files('dsw_evdev.c', 'dsw_event.c', 'dsw_xstats.c') +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/event/opdl/meson.build b/drivers/event/opdl/meson.build index 786d2f4e82..7abef44609 100644 --- a/drivers/event/opdl/meson.build +++ b/drivers/event/opdl/meson.build @@ -9,3 +9,4 @@ sources = files( 'opdl_test.c', ) deps += ['bus_vdev'] +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/event/skeleton/meson.build b/drivers/event/skeleton/meson.build index acfe156532..fa6a5e0a9f 100644 --- a/drivers/event/skeleton/meson.build +++ b/drivers/event/skeleton/meson.build @@ -3,3 +3,4 @@ sources = files('skeleton_eventdev.c') deps += ['bus_pci', 'bus_vdev'] +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/event/sw/meson.build b/drivers/event/sw/meson.build index 6f81567efb..8d815dfa84 100644 --- a/drivers/event/sw/meson.build +++ b/drivers/event/sw/meson.build @@ -9,3 +9,4 @@ sources = files( 'sw_evdev.c', ) deps += ['hash', 'bus_vdev'] +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/mempool/bucket/meson.build b/drivers/mempool/bucket/meson.build index 0051b6ac3c..94c060904b 100644 --- a/drivers/mempool/bucket/meson.build +++ b/drivers/mempool/bucket/meson.build @@ -12,3 +12,4 @@ if is_windows endif sources = files('rte_mempool_bucket.c') +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/mempool/ring/meson.build b/drivers/mempool/ring/meson.build index a021e908cf..65d203d4b7 100644 --- a/drivers/mempool/ring/meson.build +++ b/drivers/mempool/ring/meson.build @@ -2,3 +2,4 @@ # Copyright(c) 2017 Intel Corporation sources = files('rte_mempool_ring.c') +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/mempool/stack/meson.build b/drivers/mempool/stack/meson.build index 580dde79eb..961e90fc04 100644 --- a/drivers/mempool/stack/meson.build +++ b/drivers/mempool/stack/meson.build @@ -4,3 +4,4 @@ sources = files('rte_mempool_stack.c') deps += ['stack'] +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/net/af_packet/meson.build b/drivers/net/af_packet/meson.build index c014e9b61b..bab008d083 100644 --- a/drivers/net/af_packet/meson.build +++ b/drivers/net/af_packet/meson.build @@ -6,3 +6,4 @@ if not is_linux reason = 'only supported on Linux' endif sources = files('rte_eth_af_packet.c') +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/net/af_xdp/meson.build b/drivers/net/af_xdp/meson.build index 1e0de23705..7bbab52d8b 100644 --- a/drivers/net/af_xdp/meson.build +++ b/drivers/net/af_xdp/meson.build @@ -55,3 +55,5 @@ else build = false reason = 'missing header, "linux/if_xdp.h"' endif + +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/net/bonding/meson.build b/drivers/net/bonding/meson.build index 18ad7e21f3..29022712cb 100644 --- a/drivers/net/bonding/meson.build +++ b/drivers/net/bonding/meson.build @@ -22,3 +22,4 @@ deps += 'sched' # needed for rte_bitmap.h deps += ['ip_frag'] headers = files('rte_eth_bond.h', 'rte_eth_bond_8023ad.h') +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/net/failsafe/meson.build b/drivers/net/failsafe/meson.build index b8e5bf70f8..bf8f791984 100644 --- a/drivers/net/failsafe/meson.build +++ b/drivers/net/failsafe/meson.build @@ -27,3 +27,4 @@ sources = files( 'failsafe_ops.c', 'failsafe_rxtx.c', ) +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/net/memif/meson.build b/drivers/net/memif/meson.build index 680bc8631c..28416a982f 100644 --- a/drivers/net/memif/meson.build +++ b/drivers/net/memif/meson.build @@ -12,3 +12,4 @@ sources = files( ) deps += ['hash'] +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/net/null/meson.build b/drivers/net/null/meson.build index 0251578aab..4a483955a7 100644 --- a/drivers/net/null/meson.build +++ b/drivers/net/null/meson.build @@ -8,3 +8,4 @@ if is_windows endif sources = files('rte_eth_null.c') +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/net/pcap/meson.build b/drivers/net/pcap/meson.build index ed7864eb9d..a5a2971f0e 100644 --- a/drivers/net/pcap/meson.build +++ b/drivers/net/pcap/meson.build @@ -15,3 +15,4 @@ ext_deps += pcap_dep if is_windows ext_deps += cc.find_library('iphlpapi', required: true) endif +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/net/ring/meson.build b/drivers/net/ring/meson.build index 0156b37aad..72792e26b0 100644 --- a/drivers/net/ring/meson.build +++ b/drivers/net/ring/meson.build @@ -9,3 +9,4 @@ endif sources = files('rte_eth_ring.c') headers = files('rte_eth_ring.h') +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/net/tap/meson.build b/drivers/net/tap/meson.build index c09713a67b..4c9a9eac2b 100644 --- a/drivers/net/tap/meson.build +++ b/drivers/net/tap/meson.build @@ -35,3 +35,4 @@ foreach arg:args config.set(arg[0], cc.has_header_symbol(arg[1], arg[2])) endforeach configure_file(output : 'tap_autoconf.h', configuration : config) +pmd_supports_disable_iova_as_pa = true diff --git a/drivers/raw/skeleton/meson.build b/drivers/raw/skeleton/meson.build index 950a33cc20..bfb8fd8bcc 100644 --- a/drivers/raw/skeleton/meson.build +++ b/drivers/raw/skeleton/meson.build @@ -6,3 +6,4 @@ sources = files( 'skeleton_rawdev.c', 'skeleton_rawdev_test.c', ) +pmd_supports_disable_iova_as_pa = true