From patchwork Thu Jun 30 11:03:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhichao Zeng X-Patchwork-Id: 113574 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1B0ACA00C4; Thu, 30 Jun 2022 13:03:42 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id AD09C40223; Thu, 30 Jun 2022 13:03:41 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mails.dpdk.org (Postfix) with ESMTP id AB00F400EF; Thu, 30 Jun 2022 13:03:40 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1656587021; x=1688123021; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=O6Ltbk7h5EV/I1SCeVE7h+GKOyd8ZYq6t+hgg8zgT4k=; b=IRUaoXBh7qZEOTfNUa/RNAkfbINj8CkQySCDdXTfGsULatoyUIqnIEwq 0mr5StZtYIX/DncbrwwbIxnxgPeN89CEqtm4Pn5ihJQ2Lo3OmPxyY0PdD paVIGr/XL6+vSbDRDF5UpPMroXeNRcaHUCMLB1ySMo4JIlA+dLHm5jbpN uVFyDDO/UN5HOta7gy1KkUH0HrKdir2L3qApuUAD77CsggS58MnBDi/CV t28/2u5YKeppoaAcUv+9aVwNmb7Dk6IiMY4qLF9joLAI/8lSt39dz8lOy 143dqtxeqBdJbtDQ57RMizJKotNeWv/jSz/+bQlCy2pzLkaivAtbihOUo A==; X-IronPort-AV: E=McAfee;i="6400,9594,10393"; a="265351955" X-IronPort-AV: E=Sophos;i="5.92,234,1650956400"; d="scan'208";a="265351955" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jun 2022 04:03:39 -0700 X-IronPort-AV: E=Sophos;i="5.92,234,1650956400"; d="scan'208";a="658955551" Received: from unknown (HELO localhost.localdomain) ([10.239.252.103]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jun 2022 04:03:36 -0700 From: zhichaox.zeng@intel.com To: dev@dpdk.org Cc: stable@dpdk.org, qiming.yang@intel.com, qi.z.zhang@intel.com, Zhichao Zeng , alvinx.zhang@intel.com, Junfeng Guo , Simei Su , Anatoly Burakov , Ferruh Yigit Subject: [PATCH v4] net/igc: add support for secondary processes Date: Thu, 30 Jun 2022 19:03:30 +0800 Message-Id: <20220630110330.211655-1-zhichaox.zeng@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220628062052.5397-1-zhichaox.zeng@intel.com> References: <20220628062052.5397-1-zhichaox.zeng@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Zhichao Zeng The RX function was not specified in the secondary process, causing the secondary process to segfault in a multi-process environment. This patch specify RX/TX functions in "dev_init" to support secondary processes. Fixes: 66fde1b943eb ("net/igc: add skeleton") Cc: alvinx.zhang@intel.com Cc: stable@dpdk.org Signed-off-by: Zhichao Zeng Acked-by: Qi Zhang --- v2: remove unnecessary parameters, move declaration to relevant header file --- v3: remove redundant code, optimize commit log --- v4: rework patch --- drivers/net/igc/igc_ethdev.c | 9 ++++++++- drivers/net/igc/igc_txrx.c | 8 ++++---- drivers/net/igc/igc_txrx.h | 6 ++++++ 3 files changed, 18 insertions(+), 5 deletions(-) diff --git a/drivers/net/igc/igc_ethdev.c b/drivers/net/igc/igc_ethdev.c index b9933b395d..7f221a5d34 100644 --- a/drivers/net/igc/igc_ethdev.c +++ b/drivers/net/igc/igc_ethdev.c @@ -1240,8 +1240,15 @@ eth_igc_dev_init(struct rte_eth_dev *dev) * has already done this work. Only check we don't need a different * RX function. */ - if (rte_eal_process_type() != RTE_PROC_PRIMARY) + if (rte_eal_process_type() != RTE_PROC_PRIMARY) { + dev->rx_pkt_burst = igc_recv_pkts; + if (dev->data->scattered_rx) + dev->rx_pkt_burst = igc_recv_scattered_pkts; + + dev->tx_pkt_burst = igc_xmit_pkts; + dev->tx_pkt_prepare = eth_igc_prep_pkts; return 0; + } rte_eth_copy_pci_info(dev, pci_dev); dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; diff --git a/drivers/net/igc/igc_txrx.c b/drivers/net/igc/igc_txrx.c index e48d5df11a..ffd219b0df 100644 --- a/drivers/net/igc/igc_txrx.c +++ b/drivers/net/igc/igc_txrx.c @@ -345,7 +345,7 @@ rx_desc_get_pkt_info(struct igc_rx_queue *rxq, struct rte_mbuf *rxm, rxm->packet_type = rx_desc_pkt_info_to_pkt_type(pkt_info); } -static uint16_t +uint16_t igc_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts) { struct igc_rx_queue * const rxq = rx_queue; @@ -488,7 +488,7 @@ igc_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts) return nb_rx; } -static uint16_t +uint16_t igc_recv_scattered_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts) { @@ -1397,7 +1397,7 @@ eth_igc_rx_queue_setup(struct rte_eth_dev *dev, } /* prepare packets for transmit */ -static uint16_t +uint16_t eth_igc_prep_pkts(__rte_unused void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) { @@ -1604,7 +1604,7 @@ tx_desc_cksum_flags_to_olinfo(uint64_t ol_flags) return tmp; } -static uint16_t +uint16_t igc_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) { struct igc_tx_queue * const txq = tx_queue; diff --git a/drivers/net/igc/igc_txrx.h b/drivers/net/igc/igc_txrx.h index 535108a868..02a0a051bb 100644 --- a/drivers/net/igc/igc_txrx.h +++ b/drivers/net/igc/igc_txrx.h @@ -49,6 +49,12 @@ void eth_igc_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, struct rte_eth_txq_info *qinfo); void eth_igc_vlan_strip_queue_set(struct rte_eth_dev *dev, uint16_t rx_queue_id, int on); +uint16_t igc_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts); +uint16_t igc_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts); +uint16_t eth_igc_prep_pkts(__rte_unused void *tx_queue, struct rte_mbuf **tx_pkts, + uint16_t nb_pkts); +uint16_t igc_recv_scattered_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, + uint16_t nb_pkts); #ifdef __cplusplus } #endif