From patchwork Mon Jun 21 08:59:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wenjun Wu X-Patchwork-Id: 94618 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id CA305A0547; Mon, 21 Jun 2021 11:17:08 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5033141158; Mon, 21 Jun 2021 11:17:08 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id B9C2040040; Mon, 21 Jun 2021 11:17:05 +0200 (CEST) IronPort-SDR: O/scTFxqUk9cN/gUy9Ia+vF/NekWq2bEFwcZ/qWUzqHxKi4+Kt/YzkPE70ssijjeL4wJWIEocE 16hE7LATEurQ== X-IronPort-AV: E=McAfee;i="6200,9189,10021"; a="193942812" X-IronPort-AV: E=Sophos;i="5.83,289,1616482800"; d="scan'208";a="193942812" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jun 2021 02:17:04 -0700 IronPort-SDR: O5wkaGN67yVOT2wc2IrjXe0jCkQDk9GeqW6MjcFWca4z5F+8MMwIoaWDmFfddRHE048nubWTg8 p/F/mx2MGrZQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.83,289,1616482800"; d="scan'208";a="489813288" Received: from wuwenjun.sh.intel.com ([10.67.110.207]) by fmsmga002.fm.intel.com with ESMTP; 21 Jun 2021 02:17:02 -0700 From: Wenjun Wu To: dev@dpdk.org, qiming.yang@intel.com, qi.z.zhang@intel.com Cc: Wenjun Wu , stable@dpdk.org Date: Mon, 21 Jun 2021 16:59:23 +0800 Message-Id: <20210621085923.1286701-1-wenjun1.wu@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v1] net/ice/base: fix wrong first mask value setting X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Since each pf does not share the same structure space, the first mask value should start at 0 instead of hw->pf_id * per_pf to avoid address overflow. Otherwise, address space will overlap when masks.first + masks.count > ICE_PROF_MASK_COUNT, and it may lead to unexpected variable assignment, which causes segmentation fault. Fixes: 9467486f179f ("net/ice/base: enable masking for RSS and FD field vectors") Cc: stable@dpdk.org Signed-off-by: Wenjun Wu Acked-by: Qi Zhang --- drivers/net/ice/base/ice_flex_pipe.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index fabff039ec..aa42177833 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -3435,7 +3435,7 @@ static void ice_init_prof_masks(struct ice_hw *hw, enum ice_block blk) per_pf = ICE_PROF_MASK_COUNT / hw->dev_caps.num_funcs; hw->blk[blk].masks.count = per_pf; - hw->blk[blk].masks.first = hw->pf_id * per_pf; + hw->blk[blk].masks.first = 0; ice_memset(hw->blk[blk].masks.masks, 0, sizeof(hw->blk[blk].masks.masks), ICE_NONDMA_MEM);