From patchwork Thu Jan 21 01:43:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 87010 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0F113A0A0A; Thu, 21 Jan 2021 02:40:07 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A0F31140D9F; Thu, 21 Jan 2021 02:40:01 +0100 (CET) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id B417F140D20 for ; Thu, 21 Jan 2021 02:39:59 +0100 (CET) IronPort-SDR: wNNukUdrINdCDKd1RD6jYsEkEvVTVaPRb+qv6UIpxnxzWO0xJQufPFtgvZez3UYITKsYZFw8oN FiPEC8bC3O0A== X-IronPort-AV: E=McAfee;i="6000,8403,9870"; a="179354782" X-IronPort-AV: E=Sophos;i="5.79,362,1602572400"; d="scan'208";a="179354782" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jan 2021 17:39:58 -0800 IronPort-SDR: CXNDJOqk/foSKLGQVa6wPC2NsarfNt8oGZ0Miouu6/mcf6IbzPeQeOSJYPpez+LoGt48gTnRRx LLPvHxI7wpIw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,362,1602572400"; d="scan'208";a="467279460" Received: from dpdk51.sh.intel.com ([10.67.111.142]) by fmsmga001.fm.intel.com with ESMTP; 20 Jan 2021 17:39:56 -0800 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, yigit.ferruh@intel.com, Qi Zhang Date: Thu, 21 Jan 2021 09:43:43 +0800 Message-Id: <20210121014346.641808-2-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210121014346.641808-1-qi.z.zhang@intel.com> References: <20210121014346.641808-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH 1/4] net/ice/base: fix wrong macro value X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Fix the wrong value of ICE_AQ_VSI_OUTER_VLAN_PORT_BASED_ACCEPT_HOST Fixes: 9ea028123a0b ("net/ice/base: align add VSI and update VSI AQ command buffer") Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_adminq_cmd.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h index 09d0f176c9..74ac76a132 100644 --- a/drivers/net/ice/base/ice_adminq_cmd.h +++ b/drivers/net/ice/base/ice_adminq_cmd.h @@ -500,7 +500,7 @@ struct ice_aqc_vsi_props { #define ICE_AQ_VSI_OUTER_TAG_VLAN_8100 0x2 #define ICE_AQ_VSI_OUTER_TAG_VLAN_9100 0x3 #define ICE_AQ_VSI_OUTER_VLAN_PORT_BASED_INSERT BIT(4) -#define ICE_AQ_VSI_OUTER_VLAN_PORT_BASED_ACCEPT_HOST BIT(4) +#define ICE_AQ_VSI_OUTER_VLAN_PORT_BASED_ACCEPT_HOST BIT(6) #define ICE_AQ_VSI_OUTER_VLAN_TX_MODE_S 5 #define ICE_AQ_VSI_OUTER_VLAN_TX_MODE_M (0x3 << ICE_AQ_VSI_OUTER_VLAN_TX_MODE_S) #define ICE_AQ_VSI_OUTER_VLAN_TX_MODE_ACCEPTUNTAGGED 0x1 From patchwork Thu Jan 21 01:43:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 87011 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id EA1AEA0A0A; Thu, 21 Jan 2021 02:40:13 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9E550140DBC; Thu, 21 Jan 2021 02:40:03 +0100 (CET) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id 8C119140D20 for ; Thu, 21 Jan 2021 02:40:00 +0100 (CET) IronPort-SDR: g1o1YF8cJvaZerhcK++AYDIduYxEHVOfeYPPsv8aZB5D0ohDrDjiIzgSLtoPD+uwhctUNWXvrL /udMMt1TX/hA== X-IronPort-AV: E=McAfee;i="6000,8403,9870"; a="179354785" X-IronPort-AV: E=Sophos;i="5.79,362,1602572400"; d="scan'208";a="179354785" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jan 2021 17:40:00 -0800 IronPort-SDR: fpJzCXtGVkwECZ6Fbt0W/XM+AwaWCpRw0ZX9HrbXesovz0mks9QJ7y7UYMrAdfPFcKwAtty2rJ yz6ITpGBsXBg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,362,1602572400"; d="scan'208";a="467279465" Received: from dpdk51.sh.intel.com ([10.67.111.142]) by fmsmga001.fm.intel.com with ESMTP; 20 Jan 2021 17:39:58 -0800 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, yigit.ferruh@intel.com, Qi Zhang , Brett Creeley Date: Thu, 21 Jan 2021 09:43:44 +0800 Message-Id: <20210121014346.641808-3-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210121014346.641808-1-qi.z.zhang@intel.com> References: <20210121014346.641808-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH 2/4] net/ice/base: add VLAN TPID for VLAN filters X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Currently VLAN filters via RID4 are only based on VLAN ID. However, with incoming support for Double VLAN Mode (DVM), the driver needs to be able to support filtering on VLAN ID + VLAN TPID (i.e. 0x8100, 0x88a8, etc.). Add support for this by adding two fields to the ice_fltr_info structure. First, add the tpid_valid field so the code can determine whether or not to overwrite the default 0x8100 value for programming packets or use the tpid field. Signed-off-by: Brett Creeley Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_switch.c | 6 ++++++ drivers/net/ice/base/ice_switch.h | 2 ++ 2 files changed, 8 insertions(+) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 692a147e66..277623d2bb 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -14,6 +14,7 @@ #define ICE_PPP_IPV6_PROTO_ID 0x0057 #define ICE_IPV6_ETHER_ID 0x86DD #define ICE_TCP_PROTO_ID 0x06 +#define ICE_ETH_P_8021Q 0x8100 /* Dummy ethernet header needed in the ice_aqc_sw_rules_elem * struct to configure any switch filter rules. @@ -3441,6 +3442,7 @@ ice_fill_sw_rule(struct ice_hw *hw, struct ice_fltr_info *f_info, struct ice_aqc_sw_rules_elem *s_rule, enum ice_adminq_opc opc) { u16 vlan_id = ICE_MAX_VLAN_ID + 1; + u16 vlan_tpid = ICE_ETH_P_8021Q; void *daddr = NULL; u16 eth_hdr_sz; u8 *eth_hdr; @@ -3513,6 +3515,8 @@ ice_fill_sw_rule(struct ice_hw *hw, struct ice_fltr_info *f_info, break; case ICE_SW_LKUP_VLAN: vlan_id = f_info->l_data.vlan.vlan_id; + if (f_info->l_data.vlan.tpid_valid) + vlan_tpid = f_info->l_data.vlan.tpid; if (f_info->fltr_act == ICE_FWD_TO_VSI || f_info->fltr_act == ICE_FWD_TO_VSI_LIST) { act |= ICE_SINGLE_ACT_PRUNE; @@ -3556,6 +3560,8 @@ ice_fill_sw_rule(struct ice_hw *hw, struct ice_fltr_info *f_info, if (!(vlan_id > ICE_MAX_VLAN_ID)) { off = (_FORCE_ __be16 *)(eth_hdr + ICE_ETH_VLAN_TCI_OFFSET); *off = CPU_TO_BE16(vlan_id); + off = (_FORCE_ __be16 *)(eth_hdr + ICE_ETH_ETHTYPE_OFFSET); + *off = CPU_TO_BE16(vlan_tpid); } /* Create the switch rule with the final dummy Ethernet header */ diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h index c11c064725..a0a7a2e533 100644 --- a/drivers/net/ice/base/ice_switch.h +++ b/drivers/net/ice/base/ice_switch.h @@ -160,6 +160,8 @@ struct ice_fltr_info { } mac_vlan; struct { u16 vlan_id; + u16 tpid; + u8 tpid_valid; } vlan; /* Set lkup_type as ICE_SW_LKUP_ETHERTYPE * if just using ethertype as filter. Set lkup_type as From patchwork Thu Jan 21 01:43:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 87012 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 79E24A0A0A; Thu, 21 Jan 2021 02:40:20 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D1070140DC2; Thu, 21 Jan 2021 02:40:05 +0100 (CET) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id 02DDB140DB2 for ; Thu, 21 Jan 2021 02:40:02 +0100 (CET) IronPort-SDR: o0THbjajDV0UmDrVTT4MVVmnQONp88mP1AEUIlyFGweuoO18cuTtQlyoCQPwbh/J0scCmLe1wv GjmvWK66fjsw== X-IronPort-AV: E=McAfee;i="6000,8403,9870"; a="179354797" X-IronPort-AV: E=Sophos;i="5.79,362,1602572400"; d="scan'208";a="179354797" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jan 2021 17:40:02 -0800 IronPort-SDR: tcJ8tTGcEUaoz/iYsjXb1Qj6CG2StQjnBfs6jnQ9jHlTxvSgomYxFLrLSlqdNUfAwGBJhd1Owy EoT/Z4uCAhfA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,362,1602572400"; d="scan'208";a="467279481" Received: from dpdk51.sh.intel.com ([10.67.111.142]) by fmsmga001.fm.intel.com with ESMTP; 20 Jan 2021 17:40:00 -0800 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, yigit.ferruh@intel.com, Qi Zhang , Brett Creeley Date: Thu, 21 Jan 2021 09:43:45 +0800 Message-Id: <20210121014346.641808-4-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210121014346.641808-1-qi.z.zhang@intel.com> References: <20210121014346.641808-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH 3/4] net/ice/base: add support for configuring the device in Double VLAN Mode X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" In order to support configuring the device in Double VLAN Mode (DVM), the DDP and FW have to support DVM. If both support DVM, the PF that downloads the package needs to update the default recipes and set the VLAN mode. This is done in ice_set_dvm(). In order to support updating the default recipes in DVM add support for updating an existing switch recipe's lkup_idx and mask. This is done by first calling the get recipe AQ (0x0292) with the desired recipe ID. Then, if that is successful update one of the lookup indices (lkup_idx) and its associated mask if the mask is valid otherwise the already existing mask will be used. Signed-off-by: Brett Creeley Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_adminq_cmd.h | 36 ++++ drivers/net/ice/base/ice_common.c | 2 - drivers/net/ice/base/ice_flex_pipe.c | 9 +- drivers/net/ice/base/ice_switch.c | 58 ++++++ drivers/net/ice/base/ice_switch.h | 12 ++ drivers/net/ice/base/ice_type.h | 2 +- drivers/net/ice/base/ice_vlan_mode.c | 284 ++++++++++++++++++++++++-- drivers/net/ice/base/ice_vlan_mode.h | 24 +-- 8 files changed, 381 insertions(+), 46 deletions(-) diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h index 74ac76a132..8f72f0db33 100644 --- a/drivers/net/ice/base/ice_adminq_cmd.h +++ b/drivers/net/ice/base/ice_adminq_cmd.h @@ -358,6 +358,40 @@ struct ice_aqc_get_allocd_res_desc { __le32 addr_low; }; +/* Request buffer for Set VLAN Mode AQ command (indirect 0x020C) */ +struct ice_aqc_set_vlan_mode { + u8 reserved; + u8 l2tag_prio_tagging; +#define ICE_AQ_VLAN_PRIO_TAG_S 0 +#define ICE_AQ_VLAN_PRIO_TAG_M (0x7 << ICE_AQ_VLAN_PRIO_TAG_S) +#define ICE_AQ_VLAN_PRIO_TAG_NOT_SUPPORTED 0x0 +#define ICE_AQ_VLAN_PRIO_TAG_STAG 0x1 +#define ICE_AQ_VLAN_PRIO_TAG_OUTER_CTAG 0x2 +#define ICE_AQ_VLAN_PRIO_TAG_OUTER_VLAN 0x3 +#define ICE_AQ_VLAN_PRIO_TAG_INNER_CTAG 0x4 +#define ICE_AQ_VLAN_PRIO_TAG_MAX 0x4 +#define ICE_AQ_VLAN_PRIO_TAG_ERROR 0x7 + u8 l2tag_reserved[64]; + u8 rdma_packet; +#define ICE_AQ_VLAN_RDMA_TAG_S 0 +#define ICE_AQ_VLAN_RDMA_TAG_M (0x3F << ICE_AQ_VLAN_RDMA_TAG_S) +#define ICE_AQ_SVM_VLAN_RDMA_PKT_FLAG_SETTING 0x10 +#define ICE_AQ_DVM_VLAN_RDMA_PKT_FLAG_SETTING 0x1A + u8 rdma_reserved[2]; + u8 mng_vlan_prot_id; +#define ICE_AQ_VLAN_MNG_PROTOCOL_ID_OUTER 0x10 +#define ICE_AQ_VLAN_MNG_PROTOCOL_ID_INNER 0x11 + u8 prot_id_reserved[30]; +}; + +/* Response buffer for Get VLAN Mode AQ command (indirect 0x020D) */ +struct ice_aqc_get_vlan_mode { + u8 vlan_mode; +#define ICE_AQ_VLAN_MODE_DVM_ENA BIT(0) + u8 l2tag_prio_tagging; + u8 reserved[98]; +}; + /* Add VSI (indirect 0x0210) * Update VSI (indirect 0x0211) * Get VSI (indirect 0x0212) @@ -2911,6 +2945,8 @@ enum ice_adminq_opc { ice_aqc_opc_alloc_res = 0x0208, ice_aqc_opc_free_res = 0x0209, ice_aqc_opc_get_allocd_res_desc = 0x020A, + ice_aqc_opc_set_vlan_mode_parameters = 0x020C, + ice_aqc_opc_get_vlan_mode_parameters = 0x020D, /* VSI commands */ ice_aqc_opc_add_vsi = 0x0210, diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index d3178240b2..bef7c83512 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -836,8 +836,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw) goto err_unroll_fltr_mgmt_struct; ice_init_lock(&hw->tnl_lock); - ice_init_vlan_mode_ops(hw); - return ICE_SUCCESS; err_unroll_fltr_mgmt_struct: diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 31047d1eda..cf470bc4f0 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -1152,6 +1152,7 @@ static enum ice_status ice_download_pkg(struct ice_hw *hw, struct ice_seg *ice_seg) { struct ice_buf_table *ice_buf_tbl; + enum ice_status status; ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__); ice_debug(hw, ICE_DBG_PKG, "Segment format version: %d.%d.%d.%d\n", @@ -1169,8 +1170,12 @@ ice_download_pkg(struct ice_hw *hw, struct ice_seg *ice_seg) ice_debug(hw, ICE_DBG_PKG, "Seg buf count: %d\n", LE32_TO_CPU(ice_buf_tbl->buf_count)); - return ice_dwnld_cfg_bufs(hw, ice_buf_tbl->buf_array, - LE32_TO_CPU(ice_buf_tbl->buf_count)); + status = ice_dwnld_cfg_bufs(hw, ice_buf_tbl->buf_array, + LE32_TO_CPU(ice_buf_tbl->buf_count)); + + ice_cache_vlan_mode(hw); + + return status; } /** diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 277623d2bb..a4ba6a8343 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -3175,6 +3175,64 @@ ice_aq_get_recipe(struct ice_hw *hw, return status; } +/** + * ice_update_recipe_lkup_idx - update a default recipe based on the lkup_idx + * @hw: pointer to the HW struct + * @params: parameters used to update the default recipe + * + * This function only supports updating default recipes and it only supports + * updating a single recipe based on the lkup_idx at a time. + * + * This is done as a read-modify-write operation. First, get the current recipe + * contents based on the recipe's ID. Then modify the field vector index and + * mask if it's valid at the lkup_idx. Finally, use the add recipe AQ to update + * the pre-existing recipe with the modifications. + */ +enum ice_status +ice_update_recipe_lkup_idx(struct ice_hw *hw, + struct ice_update_recipe_lkup_idx_params *params) +{ + struct ice_aqc_recipe_data_elem *rcp_list; + u16 num_recps = ICE_MAX_NUM_RECIPES; + enum ice_status status; + + rcp_list = (struct ice_aqc_recipe_data_elem *)ice_malloc(hw, num_recps * sizeof(*rcp_list)); + if (!rcp_list) + return ICE_ERR_NO_MEMORY; + + /* read current recipe list from firmware */ + rcp_list->recipe_indx = params->rid; + status = ice_aq_get_recipe(hw, rcp_list, &num_recps, params->rid, NULL); + if (status) { + ice_debug(hw, ICE_DBG_SW, "Failed to get recipe %d, status %d\n", + params->rid, status); + goto error_out; + } + + /* only modify existing recipe's lkup_idx and mask if valid, while + * leaving all other fields the same, then update the recipe firmware + */ + rcp_list->content.lkup_indx[params->lkup_idx] = params->fv_idx; + if (params->mask_valid) + rcp_list->content.mask[params->lkup_idx] = + CPU_TO_LE16(params->mask); + + if (params->ignore_valid) + rcp_list->content.lkup_indx[params->lkup_idx] |= + ICE_AQ_RECIPE_LKUP_IGNORE; + + status = ice_aq_add_recipe(hw, &rcp_list[0], 1, NULL); + if (status) + ice_debug(hw, ICE_DBG_SW, "Failed to update recipe %d lkup_idx %d fv_idx %d mask %d mask_valid %s, status %d\n", + params->rid, params->lkup_idx, params->fv_idx, + params->mask, params->mask_valid ? "true" : "false", + status); + +error_out: + ice_free(hw, rcp_list); + return status; +} + /** * ice_aq_map_recipe_to_profile - Map recipe to packet profile * @hw: pointer to the HW struct diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h index a0a7a2e533..04d3c31006 100644 --- a/drivers/net/ice/base/ice_switch.h +++ b/drivers/net/ice/base/ice_switch.h @@ -201,6 +201,15 @@ struct ice_fltr_info { u8 lan_en; /* Indicate if packet can be forwarded to the uplink */ }; +struct ice_update_recipe_lkup_idx_params { + u16 rid; + u16 fv_idx; + bool ignore_valid; + u16 mask; + bool mask_valid; + u8 lkup_idx; +}; + struct ice_adv_lkup_elem { enum ice_protocol_type type; union ice_prot_hdr h_u; /* Header values */ @@ -523,4 +532,7 @@ ice_replay_vsi_all_fltr(struct ice_hw *hw, struct ice_port_info *pi, void ice_rm_sw_replay_rule_info(struct ice_hw *hw, struct ice_switch_info *sw); void ice_rm_all_sw_replay_rule_info(struct ice_hw *hw); bool ice_is_prof_rule(enum ice_sw_tunnel_type type); +enum ice_status +ice_update_recipe_lkup_idx(struct ice_hw *hw, + struct ice_update_recipe_lkup_idx_params *params); #endif /* _ICE_SWITCH_H_ */ diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index 8d259397a6..414424b66e 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -1012,8 +1012,8 @@ struct ice_hw { ice_declare_bitmap(fdir_perfect_fltr, ICE_FLTR_PTYPE_MAX); struct ice_lock rss_locks; /* protect RSS configuration */ struct LIST_HEAD_TYPE rss_list_head; - struct ice_vlan_mode_ops vlan_mode_ops; ice_declare_bitmap(hw_ptype, ICE_FLOW_PTYPE_MAX); + u8 dvm_ena; }; /* Statistics collected by each port, VSI, VEB, and S-channel */ diff --git a/drivers/net/ice/base/ice_vlan_mode.c b/drivers/net/ice/base/ice_vlan_mode.c index 503c6c1b28..2e4c3f62c4 100644 --- a/drivers/net/ice/base/ice_vlan_mode.c +++ b/drivers/net/ice/base/ice_vlan_mode.c @@ -55,21 +55,100 @@ ice_pkg_get_supported_vlan_mode(struct ice_hw *hw, bool *dvm) } /** - * ice_is_dvm_supported - check if double VLAN mode is supported based on DDP + * ice_aq_get_vlan_mode - get the VLAN mode of the device + * @hw: pointer to the HW structure + * @get_params: structure FW fills in based on the current VLAN mode config + * + * Get VLAN Mode Parameters (0x020D) + */ +static enum ice_status +ice_aq_get_vlan_mode(struct ice_hw *hw, + struct ice_aqc_get_vlan_mode *get_params) +{ + struct ice_aq_desc desc; + + if (!get_params) + return ICE_ERR_PARAM; + + ice_fill_dflt_direct_cmd_desc(&desc, + ice_aqc_opc_get_vlan_mode_parameters); + + return ice_aq_send_cmd(hw, &desc, get_params, sizeof(*get_params), + NULL); +} + +/** + * ice_aq_is_dvm_ena - query FW to check if double VLAN mode is enabled + * @hw: pointer to the HW structure + * + * Returns true if the hardware/firmware is configured in double VLAN mode, + * else return false signaling that the hardware/firmware is configured in + * single VLAN mode. + * + * Also, return false if this call fails for any reason (i.e. firmware doesn't + * support this AQ call). + */ +static bool ice_aq_is_dvm_ena(struct ice_hw *hw) +{ + struct ice_aqc_get_vlan_mode get_params = { 0 }; + enum ice_status status; + + status = ice_aq_get_vlan_mode(hw, &get_params); + if (status) { + ice_debug(hw, ICE_DBG_AQ, "Failed to get VLAN mode, status %d\n", + status); + return false; + } + + return (get_params.vlan_mode & ICE_AQ_VLAN_MODE_DVM_ENA); +} + +/** + * ice_is_dvm_ena - check if double VLAN mode is enabled + * @hw: pointer to the HW structure + * + * The device is configured in single or double VLAN mode on initialization and + * this cannot be dynamically changed during runtime. Based on this there is no + * need to make an AQ call every time the driver needs to know the VLAN mode. + * Instead, use the cached VLAN mode. + */ +bool ice_is_dvm_ena(struct ice_hw *hw) +{ + return hw->dvm_ena; +} + +/** + * ice_cache_vlan_mode - cache VLAN mode after DDP is downloaded + * @hw: pointer to the HW structure + * + * This is only called after downloading the DDP and after the global + * configuration lock has been released because all ports on a device need to + * cache the VLAN mode. + */ +void ice_cache_vlan_mode(struct ice_hw *hw) +{ + hw->dvm_ena = ice_aq_is_dvm_ena(hw) ? true : false; +} + +/** + * ice_is_dvm_supported - check if Double VLAN Mode is supported * @hw: pointer to the hardware structure * - * Returns true if DVM is supported and false if only SVM is supported. This - * function should only be called while the global config lock is held and after - * the package has been successfully downloaded. + * Returns true if Double VLAN Mode (DVM) is supported and false if only Single + * VLAN Mode (SVM) is supported. In order for DVM to be supported the DDP and + * firmware must support it, otherwise only SVM is supported. This function + * should only be called while the global config lock is held and after the + * package has been successfully downloaded. */ static bool ice_is_dvm_supported(struct ice_hw *hw) { + struct ice_aqc_get_vlan_mode get_vlan_mode = { 0 }; enum ice_status status; bool pkg_supports_dvm; status = ice_pkg_get_supported_vlan_mode(hw, &pkg_supports_dvm); if (status) { - ice_debug(hw, ICE_DBG_PKG, "Failed to get supported VLAN mode, err %d\n", + ice_debug(hw, ICE_DBG_PKG, "Failed to get supported VLAN mode, status %d\n", status); return false; } @@ -77,28 +156,196 @@ static bool ice_is_dvm_supported(struct ice_hw *hw) if (!pkg_supports_dvm) return false; + /* If firmware returns success, then it supports DVM, else it only + * supports SVM + */ + status = ice_aq_get_vlan_mode(hw, &get_vlan_mode); + if (status) { + ice_debug(hw, ICE_DBG_NVM, "Failed to get VLAN mode, status %d\n", + status); + return false; + } + return true; } +#define ICE_EXTERNAL_VLAN_ID_FV_IDX 11 +#define ICE_SW_LKUP_VLAN_LOC_LKUP_IDX 1 +#define ICE_SW_LKUP_VLAN_PKT_FLAGS_LKUP_IDX 2 +#define ICE_SW_LKUP_PROMISC_VLAN_LOC_LKUP_IDX 2 +#define ICE_PKT_FLAGS_0_TO_15_FV_IDX 1 +#define ICE_PKT_FLAGS_0_TO_15_VLAN_FLAGS_MASK 0xD000 +static struct ice_update_recipe_lkup_idx_params ice_dvm_dflt_recipes[] = { + { + /* Update recipe ICE_SW_LKUP_VLAN to filter based on the + * outer/single VLAN in DVM + */ + .rid = ICE_SW_LKUP_VLAN, + .fv_idx = ICE_EXTERNAL_VLAN_ID_FV_IDX, + .ignore_valid = true, + .mask = 0, + .mask_valid = false, /* use pre-existing mask */ + .lkup_idx = ICE_SW_LKUP_VLAN_LOC_LKUP_IDX, + }, + { + /* Update recipe ICE_SW_LKUP_VLAN to filter based on the VLAN + * packet flags to support VLAN filtering on multiple VLAN + * ethertypes (i.e. 0x8100 and 0x88a8) in DVM + */ + .rid = ICE_SW_LKUP_VLAN, + .fv_idx = ICE_PKT_FLAGS_0_TO_15_FV_IDX, + .ignore_valid = false, + .mask = ICE_PKT_FLAGS_0_TO_15_VLAN_FLAGS_MASK, + .mask_valid = true, + .lkup_idx = ICE_SW_LKUP_VLAN_PKT_FLAGS_LKUP_IDX, + }, + { + /* Update recipe ICE_SW_LKUP_PROMISC_VLAN to filter based on the + * outer/single VLAN in DVM + */ + .rid = ICE_SW_LKUP_PROMISC_VLAN, + .fv_idx = ICE_EXTERNAL_VLAN_ID_FV_IDX, + .ignore_valid = true, + .mask = 0, + .mask_valid = false, /* use pre-existing mask */ + .lkup_idx = ICE_SW_LKUP_PROMISC_VLAN_LOC_LKUP_IDX, + }, +}; + /** - * ice_set_svm - set single VLAN mode + * ice_dvm_update_dflt_recipes - update default switch recipes in DVM + * @hw: hardware structure used to update the recipes + */ +static enum ice_status ice_dvm_update_dflt_recipes(struct ice_hw *hw) +{ + unsigned long i; + + for (i = 0; i < ARRAY_SIZE(ice_dvm_dflt_recipes); i++) { + struct ice_update_recipe_lkup_idx_params *params; + enum ice_status status; + + params = &ice_dvm_dflt_recipes[i]; + + status = ice_update_recipe_lkup_idx(hw, params); + if (status) { + ice_debug(hw, ICE_DBG_INIT, "Failed to update RID %d lkup_idx %d fv_idx %d mask_valid %s mask 0x%04x\n", + params->rid, params->lkup_idx, params->fv_idx, + params->mask_valid ? "true" : "false", + params->mask); + return status; + } + } + + return ICE_SUCCESS; +} + +/** + * ice_aq_set_vlan_mode - set the VLAN mode of the device * @hw: pointer to the HW structure + * @set_params: requested VLAN mode configuration + * + * Set VLAN Mode Parameters (0x020C) + */ +static enum ice_status +ice_aq_set_vlan_mode(struct ice_hw *hw, + struct ice_aqc_set_vlan_mode *set_params) +{ + u8 rdma_packet, mng_vlan_prot_id; + struct ice_aq_desc desc; + + if (!set_params) + return ICE_ERR_PARAM; + + if (set_params->l2tag_prio_tagging > ICE_AQ_VLAN_PRIO_TAG_MAX) + return ICE_ERR_PARAM; + + rdma_packet = set_params->rdma_packet; + if (rdma_packet != ICE_AQ_SVM_VLAN_RDMA_PKT_FLAG_SETTING && + rdma_packet != ICE_AQ_DVM_VLAN_RDMA_PKT_FLAG_SETTING) + return ICE_ERR_PARAM; + + mng_vlan_prot_id = set_params->mng_vlan_prot_id; + if (mng_vlan_prot_id != ICE_AQ_VLAN_MNG_PROTOCOL_ID_OUTER && + mng_vlan_prot_id != ICE_AQ_VLAN_MNG_PROTOCOL_ID_INNER) + return ICE_ERR_PARAM; + + ice_fill_dflt_direct_cmd_desc(&desc, + ice_aqc_opc_set_vlan_mode_parameters); + desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD); + + return ice_aq_send_cmd(hw, &desc, set_params, sizeof(*set_params), + NULL); +} + +/** + * ice_set_dvm - sets up software and hardware for double VLAN mode + * @hw: pointer to the hardware structure */ -static enum ice_status ice_set_svm_dflt(struct ice_hw *hw) +static enum ice_status ice_set_dvm(struct ice_hw *hw) { - ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__); + struct ice_aqc_set_vlan_mode params = { 0 }; + enum ice_status status; + + params.l2tag_prio_tagging = ICE_AQ_VLAN_PRIO_TAG_OUTER_CTAG; + params.rdma_packet = ICE_AQ_DVM_VLAN_RDMA_PKT_FLAG_SETTING; + params.mng_vlan_prot_id = ICE_AQ_VLAN_MNG_PROTOCOL_ID_OUTER; + + status = ice_aq_set_vlan_mode(hw, ¶ms); + if (status) { + ice_debug(hw, ICE_DBG_INIT, "Failed to set double VLAN mode parameters, status %d\n", + status); + return status; + } - return ice_aq_set_port_params(hw->port_info, 0, false, false, false, NULL); + status = ice_dvm_update_dflt_recipes(hw); + if (status) { + ice_debug(hw, ICE_DBG_INIT, "Failed to update default recipes for double VLAN mode, status %d\n", + status); + return status; + } + + status = ice_aq_set_port_params(hw->port_info, 0, false, false, true, + NULL); + if (status) { + ice_debug(hw, ICE_DBG_INIT, "Failed to set port in double VLAN mode, status %d\n", + status); + return status; + } + + return ICE_SUCCESS; } /** - * ice_init_vlan_mode_ops - initialize VLAN mode configuration ops + * ice_set_svm - set single VLAN mode * @hw: pointer to the HW structure */ -void ice_init_vlan_mode_ops(struct ice_hw *hw) +static enum ice_status ice_set_svm(struct ice_hw *hw) { - hw->vlan_mode_ops.set_dvm = NULL; - hw->vlan_mode_ops.set_svm = ice_set_svm_dflt; + struct ice_aqc_set_vlan_mode *set_params; + enum ice_status status; + + status = ice_aq_set_port_params(hw->port_info, 0, false, false, false, NULL); + if (status) { + ice_debug(hw, ICE_DBG_INIT, "Failed to set port parameters for single VLAN mode\n"); + return status; + } + + set_params = (struct ice_aqc_set_vlan_mode *) + ice_malloc(hw, sizeof(*set_params)); + if (!set_params) + return ICE_ERR_NO_MEMORY; + + /* default configuration for SVM configurations */ + set_params->l2tag_prio_tagging = ICE_AQ_VLAN_PRIO_TAG_INNER_CTAG; + set_params->rdma_packet = ICE_AQ_SVM_VLAN_RDMA_PKT_FLAG_SETTING; + set_params->mng_vlan_prot_id = ICE_AQ_VLAN_MNG_PROTOCOL_ID_INNER; + + status = ice_aq_set_vlan_mode(hw, set_params); + if (status) + ice_debug(hw, ICE_DBG_INIT, "Failed to configure port in single VLAN mode\n"); + + ice_free(hw, set_params); + return status; } /** @@ -107,16 +354,11 @@ void ice_init_vlan_mode_ops(struct ice_hw *hw) */ enum ice_status ice_set_vlan_mode(struct ice_hw *hw) { - enum ice_status status = ICE_ERR_NOT_IMPL; - if (!ice_is_dvm_supported(hw)) return ICE_SUCCESS; - if (hw->vlan_mode_ops.set_dvm) - status = hw->vlan_mode_ops.set_dvm(hw); - - if (status) - return hw->vlan_mode_ops.set_svm(hw); + if (!ice_set_dvm(hw)) + return ICE_SUCCESS; - return ICE_SUCCESS; + return ice_set_svm(hw); } diff --git a/drivers/net/ice/base/ice_vlan_mode.h b/drivers/net/ice/base/ice_vlan_mode.h index fc1069fb6b..e9f13e7814 100644 --- a/drivers/net/ice/base/ice_vlan_mode.h +++ b/drivers/net/ice/base/ice_vlan_mode.h @@ -5,28 +5,12 @@ #ifndef _ICE_VLAN_MODE_H_ #define _ICE_VLAN_MODE_H_ +#include "ice_osdep.h" + struct ice_hw; +bool ice_is_dvm_ena(struct ice_hw *hw); +void ice_cache_vlan_mode(struct ice_hw *hw); enum ice_status ice_set_vlan_mode(struct ice_hw *hw); -void ice_init_vlan_mode_ops(struct ice_hw *hw); - -/* This structure defines the VLAN mode configuration interface. It is used to set the VLAN mode. - * - * Note: These operations will be called while the global configuration lock is held. - * - * enum ice_status (*set_svm)(struct ice_hw *hw); - * This function is called when the DDP and/or Firmware don't support double VLAN mode (DVM) or - * if the set_dvm op is not implemented and/or returns failure. It will set the device in - * single VLAN mode (SVM). - * - * enum ice_status (*set_dvm)(struct ice_hw *hw); - * This function is called when the DDP and Firmware support double VLAN mode (DVM). It should - * be implemented to set double VLAN mode. If it fails or remains unimplemented, set_svm will - * be called as a fallback plan. - */ -struct ice_vlan_mode_ops { - enum ice_status (*set_svm)(struct ice_hw *hw); - enum ice_status (*set_dvm)(struct ice_hw *hw); -}; #endif /* _ICE_VLAN_MODE_H */ From patchwork Thu Jan 21 01:43:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 87013 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0FF44A0A0A; Thu, 21 Jan 2021 02:40:29 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 68F84140DE1; Thu, 21 Jan 2021 02:40:07 +0100 (CET) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id BEC44140DC1 for ; Thu, 21 Jan 2021 02:40:04 +0100 (CET) IronPort-SDR: dINZipbF26SGGkoR/qBjpyok9MQw/0TAXfmHEYMJPoSZC4dr9yXgcUhROr68NkYD1bbhjY9RR0 NLl8EA1wGwOQ== X-IronPort-AV: E=McAfee;i="6000,8403,9870"; a="179354802" X-IronPort-AV: E=Sophos;i="5.79,362,1602572400"; d="scan'208";a="179354802" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jan 2021 17:40:04 -0800 IronPort-SDR: d11o/w1Rg6BCUpouaVF6NtIfyAsd4A6BgG9PM579ggWzWuYg4VhyQ1XbuM6AqSvYi4dXPv0Jjm LIiIMNokIfHg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,362,1602572400"; d="scan'208";a="467279496" Received: from dpdk51.sh.intel.com ([10.67.111.142]) by fmsmga001.fm.intel.com with ESMTP; 20 Jan 2021 17:40:02 -0800 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, yigit.ferruh@intel.com, Qi Zhang Date: Thu, 21 Jan 2021 09:43:46 +0800 Message-Id: <20210121014346.641808-5-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210121014346.641808-1-qi.z.zhang@intel.com> References: <20210121014346.641808-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH 4/4] net/ice: add new supported device IDs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add device ID support for family E823C, also update the base code BSD version. Signed-off-by: Qi Zhang --- drivers/net/ice/base/README | 2 +- drivers/net/ice/base/ice_devids.h | 10 ++++++++++ drivers/net/ice/ice_ethdev.c | 5 +++++ 3 files changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/net/ice/base/README b/drivers/net/ice/base/README index bc42736bdd..7d32e58a52 100644 --- a/drivers/net/ice/base/README +++ b/drivers/net/ice/base/README @@ -6,7 +6,7 @@ Intel® ICE driver ================== This directory contains source code of FreeBSD ice driver of version -2021.01.07 released by the team which develops +2021.01.20 released by the team which develops basic drivers for any ice NIC. The directory of base/ contains the original source package. This driver is valid for the product(s) listed below diff --git a/drivers/net/ice/base/ice_devids.h b/drivers/net/ice/base/ice_devids.h index 93110055e2..b4cdddc8e7 100644 --- a/drivers/net/ice/base/ice_devids.h +++ b/drivers/net/ice/base/ice_devids.h @@ -28,6 +28,16 @@ #define ICE_DEV_ID_E810_XXV_QSFP 0x159A /* Intel(R) Ethernet Controller E810-XXV for SFP */ #define ICE_DEV_ID_E810_XXV_SFP 0x159B +/* Intel(R) Ethernet Connection E823-C for backplane */ +#define ICE_DEV_ID_E823C_BACKPLANE 0x188A +/* Intel(R) Ethernet Connection E823-C for QSFP */ +#define ICE_DEV_ID_E823C_QSFP 0x188B +/* Intel(R) Ethernet Connection E823-C for SFP */ +#define ICE_DEV_ID_E823C_SFP 0x188C +/* Intel(R) Ethernet Connection E823-C/X557-AT 10GBASE-T */ +#define ICE_DEV_ID_E823C_10G_BASE_T 0x188D +/* Intel(R) Ethernet Connection E823-C 1GbE */ +#define ICE_DEV_ID_E823C_SGMII 0x188E /* Intel(R) Ethernet Connection E822-C for backplane */ #define ICE_DEV_ID_E822C_BACKPLANE 0x1890 /* Intel(R) Ethernet Connection E822-C for QSFP */ diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c index ec29f0fe40..f33c3cbffe 100644 --- a/drivers/net/ice/ice_ethdev.c +++ b/drivers/net/ice/ice_ethdev.c @@ -152,6 +152,11 @@ static const struct rte_pci_id pci_id_ice_map[] = { { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810_XXV_BACKPLANE) }, { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810_XXV_QSFP) }, { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810_XXV_SFP) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823C_BACKPLANE) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823C_QSFP) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823C_SFP) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823C_10G_BASE_T) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823C_SGMII) }, { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_BACKPLANE) }, { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_QSFP) }, { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_SFP) },