From patchwork Mon Dec 28 09:54:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85771 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id DBF2DA09FF; Mon, 28 Dec 2020 10:55:12 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 0A005CA3B; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 33320CA36 for ; Mon, 28 Dec 2020 10:54:50 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:43 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDS012171; Mon, 28 Dec 2020 11:54:43 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com, stable@dpdk.org Date: Mon, 28 Dec 2020 11:54:05 +0200 Message-Id: <20201228095436.14996-2-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 01/32] net/mlx5: fix folding constant array error X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Before this commit the PMD used: const int elt_n = 8 const int *stack[elt_n]; In Windows clang compiler complains: net/mlx5/mlx5_flow.c:215:19: error: variable length array folded to constant array as an extension [-Werror,-Wgnu-folding-constant] Fix it by using a constant macro definition instead of a variable: #define MLX5_RSS_EXP_ELT_N 8 const int *stack[MLX5_RSS_EXP_ELT_N]; Fixes: c7870bfe09dc ("ethdev: move RSS expansion code to mlx5 driver") Cc: stable@dpdk.org Signed-off-by: Tal Shnaiderman Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5_flow.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index 82e24d7067..bf86aaaa39 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -212,6 +212,8 @@ mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item) return ret; } +#define MLX5_RSS_EXP_ELT_N 8 + /** * Expand RSS flows into several possible flows according to the RSS hash * fields requested and the driver capabilities. @@ -242,13 +244,12 @@ mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size, const struct mlx5_flow_expand_node graph[], int graph_root_index) { - const int elt_n = 8; const struct rte_flow_item *item; const struct mlx5_flow_expand_node *node = &graph[graph_root_index]; const int *next_node; - const int *stack[elt_n]; + const int *stack[MLX5_RSS_EXP_ELT_N]; int stack_pos = 0; - struct rte_flow_item flow_items[elt_n]; + struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N]; unsigned int i; size_t lsize; size_t user_pattern_size = 0; @@ -261,10 +262,10 @@ mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size, memset(&missed_item, 0, sizeof(missed_item)); lsize = offsetof(struct mlx5_flow_expand_rss, entry) + - elt_n * sizeof(buf->entry[0]); + MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]); if (lsize <= size) { buf->entry[0].priority = 0; - buf->entry[0].pattern = (void *)&buf->entry[elt_n]; + buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N]; buf->entries = 0; addr = buf->entry[0].pattern; } @@ -367,7 +368,7 @@ mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size, /* Go deeper. */ if (node->next) { next_node = node->next; - if (stack_pos++ == elt_n) { + if (stack_pos++ == MLX5_RSS_EXP_ELT_N) { rte_errno = E2BIG; return -rte_errno; } From patchwork Mon Dec 28 09:54:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85784 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id A4EA9A09FF; Mon, 28 Dec 2020 10:59:40 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id DAB68CAD1; Mon, 28 Dec 2020 10:55:18 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 7C95CCA4A for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:43 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDT012171; Mon, 28 Dec 2020 11:54:43 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:06 +0200 Message-Id: <20201228095436.14996-3-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 02/32] net/mlx5/linux: extend device attributes getter X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk This commit adds device attributes parameters to be reported by mlx5_os_get_dev_attr(): max_cqe, max_mr, max_pd, max_srq, max_srq_wr Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/net/mlx5/linux/mlx5_os.c | 5 +++++ drivers/net/mlx5/mlx5.h | 5 +++++ 2 files changed, 10 insertions(+) diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c index 917d6be7b8..a6c1eba640 100644 --- a/drivers/net/mlx5/linux/mlx5_os.c +++ b/drivers/net/mlx5/linux/mlx5_os.c @@ -116,7 +116,12 @@ mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr) device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr; device_attr->max_sge = attr_ex.orig_attr.max_sge; device_attr->max_cq = attr_ex.orig_attr.max_cq; + device_attr->max_cqe = attr_ex.orig_attr.max_cqe; + device_attr->max_mr = attr_ex.orig_attr.max_mr; + device_attr->max_pd = attr_ex.orig_attr.max_pd; device_attr->max_qp = attr_ex.orig_attr.max_qp; + device_attr->max_srq = attr_ex.orig_attr.max_srq; + device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr; device_attr->raw_packet_caps = attr_ex.raw_packet_caps; device_attr->max_rwq_indirection_table_size = attr_ex.rss_caps.max_rwq_indirection_table_size; diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 121d726405..2186677810 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -83,6 +83,11 @@ struct mlx5_dev_attr { int max_sge; int max_cq; int max_qp; + int max_cqe; + uint32_t max_pd; + uint32_t max_mr; + uint32_t max_srq; + uint32_t max_srq_wr; uint32_t raw_packet_caps; uint32_t max_rwq_indirection_table_size; uint32_t max_tso; From patchwork Mon Dec 28 09:54:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85773 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id F2A04A09FF; Mon, 28 Dec 2020 10:55:49 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id E107ACA4B; Mon, 28 Dec 2020 10:54:57 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 646B5CA3A for ; Mon, 28 Dec 2020 10:54:50 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:43 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDU012171; Mon, 28 Dec 2020 11:54:43 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:07 +0200 Message-Id: <20201228095436.14996-4-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 03/32] net/mlx5: remove Linux files from Windows compilation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk This commit removes Linux files flow_verbs.c and mlx5_rxtx_vec.c from Windows compilation. Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/net/mlx5/meson.build | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/net/mlx5/meson.build b/drivers/net/mlx5/meson.build index e7495a764a..f2fafbdd05 100644 --- a/drivers/net/mlx5/meson.build +++ b/drivers/net/mlx5/meson.build @@ -15,7 +15,6 @@ sources = files( 'mlx5_flow.c', 'mlx5_flow_meter.c', 'mlx5_flow_dv.c', - 'mlx5_flow_verbs.c', 'mlx5_flow_age.c', 'mlx5_mac.c', 'mlx5_mr.c', @@ -31,11 +30,18 @@ sources = files( 'mlx5_utils.c', 'mlx5_devx.c', ) -if (dpdk_conf.has('RTE_ARCH_X86_64') - or dpdk_conf.has('RTE_ARCH_ARM64') - or dpdk_conf.has('RTE_ARCH_PPC_64')) - sources += files('mlx5_rxtx_vec.c') + +if is_linux + sources += files( + 'mlx5_flow_verbs.c', + ) + if (dpdk_conf.has('RTE_ARCH_X86_64') + or dpdk_conf.has('RTE_ARCH_ARM64') + or dpdk_conf.has('RTE_ARCH_PPC_64')) + sources += files('mlx5_rxtx_vec.c') + endif endif + cflags_options = [ '-std=c11', '-Wno-strict-prototypes', From patchwork Mon Dec 28 09:54:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85772 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 034D4A09FF; Mon, 28 Dec 2020 10:55:34 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 7AB39CA48; Mon, 28 Dec 2020 10:54:56 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 6E9ABCA3B for ; Mon, 28 Dec 2020 10:54:50 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:44 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDV012171; Mon, 28 Dec 2020 11:54:43 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com, stable@dpdk.org Date: Mon, 28 Dec 2020 11:54:08 +0200 Message-Id: <20201228095436.14996-5-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 04/32] net/mlx5: fix freeing packet pacing X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk Packet pacing is allocated under condition #ifdef HAVE_MLX5DV_PP_ALLOC. In a similar way - free packet pacing index under the same condition. This update is required to successfully compile under operating systems which do not support packet pacing. Fixes: aef1e20ebeb2 ("net/mlx5: allocate packet pacing context") Cc: stable@dpdk.org Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5_txpp.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/net/mlx5/mlx5_txpp.c b/drivers/net/mlx5/mlx5_txpp.c index 2438bf1f1d..21675ab17a 100644 --- a/drivers/net/mlx5/mlx5_txpp.c +++ b/drivers/net/mlx5/mlx5_txpp.c @@ -57,11 +57,16 @@ mlx5_txpp_create_event_channel(struct mlx5_dev_ctx_shared *sh) static void mlx5_txpp_free_pp_index(struct mlx5_dev_ctx_shared *sh) { +#ifdef HAVE_MLX5DV_PP_ALLOC if (sh->txpp.pp) { mlx5_glue->dv_free_pp(sh->txpp.pp); sh->txpp.pp = NULL; sh->txpp.pp_id = 0; } +#else + RTE_SET_USED(sh); + DRV_LOG(ERR, "Freeing pacing index is not supported."); +#endif } /* Allocate Packet Pacing index from kernel via mlx5dv call. */ From patchwork Mon Dec 28 09:54:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85797 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9E557A09FF; Mon, 28 Dec 2020 11:04:11 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C8D9DCC40; Mon, 28 Dec 2020 10:55:45 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id D8C7ACA48 for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:44 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDW012171; Mon, 28 Dec 2020 11:54:43 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:09 +0200 Message-Id: <20201228095436.14996-6-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 05/32] net/mlx5: replace Linux sleep with rte sleep X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk Replace Linux API usleep() and nanosleep() with rte_delay_us_sleep(). The replacement occurs in shared files compiled under different operating systems. Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5.c | 5 +++-- drivers/net/mlx5/mlx5_trigger.c | 3 ++- drivers/net/mlx5/mlx5_txpp.c | 6 +----- 3 files changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index 52a8a252d4..8e9df6abcf 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include @@ -1330,7 +1331,7 @@ mlx5_dev_close(struct rte_eth_dev *dev) mlx5_flex_parser_ecpri_release(dev); if (priv->rxqs != NULL) { /* XXX race condition if mlx5_rx_burst() is still running. */ - usleep(1000); + rte_delay_us_sleep(1000); for (i = 0; (i != priv->rxqs_n); ++i) mlx5_rxq_release(dev, i); priv->rxqs_n = 0; @@ -1338,7 +1339,7 @@ mlx5_dev_close(struct rte_eth_dev *dev) } if (priv->txqs != NULL) { /* XXX race condition if mlx5_tx_burst() is still running. */ - usleep(1000); + rte_delay_us_sleep(1000); for (i = 0; (i != priv->txqs_n); ++i) mlx5_txq_release(dev, i); priv->txqs_n = 0; diff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c index bd029154f8..646f29b923 100644 --- a/drivers/net/mlx5/mlx5_trigger.c +++ b/drivers/net/mlx5/mlx5_trigger.c @@ -9,6 +9,7 @@ #include #include #include +#include #include @@ -1171,7 +1172,7 @@ mlx5_dev_stop(struct rte_eth_dev *dev) rte_wmb(); /* Disable datapath on secondary process. */ mlx5_mp_os_req_stop_rxtx(dev); - usleep(1000 * priv->rxqs_n); + rte_delay_us_sleep(1000 * priv->rxqs_n); DRV_LOG(DEBUG, "port %u stopping device", dev->data->port_id); mlx5_flow_stop_default(dev); /* Control flows for default traffic can be removed firstly. */ diff --git a/drivers/net/mlx5/mlx5_txpp.c b/drivers/net/mlx5/mlx5_txpp.c index 21675ab17a..a1ec294942 100644 --- a/drivers/net/mlx5/mlx5_txpp.c +++ b/drivers/net/mlx5/mlx5_txpp.c @@ -769,15 +769,11 @@ mlx5_txpp_init_timestamp(struct mlx5_dev_ctx_shared *sh) sh->txpp.ts_p = 0; sh->txpp.ts_n = 0; for (wait = 0; wait < MLX5_TXPP_WAIT_INIT_TS; wait++) { - struct timespec onems; - mlx5_txpp_update_timestamp(sh); if (wq->sq_ci) return; /* Wait one millisecond and try again. */ - onems.tv_sec = 0; - onems.tv_nsec = NS_PER_S / MS_PER_S; - nanosleep(&onems, 0); + rte_delay_us_sleep(US_PER_S / MS_PER_S); } DRV_LOG(ERR, "Unable to initialize timestamp."); sh->txpp.sync_lost = 1; From patchwork Mon Dec 28 09:54:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85782 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5F1D4A09FF; Mon, 28 Dec 2020 10:58:53 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C86DECAC3; Mon, 28 Dec 2020 10:55:14 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 5DB81CA36 for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:44 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDX012171; Mon, 28 Dec 2020 11:54:44 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:10 +0200 Message-Id: <20201228095436.14996-7-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 06/32] net/mlx5: define mprq functions as static inline X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk Functions mlx5_check_mprq_support(), mlx5_rxq_mprq_enabled(), mlx5_mprq_enabled() are moved from source file mlx5_rxq.c to header file mlx5_rxtx.h and their type is updated to 'static __rte_always_inline'. Previously the functions were declared as 'inline' in the source file which was reported as 'unresolved external symbol' error by some Windows linkers. Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5_rxq.c | 71 ------------------------------------------ drivers/net/mlx5/mlx5_rxtx.h | 73 ++++++++++++++++++++++++++++++++++++++++++-- 2 files changed, 70 insertions(+), 74 deletions(-) diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index da7a8b3cd7..c89e55b1c0 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -48,77 +48,6 @@ static_assert(MLX5_RSS_HASH_KEY_LEN == (unsigned int)sizeof(rss_hash_default_key), "wrong RSS default key size."); -/** - * Check whether Multi-Packet RQ can be enabled for the device. - * - * @param dev - * Pointer to Ethernet device. - * - * @return - * 1 if supported, negative errno value if not. - */ -inline int -mlx5_check_mprq_support(struct rte_eth_dev *dev) -{ - struct mlx5_priv *priv = dev->data->dev_private; - - if (priv->config.mprq.enabled && - priv->rxqs_n >= priv->config.mprq.min_rxqs_num) - return 1; - return -ENOTSUP; -} - -/** - * Check whether Multi-Packet RQ is enabled for the Rx queue. - * - * @param rxq - * Pointer to receive queue structure. - * - * @return - * 0 if disabled, otherwise enabled. - */ -inline int -mlx5_rxq_mprq_enabled(struct mlx5_rxq_data *rxq) -{ - return rxq->strd_num_n > 0; -} - -/** - * Check whether Multi-Packet RQ is enabled for the device. - * - * @param dev - * Pointer to Ethernet device. - * - * @return - * 0 if disabled, otherwise enabled. - */ -inline int -mlx5_mprq_enabled(struct rte_eth_dev *dev) -{ - struct mlx5_priv *priv = dev->data->dev_private; - uint32_t i; - uint16_t n = 0; - uint16_t n_ibv = 0; - - if (mlx5_check_mprq_support(dev) < 0) - return 0; - /* All the configured queues should be enabled. */ - for (i = 0; i < priv->rxqs_n; ++i) { - struct mlx5_rxq_data *rxq = (*priv->rxqs)[i]; - struct mlx5_rxq_ctrl *rxq_ctrl = container_of - (rxq, struct mlx5_rxq_ctrl, rxq); - - if (rxq == NULL || rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD) - continue; - n_ibv++; - if (mlx5_rxq_mprq_enabled(rxq)) - ++n; - } - /* Multi-Packet RQ can't be partially configured. */ - MLX5_ASSERT(n == 0 || n == n_ibv); - return n == n_ibv; -} - /** * Calculate the number of CQEs in CQ for the Rx queue. * diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h index 7989a50403..1e9345af61 100644 --- a/drivers/net/mlx5/mlx5_rxtx.h +++ b/drivers/net/mlx5/mlx5_rxtx.h @@ -311,9 +311,6 @@ struct mlx5_txq_ctrl { extern uint8_t rss_hash_default_key[]; -int mlx5_check_mprq_support(struct rte_eth_dev *dev); -int mlx5_rxq_mprq_enabled(struct mlx5_rxq_data *rxq); -int mlx5_mprq_enabled(struct rte_eth_dev *dev); unsigned int mlx5_rxq_cqe_num(struct mlx5_rxq_data *rxq_data); int mlx5_mprq_free_mp(struct rte_eth_dev *dev); int mlx5_mprq_alloc_mp(struct rte_eth_dev *dev); @@ -920,4 +917,74 @@ mprq_buf_to_pkt(struct mlx5_rxq_data *rxq, struct rte_mbuf *pkt, uint32_t len, return MLX5_RXQ_CODE_EXIT; } +/** + * Check whether Multi-Packet RQ can be enabled for the device. + * + * @param dev + * Pointer to Ethernet device. + * + * @return + * 1 if supported, negative errno value if not. + */ +static __rte_always_inline int +mlx5_check_mprq_support(struct rte_eth_dev *dev) +{ + struct mlx5_priv *priv = dev->data->dev_private; + + if (priv->config.mprq.enabled && + priv->rxqs_n >= priv->config.mprq.min_rxqs_num) + return 1; + return -ENOTSUP; +} + +/** + * Check whether Multi-Packet RQ is enabled for the Rx queue. + * + * @param rxq + * Pointer to receive queue structure. + * + * @return + * 0 if disabled, otherwise enabled. + */ +static __rte_always_inline int +mlx5_rxq_mprq_enabled(struct mlx5_rxq_data *rxq) +{ + return rxq->strd_num_n > 0; +} + +/** + * Check whether Multi-Packet RQ is enabled for the device. + * + * @param dev + * Pointer to Ethernet device. + * + * @return + * 0 if disabled, otherwise enabled. + */ +static __rte_always_inline int +mlx5_mprq_enabled(struct rte_eth_dev *dev) +{ + struct mlx5_priv *priv = dev->data->dev_private; + uint32_t i; + uint16_t n = 0; + uint16_t n_ibv = 0; + + if (mlx5_check_mprq_support(dev) < 0) + return 0; + /* All the configured queues should be enabled. */ + for (i = 0; i < priv->rxqs_n; ++i) { + struct mlx5_rxq_data *rxq = (*priv->rxqs)[i]; + struct mlx5_rxq_ctrl *rxq_ctrl = container_of + (rxq, struct mlx5_rxq_ctrl, rxq); + + if (rxq == NULL || rxq_ctrl->type != MLX5_RXQ_TYPE_STANDARD) + continue; + n_ibv++; + if (mlx5_rxq_mprq_enabled(rxq)) + ++n; + } + /* Multi-Packet RQ can't be partially configured. */ + MLX5_ASSERT(n == 0 || n == n_ibv); + return n == n_ibv; +} #endif /* RTE_PMD_MLX5_RXTX_H_ */ From patchwork Mon Dec 28 09:54:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85788 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1C369A09FF; Mon, 28 Dec 2020 11:01:06 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 3B4D3CB06; Mon, 28 Dec 2020 10:55:25 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 8D8AFCA38 for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:44 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDY012171; Mon, 28 Dec 2020 11:54:44 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:11 +0200 Message-Id: <20201228095436.14996-8-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 07/32] net/mlx5: do not define static_assert in Windows X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk In Linux 'static_assert' is defined in file mlx5_defs.h: #ifndef HAVE_STATIC_ASSERT #define static_assert _Static_assert #endif The same definition can originate from Linux file /usr/include/assert.h. In Windows static_assert is used while _Static_assert is unknown. Therefore update the definition condition to be: #if !defined(HAVE_STATIC_ASSERT) && !defined(RTE_EXEC_ENV_WINDOWS) #define static_assert _Static_assert #endif Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5_defs.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/net/mlx5/mlx5_defs.h b/drivers/net/mlx5/mlx5_defs.h index aa55db3750..85a0979653 100644 --- a/drivers/net/mlx5/mlx5_defs.h +++ b/drivers/net/mlx5/mlx5_defs.h @@ -199,8 +199,11 @@ /* Maximum number of shared actions supported by rte_flow */ #define MLX5_MAX_SHARED_ACTIONS 2 -/* Definition of static_assert found in /usr/include/assert.h */ -#ifndef HAVE_STATIC_ASSERT +/* + * Linux definition of static_assert is found in /usr/include/assert.h. + * Windows does not require a redefinition. + */ +#if !defined(HAVE_STATIC_ASSERT) && !defined(RTE_EXEC_ENV_WINDOWS) #define static_assert _Static_assert #endif From patchwork Mon Dec 28 09:54:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85796 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 108D0A09FF; Mon, 28 Dec 2020 11:03:52 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 7F43ECC19; Mon, 28 Dec 2020 10:55:44 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id D27D5CA5A for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:44 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDZ012171; Mon, 28 Dec 2020 11:54:44 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:12 +0200 Message-Id: <20201228095436.14996-9-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 08/32] net/mlx5: move static_assert calls to global scope X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk Some Windows compilers consider static_assert() as calls to another function rather than a compiler directive which allows checking type information at compile time. This only occurs if the static_assert call appears inside another function scope. To solve it move the static_assert calls to global scope in the files where they are used. Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5_rxtx.c | 98 ++++++++++++++++++++++---------------------- drivers/net/mlx5/mlx5_txpp.c | 5 ++- 2 files changed, 53 insertions(+), 50 deletions(-) diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c index d12d746c2f..65a1f997e9 100644 --- a/drivers/net/mlx5/mlx5_rxtx.c +++ b/drivers/net/mlx5/mlx5_rxtx.c @@ -79,6 +79,56 @@ static uint16_t mlx5_tx_burst_##func(void *txq, \ #define MLX5_TXOFF_INFO(func, olx) {mlx5_tx_burst_##func, olx}, +/* static asserts */ +static_assert(MLX5_CQE_STATUS_HW_OWN < 0, "Must be negative value"); +static_assert(MLX5_CQE_STATUS_SW_OWN < 0, "Must be negative value"); +static_assert(MLX5_ESEG_MIN_INLINE_SIZE == + (sizeof(uint16_t) + + sizeof(rte_v128u32_t)), + "invalid Ethernet Segment data size"); +static_assert(MLX5_ESEG_MIN_INLINE_SIZE == + (sizeof(uint16_t) + + sizeof(struct rte_vlan_hdr) + + 2 * RTE_ETHER_ADDR_LEN), + "invalid Ethernet Segment data size"); +static_assert(MLX5_ESEG_MIN_INLINE_SIZE == + (sizeof(uint16_t) + + sizeof(rte_v128u32_t)), + "invalid Ethernet Segment data size"); +static_assert(MLX5_ESEG_MIN_INLINE_SIZE == + (sizeof(uint16_t) + + sizeof(struct rte_vlan_hdr) + + 2 * RTE_ETHER_ADDR_LEN), + "invalid Ethernet Segment data size"); +static_assert(MLX5_ESEG_MIN_INLINE_SIZE == + (sizeof(uint16_t) + + sizeof(rte_v128u32_t)), + "invalid Ethernet Segment data size"); +static_assert(MLX5_ESEG_MIN_INLINE_SIZE == + (sizeof(uint16_t) + + sizeof(struct rte_vlan_hdr) + + 2 * RTE_ETHER_ADDR_LEN), + "invalid Ethernet Segment data size"); +static_assert(MLX5_DSEG_MIN_INLINE_SIZE == + (2 * RTE_ETHER_ADDR_LEN), + "invalid Data Segment data size"); +static_assert(MLX5_EMPW_MIN_PACKETS >= 2, "invalid min size"); +static_assert(MLX5_EMPW_MIN_PACKETS >= 2, "invalid min size"); +static_assert((sizeof(struct rte_vlan_hdr) + + sizeof(struct rte_ether_hdr)) == + MLX5_ESEG_MIN_INLINE_SIZE, + "invalid min inline data size"); +static_assert(MLX5_WQE_SIZE_MAX / MLX5_WSEG_SIZE <= + MLX5_DSEG_MAX, "invalid WQE max size"); +static_assert(MLX5_WQE_CSEG_SIZE == MLX5_WSEG_SIZE, + "invalid WQE Control Segment size"); +static_assert(MLX5_WQE_ESEG_SIZE == MLX5_WSEG_SIZE, + "invalid WQE Ethernet Segment size"); +static_assert(MLX5_WQE_DSEG_SIZE == MLX5_WSEG_SIZE, + "invalid WQE Data Segment size"); +static_assert(MLX5_WQE_SIZE == 4 * MLX5_WSEG_SIZE, + "invalid WQE size"); + static __rte_always_inline uint32_t rxq_cq_to_pkt_type(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cqe, volatile struct mlx5_mini_cqe8 *mcqe); @@ -2070,8 +2120,6 @@ mlx5_tx_handle_completion(struct mlx5_txq_data *__rte_restrict txq, bool ring_doorbell = false; int ret; - static_assert(MLX5_CQE_STATUS_HW_OWN < 0, "Must be negative value"); - static_assert(MLX5_CQE_STATUS_SW_OWN < 0, "Must be negative value"); do { volatile struct mlx5_cqe *cqe; @@ -2381,15 +2429,6 @@ mlx5_tx_eseg_dmin(struct mlx5_txq_data *__rte_restrict txq __rte_unused, es->metadata = MLX5_TXOFF_CONFIG(METADATA) ? loc->mbuf->ol_flags & PKT_TX_DYNF_METADATA ? *RTE_FLOW_DYNF_METADATA(loc->mbuf) : 0 : 0; - static_assert(MLX5_ESEG_MIN_INLINE_SIZE == - (sizeof(uint16_t) + - sizeof(rte_v128u32_t)), - "invalid Ethernet Segment data size"); - static_assert(MLX5_ESEG_MIN_INLINE_SIZE == - (sizeof(uint16_t) + - sizeof(struct rte_vlan_hdr) + - 2 * RTE_ETHER_ADDR_LEN), - "invalid Ethernet Segment data size"); psrc = rte_pktmbuf_mtod(loc->mbuf, uint8_t *); es->inline_hdr_sz = RTE_BE16(MLX5_ESEG_MIN_INLINE_SIZE); es->inline_data = *(unaligned_uint16_t *)psrc; @@ -2474,15 +2513,6 @@ mlx5_tx_eseg_data(struct mlx5_txq_data *__rte_restrict txq, es->metadata = MLX5_TXOFF_CONFIG(METADATA) ? loc->mbuf->ol_flags & PKT_TX_DYNF_METADATA ? *RTE_FLOW_DYNF_METADATA(loc->mbuf) : 0 : 0; - static_assert(MLX5_ESEG_MIN_INLINE_SIZE == - (sizeof(uint16_t) + - sizeof(rte_v128u32_t)), - "invalid Ethernet Segment data size"); - static_assert(MLX5_ESEG_MIN_INLINE_SIZE == - (sizeof(uint16_t) + - sizeof(struct rte_vlan_hdr) + - 2 * RTE_ETHER_ADDR_LEN), - "invalid Ethernet Segment data size"); psrc = rte_pktmbuf_mtod(loc->mbuf, uint8_t *); es->inline_hdr_sz = rte_cpu_to_be_16(inlen); es->inline_data = *(unaligned_uint16_t *)psrc; @@ -2697,15 +2727,6 @@ mlx5_tx_eseg_mdat(struct mlx5_txq_data *__rte_restrict txq, es->metadata = MLX5_TXOFF_CONFIG(METADATA) ? loc->mbuf->ol_flags & PKT_TX_DYNF_METADATA ? *RTE_FLOW_DYNF_METADATA(loc->mbuf) : 0 : 0; - static_assert(MLX5_ESEG_MIN_INLINE_SIZE == - (sizeof(uint16_t) + - sizeof(rte_v128u32_t)), - "invalid Ethernet Segment data size"); - static_assert(MLX5_ESEG_MIN_INLINE_SIZE == - (sizeof(uint16_t) + - sizeof(struct rte_vlan_hdr) + - 2 * RTE_ETHER_ADDR_LEN), - "invalid Ethernet Segment data size"); MLX5_ASSERT(inlen >= MLX5_ESEG_MIN_INLINE_SIZE); pdst = (uint8_t *)&es->inline_data; if (MLX5_TXOFF_CONFIG(VLAN) && vlan) { @@ -2952,9 +2973,6 @@ mlx5_tx_dseg_vlan(struct mlx5_txq_data *__rte_restrict txq, uint8_t *pdst; MLX5_ASSERT(len > MLX5_ESEG_MIN_INLINE_SIZE); - static_assert(MLX5_DSEG_MIN_INLINE_SIZE == - (2 * RTE_ETHER_ADDR_LEN), - "invalid Data Segment data size"); if (!MLX5_TXOFF_CONFIG(MPW)) { /* Store the descriptor byte counter for eMPW sessions. */ dseg->bcount = rte_cpu_to_be_32 @@ -4070,7 +4088,6 @@ mlx5_tx_burst_empw_simple(struct mlx5_txq_data *__rte_restrict txq, MLX5_ASSERT(MLX5_TXOFF_CONFIG(EMPW)); MLX5_ASSERT(loc->elts_free && loc->wqe_free); MLX5_ASSERT(pkts_n > loc->pkts_sent); - static_assert(MLX5_EMPW_MIN_PACKETS >= 2, "invalid min size"); pkts += loc->pkts_sent + 1; pkts_n -= loc->pkts_sent; for (;;) { @@ -4247,7 +4264,6 @@ mlx5_tx_burst_empw_inline(struct mlx5_txq_data *__rte_restrict txq, MLX5_ASSERT(MLX5_TXOFF_CONFIG(EMPW)); MLX5_ASSERT(loc->elts_free && loc->wqe_free); MLX5_ASSERT(pkts_n > loc->pkts_sent); - static_assert(MLX5_EMPW_MIN_PACKETS >= 2, "invalid min size"); pkts += loc->pkts_sent + 1; pkts_n -= loc->pkts_sent; for (;;) { @@ -4561,10 +4577,6 @@ mlx5_tx_burst_single_send(struct mlx5_txq_data *__rte_restrict txq, loc->mbuf->ol_flags & PKT_TX_VLAN_PKT) { vlan = sizeof(struct rte_vlan_hdr); inlen += vlan; - static_assert((sizeof(struct rte_vlan_hdr) + - sizeof(struct rte_ether_hdr)) == - MLX5_ESEG_MIN_INLINE_SIZE, - "invalid min inline data size"); } /* * If inlining is enabled at configuration time @@ -5567,16 +5579,6 @@ mlx5_select_tx_function(struct rte_eth_dev *dev) uint64_t tx_offloads = dev->data->dev_conf.txmode.offloads; unsigned int diff = 0, olx = 0, i, m; - static_assert(MLX5_WQE_SIZE_MAX / MLX5_WSEG_SIZE <= - MLX5_DSEG_MAX, "invalid WQE max size"); - static_assert(MLX5_WQE_CSEG_SIZE == MLX5_WSEG_SIZE, - "invalid WQE Control Segment size"); - static_assert(MLX5_WQE_ESEG_SIZE == MLX5_WSEG_SIZE, - "invalid WQE Ethernet Segment size"); - static_assert(MLX5_WQE_DSEG_SIZE == MLX5_WSEG_SIZE, - "invalid WQE Data Segment size"); - static_assert(MLX5_WQE_SIZE == 4 * MLX5_WSEG_SIZE, - "invalid WQE size"); MLX5_ASSERT(priv); if (tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS) { /* We should support Multi-Segment Packets. */ diff --git a/drivers/net/mlx5/mlx5_txpp.c b/drivers/net/mlx5/mlx5_txpp.c index a1ec294942..d61e43e55d 100644 --- a/drivers/net/mlx5/mlx5_txpp.c +++ b/drivers/net/mlx5/mlx5_txpp.c @@ -18,6 +18,9 @@ #include "mlx5_rxtx.h" #include "mlx5_common_os.h" +static_assert(sizeof(struct mlx5_cqe_ts) == sizeof(rte_int128_t), + "Wrong timestamp CQE part size"); + static const char * const mlx5_txpp_stat_names[] = { "tx_pp_missed_interrupt_errors", /* Missed service interrupt. */ "tx_pp_rearm_queue_errors", /* Rearm Queue errors. */ @@ -741,8 +744,6 @@ mlx5_txpp_update_timestamp(struct mlx5_dev_ctx_shared *sh) uint64_t ts; uint16_t ci; - static_assert(sizeof(struct mlx5_cqe_ts) == sizeof(rte_int128_t), - "Wrong timestamp CQE part size"); mlx5_atomic_read_cqe((rte_int128_t *)&cqe->timestamp, &to.u128); if (to.cts.op_own >> 4) { DRV_LOG(DEBUG, "Clock Queue error sync lost."); From patchwork Mon Dec 28 09:54:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85781 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id E93F8A09FF; Mon, 28 Dec 2020 10:58:38 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 006C4CABB; Mon, 28 Dec 2020 10:55:13 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 58729CA3C for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:44 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDa012171; Mon, 28 Dec 2020 11:54:44 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:13 +0200 Message-Id: <20201228095436.14996-10-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 09/32] net/mlx5: wrap glue alloc/dealloc PD with OS calls X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk Wrap glue calls alloc_pd() and dealloc_pd() with generic OS calls. In Linux - protection domain allocations are implemented by Verbs glue API while in Windows it is by DevX API. Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/common/mlx5/linux/mlx5_common_os.h | 11 +++++++++++ drivers/net/mlx5/mlx5.c | 6 +++--- 2 files changed, 14 insertions(+), 3 deletions(-) diff --git a/drivers/common/mlx5/linux/mlx5_common_os.h b/drivers/common/mlx5/linux/mlx5_common_os.h index 3420937859..c9f8d7cbc1 100644 --- a/drivers/common/mlx5/linux/mlx5_common_os.h +++ b/drivers/common/mlx5/linux/mlx5_common_os.h @@ -201,4 +201,15 @@ mlx5_os_get_devx_uar_page_id(void *uar) #endif } +static inline void * +mlx5_os_alloc_pd(void *ctx) +{ + return mlx5_glue->alloc_pd(ctx); +} + +static inline int +mlx5_os_dealloc_pd(void *pd) +{ + return mlx5_glue->dealloc_pd(pd); +} #endif /* RTE_PMD_MLX5_COMMON_OS_H_ */ diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index 8e9df6abcf..7d1b4fbdc0 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -932,7 +932,7 @@ mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn, sh->port[i].ih_port_id = RTE_MAX_ETHPORTS; sh->port[i].devx_ih_port_id = RTE_MAX_ETHPORTS; } - sh->pd = mlx5_glue->alloc_pd(sh->ctx); + sh->pd = mlx5_os_alloc_pd(sh->ctx); if (sh->pd == NULL) { DRV_LOG(ERR, "PD allocation failure"); err = ENOMEM; @@ -1032,7 +1032,7 @@ mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn, if (sh->tx_uar) mlx5_glue->devx_free_uar(sh->tx_uar); if (sh->pd) - claim_zero(mlx5_glue->dealloc_pd(sh->pd)); + claim_zero(mlx5_os_dealloc_pd(sh->pd)); if (sh->ctx) claim_zero(mlx5_glue->close_device(sh->ctx)); mlx5_free(sh); @@ -1100,7 +1100,7 @@ mlx5_free_shared_dev_ctx(struct mlx5_dev_ctx_shared *sh) sh->tx_uar = NULL; } if (sh->pd) - claim_zero(mlx5_glue->dealloc_pd(sh->pd)); + claim_zero(mlx5_os_dealloc_pd(sh->pd)); if (sh->tis) claim_zero(mlx5_devx_cmd_destroy(sh->tis)); if (sh->td) From patchwork Mon Dec 28 09:54:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85783 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 79DF6A09FF; Mon, 28 Dec 2020 10:59:15 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 66F41CACA; Mon, 28 Dec 2020 10:55:17 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 67900CA3E for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:44 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDb012171; Mon, 28 Dec 2020 11:54:44 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:14 +0200 Message-Id: <20201228095436.14996-11-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 10/32] net/mlx5: wrap glue reg/dereg UMEM with OS calls X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Wrap glue calls for UMEM registration and deregistration with generic OS calls since each OS (Linux or Windows) has a different glue API parameters. Signed-off-by: Tal Shnaiderman Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/common/mlx5/linux/mlx5_common_os.h | 12 ++++++++++++ drivers/common/mlx5/mlx5_common.c | 4 ++-- drivers/net/mlx5/mlx5.c | 2 +- drivers/net/mlx5/mlx5_devx.c | 16 ++++++++-------- drivers/net/mlx5/mlx5_flow.c | 4 ++-- drivers/net/mlx5/mlx5_txpp.c | 12 ++++++------ 6 files changed, 31 insertions(+), 19 deletions(-) diff --git a/drivers/common/mlx5/linux/mlx5_common_os.h b/drivers/common/mlx5/linux/mlx5_common_os.h index c9f8d7cbc1..f8b215cc29 100644 --- a/drivers/common/mlx5/linux/mlx5_common_os.h +++ b/drivers/common/mlx5/linux/mlx5_common_os.h @@ -212,4 +212,16 @@ mlx5_os_dealloc_pd(void *pd) { return mlx5_glue->dealloc_pd(pd); } + +static inline void * +mlx5_os_umem_reg(void *ctx, void *addr, size_t size, uint32_t access) +{ + return mlx5_glue->devx_umem_reg(ctx, addr, size, access); +} + +static inline int +mlx5_os_umem_dereg(void *pumem) +{ + return mlx5_glue->devx_umem_dereg(pumem); +} #endif /* RTE_PMD_MLX5_COMMON_OS_H_ */ diff --git a/drivers/common/mlx5/mlx5_common.c b/drivers/common/mlx5/mlx5_common.c index 044513223c..a00ffcb833 100644 --- a/drivers/common/mlx5/mlx5_common.c +++ b/drivers/common/mlx5/mlx5_common.c @@ -148,7 +148,7 @@ mlx5_alloc_dbr_page(void *ctx) return NULL; } /* Register allocated memory. */ - page->umem = mlx5_glue->devx_umem_reg(ctx, page->dbrs, + page->umem = mlx5_os_umem_reg(ctx, page->dbrs, MLX5_DBR_PAGE_SIZE, 0); if (!page->umem) { DRV_LOG(ERR, "cannot umem reg dbr page"); @@ -232,7 +232,7 @@ mlx5_release_dbr(struct mlx5_dbr_page_list *head, uint32_t umem_id, /* Page not used, free it and remove from list. */ LIST_REMOVE(page, next); if (page->umem) - ret = -mlx5_glue->devx_umem_dereg(page->umem); + ret = -mlx5_os_umem_dereg(page->umem); mlx5_free(page); } else { /* Mark in bitmap that this door-bell is not in use. */ diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index 7d1b4fbdc0..84123f8e3d 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -482,7 +482,7 @@ mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng) LIST_REMOVE(mng, next); claim_zero(mlx5_devx_cmd_destroy(mng->dm)); - claim_zero(mlx5_glue->devx_umem_dereg(mng->umem)); + claim_zero(mlx5_os_umem_dereg(mng->umem)); mlx5_free(mem); } diff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c index de9b204075..235fd5798d 100644 --- a/drivers/net/mlx5/mlx5_devx.c +++ b/drivers/net/mlx5/mlx5_devx.c @@ -155,7 +155,7 @@ mlx5_rxq_release_devx_rq_resources(struct mlx5_rxq_ctrl *rxq_ctrl) struct mlx5_devx_dbr_page *dbr_page = rxq_ctrl->rq_dbrec_page; if (rxq_ctrl->wq_umem) { - mlx5_glue->devx_umem_dereg(rxq_ctrl->wq_umem); + mlx5_os_umem_dereg(rxq_ctrl->wq_umem); rxq_ctrl->wq_umem = NULL; } if (rxq_ctrl->rxq.wqes) { @@ -182,7 +182,7 @@ mlx5_rxq_release_devx_cq_resources(struct mlx5_rxq_ctrl *rxq_ctrl) struct mlx5_devx_dbr_page *dbr_page = rxq_ctrl->cq_dbrec_page; if (rxq_ctrl->cq_umem) { - mlx5_glue->devx_umem_dereg(rxq_ctrl->cq_umem); + mlx5_os_umem_dereg(rxq_ctrl->cq_umem); rxq_ctrl->cq_umem = NULL; } if (rxq_ctrl->rxq.cqes) { @@ -375,7 +375,7 @@ mlx5_rxq_create_devx_rq_resources(struct rte_eth_dev *dev, uint16_t idx) if (!buf) return NULL; rxq_data->wqes = buf; - rxq_ctrl->wq_umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, + rxq_ctrl->wq_umem = mlx5_os_umem_reg(priv->sh->ctx, buf, wq_size, 0); if (!rxq_ctrl->wq_umem) goto error; @@ -497,7 +497,7 @@ mlx5_rxq_create_devx_cq_resources(struct rte_eth_dev *dev, uint16_t idx) goto error; } rxq_data->cqes = (volatile struct mlx5_cqe (*)[])(uintptr_t)buf; - rxq_ctrl->cq_umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, buf, + rxq_ctrl->cq_umem = mlx5_os_umem_reg(priv->sh->ctx, buf, cq_size, IBV_ACCESS_LOCAL_WRITE); if (!rxq_ctrl->cq_umem) { @@ -1127,7 +1127,7 @@ mlx5_txq_release_devx_sq_resources(struct mlx5_txq_obj *txq_obj) txq_obj->sq_devx = NULL; } if (txq_obj->sq_umem) { - claim_zero(mlx5_glue->devx_umem_dereg(txq_obj->sq_umem)); + claim_zero(mlx5_os_umem_dereg(txq_obj->sq_umem)); txq_obj->sq_umem = NULL; } if (txq_obj->sq_buf) { @@ -1155,7 +1155,7 @@ mlx5_txq_release_devx_cq_resources(struct mlx5_txq_obj *txq_obj) if (txq_obj->cq_devx) claim_zero(mlx5_devx_cmd_destroy(txq_obj->cq_devx)); if (txq_obj->cq_umem) - claim_zero(mlx5_glue->devx_umem_dereg(txq_obj->cq_umem)); + claim_zero(mlx5_os_umem_dereg(txq_obj->cq_umem)); if (txq_obj->cq_buf) mlx5_free(txq_obj->cq_buf); if (txq_obj->cq_dbrec_page) @@ -1243,7 +1243,7 @@ mlx5_txq_create_devx_cq_resources(struct rte_eth_dev *dev, uint16_t idx) return 0; } /* Register allocated buffer in user space with DevX. */ - txq_obj->cq_umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, + txq_obj->cq_umem = mlx5_os_umem_reg(priv->sh->ctx, (void *)txq_obj->cq_buf, cqe_n * sizeof(struct mlx5_cqe), IBV_ACCESS_LOCAL_WRITE); @@ -1342,7 +1342,7 @@ mlx5_txq_create_devx_sq_resources(struct rte_eth_dev *dev, uint16_t idx) goto error; } /* Register allocated buffer in user space with DevX. */ - txq_obj->sq_umem = mlx5_glue->devx_umem_reg + txq_obj->sq_umem = mlx5_os_umem_reg (priv->sh->ctx, (void *)txq_obj->sq_buf, wqe_n * sizeof(struct mlx5_wqe), diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index bf86aaaa39..66491bbf78 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -6446,7 +6446,7 @@ mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh) } mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1; size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n; - mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size, + mem_mng->umem = mlx5_os_umem_reg(sh->ctx, mem, size, IBV_ACCESS_LOCAL_WRITE); if (!mem_mng->umem) { rte_errno = errno; @@ -6465,7 +6465,7 @@ mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh) mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read; mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr); if (!mem_mng->dm) { - mlx5_glue->devx_umem_dereg(mem_mng->umem); + mlx5_os_umem_dereg(mem_mng->umem); rte_errno = errno; mlx5_free(mem); return -rte_errno; diff --git a/drivers/net/mlx5/mlx5_txpp.c b/drivers/net/mlx5/mlx5_txpp.c index d61e43e55d..749529c410 100644 --- a/drivers/net/mlx5/mlx5_txpp.c +++ b/drivers/net/mlx5/mlx5_txpp.c @@ -131,13 +131,13 @@ mlx5_txpp_destroy_send_queue(struct mlx5_txpp_wq *wq) if (wq->sq) claim_zero(mlx5_devx_cmd_destroy(wq->sq)); if (wq->sq_umem) - claim_zero(mlx5_glue->devx_umem_dereg(wq->sq_umem)); + claim_zero(mlx5_os_umem_dereg(wq->sq_umem)); if (wq->sq_buf) mlx5_free((void *)(uintptr_t)wq->sq_buf); if (wq->cq) claim_zero(mlx5_devx_cmd_destroy(wq->cq)); if (wq->cq_umem) - claim_zero(mlx5_glue->devx_umem_dereg(wq->cq_umem)); + claim_zero(mlx5_os_umem_dereg(wq->cq_umem)); if (wq->cq_buf) mlx5_free((void *)(uintptr_t)wq->cq_buf); memset(wq, 0, sizeof(*wq)); @@ -268,7 +268,7 @@ mlx5_txpp_create_rearm_queue(struct mlx5_dev_ctx_shared *sh) return -ENOMEM; } /* Register allocated buffer in user space with DevX. */ - wq->cq_umem = mlx5_glue->devx_umem_reg(sh->ctx, + wq->cq_umem = mlx5_os_umem_reg(sh->ctx, (void *)(uintptr_t)wq->cq_buf, umem_size, IBV_ACCESS_LOCAL_WRITE); @@ -318,7 +318,7 @@ mlx5_txpp_create_rearm_queue(struct mlx5_dev_ctx_shared *sh) goto error; } /* Register allocated buffer in user space with DevX. */ - wq->sq_umem = mlx5_glue->devx_umem_reg(sh->ctx, + wq->sq_umem = mlx5_os_umem_reg(sh->ctx, (void *)(uintptr_t)wq->sq_buf, umem_size, IBV_ACCESS_LOCAL_WRITE); @@ -506,7 +506,7 @@ mlx5_txpp_create_clock_queue(struct mlx5_dev_ctx_shared *sh) return -ENOMEM; } /* Register allocated buffer in user space with DevX. */ - wq->cq_umem = mlx5_glue->devx_umem_reg(sh->ctx, + wq->cq_umem = mlx5_os_umem_reg(sh->ctx, (void *)(uintptr_t)wq->cq_buf, umem_size, IBV_ACCESS_LOCAL_WRITE); @@ -562,7 +562,7 @@ mlx5_txpp_create_clock_queue(struct mlx5_dev_ctx_shared *sh) goto error; } /* Register allocated buffer in user space with DevX. */ - wq->sq_umem = mlx5_glue->devx_umem_reg(sh->ctx, + wq->sq_umem = mlx5_os_umem_reg(sh->ctx, (void *)(uintptr_t)wq->sq_buf, umem_size, IBV_ACCESS_LOCAL_WRITE); From patchwork Mon Dec 28 09:54:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85778 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id F102DA09FF; Mon, 28 Dec 2020 10:57:36 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 7297BCAA2; Mon, 28 Dec 2020 10:55:08 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 33B9BCA48 for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:45 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDc012171; Mon, 28 Dec 2020 11:54:44 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com, stable@dpdk.org Date: Mon, 28 Dec 2020 11:54:15 +0200 Message-Id: <20201228095436.14996-12-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 11/32] net/mlx5: fix adding destroy flow action wrapper X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk Glue function destroy_flow_action() was wrapped by OS specific operation mlx5_flow_os_destroy_flow_action(). It was skipped in file mlx5.c. Fixes: b293fbf9672b ("net/mlx5: add OS specific flow actions operations") Cc: stable@dpdk.org Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5.c | 7 ++++--- drivers/net/mlx5/mlx5_flow_dv.c | 6 +++--- 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index 84123f8e3d..60301d3244 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -38,6 +38,7 @@ #include "mlx5_autoconf.h" #include "mlx5_mr.h" #include "mlx5_flow.h" +#include "mlx5_flow_os.h" #include "rte_pmd_mlx5.h" /* Device parameter to enable RX completion queue compression. */ @@ -415,8 +416,8 @@ mlx5_flow_aso_age_mng_close(struct mlx5_dev_ctx_shared *sh) for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) if (pool->actions[j].dr_action) claim_zero - (mlx5_glue->destroy_flow_action - (pool->actions[j].dr_action)); + (mlx5_flow_os_destroy_flow_action + (pool->actions[j].dr_action)); mlx5_free(pool); } mlx5_free(sh->aso_age_mng->pools); @@ -523,7 +524,7 @@ mlx5_flow_counters_mng_close(struct mlx5_dev_ctx_shared *sh) if (cnt->action) claim_zero - (mlx5_glue->destroy_flow_action + (mlx5_flow_os_destroy_flow_action (cnt->action)); if (fallback && MLX5_POOL_GET_CNT (pool, j)->dcs_when_free) diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index c31737652c..78b5a6b338 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -11117,11 +11117,11 @@ flow_dv_sample_remove_cb(struct mlx5_cache_list *list __rte_unused, struct mlx5_priv *priv = dev->data->dev_private; if (cache_resource->verbs_action) - claim_zero(mlx5_glue->destroy_flow_action + claim_zero(mlx5_flow_os_destroy_flow_action (cache_resource->verbs_action)); if (cache_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) { if (cache_resource->default_miss) - claim_zero(mlx5_glue->destroy_flow_action + claim_zero(mlx5_flow_os_destroy_flow_action (cache_resource->default_miss)); } if (cache_resource->normal_path_tbl) @@ -11174,7 +11174,7 @@ flow_dv_dest_array_remove_cb(struct mlx5_cache_list *list __rte_unused, MLX5_ASSERT(cache_resource->action); if (cache_resource->action) - claim_zero(mlx5_glue->destroy_flow_action + claim_zero(mlx5_flow_os_destroy_flow_action (cache_resource->action)); for (; i < cache_resource->num_of_dest; i++) flow_dv_sample_sub_actions_release(dev, From patchwork Mon Dec 28 09:54:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85774 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id E014AA09FF; Mon, 28 Dec 2020 10:56:15 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 72DC3CA3C; Mon, 28 Dec 2020 10:55:01 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 9366DCA36 for ; Mon, 28 Dec 2020 10:54:50 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:45 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDd012171; Mon, 28 Dec 2020 11:54:44 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:16 +0200 Message-Id: <20201228095436.14996-13-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 12/32] common/mlx5: add definition HAVE_INFINIBAND_VERBS_H X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk Add a Verbs file presence indication. Under Linux it is required that file infiniband/verbs.h is installed for building DPDK. Other operating systems (e.g. Windows) ignore Verbs completely. This commit adds definition HAVE_INFINIBAND_VERBS_H (file mlx5_autoconf.h) to indicate whether DPDK compiles with Verbs or not. Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/common/mlx5/linux/meson.build | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/common/mlx5/linux/meson.build b/drivers/common/mlx5/linux/meson.build index 63b78e4bce..580419e6d9 100644 --- a/drivers/common/mlx5/linux/meson.build +++ b/drivers/common/mlx5/linux/meson.build @@ -181,8 +181,10 @@ has_sym_args = [ [ 'HAVE_MLX5_DR_CREATE_ACTION_DEST_ARRAY', 'infiniband/mlx5dv.h', 'mlx5dv_dr_action_create_dest_array'], [ 'HAVE_DEVLINK', 'linux/devlink.h', 'DEVLINK_GENL_NAME' ], - [ 'HAVE_MLX5_DR_CREATE_ACTION_ASO', 'infiniband/mlx5dv.h', - 'mlx5dv_dr_action_create_aso' ], + [ 'HAVE_MLX5_DR_CREATE_ACTION_ASO', 'infiniband/mlx5dv.h', + 'mlx5dv_dr_action_create_aso' ], + [ 'HAVE_INFINIBAND_VERBS_H', 'infiniband/verbs.h', + 'INFINIBAND_VERBS_H' ], ] config = configuration_data() foreach arg:has_sym_args From patchwork Mon Dec 28 09:54:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85779 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id E7046A09FF; Mon, 28 Dec 2020 10:57:52 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 06166CAAA; Mon, 28 Dec 2020 10:55:10 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 29D73CA45 for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:45 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDe012171; Mon, 28 Dec 2020 11:54:44 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:17 +0200 Message-Id: <20201228095436.14996-14-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 13/32] common/mlx5/linux: handle memory allocations with alignment X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk mlx5_malloc() API has an alignment parameter for system memory allocations. malloc() is called for non-aligned allocations and posix_memalign() is called for aligned allocations. When calling mlx5_free() there is no distinction whether the memory was originally allocated with or without alignment. Freeing a memory may be handled differently by operating systems. Therefore this commit wraps these APIs with OS specific calls: mlx5_os_malloc(), mlx5_os_free(). Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/common/mlx5/linux/mlx5_common_os.h | 38 ++++++++++++++++++++++++++++++ drivers/common/mlx5/mlx5_malloc.c | 14 +++++------ 2 files changed, 44 insertions(+), 8 deletions(-) diff --git a/drivers/common/mlx5/linux/mlx5_common_os.h b/drivers/common/mlx5/linux/mlx5_common_os.h index f8b215cc29..bd44ecb7d6 100644 --- a/drivers/common/mlx5/linux/mlx5_common_os.h +++ b/drivers/common/mlx5/linux/mlx5_common_os.h @@ -6,6 +6,7 @@ #define RTE_PMD_MLX5_COMMON_OS_H_ #include +#include #include #include @@ -16,6 +17,7 @@ #include "mlx5_autoconf.h" #include "mlx5_glue.h" +#include "mlx5_malloc.h" /** * Get device name. Given an ibv_device pointer - return a @@ -224,4 +226,40 @@ mlx5_os_umem_dereg(void *pumem) { return mlx5_glue->devx_umem_dereg(pumem); } + +/** + * Memory allocation optionally with alignment. + * + * @param[in] align + * Alignment size (may be zero) + * @param[in] size + * Size in bytes to allocate + * + * @return + * Valid pointer to allocated memory, NULL in case of failure + */ +static inline void * +mlx5_os_malloc(size_t align, size_t size) +{ + void *buf; + + if (posix_memalign(&buf, align, size)) + return NULL; + return buf; +} + +/** + * This API de-allocates a memory that originally could have been + * allocated aligned or non-aligned. In Linux it is a wrapper + * around free(). + * + * @param[in] addr + * Pointer to address to free + * + */ +static inline void +mlx5_os_free(void *addr) +{ + free(addr); +} #endif /* RTE_PMD_MLX5_COMMON_OS_H_ */ diff --git a/drivers/common/mlx5/mlx5_malloc.c b/drivers/common/mlx5/mlx5_malloc.c index 5a3267f730..9d30cedbaa 100644 --- a/drivers/common/mlx5/mlx5_malloc.c +++ b/drivers/common/mlx5/mlx5_malloc.c @@ -9,6 +9,7 @@ #include #include "mlx5_common_utils.h" +#include "mlx5_common_os.h" #include "mlx5_malloc.h" struct mlx5_sys_mem { @@ -148,14 +149,11 @@ static void * mlx5_alloc_align(size_t size, unsigned int align, unsigned int zero) { void *buf; - int ret; - - ret = posix_memalign(&buf, align, size); - if (ret) { - DRV_LOG(ERR, - "Couldn't allocate buf size=%zu align=%u. Err=%d\n", - size, align, ret); + buf = mlx5_os_malloc(align, size); + if (!buf) { + DRV_LOG(ERR, "Couldn't allocate buf size=%zu align=%u.", + size, align); return NULL; } if (zero) @@ -264,7 +262,7 @@ mlx5_free(void *addr) __atomic_add_fetch(&mlx5_sys_mem.free_sys, 1, __ATOMIC_RELAXED); #endif - free(addr); + mlx5_os_free(addr); } else { #ifdef RTE_LIBRTE_MLX5_DEBUG __atomic_add_fetch(&mlx5_sys_mem.free_rte, 1, From patchwork Mon Dec 28 09:54:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85792 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9052DA09FF; Mon, 28 Dec 2020 11:02:21 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id AD217CB6B; Mon, 28 Dec 2020 10:55:30 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id D4392CA5C for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:45 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDf012171; Mon, 28 Dec 2020 11:54:44 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:18 +0200 Message-Id: <20201228095436.14996-15-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 14/32] common/mlx5/windows: handle memory allocations with alignment X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk This commit is the Windows equivalent of the Linux implementation. The APIs included in this commit: mlx5_os_malloc(), mlx5_os_free(). For memory allocations (with or without alignment) we always call _aligned_malloc(). Even if zero alignment was requested in the first place - we always select a minimal alignment value. In this way when the memory is free - it is always safe to call _aligned_free(). Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/common/mlx5/windows/mlx5_common_os.h | 51 ++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 drivers/common/mlx5/windows/mlx5_common_os.h diff --git a/drivers/common/mlx5/windows/mlx5_common_os.h b/drivers/common/mlx5/windows/mlx5_common_os.h new file mode 100644 index 0000000000..cce7c88c6a --- /dev/null +++ b/drivers/common/mlx5/windows/mlx5_common_os.h @@ -0,0 +1,51 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright 2020 Mellanox Technologies, Ltd + */ + +#ifndef RTE_PMD_MLX5_COMMON_OS_H_ +#define RTE_PMD_MLX5_COMMON_OS_H_ + +#include + +#include "mlx5_autoconf.h" +#include "mlx5_glue.h" +#include "mlx5_malloc.h" + +/** + * This API allocates aligned or non-aligned memory. The free can be on either + * aligned or nonaligned memory. To be protected - even though there may be no + * alignment - in Windows this API will unconditioanlly call _aligned_malloc() + * with at least a minimal alignment size. + * + * @param[in] align + * The alignment value, which must be an integer power of 2 (or 0 for + * non-alignment) + * @param[in] size + * Size in bytes to allocate + * + * @return + * Valid pointer to allocated memory, NULL in case of failure + */ +static inline void * +mlx5_os_malloc(size_t align, size_t size) +{ + if (align < MLX5_MALLOC_ALIGNMENT) + align = MLX5_MALLOC_ALIGNMENT; + return _aligned_malloc(size, align); +} + +/** + * This API de-allocates a memory that originally could have been allocated + * aligned or non-aligned. In Windows since the allocation was with + * _aligned_malloc() - it is safe to always call _aligned_free(). + * + * @param[in] addr + * Pointer to address to free + * + */ +static inline void +mlx5_os_free(void *addr) +{ + _aligned_free(addr); +} +#endif /* RTE_PMD_MLX5_COMMON_OS_H_ */ From patchwork Mon Dec 28 09:54:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85776 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 793CAA09FF; Mon, 28 Dec 2020 10:56:56 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D0A7ACA89; Mon, 28 Dec 2020 10:55:04 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id B068ACA38 for ; Mon, 28 Dec 2020 10:54:50 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:45 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDg012171; Mon, 28 Dec 2020 11:54:44 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:19 +0200 Message-Id: <20201228095436.14996-16-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 15/32] common/mlx5/linux: wrap event channel APIs with OS calls X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Wrap the API to create/destroy event channel and to subscribe an event with OS calls. In Linux those calls are implemented by glue functions while in Windows they are not supported. Signed-off-by: Tal Shnaiderman Acked-by: Matan Azrad --- drivers/common/mlx5/linux/mlx5_common_os.h | 22 ++++++++++++++++++++++ drivers/net/mlx5/mlx5_devx.c | 8 ++++---- drivers/net/mlx5/mlx5_txpp.c | 6 +++--- drivers/vdpa/mlx5/mlx5_vdpa_event.c | 7 ++++--- 4 files changed, 33 insertions(+), 10 deletions(-) diff --git a/drivers/common/mlx5/linux/mlx5_common_os.h b/drivers/common/mlx5/linux/mlx5_common_os.h index bd44ecb7d6..63f070d9c4 100644 --- a/drivers/common/mlx5/linux/mlx5_common_os.h +++ b/drivers/common/mlx5/linux/mlx5_common_os.h @@ -227,6 +227,28 @@ mlx5_os_umem_dereg(void *pumem) return mlx5_glue->devx_umem_dereg(pumem); } +static inline void * +mlx5_os_devx_create_event_channel(void *ctx, int flags) +{ + return mlx5_glue->devx_create_event_channel(ctx, flags); +} + +static inline void +mlx5_os_devx_destroy_event_channel(void *eventc) +{ + mlx5_glue->devx_destroy_event_channel(eventc); +} + +static inline int +mlx5_os_devx_subscribe_devx_event(void *eventc, + void *obj, + uint16_t events_sz, uint16_t events_num[], + uint64_t cookie) +{ + return mlx5_glue->devx_subscribe_devx_event(eventc, obj, events_sz, + events_num, cookie); +} + /** * Memory allocation optionally with alignment. * diff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c index 235fd5798d..84a5c55ee0 100644 --- a/drivers/net/mlx5/mlx5_devx.c +++ b/drivers/net/mlx5/mlx5_devx.c @@ -216,7 +216,7 @@ mlx5_rxq_devx_obj_release(struct mlx5_rxq_obj *rxq_obj) claim_zero(mlx5_devx_cmd_destroy(rxq_obj->rq)); claim_zero(mlx5_devx_cmd_destroy(rxq_obj->devx_cq)); if (rxq_obj->devx_channel) - mlx5_glue->devx_destroy_event_channel + mlx5_os_devx_destroy_event_channel (rxq_obj->devx_channel); mlx5_rxq_release_devx_rq_resources(rxq_obj->rxq_ctrl); mlx5_rxq_release_devx_cq_resources(rxq_obj->rxq_ctrl); @@ -533,7 +533,7 @@ mlx5_rxq_create_devx_cq_resources(struct rte_eth_dev *dev, uint16_t idx) rxq_data->cqe_n = log_cqe_n; rxq_data->cqn = cq_obj->id; if (rxq_ctrl->obj->devx_channel) { - ret = mlx5_glue->devx_subscribe_devx_event + ret = mlx5_os_devx_subscribe_devx_event (rxq_ctrl->obj->devx_channel, cq_obj->obj, sizeof(event_nums), @@ -644,7 +644,7 @@ mlx5_rxq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx) int devx_ev_flag = MLX5DV_DEVX_CREATE_EVENT_CHANNEL_FLAGS_OMIT_EV_DATA; - tmpl->devx_channel = mlx5_glue->devx_create_event_channel + tmpl->devx_channel = mlx5_os_devx_create_event_channel (priv->sh->ctx, devx_ev_flag); if (!tmpl->devx_channel) { @@ -686,7 +686,7 @@ mlx5_rxq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx) if (tmpl->devx_cq) claim_zero(mlx5_devx_cmd_destroy(tmpl->devx_cq)); if (tmpl->devx_channel) - mlx5_glue->devx_destroy_event_channel(tmpl->devx_channel); + mlx5_os_devx_destroy_event_channel(tmpl->devx_channel); mlx5_rxq_release_devx_rq_resources(rxq_ctrl); mlx5_rxq_release_devx_cq_resources(rxq_ctrl); rte_errno = ret; /* Restore rte_errno. */ diff --git a/drivers/net/mlx5/mlx5_txpp.c b/drivers/net/mlx5/mlx5_txpp.c index 749529c410..726bdc6ae1 100644 --- a/drivers/net/mlx5/mlx5_txpp.c +++ b/drivers/net/mlx5/mlx5_txpp.c @@ -37,7 +37,7 @@ static void mlx5_txpp_destroy_event_channel(struct mlx5_dev_ctx_shared *sh) { if (sh->txpp.echan) { - mlx5_glue->devx_destroy_event_channel(sh->txpp.echan); + mlx5_os_devx_destroy_event_channel(sh->txpp.echan); sh->txpp.echan = NULL; } } @@ -47,7 +47,7 @@ static int mlx5_txpp_create_event_channel(struct mlx5_dev_ctx_shared *sh) { MLX5_ASSERT(!sh->txpp.echan); - sh->txpp.echan = mlx5_glue->devx_create_event_channel(sh->ctx, + sh->txpp.echan = mlx5_os_devx_create_event_channel(sh->ctx, MLX5DV_DEVX_CREATE_EVENT_CHANNEL_FLAGS_OMIT_EV_DATA); if (!sh->txpp.echan) { rte_errno = errno; @@ -937,7 +937,7 @@ mlx5_txpp_start_service(struct mlx5_dev_ctx_shared *sh) return -rte_errno; } /* Subscribe CQ event to the event channel controlled by the driver. */ - ret = mlx5_glue->devx_subscribe_devx_event(sh->txpp.echan, + ret = mlx5_os_devx_subscribe_devx_event(sh->txpp.echan, sh->txpp.rearm_queue.cq->obj, sizeof(event_nums), event_nums, 0); diff --git a/drivers/vdpa/mlx5/mlx5_vdpa_event.c b/drivers/vdpa/mlx5/mlx5_vdpa_event.c index 3aeaeb893f..fd6150928b 100644 --- a/drivers/vdpa/mlx5/mlx5_vdpa_event.c +++ b/drivers/vdpa/mlx5/mlx5_vdpa_event.c @@ -15,6 +15,7 @@ #include #include +#include #include #include "mlx5_vdpa_utils.h" @@ -43,7 +44,7 @@ mlx5_vdpa_event_qp_global_release(struct mlx5_vdpa_priv *priv) sizeof(out.buf)) >= (ssize_t)sizeof(out.event_resp.cookie)) ; - mlx5_glue->devx_destroy_event_channel(priv->eventc); + mlx5_os_devx_destroy_event_channel(priv->eventc); priv->eventc = NULL; } #endif @@ -63,7 +64,7 @@ mlx5_vdpa_event_qp_global_prepare(struct mlx5_vdpa_priv *priv) DRV_LOG(ERR, "Failed to query EQ number %d.", rte_errno); return -1; } - priv->eventc = mlx5_glue->devx_create_event_channel(priv->ctx, + priv->eventc = mlx5_os_devx_create_event_channel(priv->ctx, MLX5DV_DEVX_CREATE_EVENT_CHANNEL_FLAGS_OMIT_EV_DATA); if (!priv->eventc) { rte_errno = errno; @@ -176,7 +177,7 @@ mlx5_vdpa_cq_create(struct mlx5_vdpa_priv *priv, uint16_t log_desc_n, cq->cq_ci = 0; rte_spinlock_init(&cq->sl); /* Subscribe CQ event to the event channel controlled by the driver. */ - ret = mlx5_glue->devx_subscribe_devx_event(priv->eventc, cq->cq->obj, + ret = mlx5_os_devx_subscribe_devx_event(priv->eventc, cq->cq->obj, sizeof(event_nums), event_nums, (uint64_t)(uintptr_t)cq); From patchwork Mon Dec 28 09:54:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85777 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 34B94A09FF; Mon, 28 Dec 2020 10:57:17 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C0088CA95; Mon, 28 Dec 2020 10:55:06 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id C4887CA41 for ; Mon, 28 Dec 2020 10:54:50 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:45 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDh012171; Mon, 28 Dec 2020 11:54:45 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:20 +0200 Message-Id: <20201228095436.14996-17-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 16/32] common/mlx5: add Windows exports file X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" File drivers/common/mlx5/rte_common_mlx5_exports.def contains mlx5 Windows exported symbols under common/mlx5 directory (DLL file name librte_common_mlx5*.dll). It is the equivalent of Linux map file rte_common_mlx5_version.map but the list of symbols may be different between the two operating systems. Signed-off-by: Tal Shnaiderman Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/common/mlx5/rte_common_mlx5_exports.def | 62 +++++++++++++++++++++++++ 1 file changed, 62 insertions(+) create mode 100644 drivers/common/mlx5/rte_common_mlx5_exports.def diff --git a/drivers/common/mlx5/rte_common_mlx5_exports.def b/drivers/common/mlx5/rte_common_mlx5_exports.def new file mode 100644 index 0000000000..23984b7abd --- /dev/null +++ b/drivers/common/mlx5/rte_common_mlx5_exports.def @@ -0,0 +1,62 @@ +EXPORTS + haswell_broadwell_cpu + + mlx5_common_init + + mlx5_create_mr_ext + + mlx5_devx_cmd_create_cq + mlx5_devx_cmd_create_flex_parser + mlx5_devx_cmd_create_qp + mlx5_devx_cmd_create_rq + mlx5_devx_cmd_create_rqt + mlx5_devx_cmd_create_sq + mlx5_devx_cmd_create_tir + mlx5_devx_cmd_create_td + mlx5_devx_cmd_create_tis + mlx5_devx_cmd_create_virtq + mlx5_devx_cmd_destroy + mlx5_devx_cmd_flow_counter_alloc + mlx5_devx_cmd_flow_counter_query + mlx5_devx_cmd_flow_dump + mlx5_devx_cmd_mkey_create + mlx5_devx_cmd_modify_qp_state + mlx5_devx_cmd_modify_rq + mlx5_devx_cmd_modify_rqt + mlx5_devx_cmd_modify_sq + mlx5_devx_cmd_modify_tir + mlx5_devx_cmd_modify_virtq + mlx5_devx_cmd_qp_query_tis_td + mlx5_devx_cmd_query_hca_attr + mlx5_devx_cmd_query_parse_samples + mlx5_devx_cmd_query_virtq + mlx5_devx_cmd_register_read + mlx5_devx_get_out_command_status + mlx5_devx_cmd_create_flow_hit_aso_obj + + mlx5_get_dbr + + mlx5_malloc_mem_select + mlx5_mr_btree_init + mlx5_mr_btree_free + mlx5_mr_btree_dump + mlx5_mr_addr2mr_bh + mlx5_mr_release_cache + mlx5_mr_dump_cache + mlx5_mr_rebuild_cache + mlx5_mr_insert_cache + mlx5_mr_lookup_cache + mlx5_mr_lookup_list + mlx5_mr_create_primary + mlx5_mr_flush_local_cache + mlx5_mp_req_queue_state_modify + mlx5_mr_free + + mlx5_pci_driver_register + + mlx5_release_dbr + + mlx5_malloc + mlx5_realloc + mlx5_free + From patchwork Mon Dec 28 09:54:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85775 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id B7F64A09FF; Mon, 28 Dec 2020 10:56:31 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 2A802CA65; Mon, 28 Dec 2020 10:55:03 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 9F66CCA3E for ; Mon, 28 Dec 2020 10:54:50 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:45 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDi012171; Mon, 28 Dec 2020 11:54:45 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:21 +0200 Message-Id: <20201228095436.14996-18-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 17/32] common/mlx5: extend DevX query hca attributes command X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Extend DevX API mlx5_devx_cmd_query_hca_attr() to report on max number of available objects including: CQ, QP, PD, SRQ. Signed-off-by: Tal Shnaiderman Acked-by: Matan Azrad --- drivers/common/mlx5/mlx5_devx_cmds.c | 11 +++++++++++ drivers/common/mlx5/mlx5_devx_cmds.h | 10 +++++++++- drivers/common/mlx5/mlx5_prm.h | 1 + 3 files changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c index 9c1d1883ea..36d3a421aa 100644 --- a/drivers/common/mlx5/mlx5_devx_cmds.c +++ b/drivers/common/mlx5/mlx5_devx_cmds.c @@ -720,6 +720,14 @@ mlx5_devx_cmd_query_hca_attr(void *ctx, attr->flow_hit_aso = !!(MLX5_GET64(cmd_hca_cap, hcattr, general_obj_types) & MLX5_GENERAL_OBJ_TYPES_CAP_FLOW_HIT_ASO); + attr->log_max_cq = MLX5_GET(cmd_hca_cap, hcattr, log_max_cq); + attr->log_max_qp = MLX5_GET(cmd_hca_cap, hcattr, log_max_qp); + attr->log_max_cq_sz = MLX5_GET(cmd_hca_cap, hcattr, log_max_cq_sz); + attr->log_max_qp_sz = MLX5_GET(cmd_hca_cap, hcattr, log_max_qp_sz); + attr->log_max_mrw_sz = MLX5_GET(cmd_hca_cap, hcattr, log_max_mrw_sz); + attr->log_max_pd = MLX5_GET(cmd_hca_cap, hcattr, log_max_pd); + attr->log_max_srq = MLX5_GET(cmd_hca_cap, hcattr, log_max_srq); + attr->log_max_srq_sz = MLX5_GET(cmd_hca_cap, hcattr, log_max_srq_sz); if (attr->qos.sup) { MLX5_SET(query_hca_cap_in, in, op_mod, MLX5_GET_HCA_CAP_OP_MOD_QOS_CAP | @@ -834,6 +842,9 @@ mlx5_devx_cmd_query_hca_attr(void *ctx, attr->tunnel_stateless_gtp = MLX5_GET (per_protocol_networking_offload_caps, hcattr, tunnel_stateless_gtp); + attr->rss_ind_tbl_cap = MLX5_GET + (per_protocol_networking_offload_caps, + hcattr, rss_ind_tbl_cap); if (attr->wqe_inline_mode != MLX5_CAP_INLINE_MODE_VPORT_CONTEXT) return 0; if (attr->eth_virt) { diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h b/drivers/common/mlx5/mlx5_devx_cmds.h index 726e9f5192..5056d86ed9 100644 --- a/drivers/common/mlx5/mlx5_devx_cmds.h +++ b/drivers/common/mlx5/mlx5_devx_cmds.h @@ -117,6 +117,15 @@ struct mlx5_hca_attr { uint32_t log_max_ft_sampler_num:8; struct mlx5_hca_qos_attr qos; struct mlx5_hca_vdpa_attr vdpa; + int log_max_qp_sz; + int log_max_cq_sz; + int log_max_qp; + int log_max_cq; + uint32_t log_max_pd; + uint32_t log_max_mrw_sz; + uint32_t log_max_srq; + uint32_t log_max_srq_sz; + uint32_t rss_ind_tbl_cap; }; struct mlx5_devx_wq_attr { @@ -495,7 +504,6 @@ struct mlx5_devx_obj *mlx5_devx_cmd_create_virtio_q_counters(void *ctx); __rte_internal int mlx5_devx_cmd_query_virtio_q_counters(struct mlx5_devx_obj *couners_obj, struct mlx5_devx_virtio_q_couners_attr *attr); - __rte_internal struct mlx5_devx_obj *mlx5_devx_cmd_create_flow_hit_aso_obj(void *ctx, uint32_t pd); diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index 58d180486e..585e9d1c05 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -665,6 +665,7 @@ typedef uint8_t u8; #define MLX5_GET64(typ, p, fld) rte_be_to_cpu_64(*((rte_be64_t *)(p) + \ __mlx5_64_off(typ, fld))) #define MLX5_FLD_SZ_BYTES(typ, fld) (__mlx5_bit_sz(typ, fld) / 8) +#define MLX5_UN_SZ_BYTES(typ) (sizeof(union mlx5_ifc_##typ##_bits) / 8) struct mlx5_ifc_fte_match_set_misc_bits { u8 gre_c_present[0x1]; From patchwork Mon Dec 28 09:54:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85780 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1C889A09FF; Mon, 28 Dec 2020 10:58:17 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 7FC64CAB5; Mon, 28 Dec 2020 10:55:11 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 256EECA44 for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:45 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDj012171; Mon, 28 Dec 2020 11:54:45 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:22 +0200 Message-Id: <20201228095436.14996-19-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 18/32] common/mlx5: add DevX alloc PD command X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add a new DevX API mlx5_devx_cmd_alloc_pd() that creates a new protection domain (PD). Signed-off-by: Tal Shnaiderman Acked-by: Matan Azrad --- drivers/common/mlx5/mlx5_devx_cmds.c | 35 ++++++++++++++++++++++++ drivers/common/mlx5/mlx5_devx_cmds.h | 2 ++ drivers/common/mlx5/mlx5_prm.h | 36 +++++++++++++++++++++++++ drivers/common/mlx5/rte_common_mlx5_exports.def | 1 + drivers/common/mlx5/version.map | 1 + 5 files changed, 75 insertions(+) diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c index 36d3a421aa..12f51a940c 100644 --- a/drivers/common/mlx5/mlx5_devx_cmds.c +++ b/drivers/common/mlx5/mlx5_devx_cmds.c @@ -2055,3 +2055,38 @@ mlx5_devx_cmd_create_flow_hit_aso_obj(void *ctx, uint32_t pd) flow_hit_aso_obj->id = MLX5_GET(general_obj_out_cmd_hdr, out, obj_id); return flow_hit_aso_obj; } + +/* + * Create PD using DevX API. + * + * @param[in] ctx + * Context returned from mlx5 open_device() glue function. + * + * @return + * The DevX object created, NULL otherwise and rte_errno is set. + */ +struct mlx5_devx_obj * +mlx5_devx_cmd_alloc_pd(void *ctx) +{ + struct mlx5_devx_obj *ppd = + mlx5_malloc(MLX5_MEM_ZERO, sizeof(*ppd), 0, SOCKET_ID_ANY); + u32 in[MLX5_ST_SZ_DW(alloc_pd_in)] = {0}; + u32 out[MLX5_ST_SZ_DW(alloc_pd_out)] = {0}; + + if (!ppd) { + DRV_LOG(ERR, "Failed to allocate PD data."); + rte_errno = ENOMEM; + return NULL; + } + MLX5_SET(alloc_pd_in, in, opcode, MLX5_CMD_OP_ALLOC_PD); + ppd->obj = mlx5_glue->devx_obj_create(ctx, in, sizeof(in), + out, sizeof(out)); + if (!ppd->obj) { + mlx5_free(ppd); + DRV_LOG(ERR, "Failed to allocate PD Obj using DevX."); + rte_errno = errno; + return NULL; + } + ppd->id = MLX5_GET(alloc_pd_out, out, pd); + return ppd; +} diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h b/drivers/common/mlx5/mlx5_devx_cmds.h index 5056d86ed9..8277fdbc39 100644 --- a/drivers/common/mlx5/mlx5_devx_cmds.h +++ b/drivers/common/mlx5/mlx5_devx_cmds.h @@ -508,4 +508,6 @@ __rte_internal struct mlx5_devx_obj *mlx5_devx_cmd_create_flow_hit_aso_obj(void *ctx, uint32_t pd); +__rte_internal +struct mlx5_devx_obj *mlx5_devx_cmd_alloc_pd(void *ctx); #endif /* RTE_PMD_MLX5_DEVX_CMDS_H_ */ diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index 585e9d1c05..4ddf865743 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -844,6 +844,8 @@ enum { MLX5_CMD_OP_SUSPEND_QP = 0x50F, MLX5_CMD_OP_RESUME_QP = 0x510, MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754, + MLX5_CMD_OP_ALLOC_PD = 0x800, + MLX5_CMD_OP_DEALLOC_PD = 0x801, MLX5_CMD_OP_ACCESS_REGISTER = 0x805, MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816, MLX5_CMD_OP_CREATE_TIR = 0x900, @@ -2772,6 +2774,40 @@ struct mlx5_ifc_init2init_qp_in_bits { u8 reserved_at_800[0x80]; }; +struct mlx5_ifc_dealloc_pd_out_bits { + u8 status[0x8]; + u8 reserved_0[0x18]; + u8 syndrome[0x20]; + u8 reserved_1[0x40]; +}; + +struct mlx5_ifc_dealloc_pd_in_bits { + u8 opcode[0x10]; + u8 reserved_0[0x10]; + u8 reserved_1[0x10]; + u8 op_mod[0x10]; + u8 reserved_2[0x8]; + u8 pd[0x18]; + u8 reserved_3[0x20]; +}; + +struct mlx5_ifc_alloc_pd_out_bits { + u8 status[0x8]; + u8 reserved_0[0x18]; + u8 syndrome[0x20]; + u8 reserved_1[0x8]; + u8 pd[0x18]; + u8 reserved_2[0x20]; +}; + +struct mlx5_ifc_alloc_pd_in_bits { + u8 opcode[0x10]; + u8 reserved_0[0x10]; + u8 reserved_1[0x10]; + u8 op_mod[0x10]; + u8 reserved_2[0x40]; +}; + #ifdef PEDANTIC #pragma GCC diagnostic ignored "-Wpedantic" #endif diff --git a/drivers/common/mlx5/rte_common_mlx5_exports.def b/drivers/common/mlx5/rte_common_mlx5_exports.def index 23984b7abd..15aafc3809 100644 --- a/drivers/common/mlx5/rte_common_mlx5_exports.def +++ b/drivers/common/mlx5/rte_common_mlx5_exports.def @@ -5,6 +5,7 @@ EXPORTS mlx5_create_mr_ext + mlx5_devx_cmd_alloc_pd mlx5_devx_cmd_create_cq mlx5_devx_cmd_create_flex_parser mlx5_devx_cmd_create_qp diff --git a/drivers/common/mlx5/version.map b/drivers/common/mlx5/version.map index 17dd11f635..fb3952bbc6 100644 --- a/drivers/common/mlx5/version.map +++ b/drivers/common/mlx5/version.map @@ -10,6 +10,7 @@ INTERNAL { mlx5_dev_to_pci_addr; + mlx5_devx_cmd_alloc_pd; mlx5_devx_cmd_create_cq; mlx5_devx_cmd_create_flex_parser; mlx5_devx_cmd_create_qp; From patchwork Mon Dec 28 09:54:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85787 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 91044A09FF; Mon, 28 Dec 2020 11:00:44 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C29B3CAFF; Mon, 28 Dec 2020 10:55:23 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 254DDCA3A for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:45 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDk012171; Mon, 28 Dec 2020 11:54:45 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:23 +0200 Message-Id: <20201228095436.14996-20-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 19/32] common/mlx5/windows: add glue functions APIs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Windows glue functions are added to file mlx5/windows/mlx5_glue.c. The following APIs are supported: get_device_list, free_device_list, open_device, close_device, query_device, query_hca_iseg, devx_obj_create, devx_obj_destroy, devx_obj_query, devx_obj_modify, devx_general_cmd, devx_umem_reg, devx_umem_dereg, devx_alloc_uar, devx_free_uar, devx_fs_rule_add, devx_fs_rule_del, devx_query_eqn New added files: mlx5_win_defs.h - this file imports missing definitions from Linux rdma-core library and Linux OS. mlx5_win_ext.h - this file contains structs that enable a unified Linux/Windows API. Each struct has an equivalent (but different) Linux struct. By calling with 'void *' pointers - the Linux/Windows API is identical. Signed-off-by: Tal Shnaiderman Acked-by: Matan Azrad --- drivers/common/mlx5/rte_common_mlx5_exports.def | 1 + drivers/common/mlx5/windows/mlx5_glue.c | 304 ++++++++++++++++++++++++ drivers/common/mlx5/windows/mlx5_glue.h | 58 +++++ drivers/common/mlx5/windows/mlx5_win_defs.h | 25 ++ drivers/common/mlx5/windows/mlx5_win_ext.h | 34 +++ 5 files changed, 422 insertions(+) create mode 100644 drivers/common/mlx5/windows/mlx5_glue.c create mode 100644 drivers/common/mlx5/windows/mlx5_glue.h create mode 100644 drivers/common/mlx5/windows/mlx5_win_defs.h create mode 100644 drivers/common/mlx5/windows/mlx5_win_ext.h diff --git a/drivers/common/mlx5/rte_common_mlx5_exports.def b/drivers/common/mlx5/rte_common_mlx5_exports.def index 15aafc3809..2f6aab133b 100644 --- a/drivers/common/mlx5/rte_common_mlx5_exports.def +++ b/drivers/common/mlx5/rte_common_mlx5_exports.def @@ -36,6 +36,7 @@ EXPORTS mlx5_devx_cmd_create_flow_hit_aso_obj mlx5_get_dbr + mlx5_glue mlx5_malloc_mem_select mlx5_mr_btree_init diff --git a/drivers/common/mlx5/windows/mlx5_glue.c b/drivers/common/mlx5/windows/mlx5_glue.c new file mode 100644 index 0000000000..7f8a00aaa7 --- /dev/null +++ b/drivers/common/mlx5/windows/mlx5_glue.c @@ -0,0 +1,304 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright 2020 Mellanox Technologies, Ltd + */ + +#include +#include +#include +#include +#include +#include + +#include + +#include "mlx5_glue.h" +#include "mlx5_common_utils.h" +#include "mlx5_win_ext.h" + +/* + * The returned value of this API is an array of pointers to mlx5 + * devices under Windows. The interesting parameters of a device: + * Device PCI parameters: domain, bus, device id, function. + * Device name. + */ +static void * +mlx5_glue_devx_get_device_list(int *num_devices) +{ + struct devx_device_bdf *devx_bdf_devs = NULL; + size_t n_devx_devx = 0; + int32_t ret = devx_get_device_list(&n_devx_devx, &devx_bdf_devs); + + if (ret) { + errno = ret; + *num_devices = 0; + return NULL; + } + *num_devices = (int)n_devx_devx; + return devx_bdf_devs; +} + +static void +mlx5_glue_devx_free_device_list(void *list) +{ + if (!list) { + errno = EINVAL; + return; + } + devx_free_device_list(list); +} + +static int +mlx5_glue_devx_close_device(void *ctx) +{ + mlx5_context_st *mlx5_ctx; + int rc; + + if (!ctx) + return -EINVAL; + mlx5_ctx = (mlx5_context_st *)ctx; + rc = devx_close_device(mlx5_ctx->devx_ctx); + free(mlx5_ctx); + return rc; +} + +static void * +mlx5_glue_devx_open_device(void *device) +{ + struct mlx5_context *mlx5_ctx; + + if (!device) { + errno = EINVAL; + return NULL; + } + mlx5_ctx = malloc((sizeof(struct mlx5_context))); + if (!mlx5_ctx) { + errno = ENOMEM; + return NULL; + } + memset(mlx5_ctx, 0, sizeof(*mlx5_ctx)); + mlx5_ctx->devx_ctx = devx_open_device(device); + if (DEVX_IS_ERR(mlx5_ctx->devx_ctx)) { + errno = -DEVX_PTR_ERR(mlx5_ctx->devx_ctx); + free(mlx5_ctx); + return NULL; + } + return mlx5_ctx; +} + +static int +mlx5_glue_devx_query_device(void *device_bdf, void *dev_inf) +{ + struct devx_device_bdf *dev_bdf; + struct devx_device *mlx5_dev; + + if (!device_bdf) + return -EINVAL; + dev_bdf = (struct devx_device_bdf *)device_bdf; + mlx5_dev = (struct devx_device *)dev_inf; + int err = devx_query_device(dev_bdf, mlx5_dev); + if (err) + return -E_FAIL; + return 0; +} + +static void * +mlx5_glue_devx_query_hca_iseg_mapping(void *ctx, uint32_t *cb_iseg) +{ + struct mlx5_context *mlx5_ctx; + void *pv_iseg; + int err; + + if (!ctx) { + errno = EINVAL; + return NULL; + } + mlx5_ctx = (struct mlx5_context *)ctx; + err = devx_query_hca_iseg_mapping(mlx5_ctx->devx_ctx, + cb_iseg, &pv_iseg); + if (err) { + errno = err; + return NULL; + } + return pv_iseg; +} + +static void * +mlx5_glue_devx_obj_create(void *ctx, + void *in, size_t inlen, + void *out, size_t outlen) +{ + mlx5_devx_obj_st *devx_obj; + + if (!ctx) { + errno = EINVAL; + return NULL; + } + devx_obj = malloc((sizeof(*devx_obj))); + if (!devx_obj) { + errno = ENOMEM; + return NULL; + } + memset(devx_obj, 0, sizeof(*devx_obj)); + devx_obj->devx_ctx = GET_DEVX_CTX(ctx); + devx_obj->obj = devx_obj_create(devx_obj->devx_ctx, + in, inlen, out, outlen); + if (DEVX_IS_ERR(devx_obj->obj)) { + errno = -DEVX_PTR_ERR(devx_obj->obj); + free(devx_obj); + return NULL; + } + return devx_obj; +} + +static int +mlx5_glue_devx_obj_destroy(void *obj) +{ + mlx5_devx_obj_st *devx_obj; + + if (!obj) + return -EINVAL; + devx_obj = obj; + int rc = devx_obj_destroy(devx_obj->obj); + free(devx_obj); + return rc; +} + +static int +mlx5_glue_devx_general_cmd(void *ctx, + void *in, size_t inlen, + void *out, size_t outlen) +{ + if (!ctx) + return -EINVAL; + return devx_cmd(GET_DEVX_CTX(ctx), in, inlen, out, outlen); +} + +static int +mlx5_glue_devx_obj_query(void *obj, + void *in, size_t inlen, + void *out, size_t outlen) +{ + return devx_cmd(GET_OBJ_CTX(obj), in, inlen, out, outlen); +} + +static int +mlx5_glue_devx_obj_modify(void *obj, + void *in, size_t inlen, + void *out, size_t outlen) +{ + return devx_cmd(GET_OBJ_CTX(obj), in, inlen, out, outlen); +} + +static int +mlx5_glue_devx_umem_dereg(void *pumem) +{ + struct devx_obj_handle *umem; + + if (!pumem) + return -EINVAL; + umem = pumem; + return devx_umem_unreg(umem); +} + +static void * +mlx5_glue_devx_umem_reg(void *ctx, void *addr, size_t size, + uint32_t access, uint32_t *id) +{ + struct devx_obj_handle *umem_hdl; + int w_access = DEVX_UMEM_ACCESS_READ; + + if (!ctx) { + errno = EINVAL; + return NULL; + } + if (access) + w_access |= DEVX_UMEM_ACCESS_WRITE; + + umem_hdl = devx_umem_reg(GET_DEVX_CTX(ctx), addr, + size, w_access, id); + if (DEVX_IS_ERR(umem_hdl)) { + errno = -DEVX_PTR_ERR(umem_hdl); + return NULL; + } + return umem_hdl; +} + +static void * +mlx5_glue_devx_alloc_uar(void *ctx, + uint32_t flags) +{ + devx_uar_handle *uar; + + if (!ctx) { + errno = EINVAL; + return NULL; + } + uar = devx_alloc_uar(GET_DEVX_CTX(ctx), flags); + if (DEVX_IS_ERR(uar)) { + errno = -DEVX_PTR_ERR(uar); + return NULL; + } + return uar; +} + +static int +mlx5_glue_devx_query_eqn(void *ctx, + uint32_t cpus, uint32_t *eqn) +{ + if (!ctx) + return -EINVAL; + return devx_query_eqn(GET_DEVX_CTX(ctx), cpus, eqn); +} + +static void +mlx5_glue_devx_free_uar(void *uar) +{ + devx_free_uar((devx_uar_handle *)uar); +} + +static void* +mlx5_glue_devx_fs_rule_add(void *ctx, void *in, uint32_t inlen) + +{ + struct devx_obj_handle *rule_hdl = NULL; + + if (!ctx) { + errno = EINVAL; + return NULL; + } + rule_hdl = devx_fs_rule_add(GET_DEVX_CTX(ctx), in, inlen); + if (DEVX_IS_ERR(rule_hdl)) { + errno = -DEVX_PTR_ERR(rule_hdl); + return NULL; + } + return rule_hdl; +} + +static int +mlx5_glue_devx_fs_rule_del(void *flow) +{ + return devx_fs_rule_del(flow); +} + +alignas(RTE_CACHE_LINE_SIZE) +const struct mlx5_glue *mlx5_glue = &(const struct mlx5_glue){ + .version = MLX5_GLUE_VERSION, + .get_device_list = mlx5_glue_devx_get_device_list, + .free_device_list = mlx5_glue_devx_free_device_list, + .open_device = mlx5_glue_devx_open_device, + .close_device = mlx5_glue_devx_close_device, + .query_device = mlx5_glue_devx_query_device, + .query_hca_iseg = mlx5_glue_devx_query_hca_iseg_mapping, + .devx_obj_create = mlx5_glue_devx_obj_create, + .devx_obj_destroy = mlx5_glue_devx_obj_destroy, + .devx_obj_query = mlx5_glue_devx_obj_query, + .devx_obj_modify = mlx5_glue_devx_obj_modify, + .devx_general_cmd = mlx5_glue_devx_general_cmd, + .devx_umem_reg = mlx5_glue_devx_umem_reg, + .devx_umem_dereg = mlx5_glue_devx_umem_dereg, + .devx_alloc_uar = mlx5_glue_devx_alloc_uar, + .devx_free_uar = mlx5_glue_devx_free_uar, + .devx_fs_rule_add = mlx5_glue_devx_fs_rule_add, + .devx_fs_rule_del = mlx5_glue_devx_fs_rule_del, + .devx_query_eqn = mlx5_glue_devx_query_eqn, +}; diff --git a/drivers/common/mlx5/windows/mlx5_glue.h b/drivers/common/mlx5/windows/mlx5_glue.h new file mode 100644 index 0000000000..f2261ec7ac --- /dev/null +++ b/drivers/common/mlx5/windows/mlx5_glue.h @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright 2020 Mellanox Technologies, Ltd + */ + +#ifndef MLX5_GLUE_H_ +#define MLX5_GLUE_H_ + +#include +#include + +#include +#include + +#ifndef MLX5_GLUE_VERSION +#define MLX5_GLUE_VERSION "" +#endif + +/* LIB_GLUE_VERSION must be updated every time this structure is modified. */ +struct mlx5_glue { + const char *version; + void *(*devx_obj_create)(void *ctx, + void *in, size_t inlen, + void *out, size_t outlen); + int (*devx_obj_destroy)(void *obj); + int (*devx_obj_query)(void *obj, + void *in, size_t inlen, + void *out, size_t outlen); + int (*devx_obj_modify)(void *obj, + void *in, size_t inlen, + void *out, size_t outlen); + int (*devx_general_cmd)(void *ctx, + void *in, size_t inlen, + void *out, size_t outlen); + int (*devx_umem_dereg)(void *umem); + void *(*devx_umem_reg)(void *ctx, + void *addr, size_t size, + uint32_t access, uint32_t *id); + void *(*devx_alloc_uar)(void *ctx, + uint32_t flags); + void (*devx_free_uar)(void *uar); + void *(*get_device_list)(int *num_devices); + void (*free_device_list)(void *list); + void *(*open_device)(void *device); + int (*close_device)(void *ctx); + int (*query_device)(void *device_bdf, void *dev_inf); + void* (*query_hca_iseg)(void *ctx, uint32_t *cb_iseg); + int (*devx_obj_query_async)(void *obj, + const void *in, size_t inlen, + size_t outlen, uint64_t wr_id, + void *cmd_comp); + void *(*devx_fs_rule_add)(void *ctx, void *in, uint32_t inlen); + int (*devx_fs_rule_del)(void *flow); + int (*devx_query_eqn)(void *context, uint32_t cpus, uint32_t *eqn); +}; + +extern const struct mlx5_glue *mlx5_glue; + +#endif /* MLX5_GLUE_H_ */ diff --git a/drivers/common/mlx5/windows/mlx5_win_defs.h b/drivers/common/mlx5/windows/mlx5_win_defs.h new file mode 100644 index 0000000000..72a3131f5e --- /dev/null +++ b/drivers/common/mlx5/windows/mlx5_win_defs.h @@ -0,0 +1,25 @@ +/* + * Copyright (C) Mellanox Technologies, Ltd. 2001-2020. + * + */ +#ifndef __MLX5_WIN_DEFS_H__ +#define __MLX5_WIN_DEFS_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +enum { + MLX5_CQE_OWNER_MASK = 1, + MLX5_CQE_REQ = 0, + MLX5_CQE_RESP_WR_IMM = 1, + MLX5_CQE_RESP_SEND = 2, + MLX5_CQE_RESP_SEND_IMM = 3, + MLX5_CQE_RESP_SEND_INV = 4, + MLX5_CQE_RESIZE_CQ = 5, + MLX5_CQE_NO_PACKET = 6, + MLX5_CQE_REQ_ERR = 13, + MLX5_CQE_RESP_ERR = 14, + MLX5_CQE_INVALID = 15, +}; +#endif /* __MLX5_WIN_DEFS_H__ */ diff --git a/drivers/common/mlx5/windows/mlx5_win_ext.h b/drivers/common/mlx5/windows/mlx5_win_ext.h new file mode 100644 index 0000000000..0e74910e9d --- /dev/null +++ b/drivers/common/mlx5/windows/mlx5_win_ext.h @@ -0,0 +1,34 @@ +/* + * Copyright (C) Mellanox Technologies, Ltd. 2001-2020. + * + */ +#ifndef __MLX5_WIN_ETX_H__ +#define __MLX5_WIN_ETX_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "mlx5devx.h" + +typedef struct mlx5_context { + devx_device_ctx *devx_ctx; + struct devx_device mlx5_dev; + +} mlx5_context_st; + +typedef struct { + devx_device_ctx *devx_ctx; + struct devx_obj_handle *obj; +} mlx5_devx_obj_st; + +struct mlx5_devx_umem { + void *addr; + struct devx_obj_handle *umem_hdl; + uint32_t umem_id; +}; + +#define GET_DEVX_CTX(ctx) (((mlx5_context_st *)ctx)->devx_ctx) +#define GET_OBJ_CTX(obj) (((mlx5_devx_obj_st *)obj)->devx_ctx) + +#endif /* __MLX5_WIN_ETX_H__ */ From patchwork Mon Dec 28 09:54:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85795 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2FC7FA09FF; Mon, 28 Dec 2020 11:03:33 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 3C474CBEC; Mon, 28 Dec 2020 10:55:43 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id B00B3CA56 for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:45 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDl012171; Mon, 28 Dec 2020 11:54:45 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:24 +0200 Message-Id: <20201228095436.14996-21-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 20/32] mlx5/windows: add mlx5 meson file X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" File drivers/common/mlx5/windows/meson.build is added to enable mlx5 source files compilation under common windows directory. A Devx SDK tool must be installed to export two external H files: mlx5devx.h and mlx5_ifc_devx.h. The installation is based on environment variable DEVX_INC_PATH. In addition a DLL lib file is installed based on environment variable DEVX_LIB_PATH. The meson file is using the environment variables for compilation and linkage. Signed-off-by: Tal Shnaiderman Acked-by: Matan Azrad --- drivers/common/mlx5/windows/meson.build | 41 +++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 drivers/common/mlx5/windows/meson.build diff --git a/drivers/common/mlx5/windows/meson.build b/drivers/common/mlx5/windows/meson.build new file mode 100644 index 0000000000..4f9825ea19 --- /dev/null +++ b/drivers/common/mlx5/windows/meson.build @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright 2019 Mellanox Technologies, Ltd + +includes += include_directories('.') + +sources += files( + 'mlx5_glue.c', +) + +res_lib = run_command(python3, '-c', 'import os; print(os.environ["DEVX_LIB_PATH"])') +res_inc = run_command(python3, '-c', 'import os; print(os.environ["DEVX_INC_PATH"])') + +if (res_lib.returncode() != 0 or res_inc.returncode() != 0) + build = false + reason = 'DevX environment variables are not set, DEVX_LIB_PATH and DEVX_INC_PATH vars must be exported' + subdir_done() +endif + +devx_lib_dir = res_lib.stdout().strip() +devx_inc_dir = res_inc.stdout().strip() + +ext_deps += cc.find_library('mlx5devx', dirs: devx_lib_dir, required: true) +includes += include_directories(devx_inc_dir) +cflags_options = [ + '-std=c11', + '-Wno-strict-prototypes', + '-D_BSD_SOURCE', + '-D_DEFAULT_SOURCE', + '-D_XOPEN_SOURCE=600' +] +foreach option:cflags_options + if cc.has_argument(option) + cflags += option + endif +endforeach +if get_option('buildtype').contains('debug') + cflags += [ '-pedantic', '-DPEDANTIC' ] +else + cflags += [ '-UPEDANTIC' ] +endif + From patchwork Mon Dec 28 09:54:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85790 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id F112BA09FF; Mon, 28 Dec 2020 11:01:44 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 0FE36CB38; Mon, 28 Dec 2020 10:55:28 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id A313ECA4E for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:45 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDm012171; Mon, 28 Dec 2020 11:54:45 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:25 +0200 Message-Id: <20201228095436.14996-22-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 21/32] mlx5/windows: add initialization routine for external lib X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk Add function mlx5_glue_constructor() as an initialization routine for run-time dependency on external lib. Currently the routine has an empty body. It is used for compatibility with Linux. Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/common/mlx5/windows/meson.build | 1 + drivers/common/mlx5/windows/mlx5_common_os.c | 24 ++++++++++++++++++++++++ 2 files changed, 25 insertions(+) create mode 100644 drivers/common/mlx5/windows/mlx5_common_os.c diff --git a/drivers/common/mlx5/windows/meson.build b/drivers/common/mlx5/windows/meson.build index 4f9825ea19..e5a5be0708 100644 --- a/drivers/common/mlx5/windows/meson.build +++ b/drivers/common/mlx5/windows/meson.build @@ -5,6 +5,7 @@ includes += include_directories('.') sources += files( 'mlx5_glue.c', + 'mlx5_common_os.c', ) res_lib = run_command(python3, '-c', 'import os; print(os.environ["DEVX_LIB_PATH"])') diff --git a/drivers/common/mlx5/windows/mlx5_common_os.c b/drivers/common/mlx5/windows/mlx5_common_os.c new file mode 100644 index 0000000000..5707fb60c3 --- /dev/null +++ b/drivers/common/mlx5/windows/mlx5_common_os.c @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright 2020 Mellanox Technologies, Ltd + */ + +#include +#include +#include + +#include +#include +#include +#include + +#include "mlx5_devx_cmds.h" +#include "mlx5_common_utils.h" +#include + +/** + * Initialization routine for run-time dependency on external lib + */ +void +mlx5_glue_constructor(void) +{ +} From patchwork Mon Dec 28 09:54:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85785 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 55C31A09FF; Mon, 28 Dec 2020 10:59:57 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 9D477CADB; Mon, 28 Dec 2020 10:55:20 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 7757FCA49 for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:45 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDn012171; Mon, 28 Dec 2020 11:54:45 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:26 +0200 Message-Id: <20201228095436.14996-23-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 22/32] mlx5/windows: generate file mlx5_autoconf.h X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk File mlx5_autoconf.h is generated under Windows to maintain compatibility with the Linux build system. This file is included in Linux/Windows shared source files therefore it is required. Currently the file is created empty. Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/common/mlx5/windows/meson.build | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/common/mlx5/windows/meson.build b/drivers/common/mlx5/windows/meson.build index e5a5be0708..16349c34f1 100644 --- a/drivers/common/mlx5/windows/meson.build +++ b/drivers/common/mlx5/windows/meson.build @@ -40,3 +40,6 @@ else cflags += [ '-UPEDANTIC' ] endif +# Generate an empty mlx5_autoconf.h file for compatibility with Linux +config = configuration_data() +configure_file(output : 'mlx5_autoconf.h', configuration : config) From patchwork Mon Dec 28 09:54:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85802 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0F896A09FF; Mon, 28 Dec 2020 11:05:42 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id AAB67CCA9; Mon, 28 Dec 2020 10:55:52 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 18DDECA64 for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:45 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDo012171; Mon, 28 Dec 2020 11:54:45 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:27 +0200 Message-Id: <20201228095436.14996-24-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 23/32] common/mlx5/windows: extend PRM match_param_bits struct X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add reserved size to PRM 'struct mlx5_ifc_fte_match_param_bits' for non Linux OS. Windows drivers require this extension since their expected size should match the actual struct size. Linux drivers do not require this extension and already use calculations based on the shorter size. Use a static assert to verify that the PRM fte_match_param struct size remains correct. Signed-off-by: Tal Shnaiderman Acked-by: Matan Azrad --- drivers/common/mlx5/mlx5_prm.h | 7 +++++++ drivers/common/mlx5/windows/mlx5_glue.c | 3 +++ 2 files changed, 10 insertions(+) diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index 4ddf865743..27a4e4f0f1 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -815,6 +815,13 @@ struct mlx5_ifc_fte_match_param_bits { struct mlx5_ifc_fte_match_set_misc2_bits misc_parameters_2; struct mlx5_ifc_fte_match_set_misc3_bits misc_parameters_3; struct mlx5_ifc_fte_match_set_misc4_bits misc_parameters_4; +/* + * Add reserved bit to match the struct size with the size defined in PRM. + * This extension is not required in Linux. + */ +#ifndef HAVE_INFINIBAND_VERBS_H + u8 reserved_0[0x400]; +#endif }; enum { diff --git a/drivers/common/mlx5/windows/mlx5_glue.c b/drivers/common/mlx5/windows/mlx5_glue.c index 7f8a00aaa7..3896cf0932 100644 --- a/drivers/common/mlx5/windows/mlx5_glue.c +++ b/drivers/common/mlx5/windows/mlx5_glue.c @@ -256,6 +256,9 @@ mlx5_glue_devx_free_uar(void *uar) devx_free_uar((devx_uar_handle *)uar); } +static_assert(MLX5_ST_SZ_BYTES(fte_match_param) == 0x200, + "PRM size of fte_match_param is broken! cannot compile Windows!"); + static void* mlx5_glue_devx_fs_rule_add(void *ctx, void *in, uint32_t inlen) From patchwork Mon Dec 28 09:54:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85800 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id E2468A09FF; Mon, 28 Dec 2020 11:05:06 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D4458CC77; Mon, 28 Dec 2020 10:55:49 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 1354ACA63 for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:46 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDp012171; Mon, 28 Dec 2020 11:54:45 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:28 +0200 Message-Id: <20201228095436.14996-25-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 24/32] common/mlx5/windows: add getter functions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk Add file mlx5/windows/mlx5_common_os.h the equivalent of Linux file mlx5/linux/mlx5_common_os.h. It contains getters functions mlx5_os_get_dev_device_name, mlx5_os_get_ctx_device_name, mlx5_os_get_ctx_device_path, mlx5_os_get_umem_id, mlx5_os_get_devx_channel_fd. Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/common/mlx5/windows/mlx5_common_os.h | 91 ++++++++++++++++++++++++++++ 1 file changed, 91 insertions(+) diff --git a/drivers/common/mlx5/windows/mlx5_common_os.h b/drivers/common/mlx5/windows/mlx5_common_os.h index cce7c88c6a..2abdb2c3ae 100644 --- a/drivers/common/mlx5/windows/mlx5_common_os.h +++ b/drivers/common/mlx5/windows/mlx5_common_os.h @@ -48,4 +48,95 @@ mlx5_os_free(void *addr) { _aligned_free(addr); } + +/** + * Get fd. Given a pointer to DevX channel object of type + * 'struct mlx5dv_devx_event_channel*' - return its fd. + * Under Windows it is a stub. + * + * @param[in] channel + * Pointer to channel object. + * + * @return + * 0 + */ +static inline int +mlx5_os_get_devx_channel_fd(void *channel) +{ + if (!channel) + return 0; + return 0; +} + +/** + * Get device name. Given a device pointer - return a + * pointer to the corresponding device name. + * + * @param[in] dev + * Pointer to device. + * + * @return + * Pointer to device name if dev is valid, NULL otherwise. + */ +static inline const char * +mlx5_os_get_dev_device_name(void *dev) +{ + if (!dev) + return NULL; + return ((struct devx_device *)dev)->name; +} + +/** + * Get device name. Given a context pointer - return a + * pointer to the corresponding device name. + * + * @param[in] ctx + * Pointer to context. + * + * @return + * Pointer to device name if ctx is valid, NULL otherwise. + */ +static inline const char * +mlx5_os_get_ctx_device_name(void *ctx) +{ + if (!ctx) + return NULL; + return ((mlx5_context_st *)ctx)->mlx5_dev.name; +} + +/** + * Get a device path name. Given acontext pointer - return a + * pointer to the corresponding device path name. + * + * @param[in] ctx + * Pointer to context. + * + * @return + * Pointer to device path name if ctx is valid, NULL otherwise. + */ + +static inline const char * +mlx5_os_get_ctx_device_path(void *ctx) +{ + if (!ctx) + return NULL; + return ((mlx5_context_st *)ctx)->mlx5_dev.dev_pnp_id; +} + +/** + * Get umem id. Given a pointer to umem object of type return its id. + * + * @param[in] umem + * Pointer to umem object. + * + * @return + * The umem id if umem is valid, 0 otherwise. + */ +static inline uint32_t +mlx5_os_get_umem_id(void *umem) +{ + if (!umem) + return 0; + return ((struct mlx5_devx_umem *)umem)->umem_id; +} #endif /* RTE_PMD_MLX5_COMMON_OS_H_ */ From patchwork Mon Dec 28 09:54:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85798 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 17A6AA09FF; Mon, 28 Dec 2020 11:04:30 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 1D123CC54; Mon, 28 Dec 2020 10:55:47 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id E62CCCA45 for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:46 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDq012171; Mon, 28 Dec 2020 11:54:45 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:29 +0200 Message-Id: <20201228095436.14996-26-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 25/32] common/mlx5/windows: add OS alloc/dealloc pd X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Implement Windows API mlx5_os_alloc_pd() and mlx5_os_dealloc_pd(). They are equivalent to the Linux implementation in [1]. [1] ("net/mlx5: wrap glue alloc/dealloc PD with OS calls") Signed-off-by: Tal Shnaiderman Acked-by: Matan Azrad --- drivers/common/mlx5/rte_common_mlx5_exports.def | 3 +- drivers/common/mlx5/windows/mlx5_common_os.c | 48 +++++++++++++++++++++++++ drivers/common/mlx5/windows/mlx5_common_os.h | 3 ++ drivers/common/mlx5/windows/mlx5_win_ext.h | 6 ++++ 4 files changed, 59 insertions(+), 1 deletion(-) diff --git a/drivers/common/mlx5/rte_common_mlx5_exports.def b/drivers/common/mlx5/rte_common_mlx5_exports.def index 2f6aab133b..5db1eaa48c 100644 --- a/drivers/common/mlx5/rte_common_mlx5_exports.def +++ b/drivers/common/mlx5/rte_common_mlx5_exports.def @@ -61,4 +61,5 @@ EXPORTS mlx5_malloc mlx5_realloc mlx5_free - + mlx5_os_alloc_pd + mlx5_os_dealloc_pd diff --git a/drivers/common/mlx5/windows/mlx5_common_os.c b/drivers/common/mlx5/windows/mlx5_common_os.c index 5707fb60c3..85537b6739 100644 --- a/drivers/common/mlx5/windows/mlx5_common_os.c +++ b/drivers/common/mlx5/windows/mlx5_common_os.c @@ -22,3 +22,51 @@ void mlx5_glue_constructor(void) { } + +/** + * Allocate PD. Given a devx context object + * return an mlx5-pd object. + * + * @param[in] ctx + * Pointer to context. + * + * @return + * The mlx5_pd if pd is valid, NULL and errno otherwise. + */ +void * +mlx5_os_alloc_pd(void *ctx) +{ + struct mlx5_pd *ppd = mlx5_malloc(MLX5_MEM_ZERO, + sizeof(struct mlx5_pd), 0, SOCKET_ID_ANY); + if (!ppd) + return NULL; + + struct mlx5_devx_obj *obj = mlx5_devx_cmd_alloc_pd(ctx); + if (!obj) { + mlx5_free(ppd); + return NULL; + } + ppd->obj = obj; + ppd->pdn = obj->id; + ppd->devx_ctx = ctx; + return ppd; +} + +/** + * Release PD. Releases a given mlx5_pd object + * + * @param[in] pd + * Pointer to mlx5_pd. + * + * @return + * Zero if pd is released successfully, negative number otherwise. + */ +int +mlx5_os_dealloc_pd(void *pd) +{ + if (!pd) + return -EINVAL; + mlx5_devx_cmd_destroy(((struct mlx5_pd *)pd)->obj); + mlx5_free(pd); + return 0; +} diff --git a/drivers/common/mlx5/windows/mlx5_common_os.h b/drivers/common/mlx5/windows/mlx5_common_os.h index 2abdb2c3ae..f47351ec41 100644 --- a/drivers/common/mlx5/windows/mlx5_common_os.h +++ b/drivers/common/mlx5/windows/mlx5_common_os.h @@ -139,4 +139,7 @@ mlx5_os_get_umem_id(void *umem) return 0; return ((struct mlx5_devx_umem *)umem)->umem_id; } + +void *mlx5_os_alloc_pd(void *ctx); +int mlx5_os_dealloc_pd(void *pd); #endif /* RTE_PMD_MLX5_COMMON_OS_H_ */ diff --git a/drivers/common/mlx5/windows/mlx5_win_ext.h b/drivers/common/mlx5/windows/mlx5_win_ext.h index 0e74910e9d..8e697b30c1 100644 --- a/drivers/common/mlx5/windows/mlx5_win_ext.h +++ b/drivers/common/mlx5/windows/mlx5_win_ext.h @@ -28,6 +28,12 @@ struct mlx5_devx_umem { uint32_t umem_id; }; +struct mlx5_pd { + void *obj; + uint32_t pdn; + devx_device_ctx *devx_ctx; +}; + #define GET_DEVX_CTX(ctx) (((mlx5_context_st *)ctx)->devx_ctx) #define GET_OBJ_CTX(obj) (((mlx5_devx_obj_st *)obj)->devx_ctx) From patchwork Mon Dec 28 09:54:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85794 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 57816A09FF; Mon, 28 Dec 2020 11:03:03 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 87BE8CB96; Mon, 28 Dec 2020 10:55:40 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id E8055CA60 for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:46 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDr012171; Mon, 28 Dec 2020 11:54:46 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:30 +0200 Message-Id: <20201228095436.14996-27-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 26/32] common/mlx5/windows: add OS umem reg/dereg API X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Implement Windows API mlx5_os_umem_reg() and mlx5_os_umem_dereg(). They are equivalent to the Linux implementation. Signed-off-by: Tal Shnaiderman Acked-by: Matan Azrad --- drivers/common/mlx5/rte_common_mlx5_exports.def | 2 + drivers/common/mlx5/windows/mlx5_common_os.c | 60 +++++++++++++++++++++++++ drivers/common/mlx5/windows/mlx5_common_os.h | 2 + 3 files changed, 64 insertions(+) diff --git a/drivers/common/mlx5/rte_common_mlx5_exports.def b/drivers/common/mlx5/rte_common_mlx5_exports.def index 5db1eaa48c..1eabe29a58 100644 --- a/drivers/common/mlx5/rte_common_mlx5_exports.def +++ b/drivers/common/mlx5/rte_common_mlx5_exports.def @@ -63,3 +63,5 @@ EXPORTS mlx5_free mlx5_os_alloc_pd mlx5_os_dealloc_pd + mlx5_os_umem_reg + mlx5_os_umem_dereg diff --git a/drivers/common/mlx5/windows/mlx5_common_os.c b/drivers/common/mlx5/windows/mlx5_common_os.c index 85537b6739..cbb09906bd 100644 --- a/drivers/common/mlx5/windows/mlx5_common_os.c +++ b/drivers/common/mlx5/windows/mlx5_common_os.c @@ -70,3 +70,63 @@ mlx5_os_dealloc_pd(void *pd) mlx5_free(pd); return 0; } + +/** + * Register umem. + * + * @param[in] ctx + * Pointer to context. + * @param[in] addr + * Pointer to memory start address. + * @param[in] size + * Size of the memory to register. + * @param[out] access + * UMEM access type + * + * @return + * umem on successful registration, NULL and errno otherwise + */ +void * +mlx5_os_umem_reg(void *ctx, void *addr, size_t size, uint32_t access) +{ + struct mlx5_devx_umem *umem; + + umem = mlx5_malloc(MLX5_MEM_ZERO, + (sizeof(*umem)), 0, SOCKET_ID_ANY); + if (!umem) { + errno = ENOMEM; + return NULL; + } + umem->umem_hdl = mlx5_glue->devx_umem_reg(ctx, addr, size, access, + &umem->umem_id); + if (!umem->umem_hdl) { + mlx5_free(umem); + return NULL; + } + umem->addr = addr; + return umem; +} + +/** + * Deregister umem. + * + * @param[in] pumem + * Pointer to umem. + * + * @return + * 0 on successful release, negative number otherwise + */ +int +mlx5_os_umem_dereg(void *pumem) +{ + struct mlx5_devx_umem *umem; + int err = 0; + + if (!pumem) + return err; + umem = pumem; + if (umem->umem_hdl) + err = mlx5_glue->devx_umem_dereg(umem->umem_hdl); + mlx5_free(umem); + return err; +} diff --git a/drivers/common/mlx5/windows/mlx5_common_os.h b/drivers/common/mlx5/windows/mlx5_common_os.h index f47351ec41..decb5acd45 100644 --- a/drivers/common/mlx5/windows/mlx5_common_os.h +++ b/drivers/common/mlx5/windows/mlx5_common_os.h @@ -142,4 +142,6 @@ mlx5_os_get_umem_id(void *umem) void *mlx5_os_alloc_pd(void *ctx); int mlx5_os_dealloc_pd(void *pd); +void *mlx5_os_umem_reg(void *ctx, void *addr, size_t size, uint32_t access); +int mlx5_os_umem_dereg(void *pumem); #endif /* RTE_PMD_MLX5_COMMON_OS_H_ */ From patchwork Mon Dec 28 09:54:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85799 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 92D45A09FF; Mon, 28 Dec 2020 11:04:48 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 873B7CC65; Mon, 28 Dec 2020 10:55:48 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 01C60CA44 for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:46 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDs012171; Mon, 28 Dec 2020 11:54:46 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:31 +0200 Message-Id: <20201228095436.14996-28-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 27/32] net/mlx5: update MR prototypes for DevX X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk Currently MR operations are Verbs based. This commit updates MR operations prototypes such that DevX MR operations callbacks can be used as well. Rename 'struct mlx5_verbs_ops' as 'struct mlx5_mr_ops' and move it to shared file mlx5.h. Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/net/mlx5/linux/mlx5_os.c | 4 ++-- drivers/net/mlx5/linux/mlx5_verbs.c | 2 +- drivers/net/mlx5/linux/mlx5_verbs.h | 8 +------- drivers/net/mlx5/mlx5.h | 6 ++++++ 4 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c index a6c1eba640..4f68c74267 100644 --- a/drivers/net/mlx5/linux/mlx5_os.c +++ b/drivers/net/mlx5/linux/mlx5_os.c @@ -2478,8 +2478,8 @@ void mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb, mlx5_dereg_mr_t *dereg_mr_cb) { - *reg_mr_cb = mlx5_verbs_ops.reg_mr; - *dereg_mr_cb = mlx5_verbs_ops.dereg_mr; + *reg_mr_cb = mlx5_mr_verbs_ops.reg_mr; + *dereg_mr_cb = mlx5_mr_verbs_ops.dereg_mr; } /** diff --git a/drivers/net/mlx5/linux/mlx5_verbs.c b/drivers/net/mlx5/linux/mlx5_verbs.c index 9161fa3b7d..b52ae2e6c1 100644 --- a/drivers/net/mlx5/linux/mlx5_verbs.c +++ b/drivers/net/mlx5/linux/mlx5_verbs.c @@ -62,7 +62,7 @@ mlx5_dereg_mr(struct mlx5_pmd_mr *pmd_mr) } /* verbs operations. */ -const struct mlx5_verbs_ops mlx5_verbs_ops = { +const struct mlx5_mr_ops mlx5_mr_verbs_ops = { .reg_mr = mlx5_reg_mr, .dereg_mr = mlx5_dereg_mr, }; diff --git a/drivers/net/mlx5/linux/mlx5_verbs.h b/drivers/net/mlx5/linux/mlx5_verbs.h index 0670f6c47e..76a79bf4f4 100644 --- a/drivers/net/mlx5/linux/mlx5_verbs.h +++ b/drivers/net/mlx5/linux/mlx5_verbs.h @@ -7,16 +7,10 @@ #include "mlx5.h" -struct mlx5_verbs_ops { - mlx5_reg_mr_t reg_mr; - mlx5_dereg_mr_t dereg_mr; -}; - int mlx5_txq_ibv_obj_new(struct rte_eth_dev *dev, uint16_t idx); void mlx5_txq_ibv_obj_release(struct mlx5_txq_obj *txq_obj); /* Verbs ops struct */ -extern const struct mlx5_verbs_ops mlx5_verbs_ops; +extern const struct mlx5_mr_ops mlx5_mr_verbs_ops; extern struct mlx5_obj_ops ibv_obj_ops; - #endif /* RTE_PMD_MLX5_VERBS_H_ */ diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 2186677810..a9db597f2b 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -917,6 +917,12 @@ struct mlx5_obj_ops { #define MLX5_RSS_HASH_FIELDS_LEN RTE_DIM(mlx5_rss_hash_fields) +/* MR operations structure. */ +struct mlx5_mr_ops { + mlx5_reg_mr_t reg_mr; + mlx5_dereg_mr_t dereg_mr; +}; + struct mlx5_priv { struct rte_eth_dev_data *dev_data; /* Pointer to device data. */ struct mlx5_dev_ctx_shared *sh; /* Shared device context. */ From patchwork Mon Dec 28 09:54:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85786 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 42D1FA09FF; Mon, 28 Dec 2020 11:00:25 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 2200CCAE3; Mon, 28 Dec 2020 10:55:22 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 900B8CA4B for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:46 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDt012171; Mon, 28 Dec 2020 11:54:46 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:32 +0200 Message-Id: <20201228095436.14996-29-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 28/32] common/mlx5/windows: add OS reg/dereg MR X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk This commits implements Windows API for MR registration and deregistration. It is based on DevX. Is support the relaxed ordering flow in Windows by checking the capabilities and machine type. Signed-off-by: Ophir Munk Signed-off-by: Tal Shnaiderman Acked-by: Matan Azrad --- drivers/common/mlx5/mlx5_common_mr.h | 1 + drivers/common/mlx5/rte_common_mlx5_exports.def | 2 + drivers/common/mlx5/windows/mlx5_common_os.c | 78 +++++++++++++++++++++++++ drivers/common/mlx5/windows/mlx5_common_os.h | 7 +++ 4 files changed, 88 insertions(+) diff --git a/drivers/common/mlx5/mlx5_common_mr.h b/drivers/common/mlx5/mlx5_common_mr.h index da0a0f0c79..5cc3f097c2 100644 --- a/drivers/common/mlx5/mlx5_common_mr.h +++ b/drivers/common/mlx5/mlx5_common_mr.h @@ -28,6 +28,7 @@ struct mlx5_pmd_mr { void *addr; size_t len; void *obj; /* verbs mr object or devx umem object. */ + struct mlx5_devx_obj *mkey; /* devx mkey object. */ }; /** diff --git a/drivers/common/mlx5/rte_common_mlx5_exports.def b/drivers/common/mlx5/rte_common_mlx5_exports.def index 1eabe29a58..65ae47ae6a 100644 --- a/drivers/common/mlx5/rte_common_mlx5_exports.def +++ b/drivers/common/mlx5/rte_common_mlx5_exports.def @@ -63,5 +63,7 @@ EXPORTS mlx5_free mlx5_os_alloc_pd mlx5_os_dealloc_pd + mlx5_os_dereg_mr + mlx5_os_reg_mr mlx5_os_umem_reg mlx5_os_umem_dereg diff --git a/drivers/common/mlx5/windows/mlx5_common_os.c b/drivers/common/mlx5/windows/mlx5_common_os.c index cbb09906bd..84ed561dc0 100644 --- a/drivers/common/mlx5/windows/mlx5_common_os.c +++ b/drivers/common/mlx5/windows/mlx5_common_os.c @@ -14,6 +14,8 @@ #include "mlx5_devx_cmds.h" #include "mlx5_common_utils.h" #include +#include "mlx5_common_os.h" +#include "mlx5_malloc.h" /** * Initialization routine for run-time dependency on external lib @@ -130,3 +132,79 @@ mlx5_os_umem_dereg(void *pumem) mlx5_free(umem); return err; } + +/** + * Register mr. Given protection doamin pointer, pointer to addr and length + * register the memory region. + * + * @param[in] pd + * Pointer to protection domain context (type mlx5_pd). + * @param[in] addr + * Pointer to memory start address (type devx_device_ctx). + * @param[in] length + * Lengtoh of the memory to register. + * @param[out] pmd_mr + * pmd_mr struct set with lkey, address, length, pointer to mr object, mkey + * + * @return + * 0 on successful registration, -1 otherwise + */ +int +mlx5_os_reg_mr(void *pd, + void *addr, size_t length, struct mlx5_pmd_mr *pmd_mr) +{ + struct mlx5_devx_mkey_attr mkey_attr; + struct mlx5_pd *mlx5_pd = (struct mlx5_pd *)pd; + struct mlx5_hca_attr attr; + + if (!pd || !addr) { + rte_errno = EINVAL; + return -1; + } + memset(pmd_mr, 0, sizeof(*pmd_mr)); + if (mlx5_devx_cmd_query_hca_attr(mlx5_pd->devx_ctx, &attr)) + return -1; + pmd_mr->addr = addr; + pmd_mr->len = length; + pmd_mr->obj = mlx5_os_umem_reg(mlx5_pd->devx_ctx, pmd_mr->addr, + pmd_mr->len, IBV_ACCESS_LOCAL_WRITE); + if (!pmd_mr->obj) + return -1; + mkey_attr.addr = (uintptr_t)addr; + mkey_attr.size = length; + mkey_attr.umem_id = ((struct mlx5_devx_umem *)(pmd_mr->obj))->umem_id; + mkey_attr.pd = mlx5_pd->pdn; + mkey_attr.log_entity_size = 0; + mkey_attr.pg_access = 0; + mkey_attr.klm_array = NULL; + mkey_attr.klm_num = 0; + mkey_attr.relaxed_ordering_read = 0; + mkey_attr.relaxed_ordering_write = 0; + if (!haswell_broadwell_cpu) { + mkey_attr.relaxed_ordering_write = attr.relaxed_ordering_write; + mkey_attr.relaxed_ordering_read = attr.relaxed_ordering_read; + } + pmd_mr->mkey = mlx5_devx_cmd_mkey_create(mlx5_pd->devx_ctx, &mkey_attr); + if (!pmd_mr->mkey) { + claim_zero(mlx5_os_umem_dereg(pmd_mr->obj)); + return -1; + } + pmd_mr->lkey = pmd_mr->mkey->id; + return 0; +} + +/** + * De-register mr. + * + * @param[in] pmd_mr + * Pointer to PMD mr object + */ +void +mlx5_os_dereg_mr(struct mlx5_pmd_mr *pmd_mr) +{ + if (pmd_mr && pmd_mr->mkey) + claim_zero(mlx5_glue->devx_obj_destroy(pmd_mr->mkey->obj)); + if (pmd_mr && pmd_mr->obj) + claim_zero(mlx5_os_umem_dereg(pmd_mr->obj)); + memset(pmd_mr, 0, sizeof(*pmd_mr)); +} diff --git a/drivers/common/mlx5/windows/mlx5_common_os.h b/drivers/common/mlx5/windows/mlx5_common_os.h index decb5acd45..ba166412cc 100644 --- a/drivers/common/mlx5/windows/mlx5_common_os.h +++ b/drivers/common/mlx5/windows/mlx5_common_os.h @@ -7,9 +7,13 @@ #include +#include + #include "mlx5_autoconf.h" #include "mlx5_glue.h" #include "mlx5_malloc.h" +#include "mlx5_common_mr.h" +#include "mlx5_win_ext.h" /** * This API allocates aligned or non-aligned memory. The free can be on either @@ -144,4 +148,7 @@ void *mlx5_os_alloc_pd(void *ctx); int mlx5_os_dealloc_pd(void *pd); void *mlx5_os_umem_reg(void *ctx, void *addr, size_t size, uint32_t access); int mlx5_os_umem_dereg(void *pumem); +int mlx5_os_reg_mr(void *pd, + void *addr, size_t length, struct mlx5_pmd_mr *pmd_mr); +void mlx5_os_dereg_mr(struct mlx5_pmd_mr *pmd_mr); #endif /* RTE_PMD_MLX5_COMMON_OS_H_ */ From patchwork Mon Dec 28 09:54:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85789 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 95B79A09FF; Mon, 28 Dec 2020 11:01:25 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 98B16CB26; Mon, 28 Dec 2020 10:55:26 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id A0190CA4C for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:46 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDu012171; Mon, 28 Dec 2020 11:54:46 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:33 +0200 Message-Id: <20201228095436.14996-30-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 29/32] net/mlx5/windows: implement device attribute getter X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk This commit is the Windows implementation of mlx5_os_get_dev_attr() API. It follows the commit in [1]. A new file named mlx5_os.c is added under windows directory as its Linux counterpart file: linux/mlx5_os.c. [1]. commit e85f623e13ea ("net/mlx5: remove attributes dependency on Verbs") Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/common/mlx5/mlx5_prm.h | 43 +++++++++++++++++++++ drivers/net/mlx5/windows/meson.build | 8 ++++ drivers/net/mlx5/windows/mlx5_os.c | 75 ++++++++++++++++++++++++++++++++++++ 3 files changed, 126 insertions(+) create mode 100644 drivers/net/mlx5/windows/meson.build create mode 100644 drivers/net/mlx5/windows/mlx5_os.c diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index 27a4e4f0f1..d62d2558eb 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -2217,6 +2217,49 @@ struct mlx5_ifc_cqc_bits { u8 dbr_addr[0x40]; }; +struct mlx5_ifc_health_buffer_bits { + u8 reserved_0[0x100]; + u8 assert_existptr[0x20]; + u8 assert_callra[0x20]; + u8 reserved_1[0x40]; + u8 fw_version[0x20]; + u8 hw_id[0x20]; + u8 reserved_2[0x20]; + u8 irisc_index[0x8]; + u8 synd[0x8]; + u8 ext_synd[0x10]; +}; + +struct mlx5_ifc_initial_seg_bits { + u8 fw_rev_minor[0x10]; + u8 fw_rev_major[0x10]; + u8 cmd_interface_rev[0x10]; + u8 fw_rev_subminor[0x10]; + u8 reserved_0[0x40]; + u8 cmdq_phy_addr_63_32[0x20]; + u8 cmdq_phy_addr_31_12[0x14]; + u8 reserved_1[0x2]; + u8 nic_interface[0x2]; + u8 log_cmdq_size[0x4]; + u8 log_cmdq_stride[0x4]; + u8 command_doorbell_vector[0x20]; + u8 reserved_2[0xf00]; + u8 initializing[0x1]; + u8 nic_interface_supported[0x7]; + u8 reserved_4[0x18]; + struct mlx5_ifc_health_buffer_bits health_buffer; + u8 no_dram_nic_offset[0x20]; + u8 reserved_5[0x6de0]; + u8 internal_timer_h[0x20]; + u8 internal_timer_l[0x20]; + u8 reserved_6[0x20]; + u8 reserved_7[0x1f]; + u8 clear_int[0x1]; + u8 health_syndrome[0x8]; + u8 health_counter[0x18]; + u8 reserved_8[0x17fc0]; +}; + struct mlx5_ifc_create_cq_out_bits { u8 status[0x8]; u8 reserved_at_8[0x18]; diff --git a/drivers/net/mlx5/windows/meson.build b/drivers/net/mlx5/windows/meson.build new file mode 100644 index 0000000000..2ea0792a40 --- /dev/null +++ b/drivers/net/mlx5/windows/meson.build @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright 2020 Mellanox Technologies, Ltd + +includes += include_directories('.') +sources += files( + 'mlx5_os.c', +) + diff --git a/drivers/net/mlx5/windows/mlx5_os.c b/drivers/net/mlx5/windows/mlx5_os.c new file mode 100644 index 0000000000..e0646670a3 --- /dev/null +++ b/drivers/net/mlx5/windows/mlx5_os.c @@ -0,0 +1,75 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright 2020 Mellanox Technologies, Ltd + */ + +#include +#include +#include +#include +#include + +#include + +#include +#include +#include + +#include "mlx5_defs.h" +#include "mlx5.h" +#include "mlx5_autoconf.h" + +/** + * Get mlx5 device attributes. + * + * @param ctx + * Pointer to device context. + * + * @param device_attr + * Pointer to mlx5 device attributes. + * + * @return + * 0 on success, non zero error number otherwise + */ +int +mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr) +{ + struct mlx5_context *mlx5_ctx; + struct mlx5_hca_attr hca_attr; + void *pv_iseg = NULL; + u32 cb_iseg = 0; + int err = 0; + + if (!ctx) + return -EINVAL; + mlx5_ctx = (struct mlx5_context *)ctx; + memset(device_attr, 0, sizeof(*device_attr)); + err = mlx5_devx_cmd_query_hca_attr(mlx5_ctx, &hca_attr); + if (err) { + DRV_LOG(ERR, "Failed to get device hca_cap"); + return err; + } + device_attr->max_cq = 1 << hca_attr.log_max_cq; + device_attr->max_qp = 1 << hca_attr.log_max_qp; + device_attr->max_qp_wr = 1 << hca_attr.log_max_qp_sz; + device_attr->max_cqe = 1 << hca_attr.log_max_cq_sz; + device_attr->max_mr = 1 << hca_attr.log_max_mrw_sz; + device_attr->max_pd = 1 << hca_attr.log_max_pd; + device_attr->max_srq = 1 << hca_attr.log_max_srq; + device_attr->max_srq_wr = 1 << hca_attr.log_max_srq_sz; + if (hca_attr.rss_ind_tbl_cap) { + device_attr->max_rwq_indirection_table_size = + 1 << hca_attr.rss_ind_tbl_cap; + } + pv_iseg = mlx5_glue->query_hca_iseg(mlx5_ctx, &cb_iseg); + if (pv_iseg == NULL) { + DRV_LOG(ERR, "Failed to get device hca_iseg"); + return errno; + } + if (!err) { + snprintf(device_attr->fw_ver, 64, "%x.%x.%04x", + MLX5_GET(initial_seg, pv_iseg, fw_rev_major), + MLX5_GET(initial_seg, pv_iseg, fw_rev_minor), + MLX5_GET(initial_seg, pv_iseg, fw_rev_subminor)); + } + return err; +} From patchwork Mon Dec 28 09:54:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85791 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 04EABA09FF; Mon, 28 Dec 2020 11:02:03 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 73308CB46; Mon, 28 Dec 2020 10:55:29 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id A2DB5CA4D for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:46 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDv012171; Mon, 28 Dec 2020 11:54:46 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:34 +0200 Message-Id: <20201228095436.14996-31-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 30/32] net/mlx5/windows: add mlx5_os.c stubs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk mlx5_os_set_nonblock_channel_fd mlx5_os_dev_shared_handler_install mlx5_os_dev_shared_handler_uninstall mlx5_os_read_dev_stat mlx5_os_mac_addr_flush mlx5_os_mac_addr_remove mlx5_os_vf_mac_addr_modify mlx5_os_set_promisc mlx5_os_set_allmulti Set struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops with NULL pointers. Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/net/mlx5/windows/mlx5_os.c | 187 +++++++++++++++++++++++++++++++++++++ 1 file changed, 187 insertions(+) diff --git a/drivers/net/mlx5/windows/mlx5_os.c b/drivers/net/mlx5/windows/mlx5_os.c index e0646670a3..a8bef70fa2 100644 --- a/drivers/net/mlx5/windows/mlx5_os.c +++ b/drivers/net/mlx5/windows/mlx5_os.c @@ -13,10 +13,18 @@ #include #include #include +#include +#include +#include #include "mlx5_defs.h" #include "mlx5.h" +#include "mlx5_common_os.h" +#include "mlx5_utils.h" +#include "mlx5_rxtx.h" #include "mlx5_autoconf.h" +#include "mlx5_mr.h" +#include "mlx5_flow.h" /** * Get mlx5 device attributes. @@ -73,3 +81,182 @@ mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr) } return err; } + +/** + * Set the completion channel file descriptor interrupt as non-blocking. + * Currently it has no support under Windows. + * + * @param[in] rxq_obj + * Pointer to RQ channel object, which includes the channel fd + * + * @param[out] fd + * The file descriptor (representing the intetrrupt) used in this channel. + * + * @return + * 0 on successfully setting the fd to non-blocking, non-zero otherwise. + */ +int +mlx5_os_set_nonblock_channel_fd(int fd) +{ + (void)fd; + DRV_LOG(WARNING, "%s: is not supported", __func__); + return -ENOTSUP; +} + +/** + * This function should share events between multiple ports of single IB + * device. Currently it has no support under Windows. + * + * @param sh + * Pointer to mlx5_dev_ctx_shared object. + */ +void +mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh) +{ + (void)sh; + DRV_LOG(WARNING, "%s: is not supported", __func__); +} + +/** + * This function should share events between multiple ports of single IB + * device. Currently it has no support under Windows. + * + * @param dev + * Pointer to mlx5_dev_ctx_shared object. + */ +void +mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh) +{ + (void)sh; + DRV_LOG(WARNING, "%s: is not supported", __func__); +} + +/** + * Read statistics by a named counter. + * + * @param[in] priv + * Pointer to the private device data structure. + * @param[in] ctr_name + * Pointer to the name of the statistic counter to read + * @param[out] stat + * Pointer to read statistic value. + * @return + * 0 on success and stat is valud, 1 if failed to read the value + * rte_errno is set. + * + */ +int +mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name, + uint64_t *stat) +{ + RTE_SET_USED(priv); + RTE_SET_USED(ctr_name); + RTE_SET_USED(stat); + DRV_LOG(WARNING, "%s: is not supported", __func__); + return -ENOTSUP; +} + +/** + * Flush device MAC addresses + * Currently it has no support under Windows. + * + * @param dev + * Pointer to Ethernet device structure. + * + */ +void +mlx5_os_mac_addr_flush(struct rte_eth_dev *dev) +{ + (void)dev; + DRV_LOG(WARNING, "%s: is not supported", __func__); +} + +/** + * Remove a MAC address from device + * Currently it has no support under Windows. + * + * @param dev + * Pointer to Ethernet device structure. + * @param index + * MAC address index. + */ +void +mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index) +{ + (void)dev; + (void)(index); + DRV_LOG(WARNING, "%s: is not supported", __func__); +} + +/** + * Modify a VF MAC address + * Currently it has no support under Windows. + * + * @param priv + * Pointer to device private data. + * @param mac_addr + * MAC address to modify into. + * @param iface_idx + * Net device interface index + * @param vf_index + * VF index + * + * @return + * 0 on success, a negative errno value otherwise + */ +int +mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv, + unsigned int iface_idx, + struct rte_ether_addr *mac_addr, + int vf_index) +{ + (void)priv; + (void)iface_idx; + (void)mac_addr; + (void)vf_index; + DRV_LOG(WARNING, "%s: is not supported", __func__); + return -ENOTSUP; +} + +/** + * Set device promiscuous mode + * Currently it has no support under Windows. + * + * @param dev + * Pointer to Ethernet device structure. + * @param enable + * 0 - promiscuous is disabled, otherwise - enabled + * + * @return + * 0 on success, a negative error value otherwise + */ +int +mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable) +{ + (void)dev; + (void)enable; + DRV_LOG(WARNING, "%s: is not supported", __func__); + return -ENOTSUP; +} + +/** + * Set device allmulti mode + * + * @param dev + * Pointer to Ethernet device structure. + * @param enable + * 0 - all multicase is disabled, otherwise - enabled + * + * @return + * 0 on success, a negative error value otherwise + */ +int +mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable) +{ + (void)dev; + (void)enable; + DRV_LOG(WARNING, "%s: is not supported", __func__); + return -ENOTSUP; +} + +const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops = {0}; From patchwork Mon Dec 28 09:54:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85801 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0FEACA09FF; Mon, 28 Dec 2020 11:05:24 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 1FF41CCA0; Mon, 28 Dec 2020 10:55:51 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 104EFCA62 for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:47 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDw012171; Mon, 28 Dec 2020 11:54:46 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:35 +0200 Message-Id: <20201228095436.14996-32-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 31/32] net/mlx5/windows: implement mlx5 mac addr add X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Get the list of MAC addresses and verify if the input mac parameter already exists. If not - return -ENOTSUP (as Windows does not support adding new MAC addresses). If the MAC address exists (EEXIST) return 0 (the equivalent of Linux implementation of this API). Signed-off-by: Tal Shnaiderman Acked-by: Matan Azrad --- drivers/net/mlx5/windows/mlx5_os.c | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/drivers/net/mlx5/windows/mlx5_os.c b/drivers/net/mlx5/windows/mlx5_os.c index a8bef70fa2..0e5433e05b 100644 --- a/drivers/net/mlx5/windows/mlx5_os.c +++ b/drivers/net/mlx5/windows/mlx5_os.c @@ -188,6 +188,42 @@ mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index) DRV_LOG(WARNING, "%s: is not supported", __func__); } +/** + * Adds a MAC address to the device + * Currently it has no support under Windows. + * + * @param dev + * Pointer to Ethernet device structure. + * @param mac_addr + * MAC address to register. + * @param index + * MAC address index. + * + * @return + * 0 on success, a negative errno value otherwise + */ +int +mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac, + uint32_t index) +{ + (void)index; + struct rte_ether_addr lmac; + + if (mlx5_get_mac(dev, &lmac.addr_bytes)) { + DRV_LOG(ERR, + "port %u cannot get MAC address, is mlx5_en" + " loaded? (errno: %s)", + dev->data->port_id, strerror(rte_errno)); + return rte_errno; + } + if (!rte_is_same_ether_addr(&lmac, mac)) { + DRV_LOG(ERR, + "adding new mac address to device is unsupported"); + return -ENOTSUP; + } + return 0; +} + /** * Modify a VF MAC address * Currently it has no support under Windows. From patchwork Mon Dec 28 09:54:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Shnaiderman X-Patchwork-Id: 85793 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 449C0A09FF; Mon, 28 Dec 2020 11:02:44 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 3C3D1CA2E; Mon, 28 Dec 2020 10:55:39 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id DA165CA5E for ; Mon, 28 Dec 2020 10:54:51 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from talshn@nvidia.com) with SMTP; 28 Dec 2020 11:54:47 +0200 Received: from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BS9shDx012171; Mon, 28 Dec 2020 11:54:46 +0200 From: Tal Shnaiderman To: dev@dpdk.org Cc: thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com, ophirmu@nvidia.com Date: Mon, 28 Dec 2020 11:54:36 +0200 Message-Id: <20201228095436.14996-33-talshn@nvidia.com> X-Mailer: git-send-email 2.16.1.windows.4 In-Reply-To: <20201228095436.14996-1-talshn@nvidia.com> References: <20201213205005.7300-2-talshn@nvidia.com> <20201228095436.14996-1-talshn@nvidia.com> Subject: [dpdk-dev] [PATCH v5 32/32] net/mlx5: refactor eth dev ops for Windows X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk There are two types of eth_dev_ops used under Windows: primary and isolate mode. Their function calls initialization is added to the OS specific file mlx5_os.c. Secondary process eth_dev_ops is nullified. Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/net/mlx5/windows/mlx5_os.c | 108 +++++++++++++++++++++++++++++++++++++ 1 file changed, 108 insertions(+) diff --git a/drivers/net/mlx5/windows/mlx5_os.c b/drivers/net/mlx5/windows/mlx5_os.c index 0e5433e05b..7bcce9dae0 100644 --- a/drivers/net/mlx5/windows/mlx5_os.c +++ b/drivers/net/mlx5/windows/mlx5_os.c @@ -296,3 +296,111 @@ mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable) } const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops = {0}; + +const struct eth_dev_ops mlx5_os_dev_ops = { + .dev_configure = mlx5_dev_configure, + .dev_start = mlx5_dev_start, + .dev_stop = mlx5_dev_stop, + .dev_close = mlx5_dev_close, + .mtu_set = mlx5_dev_set_mtu, + .link_update = mlx5_link_update, + .stats_get = mlx5_stats_get, + .stats_reset = mlx5_stats_reset, + .dev_infos_get = mlx5_dev_infos_get, + .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get, + .promiscuous_enable = mlx5_promiscuous_enable, + .promiscuous_disable = mlx5_promiscuous_disable, + .allmulticast_enable = mlx5_allmulticast_enable, + .allmulticast_disable = mlx5_allmulticast_disable, + .xstats_get = mlx5_xstats_get, + .xstats_reset = mlx5_xstats_reset, + .xstats_get_names = mlx5_xstats_get_names, + .fw_version_get = mlx5_fw_version_get, + .read_clock = mlx5_read_clock, + .vlan_filter_set = mlx5_vlan_filter_set, + .rx_queue_setup = mlx5_rx_queue_setup, + .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup, + .tx_queue_setup = mlx5_tx_queue_setup, + .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup, + .rx_queue_release = mlx5_rx_queue_release, + .tx_queue_release = mlx5_tx_queue_release, + .flow_ctrl_get = mlx5_dev_get_flow_ctrl, + .flow_ctrl_set = mlx5_dev_set_flow_ctrl, + .mac_addr_remove = mlx5_mac_addr_remove, + .mac_addr_add = mlx5_mac_addr_add, + .mac_addr_set = mlx5_mac_addr_set, + .set_mc_addr_list = mlx5_set_mc_addr_list, + .vlan_strip_queue_set = mlx5_vlan_strip_queue_set, + .vlan_offload_set = mlx5_vlan_offload_set, + .reta_update = mlx5_dev_rss_reta_update, + .reta_query = mlx5_dev_rss_reta_query, + .rss_hash_update = mlx5_rss_hash_update, + .rss_hash_conf_get = mlx5_rss_hash_conf_get, + .filter_ctrl = mlx5_dev_filter_ctrl, + .rxq_info_get = mlx5_rxq_info_get, + .txq_info_get = mlx5_txq_info_get, + .rx_burst_mode_get = mlx5_rx_burst_mode_get, + .tx_burst_mode_get = mlx5_tx_burst_mode_get, + .rx_queue_intr_enable = mlx5_rx_intr_enable, + .rx_queue_intr_disable = mlx5_rx_intr_disable, + .is_removed = mlx5_is_removed, + .udp_tunnel_port_add = mlx5_udp_tunnel_port_add, + .get_module_info = mlx5_get_module_info, + .get_module_eeprom = mlx5_get_module_eeprom, + .hairpin_cap_get = mlx5_hairpin_cap_get, + .mtr_ops_get = mlx5_flow_meter_ops_get, +}; + +/* Available operations from secondary process. */ +const struct eth_dev_ops mlx5_os_dev_sec_ops = {0}; + +/* Available operations in flow isolated mode. */ +const struct eth_dev_ops mlx5_os_dev_ops_isolate = { + .dev_configure = mlx5_dev_configure, + .dev_start = mlx5_dev_start, + .dev_stop = mlx5_dev_stop, + .dev_close = mlx5_dev_close, + .mtu_set = mlx5_dev_set_mtu, + .link_update = mlx5_link_update, + .stats_get = mlx5_stats_get, + .stats_reset = mlx5_stats_reset, + .dev_infos_get = mlx5_dev_infos_get, + .dev_set_link_down = mlx5_set_link_down, + .dev_set_link_up = mlx5_set_link_up, + .promiscuous_enable = mlx5_promiscuous_enable, + .promiscuous_disable = mlx5_promiscuous_disable, + .allmulticast_enable = mlx5_allmulticast_enable, + .allmulticast_disable = mlx5_allmulticast_disable, + .xstats_get = mlx5_xstats_get, + .xstats_reset = mlx5_xstats_reset, + .xstats_get_names = mlx5_xstats_get_names, + .fw_version_get = mlx5_fw_version_get, + .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get, + .vlan_filter_set = mlx5_vlan_filter_set, + .rx_queue_setup = mlx5_rx_queue_setup, + .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup, + .tx_queue_setup = mlx5_tx_queue_setup, + .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup, + .rx_queue_release = mlx5_rx_queue_release, + .tx_queue_release = mlx5_tx_queue_release, + .flow_ctrl_get = mlx5_dev_get_flow_ctrl, + .flow_ctrl_set = mlx5_dev_set_flow_ctrl, + .mac_addr_remove = mlx5_mac_addr_remove, + .mac_addr_add = mlx5_mac_addr_add, + .mac_addr_set = mlx5_mac_addr_set, + .set_mc_addr_list = mlx5_set_mc_addr_list, + .vlan_strip_queue_set = mlx5_vlan_strip_queue_set, + .vlan_offload_set = mlx5_vlan_offload_set, + .filter_ctrl = mlx5_dev_filter_ctrl, + .rxq_info_get = mlx5_rxq_info_get, + .txq_info_get = mlx5_txq_info_get, + .rx_burst_mode_get = mlx5_rx_burst_mode_get, + .tx_burst_mode_get = mlx5_tx_burst_mode_get, + .rx_queue_intr_enable = mlx5_rx_intr_enable, + .rx_queue_intr_disable = mlx5_rx_intr_disable, + .is_removed = mlx5_is_removed, + .get_module_info = mlx5_get_module_info, + .get_module_eeprom = mlx5_get_module_eeprom, + .hairpin_cap_get = mlx5_hairpin_cap_get, + .mtr_ops_get = mlx5_flow_meter_ops_get, +};