From patchwork Fri Nov 13 11:37:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84117 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9DE81A09DE; Fri, 13 Nov 2020 12:38:31 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id E452AC876; Fri, 13 Nov 2020 12:38:12 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 6A13923D for ; Fri, 13 Nov 2020 12:38:10 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 326CCB9309; Fri, 13 Nov 2020 12:38:06 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Tviy_9Ddrbmi; Fri, 13 Nov 2020 12:38:05 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 00BC4B92E2; Fri, 13 Nov 2020 12:38:04 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, Dharmik Thakkar Date: Fri, 13 Nov 2020 12:37:49 +0100 Message-Id: <1605267483-13167-2-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605265789-12932-1-git-send-email-juraj.linkes@pantheon.tech> <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> Subject: [dpdk-dev] [PATCH v11 01/15] crypto/armv8: replace meson option with pkg-config support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Dharmik Thakkar With pkg-config support available within AArch64crypto library, meson option 'armv8_crypto_dir' can be removed. PKG_CONFIG_PATH environment variable should be set appropriately to use the crypto library. Suggested-by: Thomas Monjalon Signed-off-by: Dharmik Thakkar Reviewed-by: Ruifeng Wang Acked-by: Bruce Richardson --- doc/guides/cryptodevs/armv8.rst | 10 ++++++++-- drivers/crypto/armv8/meson.build | 19 ++++--------------- meson_options.txt | 2 -- 3 files changed, 12 insertions(+), 19 deletions(-) diff --git a/doc/guides/cryptodevs/armv8.rst b/doc/guides/cryptodevs/armv8.rst index f0f30fe00..8963f66a2 100644 --- a/doc/guides/cryptodevs/armv8.rst +++ b/doc/guides/cryptodevs/armv8.rst @@ -37,11 +37,17 @@ To build DPDK with this virtual crypto PMD, the user is required to: make -* Build DPDK with meson option ``-Darmv8_crypto_dir=``: +* Add path to `libAArch64crypto.pc` in `PKG_CONFIG_PATH` environment variable: .. code-block:: console - meson -Darmv8_crypto_dir= build + export PKG_CONFIG_PATH=/pkgconfig/:$PKG_CONFIG_PATH + +* Build DPDK: + +.. code-block:: console + + meson build ninja -C build The corresponding device can be created only if the following features diff --git a/drivers/crypto/armv8/meson.build b/drivers/crypto/armv8/meson.build index c445c5bd3..3289a2adc 100644 --- a/drivers/crypto/armv8/meson.build +++ b/drivers/crypto/armv8/meson.build @@ -1,24 +1,13 @@ # SPDX-License-Identifier: BSD-3-Clause # Copyright(c) 2019 Arm Limited -path = get_option('armv8_crypto_dir') -if path == '' +dep = dependency('libAArch64crypto', required: false) +if not dep.found() build = false - reason = 'missing dependency, "armv8_crypto"' + reason = 'missing dependency, "libAArch64crypto"' subdir_done() endif -inc_dir = path - -lib = cc.find_library('libAArch64crypto', dirs: [path], required: false) -if not lib.found() - build = false - reason = 'missing dependency, "AArch64crypto"' - subdir_done() -else - ext_deps += lib - includes += include_directories(inc_dir) -endif - +ext_deps += dep deps += ['bus_vdev'] sources = files('rte_armv8_pmd.c', 'rte_armv8_pmd_ops.c') diff --git a/meson_options.txt b/meson_options.txt index 9bf18ab6b..e384e6dbb 100644 --- a/meson_options.txt +++ b/meson_options.txt @@ -1,7 +1,5 @@ # Please keep these options sorted alphabetically. -option('armv8_crypto_dir', type: 'string', value: '', - description: 'path to the armv8_crypto library installation directory') option('disable_drivers', type: 'string', value: '', description: 'Comma-separated list of drivers to explicitly disable.') option('drivers_install_subdir', type: 'string', value: 'dpdk/pmds-', From patchwork Fri Nov 13 11:37:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84118 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7E67EA09DE; Fri, 13 Nov 2020 12:38:51 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 09BDFC88A; Fri, 13 Nov 2020 12:38:17 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 74DD6C86C for ; Fri, 13 Nov 2020 12:38:12 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 7B179B92E2; Fri, 13 Nov 2020 12:38:09 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id kU4nLCmHuib2; Fri, 13 Nov 2020 12:38:08 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id A6E00B92EC; Fri, 13 Nov 2020 12:38:05 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Fri, 13 Nov 2020 12:37:50 +0100 Message-Id: <1605267483-13167-3-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605265789-12932-1-git-send-email-juraj.linkes@pantheon.tech> <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v11 02/15] build: alias default build as generic X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The current machine='default' build name is not descriptive. The actual default build is machine='native'. Add an alternative string which does the same build and better describes what we're building: machine='generic'. Leave machine='default' for backwards compatibility. Signed-off-by: Juraj Linkeš Reviewed-by: Honnappa Nagarahalli --- config/arm/meson.build | 5 +++-- config/meson.build | 9 +++++---- doc/guides/prog_guide/build-sdk-meson.rst | 4 ++-- meson_options.txt | 2 +- 4 files changed, 11 insertions(+), 9 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index 42b4e43c7..d4066ade8 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -1,12 +1,13 @@ # SPDX-License-Identifier: BSD-3-Clause # Copyright(c) 2017 Intel Corporation. # Copyright(c) 2017 Cavium, Inc +# Copyright(c) 2020 PANTHEON.tech s.r.o. # for checking defines we need to use the correct compiler flags march_opt = '-march=@0@'.format(machine) arm_force_native_march = false -arm_force_default_march = (machine == 'default') +arm_force_generic_march = (machine == 'generic') flags_common_default = [ # Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) @@ -148,7 +149,7 @@ else cmd_generic = ['generic', '', '', 'default', ''] cmd_output = cmd_generic # Set generic by default machine_args = [] # Clear previous machine args - if arm_force_default_march and not meson.is_cross_build() + if arm_force_generic_march and not meson.is_cross_build() machine = impl_generic impl_pn = 'default' elif not meson.is_cross_build() diff --git a/config/meson.build b/config/meson.build index 258b01d06..c7f7aa6e2 100644 --- a/config/meson.build +++ b/config/meson.build @@ -68,13 +68,14 @@ else machine = get_option('machine') endif -# machine type 'default' is special, it defaults to the per arch agreed common -# minimal baseline needed for DPDK. +# machine type 'generic' is special, it defaults to the per arch agreed common +# minimal baseline needed for DPDK. Machine type 'default' is also supported +# with the same meaning for backwards compatibility. # That might not be the most optimized, but the most portable version while # still being able to support the CPU features required for DPDK. # This can be bumped up by the DPDK project, but it can never be an # invariant like 'native' -if machine == 'default' +if machine == 'default' or machine == 'generic' if host_machine.cpu_family().startswith('x86') # matches the old pre-meson build systems default machine = 'corei7' @@ -82,7 +83,7 @@ if machine == 'default' machine = 'armv7-a' elif host_machine.cpu_family().startswith('aarch') # arm64 manages defaults in config/arm/meson.build - machine = 'default' + machine = 'generic' elif host_machine.cpu_family().startswith('ppc') machine = 'power8' endif diff --git a/doc/guides/prog_guide/build-sdk-meson.rst b/doc/guides/prog_guide/build-sdk-meson.rst index 3429e2647..c7e12eedf 100644 --- a/doc/guides/prog_guide/build-sdk-meson.rst +++ b/doc/guides/prog_guide/build-sdk-meson.rst @@ -85,7 +85,7 @@ Project-specific options are passed used -Doption=value:: meson -Denable_docs=true fullbuild # build and install docs - meson -Dmachine=default # use builder-independent baseline -march + meson -Dmachine=generic # use builder-independent baseline -march meson -Ddisable_drivers=event/*,net/tap # disable tap driver and all # eventdev PMDs for a smaller build @@ -114,7 +114,7 @@ Examples of setting some of the same options using meson configure:: re-scan from meson. .. note:: - machine=default uses a config that works on all supported architectures + machine=generic uses a config that works on all supported architectures regardless of the capabilities of the machine where the build is happening. As well as those settings taken from ``meson configure``, other options diff --git a/meson_options.txt b/meson_options.txt index e384e6dbb..dd9b37f98 100644 --- a/meson_options.txt +++ b/meson_options.txt @@ -21,7 +21,7 @@ option('kernel_dir', type: 'string', value: '', option('lib_musdk_dir', type: 'string', value: '', description: 'path to the MUSDK library installation directory') option('machine', type: 'string', value: 'native', - description: 'set the target machine type') + description: 'set the target machine type. Set to generic for a build usable on all machines of the build machine architecture, set to native to let the compiler pick the architecture of the build machine.') option('max_ethports', type: 'integer', value: 32, description: 'maximum number of Ethernet devices') option('max_lcores', type: 'integer', value: 128, From patchwork Fri Nov 13 11:37:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84119 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 73851A09DE; Fri, 13 Nov 2020 12:39:08 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5E2D3C8B4; Fri, 13 Nov 2020 12:38:18 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 6C90FC87C for ; Fri, 13 Nov 2020 12:38:13 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 85905B9977; Fri, 13 Nov 2020 12:38:10 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id XdJGxqR7GO6s; Fri, 13 Nov 2020 12:38:09 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 5EF53B92F9; Fri, 13 Nov 2020 12:38:06 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Fri, 13 Nov 2020 12:37:51 +0100 Message-Id: <1605267483-13167-4-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605265789-12932-1-git-send-email-juraj.linkes@pantheon.tech> <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v11 03/15] build: rename Arm build variables X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Rename Arm build variables and values so that they better conform to Arm specifications. Also rename generically sounding variable to names that better capture what the variables hold. Rename machine_args_generic to part_number_config_arm since the variable contains more than just the generic machine args and is used mainly as the fallback arm configuration. Rename the default machine args to generic machine args to reflect that. The rest of the variables are self-explanatory. Signed-off-by: Juraj Linkeš Reviewed-by: Ruifeng Wang Reviewed-by: Honnappa Nagarahalli --- config/arm/arm64_armada_linux_gcc | 2 +- config/arm/arm64_armv8_linux_gcc | 8 +- config/arm/arm64_bluefield_linux_gcc | 4 +- config/arm/arm64_dpaa_linux_gcc | 2 +- config/arm/arm64_emag_linux_gcc | 2 +- config/arm/arm64_n1sdp_linux_gcc | 4 +- config/arm/arm64_octeontx2_linux_gcc | 4 +- config/arm/arm64_stingray_linux_gcc | 4 +- config/arm/arm64_thunderx2_linux_gcc | 4 +- config/arm/arm64_thunderx_linux_gcc | 2 +- config/arm/meson.build | 114 +++++++++++++-------------- 11 files changed, 75 insertions(+), 75 deletions(-) diff --git a/config/arm/arm64_armada_linux_gcc b/config/arm/arm64_armada_linux_gcc index fa40c0398..52c5f4476 100644 --- a/config/arm/arm64_armada_linux_gcc +++ b/config/arm/arm64_armada_linux_gcc @@ -14,4 +14,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x56' +implementer_id = '0x56' diff --git a/config/arm/arm64_armv8_linux_gcc b/config/arm/arm64_armv8_linux_gcc index 88f0ff9da..13ee8b223 100644 --- a/config/arm/arm64_armv8_linux_gcc +++ b/config/arm/arm64_armv8_linux_gcc @@ -13,10 +13,10 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = 'generic' +implementer_id = 'generic' -# Valid options for Arm's implementor_pn: -# 'default': valid for all armv8-a architectures (default value) +# Valid options for Arm's part_number: +# 'generic': valid for all armv8-a architectures (default value) # '0xd03': cortex-a53 # '0xd04': cortex-a35 # '0xd05': cortex-a55 @@ -25,4 +25,4 @@ implementor_id = 'generic' # '0xd09': cortex-a73 # '0xd0a': cortex-a75 # '0xd0b': cortex-a76 -implementor_pn = 'default' +part_number = 'generic' diff --git a/config/arm/arm64_bluefield_linux_gcc b/config/arm/arm64_bluefield_linux_gcc index 86797d23c..b79389d85 100644 --- a/config/arm/arm64_bluefield_linux_gcc +++ b/config/arm/arm64_bluefield_linux_gcc @@ -13,5 +13,5 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x41' -implementor_pn = '0xd08' +implementer_id = '0x41' +part_number = '0xd08' diff --git a/config/arm/arm64_dpaa_linux_gcc b/config/arm/arm64_dpaa_linux_gcc index 1a4682154..573ae7e42 100644 --- a/config/arm/arm64_dpaa_linux_gcc +++ b/config/arm/arm64_dpaa_linux_gcc @@ -14,4 +14,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = 'dpaa' +implementer_id = 'dpaa' diff --git a/config/arm/arm64_emag_linux_gcc b/config/arm/arm64_emag_linux_gcc index 8edcd3e97..24f3d533e 100644 --- a/config/arm/arm64_emag_linux_gcc +++ b/config/arm/arm64_emag_linux_gcc @@ -13,4 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x50' +implementer_id = '0x50' diff --git a/config/arm/arm64_n1sdp_linux_gcc b/config/arm/arm64_n1sdp_linux_gcc index 022e06303..6fb3f02ea 100644 --- a/config/arm/arm64_n1sdp_linux_gcc +++ b/config/arm/arm64_n1sdp_linux_gcc @@ -13,5 +13,5 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x41' -implementor_pn = '0xd0c' +implementer_id = '0x41' +part_number = '0xd0c' diff --git a/config/arm/arm64_octeontx2_linux_gcc b/config/arm/arm64_octeontx2_linux_gcc index 365bd7cbd..ac1042806 100644 --- a/config/arm/arm64_octeontx2_linux_gcc +++ b/config/arm/arm64_octeontx2_linux_gcc @@ -13,5 +13,5 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x43' -implementor_pn = '0xb2' +implementer_id = '0x43' +part_number = '0xb2' diff --git a/config/arm/arm64_stingray_linux_gcc b/config/arm/arm64_stingray_linux_gcc index 86797d23c..b79389d85 100644 --- a/config/arm/arm64_stingray_linux_gcc +++ b/config/arm/arm64_stingray_linux_gcc @@ -13,5 +13,5 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x41' -implementor_pn = '0xd08' +implementer_id = '0x41' +part_number = '0xd08' diff --git a/config/arm/arm64_thunderx2_linux_gcc b/config/arm/arm64_thunderx2_linux_gcc index 2b41acc61..dd257745e 100644 --- a/config/arm/arm64_thunderx2_linux_gcc +++ b/config/arm/arm64_thunderx2_linux_gcc @@ -13,5 +13,5 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x43' -implementor_pn = '0xaf' +implementer_id = '0x43' +part_number = '0xaf' diff --git a/config/arm/arm64_thunderx_linux_gcc b/config/arm/arm64_thunderx_linux_gcc index 6572ab615..670764437 100644 --- a/config/arm/arm64_thunderx_linux_gcc +++ b/config/arm/arm64_thunderx_linux_gcc @@ -13,4 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x43' +implementer_id = '0x43' diff --git a/config/arm/meson.build b/config/arm/meson.build index d4066ade8..704be567d 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -9,7 +9,7 @@ march_opt = '-march=@0@'.format(machine) arm_force_native_march = false arm_force_generic_march = (machine == 'generic') -flags_common_default = [ +flags_common = [ # Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) # to determine the best threshold in code. Refer to notes in source file # (lib/librte_eal/arm/include/rte_memcpy_64.h) for more info. @@ -29,58 +29,58 @@ flags_common_default = [ ['RTE_ARM_USE_WFE', false], ] -flags_generic = [ +flags_implementer_generic = [ ['RTE_MACHINE', '"armv8a"'], ['RTE_MAX_LCORE', 256], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 128]] -flags_arm = [ +flags_implementer_arm = [ ['RTE_MACHINE', '"armv8a"'], ['RTE_MAX_LCORE', 16], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 64]] -flags_cavium = [ +flags_implementer_cavium = [ ['RTE_CACHE_LINE_SIZE', 128], ['RTE_MAX_NUMA_NODES', 2], ['RTE_MAX_LCORE', 96], ['RTE_MAX_VFIO_GROUPS', 128]] -flags_dpaa = [ +flags_implementer_dpaa = [ ['RTE_MACHINE', '"dpaa"'], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 64], ['RTE_MAX_NUMA_NODES', 1], ['RTE_MAX_LCORE', 16], ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false]] -flags_emag = [ +flags_implementer_emag = [ ['RTE_MACHINE', '"emag"'], ['RTE_CACHE_LINE_SIZE', 64], ['RTE_MAX_NUMA_NODES', 1], ['RTE_MAX_LCORE', 32]] -flags_armada = [ +flags_implementer_armada = [ ['RTE_MACHINE', '"armv8a"'], ['RTE_CACHE_LINE_SIZE', 64], ['RTE_MAX_NUMA_NODES', 1], ['RTE_MAX_LCORE', 16]] -flags_default_extra = [] -flags_thunderx_extra = [ +flags_part_number_default = [] +flags_part_number_thunderx = [ ['RTE_MACHINE', '"thunderx"'], ['RTE_USE_C11_MEM_MODEL', false]] -flags_thunderx2_extra = [ +flags_part_number_thunderx2 = [ ['RTE_MACHINE', '"thunderx2"'], ['RTE_CACHE_LINE_SIZE', 64], ['RTE_MAX_NUMA_NODES', 2], ['RTE_MAX_LCORE', 256], ['RTE_ARM_FEATURE_ATOMICS', true], ['RTE_USE_C11_MEM_MODEL', true]] -flags_octeontx2_extra = [ +flags_part_number_octeontx2 = [ ['RTE_MACHINE', '"octeontx2"'], ['RTE_MAX_NUMA_NODES', 1], ['RTE_MAX_LCORE', 36], ['RTE_ARM_FEATURE_ATOMICS', true], ['RTE_EAL_IGB_UIO', false], ['RTE_USE_C11_MEM_MODEL', true]] -flags_n1generic_extra = [ +flags_part_number_n1generic = [ ['RTE_MACHINE', '"neoverse-n1"'], ['RTE_MAX_LCORE', 64], ['RTE_CACHE_LINE_SIZE', 64], @@ -91,8 +91,8 @@ flags_n1generic_extra = [ ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false], ['RTE_LIBRTE_VHOST_NUMA', false]] -machine_args_generic = [ - ['default', ['-march=armv8-a+crc', '-moutline-atomics']], +part_number_config_arm = [ + ['generic', ['-march=armv8-a+crc', '-moutline-atomics']], ['native', ['-march=native']], ['0xd03', ['-mcpu=cortex-a53']], ['0xd04', ['-mcpu=cortex-a35']], @@ -101,36 +101,36 @@ machine_args_generic = [ ['0xd09', ['-mcpu=cortex-a73']], ['0xd0a', ['-mcpu=cortex-a75']], ['0xd0b', ['-mcpu=cortex-a76']], - ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'], flags_n1generic_extra]] + ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'], flags_part_number_n1generic]] -machine_args_cavium = [ - ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']], +part_number_config_cavium = [ + ['generic', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']], ['native', ['-march=native']], - ['0xa1', ['-mcpu=thunderxt88'], flags_thunderx_extra], - ['0xa2', ['-mcpu=thunderxt81'], flags_thunderx_extra], - ['0xa3', ['-mcpu=thunderxt83'], flags_thunderx_extra], - ['0xaf', ['-march=armv8.1-a+crc+crypto','-mcpu=thunderx2t99'], flags_thunderx2_extra], - ['0xb2', ['-march=armv8.2-a+crc+crypto+lse','-mcpu=octeontx2'], flags_octeontx2_extra]] - -machine_args_emag = [ - ['default', ['-march=armv8-a+crc+crypto', '-mtune=emag']], + ['0xa1', ['-mcpu=thunderxt88'], flags_part_number_thunderx], + ['0xa2', ['-mcpu=thunderxt81'], flags_part_number_thunderx], + ['0xa3', ['-mcpu=thunderxt83'], flags_part_number_thunderx], + ['0xaf', ['-march=armv8.1-a+crc+crypto','-mcpu=thunderx2t99'], flags_part_number_thunderx2], + ['0xb2', ['-march=armv8.2-a+crc+crypto+lse','-mcpu=octeontx2'], flags_part_number_octeontx2]] + +part_number_config_emag = [ + ['generic', ['-march=armv8-a+crc+crypto', '-mtune=emag']], ['native', ['-march=native']]] ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321) -impl_generic = ['Generic armv8', flags_generic, machine_args_generic] -impl_0x41 = ['Arm', flags_arm, machine_args_generic] -impl_0x42 = ['Broadcom', flags_generic, machine_args_generic] -impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium] -impl_0x44 = ['DEC', flags_generic, machine_args_generic] -impl_0x49 = ['Infineon', flags_generic, machine_args_generic] -impl_0x4d = ['Motorola', flags_generic, machine_args_generic] -impl_0x4e = ['NVIDIA', flags_generic, machine_args_generic] -impl_0x50 = ['Ampere Computing', flags_emag, machine_args_emag] -impl_0x51 = ['Qualcomm', flags_generic, machine_args_generic] -impl_0x53 = ['Samsung', flags_generic, machine_args_generic] -impl_0x56 = ['Marvell ARMADA', flags_armada, machine_args_generic] -impl_0x69 = ['Intel', flags_generic, machine_args_generic] -impl_dpaa = ['NXP DPAA', flags_dpaa, machine_args_generic] +implementer_generic = ['Generic armv8', flags_implementer_generic, part_number_config_arm] +implementer_0x41 = ['Arm', flags_implementer_arm, part_number_config_arm] +implementer_0x42 = ['Broadcom', flags_implementer_generic, part_number_config_arm] +implementer_0x43 = ['Cavium', flags_implementer_cavium, part_number_config_cavium] +implementer_0x44 = ['DEC', flags_implementer_generic, part_number_config_arm] +implementer_0x49 = ['Infineon', flags_implementer_generic, part_number_config_arm] +implementer_0x4d = ['Motorola', flags_implementer_generic, part_number_config_arm] +implementer_0x4e = ['NVIDIA', flags_implementer_generic, part_number_config_arm] +implementer_0x50 = ['Ampere Computing', flags_implementer_emag, part_number_config_emag] +implementer_0x51 = ['Qualcomm', flags_implementer_generic, part_number_config_arm] +implementer_0x53 = ['Samsung', flags_implementer_generic, part_number_config_arm] +implementer_0x56 = ['Marvell ARMADA', flags_implementer_armada, part_number_config_arm] +implementer_0x69 = ['Intel', flags_implementer_generic, part_number_config_arm] +implementer_dpaa = ['NXP DPAA', flags_implementer_dpaa, part_number_config_arm] dpdk_conf.set('RTE_ARCH_ARM', 1) dpdk_conf.set('RTE_FORCE_INTRINSICS', 1) @@ -145,13 +145,13 @@ else dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128) dpdk_conf.set('RTE_ARCH_ARM64', 1) - machine = [] - cmd_generic = ['generic', '', '', 'default', ''] + implementer_config = [] + cmd_generic = ['generic', '', '', 'generic', ''] cmd_output = cmd_generic # Set generic by default machine_args = [] # Clear previous machine args if arm_force_generic_march and not meson.is_cross_build() - machine = impl_generic - impl_pn = 'default' + implementer_config = implementer_generic + part_number = 'generic' elif not meson.is_cross_build() # The script returns ['Implementer', 'Variant', 'Architecture', # 'Primary Part number', 'Revision'] @@ -162,45 +162,45 @@ else cmd_output = cmd.stdout().to_lower().strip().split(' ') endif # Set to generic if variable is not found - machine = get_variable('impl_' + cmd_output[0], ['generic']) - if machine[0] == 'generic' - machine = impl_generic + implementer_config = get_variable('implementer_' + cmd_output[0], ['generic']) + if implementer_config[0] == 'generic' + implementer_config = implementer_generic cmd_output = cmd_generic endif - impl_pn = cmd_output[3] + part_number = cmd_output[3] if arm_force_native_march == true - impl_pn = 'native' + part_number = 'native' endif else - impl_id = meson.get_cross_property('implementor_id', 'generic') - impl_pn = meson.get_cross_property('implementor_pn', 'default') - machine = get_variable('impl_' + impl_id) + implementer_id = meson.get_cross_property('implementer_id', 'generic') + part_number = meson.get_cross_property('part_number', 'generic') + implementer_config = get_variable('implementer_' + implementer_id) endif # Apply Common Defaults. These settings may be overwritten by machine # settings later. - foreach flag: flags_common_default + foreach flag: flags_common if flag.length() > 0 dpdk_conf.set(flag[0], flag[1]) endif endforeach - message('Implementer : ' + machine[0]) - foreach flag: machine[1] + message('Implementer : ' + implementer_config[0]) + foreach flag: implementer_config[1] if flag.length() > 0 dpdk_conf.set(flag[0], flag[1]) endif endforeach - foreach marg: machine[2] - if marg[0] == impl_pn + foreach marg: implementer_config[2] + if marg[0] == part_number foreach flag: marg[1] if cc.has_argument(flag) machine_args += flag endif endforeach # Apply any extra machine specific flags. - foreach flag: marg.get(2, flags_default_extra) + foreach flag: marg.get(2, flags_part_number_default) if flag.length() > 0 dpdk_conf.set(flag[0], flag[1]) endif From patchwork Fri Nov 13 11:37:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84120 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2A3D1A09DE; Fri, 13 Nov 2020 12:39:33 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 32AE4C8CC; Fri, 13 Nov 2020 12:38:20 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id D7F48C884 for ; Fri, 13 Nov 2020 12:38:14 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 30F18B92ED; Fri, 13 Nov 2020 12:38:12 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id rhflzM0YoBn2; Fri, 13 Nov 2020 12:38:11 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id C373DB9311; Fri, 13 Nov 2020 12:38:07 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Fri, 13 Nov 2020 12:37:52 +0100 Message-Id: <1605267483-13167-5-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605265789-12932-1-git-send-email-juraj.linkes@pantheon.tech> <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v11 04/15] build: remove unused or superfluous variables X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Remove variables that were either not used, referenced just once or not needed. Signed-off-by: Juraj Linkeš Reviewed-by: Ruifeng Wang Reviewed-by: Honnappa Nagarahalli --- config/arm/meson.build | 28 +++++++--------------------- 1 file changed, 7 insertions(+), 21 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index 704be567d..ee9277b5d 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -3,11 +3,7 @@ # Copyright(c) 2017 Cavium, Inc # Copyright(c) 2020 PANTHEON.tech s.r.o. -# for checking defines we need to use the correct compiler flags -march_opt = '-march=@0@'.format(machine) - arm_force_native_march = false -arm_force_generic_march = (machine == 'generic') flags_common = [ # Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) @@ -62,7 +58,6 @@ flags_implementer_armada = [ ['RTE_MAX_NUMA_NODES', 1], ['RTE_MAX_LCORE', 16]] -flags_part_number_default = [] flags_part_number_thunderx = [ ['RTE_MACHINE', '"thunderx"'], ['RTE_USE_C11_MEM_MODEL', false]] @@ -119,17 +114,9 @@ part_number_config_emag = [ ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321) implementer_generic = ['Generic armv8', flags_implementer_generic, part_number_config_arm] implementer_0x41 = ['Arm', flags_implementer_arm, part_number_config_arm] -implementer_0x42 = ['Broadcom', flags_implementer_generic, part_number_config_arm] implementer_0x43 = ['Cavium', flags_implementer_cavium, part_number_config_cavium] -implementer_0x44 = ['DEC', flags_implementer_generic, part_number_config_arm] -implementer_0x49 = ['Infineon', flags_implementer_generic, part_number_config_arm] -implementer_0x4d = ['Motorola', flags_implementer_generic, part_number_config_arm] -implementer_0x4e = ['NVIDIA', flags_implementer_generic, part_number_config_arm] implementer_0x50 = ['Ampere Computing', flags_implementer_emag, part_number_config_emag] -implementer_0x51 = ['Qualcomm', flags_implementer_generic, part_number_config_arm] -implementer_0x53 = ['Samsung', flags_implementer_generic, part_number_config_arm] implementer_0x56 = ['Marvell ARMADA', flags_implementer_armada, part_number_config_arm] -implementer_0x69 = ['Intel', flags_implementer_generic, part_number_config_arm] implementer_dpaa = ['NXP DPAA', flags_implementer_dpaa, part_number_config_arm] dpdk_conf.set('RTE_ARCH_ARM', 1) @@ -145,11 +132,9 @@ else dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128) dpdk_conf.set('RTE_ARCH_ARM64', 1) - implementer_config = [] - cmd_generic = ['generic', '', '', 'generic', ''] - cmd_output = cmd_generic # Set generic by default + implementer_id = 'generic' machine_args = [] # Clear previous machine args - if arm_force_generic_march and not meson.is_cross_build() + if machine == 'generic' and not meson.is_cross_build() implementer_config = implementer_generic part_number = 'generic' elif not meson.is_cross_build() @@ -160,14 +145,15 @@ else cmd = run_command(detect_vendor.path()) if cmd.returncode() == 0 cmd_output = cmd.stdout().to_lower().strip().split(' ') + implementer_id = cmd_output[0] + part_number = cmd_output[3] endif # Set to generic if variable is not found - implementer_config = get_variable('implementer_' + cmd_output[0], ['generic']) + implementer_config = get_variable('implementer_' + implementer_id, ['generic']) if implementer_config[0] == 'generic' implementer_config = implementer_generic - cmd_output = cmd_generic + part_number = 'generic' endif - part_number = cmd_output[3] if arm_force_native_march == true part_number = 'native' endif @@ -200,7 +186,7 @@ else endif endforeach # Apply any extra machine specific flags. - foreach flag: marg.get(2, flags_part_number_default) + foreach flag: marg.get(2, []) if flag.length() > 0 dpdk_conf.set(flag[0], flag[1]) endif From patchwork Fri Nov 13 11:37:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84121 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 94EE5A09DE; Fri, 13 Nov 2020 12:39:49 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C5526C8D6; Fri, 13 Nov 2020 12:38:21 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 0F0E3C884 for ; Fri, 13 Nov 2020 12:38:15 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 5939DB9309; Fri, 13 Nov 2020 12:38:13 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id pnNIjUDBckuU; Fri, 13 Nov 2020 12:38:12 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 0B26AB7E7E; Fri, 13 Nov 2020 12:38:08 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Fri, 13 Nov 2020 12:37:53 +0100 Message-Id: <1605267483-13167-6-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605265789-12932-1-git-send-email-juraj.linkes@pantheon.tech> <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v11 05/15] build: reformat and move Arm config and comments X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Change formatting so that it's more consistent and readable, add/modify comments/stdout messages, move configuration options to more appropriate places and make the order consistent according to these rules: 1. First list generic configuration options, then list options that may be overwritten. List SoC-specific options last. 2. For SoC-specific options, list number of cores before the number of NUMA nodes, to make it consistent with config/meson.build. Signed-off-by: Juraj Linkeš Reviewed-by: Honnappa Nagarahalli --- config/arm/arm64_armv8_linux_gcc | 12 +-- config/arm/meson.build | 96 +++++++++++-------- .../linux_gsg/cross_build_dpdk_for_arm64.rst | 34 +++++++ 3 files changed, 93 insertions(+), 49 deletions(-) diff --git a/config/arm/arm64_armv8_linux_gcc b/config/arm/arm64_armv8_linux_gcc index 13ee8b223..0099f5ca2 100644 --- a/config/arm/arm64_armv8_linux_gcc +++ b/config/arm/arm64_armv8_linux_gcc @@ -13,16 +13,6 @@ cpu = 'armv8-a' endian = 'little' [properties] +# Generate binaries that are portable across all Armv8 machines implementer_id = 'generic' - -# Valid options for Arm's part_number: -# 'generic': valid for all armv8-a architectures (default value) -# '0xd03': cortex-a53 -# '0xd04': cortex-a35 -# '0xd05': cortex-a55 -# '0xd07': cortex-a57 -# '0xd08': cortex-a72 -# '0xd09': cortex-a73 -# '0xd0a': cortex-a75 -# '0xd0b': cortex-a76 part_number = 'generic' diff --git a/config/arm/meson.build b/config/arm/meson.build index ee9277b5d..7ab856143 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -5,15 +5,16 @@ arm_force_native_march = false +# common flags to all aarch64 builds, with lowest priority flags_common = [ - # Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) + # Accelerate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) # to determine the best threshold in code. Refer to notes in source file # (lib/librte_eal/arm/include/rte_memcpy_64.h) for more info. ['RTE_ARCH_ARM64_MEMCPY', false], # ['RTE_ARM64_MEMCPY_ALIGNED_THRESHOLD', 2048], # ['RTE_ARM64_MEMCPY_UNALIGNED_THRESHOLD', 512], - # Leave below RTE_ARM64_MEMCPY_xxx options commented out, unless there're - # strong reasons. + # Leave below RTE_ARM64_MEMCPY_xxx options commented out, + # unless there are strong reasons. # ['RTE_ARM64_MEMCPY_SKIP_GCC_VER_CHECK', false], # ['RTE_ARM64_MEMCPY_ALIGN_MASK', 0xF], # ['RTE_ARM64_MEMCPY_STRICT_ALIGN', false], @@ -23,69 +24,86 @@ flags_common = [ ['RTE_SCHED_VECTOR', false], ['RTE_ARM_USE_WFE', false], + ['RTE_ARCH_ARM64', true], + ['RTE_CACHE_LINE_SIZE', 128] ] +# implementer specific aarch64 flags, with middle priority +# (will overwrite common flags) flags_implementer_generic = [ ['RTE_MACHINE', '"armv8a"'], - ['RTE_MAX_LCORE', 256], ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_CACHE_LINE_SIZE', 128]] + ['RTE_CACHE_LINE_SIZE', 128], + ['RTE_MAX_LCORE', 256] +] flags_implementer_arm = [ ['RTE_MACHINE', '"armv8a"'], - ['RTE_MAX_LCORE', 16], ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_CACHE_LINE_SIZE', 64]] + ['RTE_CACHE_LINE_SIZE', 64], + ['RTE_MAX_LCORE', 16] +] flags_implementer_cavium = [ + ['RTE_MAX_VFIO_GROUPS', 128], ['RTE_CACHE_LINE_SIZE', 128], - ['RTE_MAX_NUMA_NODES', 2], ['RTE_MAX_LCORE', 96], - ['RTE_MAX_VFIO_GROUPS', 128]] + ['RTE_MAX_NUMA_NODES', 2] +] flags_implementer_dpaa = [ ['RTE_MACHINE', '"dpaa"'], + ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_NUMA_NODES', 1], ['RTE_MAX_LCORE', 16], - ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false]] + ['RTE_MAX_NUMA_NODES', 1] +] flags_implementer_emag = [ ['RTE_MACHINE', '"emag"'], ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 32]] + ['RTE_MAX_LCORE', 32], + ['RTE_MAX_NUMA_NODES', 1] +] flags_implementer_armada = [ ['RTE_MACHINE', '"armv8a"'], ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 16]] + ['RTE_MAX_LCORE', 16], + ['RTE_MAX_NUMA_NODES', 1] +] +# part number specific aarch64 flags, with highest priority +# (will overwrite both common and implementer specific flags) flags_part_number_thunderx = [ ['RTE_MACHINE', '"thunderx"'], - ['RTE_USE_C11_MEM_MODEL', false]] + ['RTE_USE_C11_MEM_MODEL', false] +] flags_part_number_thunderx2 = [ ['RTE_MACHINE', '"thunderx2"'], + ['RTE_ARM_FEATURE_ATOMICS', true], + ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_NUMA_NODES', 2], ['RTE_MAX_LCORE', 256], - ['RTE_ARM_FEATURE_ATOMICS', true], - ['RTE_USE_C11_MEM_MODEL', true]] + ['RTE_MAX_NUMA_NODES', 2] +] flags_part_number_octeontx2 = [ ['RTE_MACHINE', '"octeontx2"'], - ['RTE_MAX_NUMA_NODES', 1], - ['RTE_MAX_LCORE', 36], ['RTE_ARM_FEATURE_ATOMICS', true], + ['RTE_USE_C11_MEM_MODEL', true], ['RTE_EAL_IGB_UIO', false], - ['RTE_USE_C11_MEM_MODEL', true]] + ['RTE_MAX_LCORE', 36], + ['RTE_MAX_NUMA_NODES', 1] +] flags_part_number_n1generic = [ ['RTE_MACHINE', '"neoverse-n1"'], - ['RTE_MAX_LCORE', 64], - ['RTE_CACHE_LINE_SIZE', 64], ['RTE_ARM_FEATURE_ATOMICS', true], ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_MAX_MEM_MB', 1048576], - ['RTE_MAX_NUMA_NODES', 1], ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false], - ['RTE_LIBRTE_VHOST_NUMA', false]] + ['RTE_LIBRTE_VHOST_NUMA', false], + ['RTE_MAX_MEM_MB', 1048576], + ['RTE_CACHE_LINE_SIZE', 64], + ['RTE_MAX_LCORE', 64], + ['RTE_MAX_NUMA_NODES', 1] +] +# arm config (implementer 0x41) is the default config part_number_config_arm = [ ['generic', ['-march=armv8-a+crc', '-moutline-atomics']], ['native', ['-march=native']], @@ -96,8 +114,8 @@ part_number_config_arm = [ ['0xd09', ['-mcpu=cortex-a73']], ['0xd0a', ['-mcpu=cortex-a75']], ['0xd0b', ['-mcpu=cortex-a76']], - ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'], flags_part_number_n1generic]] - + ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'], flags_part_number_n1generic] +] part_number_config_cavium = [ ['generic', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']], ['native', ['-march=native']], @@ -105,13 +123,14 @@ part_number_config_cavium = [ ['0xa2', ['-mcpu=thunderxt81'], flags_part_number_thunderx], ['0xa3', ['-mcpu=thunderxt83'], flags_part_number_thunderx], ['0xaf', ['-march=armv8.1-a+crc+crypto','-mcpu=thunderx2t99'], flags_part_number_thunderx2], - ['0xb2', ['-march=armv8.2-a+crc+crypto+lse','-mcpu=octeontx2'], flags_part_number_octeontx2]] - + ['0xb2', ['-march=armv8.2-a+crc+crypto+lse','-mcpu=octeontx2'], flags_part_number_octeontx2] +] part_number_config_emag = [ ['generic', ['-march=armv8-a+crc+crypto', '-mtune=emag']], - ['native', ['-march=native']]] + ['native', ['-march=native']] +] -## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321) +## Arm implementer ID (MIDR in Arm Architecture Reference Manual) implementer_generic = ['Generic armv8', flags_implementer_generic, part_number_config_arm] implementer_0x41 = ['Arm', flags_implementer_arm, part_number_config_arm] implementer_0x43 = ['Cavium', flags_implementer_cavium, part_number_config_cavium] @@ -123,21 +142,21 @@ dpdk_conf.set('RTE_ARCH_ARM', 1) dpdk_conf.set('RTE_FORCE_INTRINSICS', 1) if dpdk_conf.get('RTE_ARCH_32') + # armv7 build dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64) dpdk_conf.set('RTE_ARCH_ARMv7', 1) # the minimum architecture supported, armv7-a, needs the following, - # mk/machine/armv7a/rte.vars.mk sets it too machine_args += '-mfpu=neon' else - dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128) - dpdk_conf.set('RTE_ARCH_ARM64', 1) - + # aarch64 build implementer_id = 'generic' machine_args = [] # Clear previous machine args if machine == 'generic' and not meson.is_cross_build() + # generic build implementer_config = implementer_generic part_number = 'generic' elif not meson.is_cross_build() + # native build # The script returns ['Implementer', 'Variant', 'Architecture', # 'Primary Part number', 'Revision'] detect_vendor = find_program(join_paths( @@ -158,6 +177,7 @@ else part_number = 'native' endif else + # cross build implementer_id = meson.get_cross_property('implementer_id', 'generic') part_number = meson.get_cross_property('part_number', 'generic') implementer_config = get_variable('implementer_' + implementer_id) @@ -194,7 +214,7 @@ else endif endforeach endif -message(machine_args) +message('Using machine args: @0@'.format(machine_args)) if (cc.get_define('__ARM_NEON', args: machine_args) != '' or cc.get_define('__aarch64__', args: machine_args) != '') diff --git a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst index 8a1d0e88b..972598835 100644 --- a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst +++ b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst @@ -99,3 +99,37 @@ command:: meson arm64-build --cross-file config/arm/arm64_armv8_linux_gcc ninja -C arm64-build + +Supported cross-compilation targets +----------------------------------- + +If you wish to build for a target which is not among the current cross-files, +you may use various combinations of implementer/part number:: + + Supported implementers: + 'generic': Generic armv8 + '0x41': Arm + '0x43': Cavium + '0x50': Ampere Computing + '0x56': Marvell ARMADA + 'dpaa': NXP DPAA + + Supported part_numbers for generic, 0x41, 0x56, dpaa: + 'generic': valid for all armv8-a architectures (default value) + '0xd03': cortex-a53 + '0xd04': cortex-a35 + '0xd09': cortex-a73 + '0xd0a': cortex-a75 + '0xd0b': cortex-a76 + '0xd0c': neoverse-n1 + + Supported part_numbers for 0x43: + 'generic': valid for all Cavium builds + '0xa1': thunderxt88 + '0xa2': thunderxt81 + '0xa3': thunderxt83 + '0xaf': thunderx2t99 + '0xb2': octeontx2 + + Supported part_numbers for 0x50: + 'generic': valid for all Ampere builds From patchwork Fri Nov 13 11:37:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84122 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0973EA09DE; Fri, 13 Nov 2020 12:40:19 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 06A02C884; Fri, 13 Nov 2020 12:38:30 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 2F188C88A for ; Fri, 13 Nov 2020 12:38:16 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 94735B92E2; Fri, 13 Nov 2020 12:38:14 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 2DxGT7Q_AdqP; Fri, 13 Nov 2020 12:38:13 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id EE400B931F; Fri, 13 Nov 2020 12:38:09 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Fri, 13 Nov 2020 12:37:54 +0100 Message-Id: <1605267483-13167-7-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605265789-12932-1-git-send-email-juraj.linkes@pantheon.tech> <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v11 06/15] build: simplify how Arm flags are processed X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Set flags in one loop. Append flags to a list and use the list in the loop. Signed-off-by: Juraj Linkeš Reviewed-by: Honnappa Nagarahalli --- config/arm/meson.build | 37 +++++++++++++++++-------------------- 1 file changed, 17 insertions(+), 20 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index 7ab856143..0f8a94ffe 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -150,7 +150,6 @@ if dpdk_conf.get('RTE_ARCH_32') else # aarch64 build implementer_id = 'generic' - machine_args = [] # Clear previous machine args if machine == 'generic' and not meson.is_cross_build() # generic build implementer_config = implementer_generic @@ -183,34 +182,32 @@ else implementer_config = get_variable('implementer_' + implementer_id) endif - # Apply Common Defaults. These settings may be overwritten by machine - # settings later. - foreach flag: flags_common - if flag.length() > 0 - dpdk_conf.set(flag[0], flag[1]) - endif - endforeach + message('Arm implementer: ' + implementer_config[0]) + message('Arm part number: ' + part_number) - message('Implementer : ' + implementer_config[0]) - foreach flag: implementer_config[1] - if flag.length() > 0 - dpdk_conf.set(flag[0], flag[1]) - endif - endforeach + # use default flags with implementer flags + dpdk_flags = flags_common + implementer_config[1] + machine_args = [] # Clear previous machine args foreach marg: implementer_config[2] if marg[0] == part_number + # apply supported machine args foreach flag: marg[1] if cc.has_argument(flag) machine_args += flag endif endforeach - # Apply any extra machine specific flags. - foreach flag: marg.get(2, []) - if flag.length() > 0 - dpdk_conf.set(flag[0], flag[1]) - endif - endforeach + if marg.length() > 2 + # add extra flags for the part + dpdk_flags += marg[2] + endif + endif + endforeach + + # apply flags + foreach flag: dpdk_flags + if flag.length() > 0 + dpdk_conf.set(flag[0], flag[1]) endif endforeach endif From patchwork Fri Nov 13 11:37:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84123 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id C03BCA09DE; Fri, 13 Nov 2020 12:40:39 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8FF22C8FC; Fri, 13 Nov 2020 12:38:31 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 06E89C8C4 for ; Fri, 13 Nov 2020 12:38:19 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 27AE7B931F; Fri, 13 Nov 2020 12:38:16 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id w3TGaTq91T1r; Fri, 13 Nov 2020 12:38:14 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 60189B92EC; Fri, 13 Nov 2020 12:38:11 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Fri, 13 Nov 2020 12:37:55 +0100 Message-Id: <1605267483-13167-8-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605265789-12932-1-git-send-email-juraj.linkes@pantheon.tech> <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v11 07/15] build: organize Arm config into dict X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Use dictionary lookup instead of checking for existing variables, iterating over all elements in the list or checking lists for optional configuration. Move variable contents into the dictionary for variables that would be referenced only once. Fallback to generic part number if the discovered part number is unknown. Signed-off-by: Juraj Linkeš Reviewed-by: Honnappa Nagarahalli --- config/arm/meson.build | 298 ++++++++++++++++++++++++----------------- 1 file changed, 178 insertions(+), 120 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index 0f8a94ffe..eb15848cb 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -28,115 +28,166 @@ flags_common = [ ['RTE_CACHE_LINE_SIZE', 128] ] -# implementer specific aarch64 flags, with middle priority -# (will overwrite common flags) -flags_implementer_generic = [ - ['RTE_MACHINE', '"armv8a"'], - ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_CACHE_LINE_SIZE', 128], - ['RTE_MAX_LCORE', 256] -] -flags_implementer_arm = [ - ['RTE_MACHINE', '"armv8a"'], - ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_LCORE', 16] -] -flags_implementer_cavium = [ - ['RTE_MAX_VFIO_GROUPS', 128], - ['RTE_CACHE_LINE_SIZE', 128], - ['RTE_MAX_LCORE', 96], - ['RTE_MAX_NUMA_NODES', 2] -] -flags_implementer_dpaa = [ - ['RTE_MACHINE', '"dpaa"'], - ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false], - ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_LCORE', 16], - ['RTE_MAX_NUMA_NODES', 1] -] -flags_implementer_emag = [ - ['RTE_MACHINE', '"emag"'], - ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_LCORE', 32], - ['RTE_MAX_NUMA_NODES', 1] -] -flags_implementer_armada = [ - ['RTE_MACHINE', '"armv8a"'], - ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_LCORE', 16], - ['RTE_MAX_NUMA_NODES', 1] -] +## Part numbers are specific to Arm implementers +# implementer specific aarch64 flags have middle priority +# (will overwrite common flags) +# part number specific aarch64 flags have the highest priority +# (will overwrite both common and implementer specific flags) +implementer_generic = { + 'description': 'Generic armv8', + 'flags': [ + ['RTE_MACHINE', '"armv8a"'], + ['RTE_USE_C11_MEM_MODEL', true], + ['RTE_CACHE_LINE_SIZE', 128], + ['RTE_MAX_LCORE', 256] + ], + 'part_number_config': { + 'generic': {'machine_args': ['-march=armv8-a+crc', + '-moutline-atomics']} + } +} + +part_number_config_arm = { + 'generic': {'machine_args': ['-march=armv8-a+crc', + '-moutline-atomics']}, + 'native': {'machine_args': ['-march=native']}, + '0xd03': {'machine_args': ['-mcpu=cortex-a53']}, + '0xd04': {'machine_args': ['-mcpu=cortex-a35']}, + '0xd07': {'machine_args': ['-mcpu=cortex-a57']}, + '0xd08': {'machine_args': ['-mcpu=cortex-a72']}, + '0xd09': {'machine_args': ['-mcpu=cortex-a73']}, + '0xd0a': {'machine_args': ['-mcpu=cortex-a75']}, + '0xd0b': {'machine_args': ['-mcpu=cortex-a76']}, + '0xd0c': { + 'machine_args': ['-march=armv8.2-a+crypto', + '-mcpu=neoverse-n1'], + 'flags': [ + ['RTE_MACHINE', '"neoverse-n1"'], + ['RTE_ARM_FEATURE_ATOMICS', true], + ['RTE_USE_C11_MEM_MODEL', true], + ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false], + ['RTE_LIBRTE_VHOST_NUMA', false], + ['RTE_MAX_MEM_MB', 1048576], + ['RTE_CACHE_LINE_SIZE', 64], + ['RTE_MAX_LCORE', 64], + ['RTE_MAX_NUMA_NODES', 1] + ] + } +} +implementer_arm = { + 'description': 'Arm', + 'flags': [ + ['RTE_MACHINE', '"armv8a"'], + ['RTE_USE_C11_MEM_MODEL', true], + ['RTE_CACHE_LINE_SIZE', 64], + ['RTE_MAX_LCORE', 16] + ], + 'part_number_config': part_number_config_arm +} -# part number specific aarch64 flags, with highest priority -# (will overwrite both common and implementer specific flags) flags_part_number_thunderx = [ ['RTE_MACHINE', '"thunderx"'], ['RTE_USE_C11_MEM_MODEL', false] ] -flags_part_number_thunderx2 = [ - ['RTE_MACHINE', '"thunderx2"'], - ['RTE_ARM_FEATURE_ATOMICS', true], - ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_LCORE', 256], - ['RTE_MAX_NUMA_NODES', 2] -] -flags_part_number_octeontx2 = [ - ['RTE_MACHINE', '"octeontx2"'], - ['RTE_ARM_FEATURE_ATOMICS', true], - ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_EAL_IGB_UIO', false], - ['RTE_MAX_LCORE', 36], - ['RTE_MAX_NUMA_NODES', 1] -] -flags_part_number_n1generic = [ - ['RTE_MACHINE', '"neoverse-n1"'], - ['RTE_ARM_FEATURE_ATOMICS', true], - ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false], - ['RTE_LIBRTE_VHOST_NUMA', false], - ['RTE_MAX_MEM_MB', 1048576], - ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_LCORE', 64], - ['RTE_MAX_NUMA_NODES', 1] -] +implementer_cavium = { + 'description': 'Cavium', + 'flags': [ + ['RTE_MAX_VFIO_GROUPS', 128], + ['RTE_CACHE_LINE_SIZE', 128], + ['RTE_MAX_LCORE', 96], + ['RTE_MAX_NUMA_NODES', 2] + ], + 'part_number_config': { + 'generic': {'machine_args': ['-march=armv8-a+crc+crypto', + '-mcpu=thunderx']}, + 'native': {'machine_args': ['-march=native']}, + '0xa1': { + 'machine_args': ['-mcpu=thunderxt88'], + 'flags': flags_part_number_thunderx + }, + '0xa2': { + 'machine_args': ['-mcpu=thunderxt81'], + 'flags': flags_part_number_thunderx + }, + '0xa3': { + 'machine_args': ['-mcpu=thunderxt83'], + 'flags': flags_part_number_thunderx + }, + '0xaf': { + 'machine_args': ['-march=armv8.1-a+crc+crypto', + '-mcpu=thunderx2t99'], + 'flags': [ + ['RTE_MACHINE', '"thunderx2"'], + ['RTE_ARM_FEATURE_ATOMICS', true], + ['RTE_USE_C11_MEM_MODEL', true], + ['RTE_CACHE_LINE_SIZE', 64], + ['RTE_MAX_LCORE', 256], + ['RTE_MAX_NUMA_NODES', 2] + ] + }, + '0xb2': { + 'machine_args': ['-march=armv8.2-a+crc+crypto+lse', + '-mcpu=octeontx2'], + 'flags': [ + ['RTE_MACHINE', '"octeontx2"'], + ['RTE_ARM_FEATURE_ATOMICS', true], + ['RTE_USE_C11_MEM_MODEL', true], + ['RTE_EAL_IGB_UIO', false], + ['RTE_MAX_LCORE', 36], + ['RTE_MAX_NUMA_NODES', 1] + ] + } + } +} -# arm config (implementer 0x41) is the default config -part_number_config_arm = [ - ['generic', ['-march=armv8-a+crc', '-moutline-atomics']], - ['native', ['-march=native']], - ['0xd03', ['-mcpu=cortex-a53']], - ['0xd04', ['-mcpu=cortex-a35']], - ['0xd07', ['-mcpu=cortex-a57']], - ['0xd08', ['-mcpu=cortex-a72']], - ['0xd09', ['-mcpu=cortex-a73']], - ['0xd0a', ['-mcpu=cortex-a75']], - ['0xd0b', ['-mcpu=cortex-a76']], - ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'], flags_part_number_n1generic] -] -part_number_config_cavium = [ - ['generic', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']], - ['native', ['-march=native']], - ['0xa1', ['-mcpu=thunderxt88'], flags_part_number_thunderx], - ['0xa2', ['-mcpu=thunderxt81'], flags_part_number_thunderx], - ['0xa3', ['-mcpu=thunderxt83'], flags_part_number_thunderx], - ['0xaf', ['-march=armv8.1-a+crc+crypto','-mcpu=thunderx2t99'], flags_part_number_thunderx2], - ['0xb2', ['-march=armv8.2-a+crc+crypto+lse','-mcpu=octeontx2'], flags_part_number_octeontx2] -] -part_number_config_emag = [ - ['generic', ['-march=armv8-a+crc+crypto', '-mtune=emag']], - ['native', ['-march=native']] -] +implementer_ampere = { + 'description': 'Ampere Computing', + 'flags': [ + ['RTE_MACHINE', '"emag"'], + ['RTE_CACHE_LINE_SIZE', 64], + ['RTE_MAX_LCORE', 32], + ['RTE_MAX_NUMA_NODES', 1] + ], + 'part_number_config': { + 'generic': {'machine_args': ['-march=armv8-a+crc+crypto', + '-mtune=emag']}, + 'native': {'machine_args': ['-march=native']} + } +} + +implementer_marvell = { + 'description': 'Marvell ARMADA', + 'flags': [ + ['RTE_MACHINE', '"armv8a"'], + ['RTE_CACHE_LINE_SIZE', 64], + ['RTE_MAX_LCORE', 16], + ['RTE_MAX_NUMA_NODES', 1] + ], + 'part_number_config': part_number_config_arm +} + +implementer_dpaa = { + 'description': 'NXP DPAA', + 'flags': [ + ['RTE_MACHINE', '"dpaa"'], + ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false], + ['RTE_USE_C11_MEM_MODEL', true], + ['RTE_CACHE_LINE_SIZE', 64], + ['RTE_MAX_LCORE', 16], + ['RTE_MAX_NUMA_NODES', 1] + ], + 'part_number_config': part_number_config_arm +} -## Arm implementer ID (MIDR in Arm Architecture Reference Manual) -implementer_generic = ['Generic armv8', flags_implementer_generic, part_number_config_arm] -implementer_0x41 = ['Arm', flags_implementer_arm, part_number_config_arm] -implementer_0x43 = ['Cavium', flags_implementer_cavium, part_number_config_cavium] -implementer_0x50 = ['Ampere Computing', flags_implementer_emag, part_number_config_emag] -implementer_0x56 = ['Marvell ARMADA', flags_implementer_armada, part_number_config_arm] -implementer_dpaa = ['NXP DPAA', flags_implementer_dpaa, part_number_config_arm] +## Arm implementers (ID from MIDR in Arm Architecture Reference Manual) +implementers = { + 'generic': implementer_generic, + '0x41': implementer_arm, + '0x43': implementer_cavium, + '0x50': implementer_ampere, + '0x56': implementer_marvell, + 'dpaa': implementer_dpaa +} dpdk_conf.set('RTE_ARCH_ARM', 1) dpdk_conf.set('RTE_FORCE_INTRINSICS', 1) @@ -152,7 +203,7 @@ else implementer_id = 'generic' if machine == 'generic' and not meson.is_cross_build() # generic build - implementer_config = implementer_generic + implementer_config = implementer['generic'] part_number = 'generic' elif not meson.is_cross_build() # native build @@ -167,9 +218,9 @@ else part_number = cmd_output[3] endif # Set to generic if variable is not found - implementer_config = get_variable('implementer_' + implementer_id, ['generic']) + implementer_config = implementers.get(implementer_id, ['generic']) if implementer_config[0] == 'generic' - implementer_config = implementer_generic + implementer_config = implementer['generic'] part_number = 'generic' endif if arm_force_native_march == true @@ -179,28 +230,35 @@ else # cross build implementer_id = meson.get_cross_property('implementer_id', 'generic') part_number = meson.get_cross_property('part_number', 'generic') - implementer_config = get_variable('implementer_' + implementer_id) + implementer_config = implementers.get(implementer_id) endif - message('Arm implementer: ' + implementer_config[0]) + message('Arm implementer: ' + implementer_config['description']) message('Arm part number: ' + part_number) + part_number_config = implementer_config['part_number_config'] + if part_number_config.has_key(part_number) + # use the specified part_number machine args if found + part_number_config = part_number_config[part_number] + elif not meson.is_cross_build() + # default to generic machine args if part_number is not found + # and not forcing native machine args + # but don't default in cross-builds; if part_number is specified + # incorrectly in a cross-file, it needs to be fixed there + part_number_config = part_number_config['generic'] + else + # doing cross build and part number is not in part_number_config + error('Cross build part number 0@0 not found.'.format(part_number)) + endif + # use default flags with implementer flags - dpdk_flags = flags_common + implementer_config[1] + dpdk_flags = flags_common + implementer_config['flags'] + part_number_config.get('flags', []) + # apply supported machine args machine_args = [] # Clear previous machine args - foreach marg: implementer_config[2] - if marg[0] == part_number - # apply supported machine args - foreach flag: marg[1] - if cc.has_argument(flag) - machine_args += flag - endif - endforeach - if marg.length() > 2 - # add extra flags for the part - dpdk_flags += marg[2] - endif + foreach flag: part_number_config['machine_args'] + if cc.has_argument(flag) + machine_args += flag endif endforeach From patchwork Fri Nov 13 11:37:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84124 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9EEB2A09DE; Fri, 13 Nov 2020 12:40:56 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 0F405C906; Fri, 13 Nov 2020 12:38:33 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id C0CBAC8C4 for ; Fri, 13 Nov 2020 12:38:19 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 1F80EB9977; Fri, 13 Nov 2020 12:38:17 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id AZxaxdxZcG7F; Fri, 13 Nov 2020 12:38:16 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 58C36B92F9; Fri, 13 Nov 2020 12:38:12 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Fri, 13 Nov 2020 12:37:56 +0100 Message-Id: <1605267483-13167-9-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605265789-12932-1-git-send-email-juraj.linkes@pantheon.tech> <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v11 08/15] build: isolate configuration for generic build X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Use generic configuration for the only build where it makes sense - the generic build. For other builds, if we don't know either of implementer ID or part number, the build is not supported. Add part numbers to cross files where fallback to generic configuration is assumed. Signed-off-by: Juraj Linkeš Reviewed-by: Honnappa Nagarahalli --- config/arm/arm64_emag_linux_gcc | 1 + ..._linux_gcc => arm64_thunderxt88_linux_gcc} | 1 + config/arm/meson.build | 45 +++++++++---------- .../linux_gsg/cross_build_dpdk_for_arm64.rst | 9 ++-- 4 files changed, 27 insertions(+), 29 deletions(-) rename config/arm/{arm64_thunderx_linux_gcc => arm64_thunderxt88_linux_gcc} (93%) diff --git a/config/arm/arm64_emag_linux_gcc b/config/arm/arm64_emag_linux_gcc index 24f3d533e..c675954fc 100644 --- a/config/arm/arm64_emag_linux_gcc +++ b/config/arm/arm64_emag_linux_gcc @@ -14,3 +14,4 @@ endian = 'little' [properties] implementer_id = '0x50' +part_number = '0x0' diff --git a/config/arm/arm64_thunderx_linux_gcc b/config/arm/arm64_thunderxt88_linux_gcc similarity index 93% rename from config/arm/arm64_thunderx_linux_gcc rename to config/arm/arm64_thunderxt88_linux_gcc index 670764437..758966262 100644 --- a/config/arm/arm64_thunderx_linux_gcc +++ b/config/arm/arm64_thunderxt88_linux_gcc @@ -14,3 +14,4 @@ endian = 'little' [properties] implementer_id = '0x43' +part_number = '0xa1' diff --git a/config/arm/meson.build b/config/arm/meson.build index eb15848cb..fec06e70c 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -48,8 +48,6 @@ implementer_generic = { } part_number_config_arm = { - 'generic': {'machine_args': ['-march=armv8-a+crc', - '-moutline-atomics']}, 'native': {'machine_args': ['-march=native']}, '0xd03': {'machine_args': ['-mcpu=cortex-a53']}, '0xd04': {'machine_args': ['-mcpu=cortex-a35']}, @@ -98,8 +96,6 @@ implementer_cavium = { ['RTE_MAX_NUMA_NODES', 2] ], 'part_number_config': { - 'generic': {'machine_args': ['-march=armv8-a+crc+crypto', - '-mcpu=thunderx']}, 'native': {'machine_args': ['-march=native']}, '0xa1': { 'machine_args': ['-mcpu=thunderxt88'], @@ -149,8 +145,8 @@ implementer_ampere = { ['RTE_MAX_NUMA_NODES', 1] ], 'part_number_config': { - 'generic': {'machine_args': ['-march=armv8-a+crc+crypto', - '-mtune=emag']}, + '0x0': {'machine_args': ['-march=armv8-a+crc+crypto', + '-mtune=emag']}, 'native': {'machine_args': ['-march=native']} } } @@ -200,10 +196,9 @@ if dpdk_conf.get('RTE_ARCH_32') machine_args += '-mfpu=neon' else # aarch64 build - implementer_id = 'generic' if machine == 'generic' and not meson.is_cross_build() # generic build - implementer_config = implementer['generic'] + implementer_id = 'generic' part_number = 'generic' elif not meson.is_cross_build() # native build @@ -216,21 +211,24 @@ else cmd_output = cmd.stdout().to_lower().strip().split(' ') implementer_id = cmd_output[0] part_number = cmd_output[3] - endif - # Set to generic if variable is not found - implementer_config = implementers.get(implementer_id, ['generic']) - if implementer_config[0] == 'generic' - implementer_config = implementer['generic'] - part_number = 'generic' + else + error('Error when getting Arm Implementer ID and part number.') endif if arm_force_native_march == true part_number = 'native' endif else # cross build - implementer_id = meson.get_cross_property('implementer_id', 'generic') - part_number = meson.get_cross_property('part_number', 'generic') - implementer_config = implementers.get(implementer_id) + implementer_id = meson.get_cross_property('implementer_id') + part_number = meson.get_cross_property('part_number') + endif + + if implementers.has_key(implementer_id) + implementer_config = implementers[implementer_id] + else + error('Unsupported Arm implementer: @0@. '.format(implementer_id) + + 'Please add support for it or use the generic ' + + '(-Dmachine=generic) build.') endif message('Arm implementer: ' + implementer_config['description']) @@ -240,15 +238,12 @@ else if part_number_config.has_key(part_number) # use the specified part_number machine args if found part_number_config = part_number_config[part_number] - elif not meson.is_cross_build() - # default to generic machine args if part_number is not found - # and not forcing native machine args - # but don't default in cross-builds; if part_number is specified - # incorrectly in a cross-file, it needs to be fixed there - part_number_config = part_number_config['generic'] else - # doing cross build and part number is not in part_number_config - error('Cross build part number 0@0 not found.'.format(part_number)) + # unknown part number + error('Unsupported part number @0@ of implementer @1@. ' + .format(part_number, implementer_id) + + 'Please add support for it or use the generic ' + + '(-Dmachine=generic) build.') endif # use default flags with implementer flags diff --git a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst index 972598835..6a883b030 100644 --- a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst +++ b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst @@ -114,8 +114,10 @@ you may use various combinations of implementer/part number:: '0x56': Marvell ARMADA 'dpaa': NXP DPAA - Supported part_numbers for generic, 0x41, 0x56, dpaa: - 'generic': valid for all armv8-a architectures (default value) + Supported part_numbers for generic: + 'generic': valid for all armv8-a architectures (unoptimized portable build) + + Supported part_numbers for 0x41, 0x56, dpaa: '0xd03': cortex-a53 '0xd04': cortex-a35 '0xd09': cortex-a73 @@ -124,7 +126,6 @@ you may use various combinations of implementer/part number:: '0xd0c': neoverse-n1 Supported part_numbers for 0x43: - 'generic': valid for all Cavium builds '0xa1': thunderxt88 '0xa2': thunderxt81 '0xa3': thunderxt83 @@ -132,4 +133,4 @@ you may use various combinations of implementer/part number:: '0xb2': octeontx2 Supported part_numbers for 0x50: - 'generic': valid for all Ampere builds + '0x0': emag From patchwork Fri Nov 13 11:37:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84125 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 87564A09DE; Fri, 13 Nov 2020 12:41:16 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 9AEC0C912; Fri, 13 Nov 2020 12:38:34 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 9BCFFC8D2 for ; Fri, 13 Nov 2020 12:38:21 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id C168FB92EC; Fri, 13 Nov 2020 12:38:18 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 0fYCBbm9sdrs; Fri, 13 Nov 2020 12:38:17 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 7594AB9978; Fri, 13 Nov 2020 12:38:13 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Fri, 13 Nov 2020 12:37:57 +0100 Message-Id: <1605267483-13167-10-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605265789-12932-1-git-send-email-juraj.linkes@pantheon.tech> <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v11 09/15] build: use native machine args in Arm native build X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Letting the compiler decide is going to yield the best results for native builds, so use native machine args usable for both GCC and Clang. Signed-off-by: Juraj Linkeš --- config/arm/meson.build | 54 ++++++++++++++++++++++-------------------- 1 file changed, 28 insertions(+), 26 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index fec06e70c..bee57f089 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -3,8 +3,6 @@ # Copyright(c) 2017 Cavium, Inc # Copyright(c) 2020 PANTHEON.tech s.r.o. -arm_force_native_march = false - # common flags to all aarch64 builds, with lowest priority flags_common = [ # Accelerate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) @@ -27,6 +25,7 @@ flags_common = [ ['RTE_ARCH_ARM64', true], ['RTE_CACHE_LINE_SIZE', 128] ] +native_machine_args = ['-mcpu=native'] ## Part numbers are specific to Arm implementers # implementer specific aarch64 flags have middle priority @@ -48,7 +47,6 @@ implementer_generic = { } part_number_config_arm = { - 'native': {'machine_args': ['-march=native']}, '0xd03': {'machine_args': ['-mcpu=cortex-a53']}, '0xd04': {'machine_args': ['-mcpu=cortex-a35']}, '0xd07': {'machine_args': ['-mcpu=cortex-a57']}, @@ -96,7 +94,6 @@ implementer_cavium = { ['RTE_MAX_NUMA_NODES', 2] ], 'part_number_config': { - 'native': {'machine_args': ['-march=native']}, '0xa1': { 'machine_args': ['-mcpu=thunderxt88'], 'flags': flags_part_number_thunderx @@ -146,8 +143,7 @@ implementer_ampere = { ], 'part_number_config': { '0x0': {'machine_args': ['-march=armv8-a+crc+crypto', - '-mtune=emag']}, - 'native': {'machine_args': ['-march=native']} + '-mtune=emag']} } } @@ -196,26 +192,27 @@ if dpdk_conf.get('RTE_ARCH_32') machine_args += '-mfpu=neon' else # aarch64 build - if machine == 'generic' and not meson.is_cross_build() - # generic build - implementer_id = 'generic' - part_number = 'generic' - elif not meson.is_cross_build() - # native build - # The script returns ['Implementer', 'Variant', 'Architecture', - # 'Primary Part number', 'Revision'] - detect_vendor = find_program(join_paths( - meson.current_source_dir(), 'armv8_machine.py')) - cmd = run_command(detect_vendor.path()) - if cmd.returncode() == 0 - cmd_output = cmd.stdout().to_lower().strip().split(' ') - implementer_id = cmd_output[0] - part_number = cmd_output[3] + use_native_machine_args = false + if not meson.is_cross_build() + if machine == 'generic' + # generic build + implementer_id = 'generic' + part_number = 'generic' else - error('Error when getting Arm Implementer ID and part number.') - endif - if arm_force_native_march == true - part_number = 'native' + # native build + # The script returns ['Implementer', 'Variant', 'Architecture', + # 'Primary Part number', 'Revision'] + detect_vendor = find_program(join_paths( + meson.current_source_dir(), 'armv8_machine.py')) + cmd = run_command(detect_vendor.path()) + if cmd.returncode() == 0 + cmd_output = cmd.stdout().to_lower().strip().split(' ') + implementer_id = cmd_output[0] + part_number = cmd_output[3] + else + error('Error when getting Arm Implementer ID and part number.') + endif + use_native_machine_args = true endif else # cross build @@ -251,7 +248,12 @@ else # apply supported machine args machine_args = [] # Clear previous machine args - foreach flag: part_number_config['machine_args'] + if use_native_machine_args + candidate_machine_args = native_machine_args + else + candidate_machine_args = part_number_config['machine_args'] + endif + foreach flag: candidate_machine_args if cc.has_argument(flag) machine_args += flag endif From patchwork Fri Nov 13 11:37:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84126 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7DF3DA09DE; Fri, 13 Nov 2020 12:41:38 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 9E3A3C920; Fri, 13 Nov 2020 12:38:36 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 707F3C8D2 for ; Fri, 13 Nov 2020 12:38:22 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id B32B7B92ED; Fri, 13 Nov 2020 12:38:19 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id HAfwNdHCCusD; Fri, 13 Nov 2020 12:38:18 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 9FB97B9311; Fri, 13 Nov 2020 12:38:14 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Fri, 13 Nov 2020 12:37:58 +0100 Message-Id: <1605267483-13167-11-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605265789-12932-1-git-send-email-juraj.linkes@pantheon.tech> <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v11 10/15] build: optional NUMA and cpu counts detection X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add an option to automatically discover the host's numa and cpu counts and use those values for a non cross-build. Give users the option to override the per-arch default values or values from cross files by specifying them on the command line with -Dmax_lcores and -Dmax_numa_nodes. Signed-off-by: Juraj Linkeš Reviewed-by: Honnappa Nagarahalli --- buildtools/get_cpu_count.py | 7 ++++++ buildtools/get_numa_count.py | 22 +++++++++++++++++ buildtools/meson.build | 2 ++ config/meson.build | 47 ++++++++++++++++++++++++++++++++++-- config/x86/meson.build | 2 ++ meson_options.txt | 8 +++--- 6 files changed, 82 insertions(+), 6 deletions(-) create mode 100644 buildtools/get_cpu_count.py create mode 100644 buildtools/get_numa_count.py diff --git a/buildtools/get_cpu_count.py b/buildtools/get_cpu_count.py new file mode 100644 index 000000000..b269d557b --- /dev/null +++ b/buildtools/get_cpu_count.py @@ -0,0 +1,7 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: BSD-3-Clause +# Copyright (c) 2020 PANTHEON.tech s.r.o. + +import os + +print(os.cpu_count()) diff --git a/buildtools/get_numa_count.py b/buildtools/get_numa_count.py new file mode 100644 index 000000000..be73c5c3f --- /dev/null +++ b/buildtools/get_numa_count.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: BSD-3-Clause +# Copyright (c) 2020 PANTHEON.tech s.r.o. + +import ctypes +import glob +import os +import subprocess + +if os.name == 'posix': + if os.path.isdir('/sys/devices/system/node'): + print(len(glob.glob('/sys/devices/system/node/node*'))) + else: + subprocess.run(['sysctl', '-n', 'vm.ndomains']) + +elif os.name == 'nt': + libkernel32 = ctypes.windll.kernel32 + + count = ctypes.c_ulong() + + libkernel32.GetNumaHighestNodeNumber(ctypes.pointer(count)) + print(count.value + 1) diff --git a/buildtools/meson.build b/buildtools/meson.build index 04808dabc..925e733b1 100644 --- a/buildtools/meson.build +++ b/buildtools/meson.build @@ -17,3 +17,5 @@ else endif map_to_win_cmd = py3 + files('map_to_win.py') sphinx_wrapper = py3 + files('call-sphinx-build.py') +get_cpu_count_cmd = py3 + files('get_cpu_count.py') +get_numa_count_cmd = py3 + files('get_numa_count.py') diff --git a/config/meson.build b/config/meson.build index c7f7aa6e2..ce0abe49b 100644 --- a/config/meson.build +++ b/config/meson.build @@ -231,8 +231,6 @@ foreach arg: warning_flags endforeach # set other values pulled from the build options -dpdk_conf.set('RTE_MAX_LCORE', get_option('max_lcores')) -dpdk_conf.set('RTE_MAX_NUMA_NODES', get_option('max_numa_nodes')) dpdk_conf.set('RTE_MAX_ETHPORTS', get_option('max_ethports')) dpdk_conf.set('RTE_LIBEAL_USE_HPET', get_option('use_hpet')) dpdk_conf.set('RTE_ENABLE_TRACE_FP', get_option('enable_trace_fp')) @@ -251,6 +249,51 @@ compile_time_cpuflags = [] subdir(arch_subdir) dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS', ','.join(compile_time_cpuflags)) +max_lcores = get_option('max_lcores') +if max_lcores > 0 + # Overwrite the default value from arch_subdir with user input + dpdk_conf.set('RTE_MAX_LCORE', max_lcores) +elif max_lcores == -1 + # Overwrite the default value with discovered values + if meson.is_cross_build() + error('Discovery of max_lcores is not supported for cross-compilation.') + endif + # Discovery makes sense only for non-cross builds + max_lcores = run_command(get_cpu_count_cmd).stdout().to_int() + min_lcores = 2 + # DPDK must be build for at least 2 cores + if max_lcores < min_lcores + message('Found less than @0@ cores, building for @0@ cores'.format(min_lcores)) + max_lcores = min_lcores + else + message('Found @0@ cores'.format(max_lcores)) + endif + dpdk_conf.set('RTE_MAX_LCORE', max_lcores) +endif + +max_numa_nodes = get_option('max_numa_nodes') +if max_numa_nodes > 0 + # Overwrite the default value from arch_subdir with user input + dpdk_conf.set('RTE_MAX_NUMA_NODES', max_numa_nodes) +elif max_numa_nodes == -1 + # Overwrite the default value with discovered values + if meson.is_cross_build() + error('Discovery of max_numa_nodes not supported for cross-compilation.') + endif + # Discovery makes sense only for non-cross builds + max_numa_nodes = run_command(get_numa_count_cmd).stdout().to_int() + message('Found @0@ numa nodes'.format(max_numa_nodes)) + dpdk_conf.set('RTE_MAX_NUMA_NODES', max_numa_nodes) +endif + +# check that cpu and numa count is set and error out if it's not set +if not dpdk_conf.has('RTE_MAX_LCORE') + error('Number of cores not specified.') +endif +if not dpdk_conf.has('RTE_MAX_NUMA_NODES') + error('Number of numa nodes not specified.') +endif + # set the install path for the drivers dpdk_conf.set_quoted('RTE_EAL_PMD_PATH', eal_pmd_path) diff --git a/config/x86/meson.build b/config/x86/meson.build index 31bfa63b1..4989d47f3 100644 --- a/config/x86/meson.build +++ b/config/x86/meson.build @@ -57,3 +57,5 @@ else endif dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64) +dpdk_conf.set('RTE_MAX_LCORE', 128) +dpdk_conf.set('RTE_MAX_NUMA_NODES', 4) diff --git a/meson_options.txt b/meson_options.txt index dd9b37f98..51ea63a4c 100644 --- a/meson_options.txt +++ b/meson_options.txt @@ -24,10 +24,10 @@ option('machine', type: 'string', value: 'native', description: 'set the target machine type. Set to generic for a build usable on all machines of the build machine architecture, set to native to let the compiler pick the architecture of the build machine.') option('max_ethports', type: 'integer', value: 32, description: 'maximum number of Ethernet devices') -option('max_lcores', type: 'integer', value: 128, - description: 'maximum number of cores/threads supported by EAL') -option('max_numa_nodes', type: 'integer', value: 4, - description: 'maximum number of NUMA nodes supported by EAL') +option('max_lcores', type: 'integer', value: 0, + description: 'maximum number of cores/threads supported by EAL. Set to positive integer to overwrite per-arch or cross-compilation defaults. Set to -1 to detect the number of cores on the build machine.') +option('max_numa_nodes', type: 'integer', value: 0, + description: 'maximum number of NUMA nodes supported by EAL. Set to positive integer to overwrite per-arch or cross-compilation defaults. Set to -1 to detect the number of numa nodes on the build machine.') option('enable_trace_fp', type: 'boolean', value: false, description: 'enable fast path trace points.') option('tests', type: 'boolean', value: true, From patchwork Fri Nov 13 11:37:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84128 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id DE4ECA09DE; Fri, 13 Nov 2020 12:42:15 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 2EA6AC934; Fri, 13 Nov 2020 12:38:40 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id A35FDC8F4 for ; Fri, 13 Nov 2020 12:38:22 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 8B167B9311; Fri, 13 Nov 2020 12:38:21 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id X0m4rnTVoR1x; Fri, 13 Nov 2020 12:38:20 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id D4AC0B7E7E; Fri, 13 Nov 2020 12:38:15 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Fri, 13 Nov 2020 12:37:59 +0100 Message-Id: <1605267483-13167-12-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605265789-12932-1-git-send-email-juraj.linkes@pantheon.tech> <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v11 11/15] build: add core and NUMA counts to cross files X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add support for setting core count and numa nodes in cross files. The values specified in cross files will override the default values. Also add missing default values to Arm config. Signed-off-by: Juraj Linkeš Reviewed-by: Honnappa Nagarahalli --- config/arm/arm64_armada_linux_gcc | 2 ++ config/arm/arm64_armv8_linux_gcc | 2 ++ config/arm/arm64_bluefield_linux_gcc | 2 ++ config/arm/arm64_dpaa_linux_gcc | 2 ++ config/arm/arm64_emag_linux_gcc | 2 ++ config/arm/arm64_graviton2_linux_gcc | 2 ++ config/arm/arm64_n1sdp_linux_gcc | 2 ++ config/arm/arm64_octeontx2_linux_gcc | 2 ++ config/arm/arm64_stingray_linux_gcc | 2 ++ config/arm/arm64_thunderx2_linux_gcc | 2 ++ config/arm/arm64_thunderxt88_linux_gcc | 2 ++ config/arm/meson.build | 6 ++++-- config/meson.build | 15 +++++++++++++++ .../linux_gsg/cross_build_dpdk_for_arm64.rst | 9 +++++++++ 14 files changed, 50 insertions(+), 2 deletions(-) diff --git a/config/arm/arm64_armada_linux_gcc b/config/arm/arm64_armada_linux_gcc index 52c5f4476..73945fbb4 100644 --- a/config/arm/arm64_armada_linux_gcc +++ b/config/arm/arm64_armada_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x56' +max_lcores = 16 +max_numa_nodes = 1 diff --git a/config/arm/arm64_armv8_linux_gcc b/config/arm/arm64_armv8_linux_gcc index 0099f5ca2..5451a01da 100644 --- a/config/arm/arm64_armv8_linux_gcc +++ b/config/arm/arm64_armv8_linux_gcc @@ -16,3 +16,5 @@ endian = 'little' # Generate binaries that are portable across all Armv8 machines implementer_id = 'generic' part_number = 'generic' +max_lcores = 256 +max_numa_nodes = 4 diff --git a/config/arm/arm64_bluefield_linux_gcc b/config/arm/arm64_bluefield_linux_gcc index b79389d85..4f56790c5 100644 --- a/config/arm/arm64_bluefield_linux_gcc +++ b/config/arm/arm64_bluefield_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x41' part_number = '0xd08' +max_lcores = 16 +max_numa_nodes = 1 diff --git a/config/arm/arm64_dpaa_linux_gcc b/config/arm/arm64_dpaa_linux_gcc index 573ae7e42..00101962b 100644 --- a/config/arm/arm64_dpaa_linux_gcc +++ b/config/arm/arm64_dpaa_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = 'dpaa' +max_lcores = 16 +max_numa_nodes = 1 diff --git a/config/arm/arm64_emag_linux_gcc b/config/arm/arm64_emag_linux_gcc index c675954fc..7cbb05510 100644 --- a/config/arm/arm64_emag_linux_gcc +++ b/config/arm/arm64_emag_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x50' part_number = '0x0' +max_lcores = 32 +max_numa_nodes = 1 diff --git a/config/arm/arm64_graviton2_linux_gcc b/config/arm/arm64_graviton2_linux_gcc index 022e06303..d0bfec87d 100644 --- a/config/arm/arm64_graviton2_linux_gcc +++ b/config/arm/arm64_graviton2_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementor_id = '0x41' implementor_pn = '0xd0c' +max_lcores = 64 +max_numa_nodes = 1 diff --git a/config/arm/arm64_n1sdp_linux_gcc b/config/arm/arm64_n1sdp_linux_gcc index 6fb3f02ea..138ae08c3 100644 --- a/config/arm/arm64_n1sdp_linux_gcc +++ b/config/arm/arm64_n1sdp_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x41' part_number = '0xd0c' +max_lcores = 4 +max_numa_nodes = 1 diff --git a/config/arm/arm64_octeontx2_linux_gcc b/config/arm/arm64_octeontx2_linux_gcc index ac1042806..26cf471ad 100644 --- a/config/arm/arm64_octeontx2_linux_gcc +++ b/config/arm/arm64_octeontx2_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x43' part_number = '0xb2' +max_lcores = 36 +max_numa_nodes = 1 diff --git a/config/arm/arm64_stingray_linux_gcc b/config/arm/arm64_stingray_linux_gcc index b79389d85..4f56790c5 100644 --- a/config/arm/arm64_stingray_linux_gcc +++ b/config/arm/arm64_stingray_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x41' part_number = '0xd08' +max_lcores = 16 +max_numa_nodes = 1 diff --git a/config/arm/arm64_thunderx2_linux_gcc b/config/arm/arm64_thunderx2_linux_gcc index dd257745e..c06dcdc2b 100644 --- a/config/arm/arm64_thunderx2_linux_gcc +++ b/config/arm/arm64_thunderx2_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x43' part_number = '0xaf' +max_lcores = 256 +max_numa_nodes = 2 diff --git a/config/arm/arm64_thunderxt88_linux_gcc b/config/arm/arm64_thunderxt88_linux_gcc index 758966262..3ba1528e4 100644 --- a/config/arm/arm64_thunderxt88_linux_gcc +++ b/config/arm/arm64_thunderxt88_linux_gcc @@ -15,3 +15,5 @@ endian = 'little' [properties] implementer_id = '0x43' part_number = '0xa1' +max_lcores = 96 +max_numa_nodes = 1 diff --git a/config/arm/meson.build b/config/arm/meson.build index bee57f089..7945efb72 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -38,7 +38,8 @@ implementer_generic = { ['RTE_MACHINE', '"armv8a"'], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 128], - ['RTE_MAX_LCORE', 256] + ['RTE_MAX_LCORE', 256], + ['RTE_MAX_NUMA_NODES', 4] ], 'part_number_config': { 'generic': {'machine_args': ['-march=armv8-a+crc', @@ -76,7 +77,8 @@ implementer_arm = { ['RTE_MACHINE', '"armv8a"'], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_LCORE', 16] + ['RTE_MAX_LCORE', 16], + ['RTE_MAX_NUMA_NODES', 1] ], 'part_number_config': part_number_config_arm } diff --git a/config/meson.build b/config/meson.build index ce0abe49b..208d1ea01 100644 --- a/config/meson.build +++ b/config/meson.build @@ -249,6 +249,21 @@ compile_time_cpuflags = [] subdir(arch_subdir) dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS', ','.join(compile_time_cpuflags)) +# apply cross-specific options +if meson.is_cross_build() + # configure RTE_MAX_LCORE and RTE_MAX_NUMA_NODES from cross file + cross_max_lcores = meson.get_cross_property('max_lcores', 0) + if cross_max_lcores != 0 + message('Setting RTE_MAX_LCORE from cross file') + dpdk_conf.set('RTE_MAX_LCORE', cross_max_lcores) + endif + cross_max_numa_nodes = meson.get_cross_property('max_numa_nodes', 0) + if cross_max_numa_nodes != 0 + message('Setting RTE_MAX_NUMA_NODES from cross file') + dpdk_conf.set('RTE_MAX_NUMA_NODES', cross_max_numa_nodes) + endif +endif + max_lcores = get_option('max_lcores') if max_lcores > 0 # Overwrite the default value from arch_subdir with user input diff --git a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst index 6a883b030..4e65b271c 100644 --- a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst +++ b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst @@ -134,3 +134,12 @@ you may use various combinations of implementer/part number:: Supported part_numbers for 0x50: '0x0': emag + +Other cross file options +------------------------ + +There are other options you may specify in a cross file to tailor the build:: + + Supported extra configuration + max_numa_nodes = n # will set RTE_MAX_NUMA_NODES + max_lcores = n # will set RTE_MAX_LCORE From patchwork Fri Nov 13 11:38:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84127 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3AE6AA09DE; Fri, 13 Nov 2020 12:41:55 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8DE82C928; Fri, 13 Nov 2020 12:38:38 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 3E3D8C8DC for ; Fri, 13 Nov 2020 12:38:23 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 33B8EB9977; Fri, 13 Nov 2020 12:38:22 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 7SYw8u7C4szr; Fri, 13 Nov 2020 12:38:21 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id E6387B9309; Fri, 13 Nov 2020 12:38:16 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Fri, 13 Nov 2020 12:38:00 +0100 Message-Id: <1605267483-13167-13-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605265789-12932-1-git-send-email-juraj.linkes@pantheon.tech> <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v11 12/15] build: disable Arm drivers X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" A few options that disabled drivers in the old makefiles were improperly ported to the meson build system. Fix this by adding a to the list of disabled drivers, similarly how the command line option works. Remove unneeded driver options ported from the old makefile system. Add support for removing drivers for cross builds. Signed-off-by: Juraj Linkeš Acked-by: Bruce Richardson Reviewed-by: Honnappa Nagarahalli --- config/arm/arm64_armada_linux_gcc | 1 + config/arm/meson.build | 7 +++---- doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst | 4 ++++ drivers/meson.build | 6 +++++- meson.build | 1 + 5 files changed, 14 insertions(+), 5 deletions(-) diff --git a/config/arm/arm64_armada_linux_gcc b/config/arm/arm64_armada_linux_gcc index 73945fbb4..7383f42e2 100644 --- a/config/arm/arm64_armada_linux_gcc +++ b/config/arm/arm64_armada_linux_gcc @@ -17,3 +17,4 @@ endian = 'little' implementer_id = '0x56' max_lcores = 16 max_numa_nodes = 1 +disabled_drivers = ['bus/dpaa', 'bus/fslmc', 'common/dpaax'] diff --git a/config/arm/meson.build b/config/arm/meson.build index 7945efb72..9b167267f 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -3,6 +3,9 @@ # Copyright(c) 2017 Cavium, Inc # Copyright(c) 2020 PANTHEON.tech s.r.o. +# disable Arm drivers for all builds +disabled_drivers += ['net/avp', 'net/fm10k'] + # common flags to all aarch64 builds, with lowest priority flags_common = [ # Accelerate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) @@ -17,9 +20,6 @@ flags_common = [ # ['RTE_ARM64_MEMCPY_ALIGN_MASK', 0xF], # ['RTE_ARM64_MEMCPY_STRICT_ALIGN', false], - ['RTE_NET_FM10K', false], - ['RTE_NET_AVP', false], - ['RTE_SCHED_VECTOR', false], ['RTE_ARM_USE_WFE', false], ['RTE_ARCH_ARM64', true], @@ -127,7 +127,6 @@ implementer_cavium = { ['RTE_MACHINE', '"octeontx2"'], ['RTE_ARM_FEATURE_ATOMICS', true], ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_EAL_IGB_UIO', false], ['RTE_MAX_LCORE', 36], ['RTE_MAX_NUMA_NODES', 1] ] diff --git a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst index 4e65b271c..210ad4508 100644 --- a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst +++ b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst @@ -143,3 +143,7 @@ There are other options you may specify in a cross file to tailor the build:: Supported extra configuration max_numa_nodes = n # will set RTE_MAX_NUMA_NODES max_lcores = n # will set RTE_MAX_LCORE + + disabled_drivers = ['bus/dpaa', 'crypto'] # add disabled drivers + # valid values are directories (optionally with their subdirs) + # in the drivers directory diff --git a/drivers/meson.build b/drivers/meson.build index 4bb7e9218..a997387ad 100644 --- a/drivers/meson.build +++ b/drivers/meson.build @@ -18,9 +18,13 @@ subdirs = [ 'baseband', # depends on common and bus. ] -disabled_drivers = run_command(list_dir_globs, get_option('disable_drivers'), +disabled_drivers += run_command(list_dir_globs, get_option('disable_drivers'), ).stdout().split() +if meson.is_cross_build() + disabled_drivers += meson.get_cross_property('disabled_drivers', []) +endif + default_cflags = machine_args default_cflags += ['-DALLOW_EXPERIMENTAL_API'] default_cflags += ['-DALLOW_INTERNAL_API'] diff --git a/meson.build b/meson.build index 45d974cd2..fcc8931f0 100644 --- a/meson.build +++ b/meson.build @@ -21,6 +21,7 @@ dpdk_drivers = [] dpdk_extra_ldflags = [] dpdk_libs_disabled = [] dpdk_drvs_disabled = [] +disabled_drivers = [] abi_version_file = files('ABI_VERSION') if host_machine.cpu_family().startswith('x86') From patchwork Fri Nov 13 11:38:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84129 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 609ABA09DE; Fri, 13 Nov 2020 12:42:39 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id DDAB1C940; Fri, 13 Nov 2020 12:38:41 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 6924EC872 for ; Fri, 13 Nov 2020 12:38:25 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 7612CB7E7E; Fri, 13 Nov 2020 12:38:23 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id p6DStwxpam54; Fri, 13 Nov 2020 12:38:22 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 499D8B92E2; Fri, 13 Nov 2020 12:38:18 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Fri, 13 Nov 2020 12:38:01 +0100 Message-Id: <1605267483-13167-14-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605265789-12932-1-git-send-email-juraj.linkes@pantheon.tech> <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v11 13/15] build: disable libnuma in cross builds X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Some Arm SoCs are not NUMA systems. Add the capability to disable NUMA for cross build and disable NUMA in Arm cross files. Signed-off-by: Juraj Linkeš Reviewed-by: Honnappa Nagarahalli --- config/arm/arm64_armada_linux_gcc | 1 + config/arm/arm64_bluefield_linux_gcc | 1 + config/arm/arm64_dpaa_linux_gcc | 1 + config/arm/arm64_graviton2_linux_gcc | 1 + config/arm/arm64_n1sdp_linux_gcc | 1 + config/arm/arm64_octeontx2_linux_gcc | 1 + config/arm/arm64_stingray_linux_gcc | 1 + config/arm/meson.build | 2 -- config/meson.build | 19 +++++++++++++------ .../linux_gsg/cross_build_dpdk_for_arm64.rst | 4 ++++ 10 files changed, 24 insertions(+), 8 deletions(-) diff --git a/config/arm/arm64_armada_linux_gcc b/config/arm/arm64_armada_linux_gcc index 7383f42e2..f5403f0a6 100644 --- a/config/arm/arm64_armada_linux_gcc +++ b/config/arm/arm64_armada_linux_gcc @@ -17,4 +17,5 @@ endian = 'little' implementer_id = '0x56' max_lcores = 16 max_numa_nodes = 1 +numa = false disabled_drivers = ['bus/dpaa', 'bus/fslmc', 'common/dpaax'] diff --git a/config/arm/arm64_bluefield_linux_gcc b/config/arm/arm64_bluefield_linux_gcc index 4f56790c5..6bef87fbd 100644 --- a/config/arm/arm64_bluefield_linux_gcc +++ b/config/arm/arm64_bluefield_linux_gcc @@ -17,3 +17,4 @@ implementer_id = '0x41' part_number = '0xd08' max_lcores = 16 max_numa_nodes = 1 +numa = false diff --git a/config/arm/arm64_dpaa_linux_gcc b/config/arm/arm64_dpaa_linux_gcc index 00101962b..3458b9d7b 100644 --- a/config/arm/arm64_dpaa_linux_gcc +++ b/config/arm/arm64_dpaa_linux_gcc @@ -17,3 +17,4 @@ endian = 'little' implementer_id = 'dpaa' max_lcores = 16 max_numa_nodes = 1 +numa = false diff --git a/config/arm/arm64_graviton2_linux_gcc b/config/arm/arm64_graviton2_linux_gcc index d0bfec87d..cfe239797 100644 --- a/config/arm/arm64_graviton2_linux_gcc +++ b/config/arm/arm64_graviton2_linux_gcc @@ -17,3 +17,4 @@ implementor_id = '0x41' implementor_pn = '0xd0c' max_lcores = 64 max_numa_nodes = 1 +numa = false diff --git a/config/arm/arm64_n1sdp_linux_gcc b/config/arm/arm64_n1sdp_linux_gcc index 138ae08c3..b00f2d1ef 100644 --- a/config/arm/arm64_n1sdp_linux_gcc +++ b/config/arm/arm64_n1sdp_linux_gcc @@ -17,3 +17,4 @@ implementer_id = '0x41' part_number = '0xd0c' max_lcores = 4 max_numa_nodes = 1 +numa = false diff --git a/config/arm/arm64_octeontx2_linux_gcc b/config/arm/arm64_octeontx2_linux_gcc index 26cf471ad..593769709 100644 --- a/config/arm/arm64_octeontx2_linux_gcc +++ b/config/arm/arm64_octeontx2_linux_gcc @@ -17,3 +17,4 @@ implementer_id = '0x43' part_number = '0xb2' max_lcores = 36 max_numa_nodes = 1 +numa = false diff --git a/config/arm/arm64_stingray_linux_gcc b/config/arm/arm64_stingray_linux_gcc index 4f56790c5..6bef87fbd 100644 --- a/config/arm/arm64_stingray_linux_gcc +++ b/config/arm/arm64_stingray_linux_gcc @@ -17,3 +17,4 @@ implementer_id = '0x41' part_number = '0xd08' max_lcores = 16 max_numa_nodes = 1 +numa = false diff --git a/config/arm/meson.build b/config/arm/meson.build index 9b167267f..492b7e40f 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -62,8 +62,6 @@ part_number_config_arm = { ['RTE_MACHINE', '"neoverse-n1"'], ['RTE_ARM_FEATURE_ATOMICS', true], ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false], - ['RTE_LIBRTE_VHOST_NUMA', false], ['RTE_MAX_MEM_MB', 1048576], ['RTE_CACHE_LINE_SIZE', 64], ['RTE_MAX_LCORE', 64], diff --git a/config/meson.build b/config/meson.build index 208d1ea01..2ddde22b7 100644 --- a/config/meson.build +++ b/config/meson.build @@ -141,12 +141,19 @@ endif # check for libraries used in multiple places in DPDK has_libnuma = 0 -numa_dep = cc.find_library('numa', required: false) -if numa_dep.found() and cc.has_header('numaif.h') - dpdk_conf.set10('RTE_HAS_LIBNUMA', true) - has_libnuma = 1 - add_project_link_arguments('-lnuma', language: 'c') - dpdk_extra_ldflags += '-lnuma' +find_libnuma = true +if meson.is_cross_build() and not meson.get_cross_property('numa', true) + # don't look for libnuma if explicitly disabled in cross build + check_libnuma = false +endif +if find_libnuma + numa_dep = cc.find_library('numa', required: false) + if numa_dep.found() and cc.has_header('numaif.h') + dpdk_conf.set10('RTE_HAS_LIBNUMA', true) + has_libnuma = 1 + add_project_link_arguments('-lnuma', language: 'c') + dpdk_extra_ldflags += '-lnuma' + endif endif has_libfdt = 0 diff --git a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst index 210ad4508..063661ebf 100644 --- a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst +++ b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst @@ -147,3 +147,7 @@ There are other options you may specify in a cross file to tailor the build:: disabled_drivers = ['bus/dpaa', 'crypto'] # add disabled drivers # valid values are directories (optionally with their subdirs) # in the drivers directory + + numa = false # set to false to force building for a non-NUMA system + # if not set or set to true, the build system will build for a NUMA + # system only if libnuma is installed From patchwork Fri Nov 13 11:38:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84130 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 022A6A09DE; Fri, 13 Nov 2020 12:42:57 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 867A5C94A; Fri, 13 Nov 2020 12:38:43 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 6EA26C872 for ; Fri, 13 Nov 2020 12:38:25 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 6E3DFB92E2; Fri, 13 Nov 2020 12:38:24 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 7W3Sp8_R0c6z; Fri, 13 Nov 2020 12:38:23 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 3FC7FB92F9; Fri, 13 Nov 2020 12:38:19 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= Date: Fri, 13 Nov 2020 12:38:02 +0100 Message-Id: <1605267483-13167-15-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605265789-12932-1-git-send-email-juraj.linkes@pantheon.tech> <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v11 14/15] build: add Arm SoC meson option X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add Arm SoC configuration to Arm meson.build and add a meson option to enable those options for native builds. This is preferable to specifying a cross file when doing aarch64 -> aarch64 builds, since the cross file specifies the toolchain as well. Signed-off-by: Juraj Linkeš Reviewed-by: Honnappa Nagarahalli --- config/arm/arm64_armada_linux_gcc | 6 +- config/arm/arm64_armv8_linux_gcc | 5 +- config/arm/arm64_bluefield_linux_gcc | 6 +- config/arm/arm64_dpaa_linux_gcc | 5 +- config/arm/arm64_emag_linux_gcc | 5 +- config/arm/arm64_graviton2_linux_gcc | 6 +- config/arm/arm64_n1sdp_linux_gcc | 6 +- config/arm/arm64_octeontx2_linux_gcc | 6 +- config/arm/arm64_stingray_linux_gcc | 6 +- config/arm/arm64_thunderx2_linux_gcc | 5 +- config/arm/arm64_thunderxt88_linux_gcc | 5 +- config/arm/meson.build | 129 +++++++++++++++++- .../linux_gsg/cross_build_dpdk_for_arm64.rst | 80 ++++------- meson_options.txt | 2 + 14 files changed, 166 insertions(+), 106 deletions(-) diff --git a/config/arm/arm64_armada_linux_gcc b/config/arm/arm64_armada_linux_gcc index f5403f0a6..7cc40d1f4 100644 --- a/config/arm/arm64_armada_linux_gcc +++ b/config/arm/arm64_armada_linux_gcc @@ -14,8 +14,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x56' -max_lcores = 16 -max_numa_nodes = 1 -numa = false -disabled_drivers = ['bus/dpaa', 'bus/fslmc', 'common/dpaax'] +soc = 'armada' diff --git a/config/arm/arm64_armv8_linux_gcc b/config/arm/arm64_armv8_linux_gcc index 5451a01da..64d44ead8 100644 --- a/config/arm/arm64_armv8_linux_gcc +++ b/config/arm/arm64_armv8_linux_gcc @@ -14,7 +14,4 @@ endian = 'little' [properties] # Generate binaries that are portable across all Armv8 machines -implementer_id = 'generic' -part_number = 'generic' -max_lcores = 256 -max_numa_nodes = 4 +soc = 'generic' diff --git a/config/arm/arm64_bluefield_linux_gcc b/config/arm/arm64_bluefield_linux_gcc index 6bef87fbd..7b1fae8b9 100644 --- a/config/arm/arm64_bluefield_linux_gcc +++ b/config/arm/arm64_bluefield_linux_gcc @@ -13,8 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x41' -part_number = '0xd08' -max_lcores = 16 -max_numa_nodes = 1 -numa = false +soc = 'bluefield' diff --git a/config/arm/arm64_dpaa_linux_gcc b/config/arm/arm64_dpaa_linux_gcc index 3458b9d7b..e52188842 100644 --- a/config/arm/arm64_dpaa_linux_gcc +++ b/config/arm/arm64_dpaa_linux_gcc @@ -14,7 +14,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = 'dpaa' -max_lcores = 16 -max_numa_nodes = 1 -numa = false +soc = 'dpaa' diff --git a/config/arm/arm64_emag_linux_gcc b/config/arm/arm64_emag_linux_gcc index 7cbb05510..6c24b4bca 100644 --- a/config/arm/arm64_emag_linux_gcc +++ b/config/arm/arm64_emag_linux_gcc @@ -13,7 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x50' -part_number = '0x0' -max_lcores = 32 -max_numa_nodes = 1 +soc = 'emag' diff --git a/config/arm/arm64_graviton2_linux_gcc b/config/arm/arm64_graviton2_linux_gcc index cfe239797..bae35d6be 100644 --- a/config/arm/arm64_graviton2_linux_gcc +++ b/config/arm/arm64_graviton2_linux_gcc @@ -13,8 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementor_id = '0x41' -implementor_pn = '0xd0c' -max_lcores = 64 -max_numa_nodes = 1 -numa = false +soc = 'graviton2' diff --git a/config/arm/arm64_n1sdp_linux_gcc b/config/arm/arm64_n1sdp_linux_gcc index b00f2d1ef..249ff4738 100644 --- a/config/arm/arm64_n1sdp_linux_gcc +++ b/config/arm/arm64_n1sdp_linux_gcc @@ -13,8 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x41' -part_number = '0xd0c' -max_lcores = 4 -max_numa_nodes = 1 -numa = false +soc = 'n1sdp' diff --git a/config/arm/arm64_octeontx2_linux_gcc b/config/arm/arm64_octeontx2_linux_gcc index 593769709..063018e8f 100644 --- a/config/arm/arm64_octeontx2_linux_gcc +++ b/config/arm/arm64_octeontx2_linux_gcc @@ -13,8 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x43' -part_number = '0xb2' -max_lcores = 36 -max_numa_nodes = 1 -numa = false +soc = 'octeontx2' diff --git a/config/arm/arm64_stingray_linux_gcc b/config/arm/arm64_stingray_linux_gcc index 6bef87fbd..1209a8c0b 100644 --- a/config/arm/arm64_stingray_linux_gcc +++ b/config/arm/arm64_stingray_linux_gcc @@ -13,8 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x41' -part_number = '0xd08' -max_lcores = 16 -max_numa_nodes = 1 -numa = false +soc = 'stingray' diff --git a/config/arm/arm64_thunderx2_linux_gcc b/config/arm/arm64_thunderx2_linux_gcc index c06dcdc2b..348650712 100644 --- a/config/arm/arm64_thunderx2_linux_gcc +++ b/config/arm/arm64_thunderx2_linux_gcc @@ -13,7 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x43' -part_number = '0xaf' -max_lcores = 256 -max_numa_nodes = 2 +soc = 'thunderx2' diff --git a/config/arm/arm64_thunderxt88_linux_gcc b/config/arm/arm64_thunderxt88_linux_gcc index 3ba1528e4..d31d0c6d8 100644 --- a/config/arm/arm64_thunderxt88_linux_gcc +++ b/config/arm/arm64_thunderxt88_linux_gcc @@ -13,7 +13,4 @@ cpu = 'armv8-a' endian = 'little' [properties] -implementer_id = '0x43' -part_number = '0xa1' -max_lcores = 96 -max_numa_nodes = 1 +soc = 'thunderxt88' diff --git a/config/arm/meson.build b/config/arm/meson.build index 492b7e40f..1738e36c3 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -30,7 +30,7 @@ native_machine_args = ['-mcpu=native'] ## Part numbers are specific to Arm implementers # implementer specific aarch64 flags have middle priority # (will overwrite common flags) -# part number specific aarch64 flags have the highest priority +# part number specific aarch64 flags have higher priority # (will overwrite both common and implementer specific flags) implementer_generic = { 'description': 'Generic armv8', @@ -180,6 +180,99 @@ implementers = { 'dpaa': implementer_dpaa } +# soc specific aarch64 flags have the highest priority +# (will overwrite all other flags) +soc_generic = { + 'description': 'Generic un-optimized build for all aarch64 machines.', + 'implementer': 'generic', + 'part_number': 'generic' +} + +soc_armada = { + 'description': 'Marvell ARMADA', + 'implementer': '0x56', + 'part_number': '0xd08', + 'numa': false, + 'disabled_drivers': ['bus/dpaa', 'bus/fslmc', 'common/dpaax'] +} + +soc_bluefield = { + 'description': 'NVIDIA BlueField', + 'implementer': '0x41', + 'part_number': '0xd08', + 'numa': false +} + +soc_dpaa = { + 'description': 'NXP DPAA', + 'implementer': 'dpaa', + 'part_number': '0xd08', + 'numa': false +} + +soc_emag = { + 'description': 'Ampere eMAG', + 'implementer': '0x50', + 'part_number': '0x0' +} + +soc_graviton2 = { + 'description': 'AWS Graviton2', + 'implementer': '0x41', + 'part_number': '0xd0c', + 'numa': false +} + +soc_n1sdp = { + 'description': 'Arm Neoverse N1SDP', + 'implementer': '0x41', + 'part_number': '0xd0c', + 'flags': [ + ['RTE_MAX_LCORE', 4] + ], + 'numa': false +} + +soc_octeontx2 = { + 'description': 'Marvell OCTEON TX2', + 'implementer': '0x43', + 'part_number': '0xb2', + 'numa': false +} + +soc_stingray = { + 'description': 'Broadcom Stingray', + 'implementer': '0x41', + 'part_number': '0xd08', + 'numa': false +} + +soc_thunderx2 = { + 'description': 'Marvell ThunderX2 T99', + 'implementer': '0x43', + 'part_number': '0xaf' +} + +soc_thunderxt88 = { + 'description': 'Marvell ThunderX T88', + 'implementer': '0x43', + 'part_number': '0xa1' +} + +socs = { + 'generic': soc_generic, + 'armada': soc_armada, + 'bluefield': soc_bluefield, + 'dpaa': soc_dpaa, + 'emag': soc_emag, + 'graviton2': soc_graviton2, + 'n1sdp': soc_n1sdp, + 'octeontx2': soc_octeontx2, + 'stingray': soc_stingray, + 'thunderx2': soc_thunderx2, + 'thunderxt88': soc_thunderxt88 +} + dpdk_conf.set('RTE_ARCH_ARM', 1) dpdk_conf.set('RTE_FORCE_INTRINSICS', 1) @@ -192,11 +285,18 @@ if dpdk_conf.get('RTE_ARCH_32') else # aarch64 build use_native_machine_args = false + arm_soc = get_option('arm_soc') + soc_config = {} if not meson.is_cross_build() if machine == 'generic' # generic build + if arm_soc != '' + error('Arm SoC is unsupported with generic build.') + endif implementer_id = 'generic' part_number = 'generic' + elif arm_soc != '' + soc_config = socs.get(arm_soc, {'not_supported': true}) else # native build # The script returns ['Implementer', 'Variant', 'Architecture', @@ -215,8 +315,27 @@ else endif else # cross build - implementer_id = meson.get_cross_property('implementer_id') - part_number = meson.get_cross_property('part_number') + arm_soc = meson.get_cross_property('soc', '') + if arm_soc == '' + error('Arm SoC must be specified in the cross file.') + endif + soc_config = socs.get(arm_soc, {'not_supported': true}) + endif + + soc_flags = [] + if soc_config.has_key('not_supported') + error('SoC @0@ not supported.'.format(arm_soc)) + elif soc_config != {} + implementer_id = soc_config['implementer'] + implementer_config = implementers[implementer_id] + part_number = soc_config['part_number'] + soc_flags = soc_config.get('flags', []) + if not soc_config.get('numa', true) + has_libnuma = 0 + endif + if soc_config.has_key('disabled_drivers') + disabled_drivers += soc_config['disabled_drivers'] + endif endif if implementers.has_key(implementer_id) @@ -242,8 +361,8 @@ else '(-Dmachine=generic) build.') endif - # use default flags with implementer flags - dpdk_flags = flags_common + implementer_config['flags'] + part_number_config.get('flags', []) + # add flags in the proper order + dpdk_flags = flags_common + implementer_config['flags'] + part_number_config.get('flags', []) + soc_flags # apply supported machine args machine_args = [] # Clear previous machine args diff --git a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst index 063661ebf..83bdb78bf 100644 --- a/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst +++ b/doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst @@ -100,54 +100,32 @@ command:: meson arm64-build --cross-file config/arm/arm64_armv8_linux_gcc ninja -C arm64-build -Supported cross-compilation targets ------------------------------------ - -If you wish to build for a target which is not among the current cross-files, -you may use various combinations of implementer/part number:: - - Supported implementers: - 'generic': Generic armv8 - '0x41': Arm - '0x43': Cavium - '0x50': Ampere Computing - '0x56': Marvell ARMADA - 'dpaa': NXP DPAA - - Supported part_numbers for generic: - 'generic': valid for all armv8-a architectures (unoptimized portable build) - - Supported part_numbers for 0x41, 0x56, dpaa: - '0xd03': cortex-a53 - '0xd04': cortex-a35 - '0xd09': cortex-a73 - '0xd0a': cortex-a75 - '0xd0b': cortex-a76 - '0xd0c': neoverse-n1 - - Supported part_numbers for 0x43: - '0xa1': thunderxt88 - '0xa2': thunderxt81 - '0xa3': thunderxt83 - '0xaf': thunderx2t99 - '0xb2': octeontx2 - - Supported part_numbers for 0x50: - '0x0': emag - -Other cross file options ------------------------- - -There are other options you may specify in a cross file to tailor the build:: - - Supported extra configuration - max_numa_nodes = n # will set RTE_MAX_NUMA_NODES - max_lcores = n # will set RTE_MAX_LCORE - - disabled_drivers = ['bus/dpaa', 'crypto'] # add disabled drivers - # valid values are directories (optionally with their subdirs) - # in the drivers directory - - numa = false # set to false to force building for a non-NUMA system - # if not set or set to true, the build system will build for a NUMA - # system only if libnuma is installed +Building for an aarch64 SoC on an aarch64 build machine +------------------------------------------------------- + +If you wish to build on an aarch64 build machine for a different aarch64 SoC, +you don't need a separate cross toolchain, just a different set of +configuration options. To build for an aarch64 SoC, use the -Darm_soc meson +option:: + + meson soc_build -Darm_soc= + +Substitute with one of the supported SoCs:: + + generic: Generic un-optimized build for all aarch64 machines. + armada: Marvell ARMADA + bluefield: NVIDIA BlueField + dpaa: NXP DPAA + emag: Ampere eMAG + graviton2: AWS Graviton2 + n1sdp: Arm Neoverse N1SDP + octeontx2: Marvell OCTEON TX2 + stingray: Broadcom Stingray + thunderx2: Marvell ThunderX2 T99 + thunderxt88: Marvell ThunderX T88 + +These SoCs are also used in cross files, e.g.:: + + [properties] + # Generate binaries that are portable across all Armv8 machines + soc = 'generic' diff --git a/meson_options.txt b/meson_options.txt index 51ea63a4c..4ad6acfb2 100644 --- a/meson_options.txt +++ b/meson_options.txt @@ -1,5 +1,7 @@ # Please keep these options sorted alphabetically. +option('arm_soc', type: 'string', value: '', + description: 'Specify if you want to build for a particular aarch64 Arm SoC when building on an aarch64 machine.') option('disable_drivers', type: 'string', value: '', description: 'Comma-separated list of drivers to explicitly disable.') option('drivers_install_subdir', type: 'string', value: 'dpdk/pmds-', From patchwork Fri Nov 13 11:38:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Juraj_Linke=C5=A1?= X-Patchwork-Id: 84131 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 88C66A09DE; Fri, 13 Nov 2020 12:43:15 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 52888C958; Fri, 13 Nov 2020 12:38:45 +0100 (CET) Received: from lb.pantheon.sk (lb.pantheon.sk [46.229.239.20]) by dpdk.org (Postfix) with ESMTP id 5EE84C872 for ; Fri, 13 Nov 2020 12:38:27 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by lb.pantheon.sk (Postfix) with ESMTP id 346D6B92EC; Fri, 13 Nov 2020 12:38:25 +0100 (CET) X-Virus-Scanned: amavisd-new at siecit.sk Received: from lb.pantheon.sk ([127.0.0.1]) by localhost (lb.pantheon.sk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id UIMu8nhrqngh; Fri, 13 Nov 2020 12:38:24 +0100 (CET) Received: from service-node1.lab.pantheon.local (unknown [46.229.239.141]) by lb.pantheon.sk (Postfix) with ESMTP id 8C32BB931F; Fri, 13 Nov 2020 12:38:20 +0100 (CET) From: =?utf-8?q?Juraj_Linke=C5=A1?= To: bruce.richardson@intel.com, Ruifeng.Wang@arm.com, Honnappa.Nagarahalli@arm.com, Phil.Yang@arm.com, vcchunga@amazon.com, Dharmik.Thakkar@arm.com, jerinjacobk@gmail.com, hemant.agrawal@nxp.com, ajit.khaparde@broadcom.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, =?utf-8?q?Juraj_Linke=C5=A1?= , lironh@marvell.com, yskoh@mellanox.com Date: Fri, 13 Nov 2020 12:38:03 +0100 Message-Id: <1605267483-13167-16-git-send-email-juraj.linkes@pantheon.tech> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> References: <1605265789-12932-1-git-send-email-juraj.linkes@pantheon.tech> <1605267483-13167-1-git-send-email-juraj.linkes@pantheon.tech> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v11 15/15] config: fix Arm implementer and its SoCs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Fix the implementer and part number of DPAA and ARMADA SoCs. The current values of 16 cores and 1 NUMA node don't cover all SoCs from the Arm implementer, e.g. Taishan 2280 has 64 cores and 4 NUMA nodes. Increase these to 64 and 4 to widen the coverage. Add configuration to SoC options where smaller values are needed. Fixes: 6ec78c2463ac ("build: add meson support for dpaaX platforms") Cc: hemant.agrawal@nxp.com Fixes: dd1cd845c102 ("config: add Marvell ARMADA based on armv8-a") Cc: lironh@marvell.com Fixes: d97108a33231 ("config: change defaults of armv8") Cc: yskoh@mellanox.com Signed-off-by: Juraj Linkeš Reviewed-by: Honnappa Nagarahalli --- config/arm/meson.build | 54 ++++++++++++++++++------------------------ 1 file changed, 23 insertions(+), 31 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index 1738e36c3..f25a7dbab 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -75,8 +75,8 @@ implementer_arm = { ['RTE_MACHINE', '"armv8a"'], ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_LCORE', 16], - ['RTE_MAX_NUMA_NODES', 1] + ['RTE_MAX_LCORE', 64], + ['RTE_MAX_NUMA_NODES', 4] ], 'part_number_config': part_number_config_arm } @@ -146,38 +146,12 @@ implementer_ampere = { } } -implementer_marvell = { - 'description': 'Marvell ARMADA', - 'flags': [ - ['RTE_MACHINE', '"armv8a"'], - ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_LCORE', 16], - ['RTE_MAX_NUMA_NODES', 1] - ], - 'part_number_config': part_number_config_arm -} - -implementer_dpaa = { - 'description': 'NXP DPAA', - 'flags': [ - ['RTE_MACHINE', '"dpaa"'], - ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false], - ['RTE_USE_C11_MEM_MODEL', true], - ['RTE_CACHE_LINE_SIZE', 64], - ['RTE_MAX_LCORE', 16], - ['RTE_MAX_NUMA_NODES', 1] - ], - 'part_number_config': part_number_config_arm -} - ## Arm implementers (ID from MIDR in Arm Architecture Reference Manual) implementers = { 'generic': implementer_generic, '0x41': implementer_arm, '0x43': implementer_cavium, - '0x50': implementer_ampere, - '0x56': implementer_marvell, - 'dpaa': implementer_dpaa + '0x50': implementer_ampere } # soc specific aarch64 flags have the highest priority @@ -190,8 +164,12 @@ soc_generic = { soc_armada = { 'description': 'Marvell ARMADA', - 'implementer': '0x56', + 'implementer': '0x41', 'part_number': '0xd08', + 'flags': [ + ['RTE_MAX_LCORE', 16], + ['RTE_MAX_NUMA_NODES', 1] + ], 'numa': false, 'disabled_drivers': ['bus/dpaa', 'bus/fslmc', 'common/dpaax'] } @@ -200,13 +178,23 @@ soc_bluefield = { 'description': 'NVIDIA BlueField', 'implementer': '0x41', 'part_number': '0xd08', + 'flags': [ + ['RTE_MAX_LCORE', 16], + ['RTE_MAX_NUMA_NODES', 1] + ], 'numa': false } soc_dpaa = { 'description': 'NXP DPAA', - 'implementer': 'dpaa', + 'implementer': '0x41', 'part_number': '0xd08', + 'flags': [ + ['RTE_MACHINE', '"dpaa"'], + ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false], + ['RTE_MAX_LCORE', 16], + ['RTE_MAX_NUMA_NODES', 1] + ], 'numa': false } @@ -243,6 +231,10 @@ soc_octeontx2 = { soc_stingray = { 'description': 'Broadcom Stingray', 'implementer': '0x41', + 'flags': [ + ['RTE_MAX_LCORE', 16], + ['RTE_MAX_NUMA_NODES', 1] + ], 'part_number': '0xd08', 'numa': false }