From patchwork Thu Oct 29 12:49:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lijun Ou X-Patchwork-Id: 82757 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 56DE6A04B5; Thu, 29 Oct 2020 13:51:09 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 1F6C5CCA8; Thu, 29 Oct 2020 13:49:07 +0100 (CET) Received: from szxga07-in.huawei.com (szxga07-in.huawei.com [45.249.212.35]) by dpdk.org (Postfix) with ESMTP id AD3B2CB82 for ; Thu, 29 Oct 2020 13:48:52 +0100 (CET) Received: from DGGEMS404-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4CMQH42mwnz70MC for ; Thu, 29 Oct 2020 20:48:48 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by DGGEMS404-HUB.china.huawei.com (10.3.19.204) with Microsoft SMTP Server id 14.3.487.0; Thu, 29 Oct 2020 20:48:35 +0800 From: Lijun Ou To: CC: , Date: Thu, 29 Oct 2020 20:49:04 +0800 Message-ID: <1603975751-27955-2-git-send-email-oulijun@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1603975751-27955-1-git-send-email-oulijun@huawei.com> References: <1603973875-8431-1-git-send-email-oulijun@huawei.com> <1603975751-27955-1-git-send-email-oulijun@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected Subject: [dpdk-dev] [PATCH v2 1/8] net/hns3: enable RSS for ipv6-sctp dst/src port fields X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" For Kunpeng930 NIC hardware, it supports to use dst/src port to RSS hash for ipv6-sctp packet type. However, the Kunpeng920 NIC hardware is different with it. The Kunpeng920 NIC only supports dst/src ip to RSS hash for ipv6-sctp packet type. Signed-off-by: Lijun Ou --- drivers/net/hns3/hns3_ethdev.c | 2 ++ drivers/net/hns3/hns3_ethdev_vf.c | 2 ++ drivers/net/hns3/hns3_flow.c | 12 +++++++++++- drivers/net/hns3/hns3_rss.c | 12 ++++++++++-- drivers/net/hns3/hns3_rss.h | 6 ++++++ 5 files changed, 31 insertions(+), 3 deletions(-) diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c index 5a234e2..c34dbea 100644 --- a/drivers/net/hns3/hns3_ethdev.c +++ b/drivers/net/hns3/hns3_ethdev.c @@ -3037,6 +3037,7 @@ hns3_get_capability(struct hns3_hw *hw) hw->vlan_mode = HNS3_SW_SHIFT_AND_DISCARD_MODE; hw->min_tx_pkt_len = HNS3_HIP08_MIN_TX_PKT_LEN; pf->tqp_config_mode = HNS3_FIXED_MAX_TQP_NUM_MODE; + hw->rss_info.ipv6_sctp_offload_supported = false; return 0; } @@ -3055,6 +3056,7 @@ hns3_get_capability(struct hns3_hw *hw) hw->vlan_mode = HNS3_HW_SHIFT_AND_DISCARD_MODE; hw->min_tx_pkt_len = HNS3_HIP09_MIN_TX_PKT_LEN; pf->tqp_config_mode = HNS3_FLEX_MAX_TQP_NUM_MODE; + hw->rss_info.ipv6_sctp_offload_supported = true; return 0; } diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c index d1c3fb8..7d3750d 100644 --- a/drivers/net/hns3/hns3_ethdev_vf.c +++ b/drivers/net/hns3/hns3_ethdev_vf.c @@ -1213,6 +1213,7 @@ hns3vf_get_capability(struct hns3_hw *hw) hw->intr.gl_unit = HNS3_INTR_COALESCE_GL_UINT_2US; hw->tso_mode = HNS3_TSO_SW_CAL_PSEUDO_H_CSUM; hw->min_tx_pkt_len = HNS3_HIP08_MIN_TX_PKT_LEN; + hw->rss_info.ipv6_sctp_offload_supported = false; return 0; } @@ -1229,6 +1230,7 @@ hns3vf_get_capability(struct hns3_hw *hw) hw->intr.gl_unit = HNS3_INTR_COALESCE_GL_UINT_1US; hw->tso_mode = HNS3_TSO_HW_CAL_PSEUDO_H_CSUM; hw->min_tx_pkt_len = HNS3_HIP09_MIN_TX_PKT_LEN; + hw->rss_info.ipv6_sctp_offload_supported = true; return 0; } diff --git a/drivers/net/hns3/hns3_flow.c b/drivers/net/hns3/hns3_flow.c index 4fb129e..73f5e8e 100644 --- a/drivers/net/hns3/hns3_flow.c +++ b/drivers/net/hns3/hns3_flow.c @@ -1399,8 +1399,18 @@ hns3_parse_rss_filter(struct rte_eth_dev *dev, RTE_FLOW_ERROR_TYPE_ACTION_CONF, act, "too many queues for RSS context"); + /* + * For Kunpeng920 and Kunpeng930 NIC hardware, it is not supported to + * use dst port/src port fields to RSS hash for the following packet + * types. + * - IPV4 FRAG | IPV4 NONFRAG | IPV6 FRAG | IPV6 NONFRAG + * Besides, for Kunpeng920, The NIC hardware is not supported to use + * src/dst port fields to RSS hash for IPV6 SCTP packet type. + */ if (rss->types & (ETH_RSS_L4_DST_ONLY | ETH_RSS_L4_SRC_ONLY) && - (rss->types & ETH_RSS_IP)) + (rss->types & ETH_RSS_IP || + (!hw->rss_info.ipv6_sctp_offload_supported && + rss->types & ETH_RSS_NONFRAG_IPV6_SCTP))) return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF, &rss->types, diff --git a/drivers/net/hns3/hns3_rss.c b/drivers/net/hns3/hns3_rss.c index a8b8143..2efd410 100644 --- a/drivers/net/hns3/hns3_rss.c +++ b/drivers/net/hns3/hns3_rss.c @@ -61,8 +61,10 @@ enum hns3_tuple_field { HNS3_RSS_FIELD_IPV6_UDP_EN_IP_D, HNS3_RSS_FIELD_IPV6_UDP_EN_IP_S, - /* IPV6_UDP ENABLE FIELD */ - HNS3_RSS_FIELD_IPV6_SCTP_EN_IP_D = 50, + /* IPV6_SCTP ENABLE FIELD */ + HNS3_RSS_FILED_IPV6_SCTP_EN_SCTP_D = 48, + HNS3_RSS_FILED_IPV6_SCTP_EN_SCTP_S, + HNS3_RSS_FIELD_IPV6_SCTP_EN_IP_D, HNS3_RSS_FIELD_IPV6_SCTP_EN_IP_S, HNS3_RSS_FIELD_IPV6_SCTP_EN_SCTP_VER, @@ -133,6 +135,10 @@ static const struct { BIT_ULL(HNS3_RSS_FIELD_IPV6_SCTP_EN_IP_S) }, { ETH_RSS_NONFRAG_IPV6_SCTP | ETH_RSS_L3_DST_ONLY, BIT_ULL(HNS3_RSS_FIELD_IPV6_SCTP_EN_IP_D) }, + { ETH_RSS_NONFRAG_IPV6_SCTP | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(HNS3_RSS_FILED_IPV6_SCTP_EN_SCTP_S) }, + { ETH_RSS_NONFRAG_IPV6_SCTP | ETH_RSS_L4_DST_ONLY, + BIT_ULL(HNS3_RSS_FILED_IPV6_SCTP_EN_SCTP_D) }, { ETH_RSS_NONFRAG_IPV6_OTHER | ETH_RSS_L3_SRC_ONLY, BIT_ULL(HNS3_RSS_FIELD_IPV6_NONFRAG_IP_S) }, { ETH_RSS_NONFRAG_IPV6_OTHER | ETH_RSS_L3_DST_ONLY, @@ -177,6 +183,8 @@ static const struct { BIT_ULL(HNS3_RSS_FIELD_IPV6_UDP_EN_UDP_D) }, { ETH_RSS_NONFRAG_IPV6_SCTP, BIT_ULL(HNS3_RSS_FIELD_IPV6_SCTP_EN_IP_S) | BIT_ULL(HNS3_RSS_FIELD_IPV6_SCTP_EN_IP_D) | + BIT_ULL(HNS3_RSS_FILED_IPV6_SCTP_EN_SCTP_D) | + BIT_ULL(HNS3_RSS_FILED_IPV6_SCTP_EN_SCTP_S) | BIT_ULL(HNS3_RSS_FIELD_IPV6_SCTP_EN_SCTP_VER) }, { ETH_RSS_NONFRAG_IPV6_OTHER, BIT_ULL(HNS3_RSS_FIELD_IPV6_NONFRAG_IP_S) | diff --git a/drivers/net/hns3/hns3_rss.h b/drivers/net/hns3/hns3_rss.h index b5ac8ae..6d1d25f 100644 --- a/drivers/net/hns3/hns3_rss.h +++ b/drivers/net/hns3/hns3_rss.h @@ -48,6 +48,12 @@ struct hns3_rss_conf { uint16_t rss_indirection_tbl[HNS3_RSS_IND_TBL_SIZE]; /* Shadow table */ uint16_t queue[HNS3_RSS_QUEUES_BUFFER_NUM]; /* Queues indices to use */ bool valid; /* check if RSS rule is valid */ + /* + * For IPv6 SCTP packets type, check whether the NIC hardware support + * RSS hash using the src/dst port as the input tuple. For Kunpeng920 + * NIC hardware, it is not supported + */ + bool ipv6_sctp_offload_supported; }; #ifndef ilog2 From patchwork Thu Oct 29 12:49:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lijun Ou X-Patchwork-Id: 82758 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 46A06A04B5; Thu, 29 Oct 2020 13:51:34 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A0EBCCCB9; Thu, 29 Oct 2020 13:49:08 +0100 (CET) Received: from szxga07-in.huawei.com (szxga07-in.huawei.com [45.249.212.35]) by dpdk.org (Postfix) with ESMTP id 7676FCB9E for ; Thu, 29 Oct 2020 13:48:53 +0100 (CET) Received: from DGGEMS404-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4CMQH425Xqz70Ks for ; Thu, 29 Oct 2020 20:48:48 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by DGGEMS404-HUB.china.huawei.com (10.3.19.204) with Microsoft SMTP Server id 14.3.487.0; Thu, 29 Oct 2020 20:48:36 +0800 From: Lijun Ou To: CC: , Date: Thu, 29 Oct 2020 20:49:05 +0800 Message-ID: <1603975751-27955-3-git-send-email-oulijun@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1603975751-27955-1-git-send-email-oulijun@huawei.com> References: <1603973875-8431-1-git-send-email-oulijun@huawei.com> <1603975751-27955-1-git-send-email-oulijun@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected Subject: [dpdk-dev] [PATCH v2 2/8] net/hns3: add queue count of Rx API support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Here is to implement the available and used rxd number count function. In Kunpeng series, the NIC hardware support to read the bd numbers which wait processed from the hardware FBD(Full Buffer Descriptor), and the driver maintains the bd number to be wrriten back hardware. compare the number of FBDs with the number of BDs to be written back to the hardware. the number of used descriptors of a rx queue is computed as follows: The fbd numbers of reading from FBD register plus the bd numbers to be wrriten back to hardware maintainer by the driver. Signed-off-by: Lijun Ou --- V1->V2: - fix the checkpatch warning --- drivers/net/hns3/hns3_ethdev.c | 1 + drivers/net/hns3/hns3_ethdev_vf.c | 1 + drivers/net/hns3/hns3_rxtx.c | 25 +++++++++++++++++++++++++ drivers/net/hns3/hns3_rxtx.h | 1 + 4 files changed, 28 insertions(+) diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c index c34dbea..6342c70 100644 --- a/drivers/net/hns3/hns3_ethdev.c +++ b/drivers/net/hns3/hns3_ethdev.c @@ -6096,6 +6096,7 @@ hns3_dev_init(struct rte_eth_dev *eth_dev) hns3_set_rxtx_function(eth_dev); eth_dev->dev_ops = &hns3_eth_dev_ops; + eth_dev->rx_queue_count = hns3_rx_queue_count; if (rte_eal_process_type() != RTE_PROC_PRIMARY) { ret = hns3_mp_init_secondary(); if (ret) { diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c index 7d3750d..9fb7941 100644 --- a/drivers/net/hns3/hns3_ethdev_vf.c +++ b/drivers/net/hns3/hns3_ethdev_vf.c @@ -2743,6 +2743,7 @@ hns3vf_dev_init(struct rte_eth_dev *eth_dev) hns3_set_rxtx_function(eth_dev); eth_dev->dev_ops = &hns3vf_eth_dev_ops; + eth_dev->rx_queue_count = hns3_rx_queue_count; if (rte_eal_process_type() != RTE_PROC_PRIMARY) { ret = hns3_mp_init_secondary(); if (ret) { diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c index d511908..55bee17 100644 --- a/drivers/net/hns3/hns3_rxtx.c +++ b/drivers/net/hns3/hns3_rxtx.c @@ -3823,3 +3823,28 @@ hns3_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id) return 0; } + +uint32_t +hns3_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id) +{ + /* + * Number of BDs that have been processed by the driver + * but have not been notified to the hardware. + */ + uint32_t driver_hold_bd_num; + struct hns3_rx_queue *rxq; + uint32_t fbd_num; + + rxq = dev->data->rx_queues[rx_queue_id]; + fbd_num = hns3_read_dev(rxq, HNS3_RING_RX_FBDNUM_REG); + if (dev->rx_pkt_burst == hns3_recv_pkts_vec || + dev->rx_pkt_burst == hns3_recv_pkts_vec_sve) + driver_hold_bd_num = rxq->rx_rearm_nb; + else + driver_hold_bd_num = rxq->rx_free_hold; + + if (fbd_num <= driver_hold_bd_num) + return 0; + else + return fbd_num - driver_hold_bd_num; +} diff --git a/drivers/net/hns3/hns3_rxtx.h b/drivers/net/hns3/hns3_rxtx.h index 4be9c4a..ae09e94 100644 --- a/drivers/net/hns3/hns3_rxtx.h +++ b/drivers/net/hns3/hns3_rxtx.h @@ -620,6 +620,7 @@ int hns3_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t nb_desc, struct rte_mempool *mp); int hns3_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t nb_desc, unsigned int socket, const struct rte_eth_txconf *conf); +uint32_t hns3_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id); int hns3_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id); int hns3_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id); int hns3_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id); From patchwork Thu Oct 29 12:49:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lijun Ou X-Patchwork-Id: 82756 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id A7795A04B5; Thu, 29 Oct 2020 13:50:50 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 9FBD5CC74; Thu, 29 Oct 2020 13:49:05 +0100 (CET) Received: from szxga07-in.huawei.com (szxga07-in.huawei.com [45.249.212.35]) by dpdk.org (Postfix) with ESMTP id 05B27CB79 for ; Thu, 29 Oct 2020 13:48:53 +0100 (CET) Received: from DGGEMS404-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4CMQH42c4pz70MB for ; Thu, 29 Oct 2020 20:48:48 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by DGGEMS404-HUB.china.huawei.com (10.3.19.204) with Microsoft SMTP Server id 14.3.487.0; Thu, 29 Oct 2020 20:48:36 +0800 From: Lijun Ou To: CC: , Date: Thu, 29 Oct 2020 20:49:06 +0800 Message-ID: <1603975751-27955-4-git-send-email-oulijun@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1603975751-27955-1-git-send-email-oulijun@huawei.com> References: <1603973875-8431-1-git-send-email-oulijun@huawei.com> <1603975751-27955-1-git-send-email-oulijun@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected Subject: [dpdk-dev] [PATCH v2 3/8] net/hns3: fix RSS max queue id allowed in multi-TC case X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Huisong Li Currently, driver uses the maximum number of queues configured by user as the maximum queue id that can be specified by the RSS rule or the reta_update api. It is unreasonable and may trigger an incorrect behavior in the multi-TC scenario. The driver must ensure that the queue id configured in the redirection table must be within the range of the number of queues allocated to a TC. Fixes: c37ca66f2b27 ("net/hns3: support RSS") Cc: stable@dpdk.org Signed-off-by: Huisong Li Signed-off-by: Lijun Ou --- drivers/net/hns3/hns3_flow.c | 45 ++++++++++++++++++-------------------------- drivers/net/hns3/hns3_rss.c | 13 ++++++------- 2 files changed, 24 insertions(+), 34 deletions(-) diff --git a/drivers/net/hns3/hns3_flow.c b/drivers/net/hns3/hns3_flow.c index 73f5e8e..0d5dd1a 100644 --- a/drivers/net/hns3/hns3_flow.c +++ b/drivers/net/hns3/hns3_flow.c @@ -1367,13 +1367,18 @@ hns3_parse_rss_filter(struct rte_eth_dev *dev, act, "no valid queues"); } + if (rss->queue_num > RTE_DIM(rss_conf->queue)) + return rte_flow_error_set(error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_ACTION_CONF, act, + "queue number configured exceeds " + "queue buffer size driver supported"); + for (n = 0; n < rss->queue_num; n++) { - if (rss->queue[n] < dev->data->nb_rx_queues) + if (rss->queue[n] < hw->alloc_rss_size) continue; return rte_flow_error_set(error, EINVAL, - RTE_FLOW_ERROR_TYPE_ACTION_CONF, - act, - "queue id > max number of queues"); + RTE_FLOW_ERROR_TYPE_ACTION_CONF, act, + "queue id must be less than queue number allocated to a TC"); } if (!(rss->types & HNS3_ETH_RSS_SUPPORT) && rss->types) @@ -1394,10 +1399,6 @@ hns3_parse_rss_filter(struct rte_eth_dev *dev, return rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION_CONF, act, "RSS hash key must be exactly 40 bytes"); - if (rss->queue_num > RTE_DIM(rss_conf->queue)) - return rte_flow_error_set(error, ENOTSUP, - RTE_FLOW_ERROR_TYPE_ACTION_CONF, act, - "too many queues for RSS context"); /* * For Kunpeng920 and Kunpeng930 NIC hardware, it is not supported to @@ -1450,9 +1451,8 @@ hns3_disable_rss(struct hns3_hw *hw) static void hns3_parse_rss_key(struct hns3_hw *hw, struct rte_flow_action_rss *rss_conf) { - if (rss_conf->key == NULL || - rss_conf->key_len < HNS3_RSS_KEY_SIZE) { - hns3_info(hw, "Default RSS hash key to be set"); + if (rss_conf->key == NULL || rss_conf->key_len < HNS3_RSS_KEY_SIZE) { + hns3_warn(hw, "Default RSS hash key to be set"); rss_conf->key = hns3_hash_key; rss_conf->key_len = HNS3_RSS_KEY_SIZE; } @@ -1493,10 +1493,8 @@ hns3_hw_rss_hash_set(struct hns3_hw *hw, struct rte_flow_action_rss *rss_config) struct hns3_rss_tuple_cfg *tuple; int ret; - /* Parse hash key */ hns3_parse_rss_key(hw, rss_config); - /* Parse hash algorithm */ ret = hns3_parse_rss_algorithm(hw, &rss_config->func, &hw->rss_info.hash_algo); if (ret) @@ -1525,20 +1523,18 @@ hns3_update_indir_table(struct rte_eth_dev *dev, struct hns3_adapter *hns = dev->data->dev_private; struct hns3_hw *hw = &hns->hw; uint16_t indir_tbl[HNS3_RSS_IND_TBL_SIZE]; - uint16_t j, allow_rss_queues; + uint16_t j; uint32_t i; - allow_rss_queues = RTE_MIN(dev->data->nb_rx_queues, hw->rss_size_max); /* Fill in redirection table */ memcpy(indir_tbl, hw->rss_info.rss_indirection_tbl, sizeof(hw->rss_info.rss_indirection_tbl)); for (i = 0, j = 0; i < HNS3_RSS_IND_TBL_SIZE; i++, j++) { j %= num; - if (conf->queue[j] >= allow_rss_queues) { - hns3_err(hw, "Invalid queue id(%u) to be set in " - "redirection table, max number of rss " - "queues: %u", conf->queue[j], - allow_rss_queues); + if (conf->queue[j] >= hw->alloc_rss_size) { + hns3_err(hw, "queue id(%u) set to redirection table " + "exceeds queue number(%u) allocated to a TC.", + conf->queue[j], hw->alloc_rss_size); return -EINVAL; } indir_tbl[i] = conf->queue[j]; @@ -1607,11 +1603,8 @@ hns3_config_rss_filter(struct rte_eth_dev *dev, return 0; } - /* Get rx queues num */ - num = dev->data->nb_rx_queues; - /* Set rx queues to use */ - num = RTE_MIN(num, rss_flow_conf.queue_num); + num = RTE_MIN(dev->data->nb_rx_queues, rss_flow_conf.queue_num); if (rss_flow_conf.queue_num > num) hns3_warn(hw, "Config queue numbers %u are beyond the scope of truncated", rss_flow_conf.queue_num); @@ -1648,7 +1641,6 @@ hns3_config_rss_filter(struct rte_eth_dev *dev, return ret; } -/* Remove the rss filter */ static int hns3_clear_rss_filter(struct rte_eth_dev *dev) { @@ -1684,7 +1676,6 @@ hns3_clear_rss_filter(struct rte_eth_dev *dev) return ret; } -/* Restore the rss filter */ int hns3_restore_rss_filter(struct rte_eth_dev *dev) { @@ -1706,7 +1697,6 @@ hns3_flow_parse_rss(struct rte_eth_dev *dev, struct hns3_hw *hw = &hns->hw; bool ret; - /* Action rss same */ ret = hns3_action_rss_same(&hw->rss_info.conf, &conf->conf); if (ret) { hns3_err(hw, "Enter duplicate RSS configuration : %d", ret); @@ -1864,6 +1854,7 @@ hns3_flow_create(struct rte_eth_dev *dev, const struct rte_flow_attr *attr, ret = -ENOMEM; goto err_fdir; } + memcpy(&fdir_rule_ptr->fdir_conf, &fdir_rule, sizeof(struct hns3_fdir_rule)); TAILQ_INSERT_TAIL(&process_list->fdir_list, diff --git a/drivers/net/hns3/hns3_rss.c b/drivers/net/hns3/hns3_rss.c index 2efd410..a4e552b 100644 --- a/drivers/net/hns3/hns3_rss.c +++ b/drivers/net/hns3/hns3_rss.c @@ -510,7 +510,7 @@ hns3_dev_rss_reta_update(struct rte_eth_dev *dev, struct hns3_rss_conf *rss_cfg = &hw->rss_info; uint16_t i, indir_size = HNS3_RSS_IND_TBL_SIZE; /* Table size is 512 */ uint16_t indirection_tbl[HNS3_RSS_IND_TBL_SIZE]; - uint16_t idx, shift, allow_rss_queues; + uint16_t idx, shift; int ret; if (reta_size != indir_size || reta_size > ETH_RSS_RETA_SIZE_512) { @@ -522,16 +522,15 @@ hns3_dev_rss_reta_update(struct rte_eth_dev *dev, rte_spinlock_lock(&hw->lock); memcpy(indirection_tbl, rss_cfg->rss_indirection_tbl, sizeof(rss_cfg->rss_indirection_tbl)); - allow_rss_queues = RTE_MIN(dev->data->nb_rx_queues, hw->rss_size_max); for (i = 0; i < reta_size; i++) { idx = i / RTE_RETA_GROUP_SIZE; shift = i % RTE_RETA_GROUP_SIZE; - if (reta_conf[idx].reta[shift] >= allow_rss_queues) { + if (reta_conf[idx].reta[shift] >= hw->alloc_rss_size) { rte_spinlock_unlock(&hw->lock); - hns3_err(hw, "Invalid queue id(%u) to be set in " - "redirection table, max number of rss " - "queues: %u", reta_conf[idx].reta[shift], - allow_rss_queues); + hns3_err(hw, "queue id(%u) set to redirection table " + "exceeds queue number(%u) allocated to a TC", + reta_conf[idx].reta[shift], + hw->alloc_rss_size); return -EINVAL; } From patchwork Thu Oct 29 12:49:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lijun Ou X-Patchwork-Id: 82753 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 741FFA04B5; Thu, 29 Oct 2020 13:49:32 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8CC75CBA8; Thu, 29 Oct 2020 13:48:55 +0100 (CET) Received: from szxga07-in.huawei.com (szxga07-in.huawei.com [45.249.212.35]) by dpdk.org (Postfix) with ESMTP id 5EA12CB42 for ; Thu, 29 Oct 2020 13:48:48 +0100 (CET) Received: from DGGEMS404-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4CMQH41q00z70Kl for ; Thu, 29 Oct 2020 20:48:48 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by DGGEMS404-HUB.china.huawei.com (10.3.19.204) with Microsoft SMTP Server id 14.3.487.0; Thu, 29 Oct 2020 20:48:36 +0800 From: Lijun Ou To: CC: , Date: Thu, 29 Oct 2020 20:49:07 +0800 Message-ID: <1603975751-27955-5-git-send-email-oulijun@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1603975751-27955-1-git-send-email-oulijun@huawei.com> References: <1603973875-8431-1-git-send-email-oulijun@huawei.com> <1603975751-27955-1-git-send-email-oulijun@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected Subject: [dpdk-dev] [PATCH v2 4/8] net/hns3: fix packect type report in Rx X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Chengchang Tang Currently, hns3 support recognizing a lot of ptypes, but most tunnel packet types are not reported to the API rte_eth_dev_get_supported_ptypes. And there are some error in L2 and L3 packet recognization. The ARP and LLDP are classified to L3 field in RX descriptor. So, the ptype of LLDP and ARP packets will be set twice. And ptypes are assigned by bitwise OR, which will eventually cause the ptype result to be incorrect. Besides, when a packet with only L2 header, its ptype will not report by hns3 PMD. This is because the L2L3 ptype table is not initialized properly. In this case, the table query result is 0 by default. As a result, it fixes missing supported ptypes and the mistake in L2L3 packet recognization and the unreported L2 packect ptype by reporting its L2 type when the L3 type unrecognized.. Fixes: bba636698316 ("net/hns3: support Rx/Tx and related operations") Cc: stable@dpdk.org Signed-off-by: Chengchang Tang Signed-off-by: Lijun Ou --- drivers/net/hns3/hns3_ethdev.h | 5 ++- drivers/net/hns3/hns3_rxtx.c | 99 ++++++++++++++++++++++++++++++------------ drivers/net/hns3/hns3_rxtx.h | 13 +++--- 3 files changed, 82 insertions(+), 35 deletions(-) diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h index da8aead..d195c19 100644 --- a/drivers/net/hns3/hns3_ethdev.h +++ b/drivers/net/hns3/hns3_ethdev.h @@ -647,16 +647,17 @@ struct hns3_mp_param { #define HNS3_L2TBL_NUM 4 #define HNS3_L3TBL_NUM 16 #define HNS3_L4TBL_NUM 16 +#define HNS3_OL2TBL_NUM 4 #define HNS3_OL3TBL_NUM 16 #define HNS3_OL4TBL_NUM 16 struct hns3_ptype_table { - uint32_t l2table[HNS3_L2TBL_NUM]; - uint32_t l3table[HNS3_L3TBL_NUM]; + uint32_t l2l3table[HNS3_L2TBL_NUM][HNS3_L3TBL_NUM]; uint32_t l4table[HNS3_L4TBL_NUM]; uint32_t inner_l2table[HNS3_L2TBL_NUM]; uint32_t inner_l3table[HNS3_L3TBL_NUM]; uint32_t inner_l4table[HNS3_L4TBL_NUM]; + uint32_t ol2table[HNS3_OL2TBL_NUM]; uint32_t ol3table[HNS3_OL3TBL_NUM]; uint32_t ol4table[HNS3_OL4TBL_NUM]; }; diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c index 55bee17..3d5e465 100644 --- a/drivers/net/hns3/hns3_rxtx.c +++ b/drivers/net/hns3/hns3_rxtx.c @@ -1839,6 +1839,19 @@ hns3_dev_supported_ptypes_get(struct rte_eth_dev *dev) RTE_PTYPE_L4_TCP, RTE_PTYPE_L4_UDP, RTE_PTYPE_TUNNEL_GRE, + RTE_PTYPE_INNER_L2_ETHER, + RTE_PTYPE_INNER_L2_ETHER_VLAN, + RTE_PTYPE_INNER_L2_ETHER_QINQ, + RTE_PTYPE_INNER_L3_IPV4, + RTE_PTYPE_INNER_L3_IPV6, + RTE_PTYPE_INNER_L3_IPV4_EXT, + RTE_PTYPE_INNER_L3_IPV6_EXT, + RTE_PTYPE_INNER_L4_UDP, + RTE_PTYPE_INNER_L4_TCP, + RTE_PTYPE_INNER_L4_SCTP, + RTE_PTYPE_INNER_L4_ICMP, + RTE_PTYPE_TUNNEL_VXLAN, + RTE_PTYPE_TUNNEL_NVGRE, RTE_PTYPE_UNKNOWN }; @@ -1851,26 +1864,35 @@ hns3_dev_supported_ptypes_get(struct rte_eth_dev *dev) return NULL; } -void -hns3_init_rx_ptype_tble(struct rte_eth_dev *dev) -{ - struct hns3_adapter *hns = dev->data->dev_private; - struct hns3_ptype_table *tbl = &hns->ptype_tbl; - - memset(tbl, 0, sizeof(*tbl)); - - tbl->l2table[0] = RTE_PTYPE_L2_ETHER; - tbl->l2table[1] = RTE_PTYPE_L2_ETHER_QINQ; - tbl->l2table[2] = RTE_PTYPE_L2_ETHER_VLAN; - tbl->l2table[3] = RTE_PTYPE_L2_ETHER_VLAN; - - tbl->l3table[0] = RTE_PTYPE_L3_IPV4; - tbl->l3table[1] = RTE_PTYPE_L3_IPV6; - tbl->l3table[2] = RTE_PTYPE_L2_ETHER_ARP; - tbl->l3table[3] = RTE_PTYPE_L2_ETHER; - tbl->l3table[4] = RTE_PTYPE_L3_IPV4_EXT; - tbl->l3table[5] = RTE_PTYPE_L3_IPV6_EXT; - tbl->l3table[6] = RTE_PTYPE_L2_ETHER_LLDP; +static void +hns3_init_non_tunnel_ptype_tbl(struct hns3_ptype_table *tbl) +{ + tbl->l2l3table[0][0] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4; + tbl->l2l3table[0][1] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6; + tbl->l2l3table[0][2] = RTE_PTYPE_L2_ETHER_ARP; + tbl->l2l3table[0][3] = RTE_PTYPE_L2_ETHER; + tbl->l2l3table[0][4] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT; + tbl->l2l3table[0][5] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT; + tbl->l2l3table[0][6] = RTE_PTYPE_L2_ETHER_LLDP; + tbl->l2l3table[0][15] = RTE_PTYPE_L2_ETHER; + + tbl->l2l3table[1][0] = RTE_PTYPE_L2_ETHER_VLAN | RTE_PTYPE_L3_IPV4; + tbl->l2l3table[1][1] = RTE_PTYPE_L2_ETHER_VLAN | RTE_PTYPE_L3_IPV6; + tbl->l2l3table[1][2] = RTE_PTYPE_L2_ETHER_ARP; + tbl->l2l3table[1][3] = RTE_PTYPE_L2_ETHER_VLAN; + tbl->l2l3table[1][4] = RTE_PTYPE_L2_ETHER_VLAN | RTE_PTYPE_L3_IPV4_EXT; + tbl->l2l3table[1][5] = RTE_PTYPE_L2_ETHER_VLAN | RTE_PTYPE_L3_IPV6_EXT; + tbl->l2l3table[1][6] = RTE_PTYPE_L2_ETHER_LLDP; + tbl->l2l3table[1][15] = RTE_PTYPE_L2_ETHER_VLAN; + + tbl->l2l3table[2][0] = RTE_PTYPE_L2_ETHER_QINQ | RTE_PTYPE_L3_IPV4; + tbl->l2l3table[2][1] = RTE_PTYPE_L2_ETHER_QINQ | RTE_PTYPE_L3_IPV6; + tbl->l2l3table[2][2] = RTE_PTYPE_L2_ETHER_ARP; + tbl->l2l3table[2][3] = RTE_PTYPE_L2_ETHER_QINQ; + tbl->l2l3table[2][4] = RTE_PTYPE_L2_ETHER_QINQ | RTE_PTYPE_L3_IPV4_EXT; + tbl->l2l3table[2][5] = RTE_PTYPE_L2_ETHER_QINQ | RTE_PTYPE_L3_IPV6_EXT; + tbl->l2l3table[2][6] = RTE_PTYPE_L2_ETHER_LLDP; + tbl->l2l3table[2][15] = RTE_PTYPE_L2_ETHER_QINQ; tbl->l4table[0] = RTE_PTYPE_L4_UDP; tbl->l4table[1] = RTE_PTYPE_L4_TCP; @@ -1878,37 +1900,60 @@ hns3_init_rx_ptype_tble(struct rte_eth_dev *dev) tbl->l4table[3] = RTE_PTYPE_L4_SCTP; tbl->l4table[4] = RTE_PTYPE_L4_IGMP; tbl->l4table[5] = RTE_PTYPE_L4_ICMP; +} +static void +hns3_init_tunnel_ptype_tbl(struct hns3_ptype_table *tbl) +{ tbl->inner_l2table[0] = RTE_PTYPE_INNER_L2_ETHER; tbl->inner_l2table[1] = RTE_PTYPE_INNER_L2_ETHER_VLAN; tbl->inner_l2table[2] = RTE_PTYPE_INNER_L2_ETHER_QINQ; tbl->inner_l3table[0] = RTE_PTYPE_INNER_L3_IPV4; tbl->inner_l3table[1] = RTE_PTYPE_INNER_L3_IPV6; - tbl->inner_l3table[2] = 0; - tbl->inner_l3table[3] = RTE_PTYPE_INNER_L2_ETHER; + /* There is not a ptype for inner ARP/RARP */ + tbl->inner_l3table[2] = RTE_PTYPE_UNKNOWN; + tbl->inner_l3table[3] = RTE_PTYPE_UNKNOWN; tbl->inner_l3table[4] = RTE_PTYPE_INNER_L3_IPV4_EXT; tbl->inner_l3table[5] = RTE_PTYPE_INNER_L3_IPV6_EXT; tbl->inner_l4table[0] = RTE_PTYPE_INNER_L4_UDP; tbl->inner_l4table[1] = RTE_PTYPE_INNER_L4_TCP; - tbl->inner_l4table[2] = RTE_PTYPE_TUNNEL_GRE; + /* There is not a ptype for inner GRE */ + tbl->inner_l4table[2] = RTE_PTYPE_UNKNOWN; tbl->inner_l4table[3] = RTE_PTYPE_INNER_L4_SCTP; - tbl->inner_l4table[4] = RTE_PTYPE_L4_IGMP; + /* There is not a ptype for inner IGMP */ + tbl->inner_l4table[4] = RTE_PTYPE_UNKNOWN; tbl->inner_l4table[5] = RTE_PTYPE_INNER_L4_ICMP; + tbl->ol2table[0] = RTE_PTYPE_L2_ETHER; + tbl->ol2table[1] = RTE_PTYPE_L2_ETHER_VLAN; + tbl->ol2table[2] = RTE_PTYPE_L2_ETHER_QINQ; + tbl->ol3table[0] = RTE_PTYPE_L3_IPV4; tbl->ol3table[1] = RTE_PTYPE_L3_IPV6; - tbl->ol3table[2] = 0; - tbl->ol3table[3] = 0; + tbl->ol3table[2] = RTE_PTYPE_UNKNOWN; + tbl->ol3table[3] = RTE_PTYPE_UNKNOWN; tbl->ol3table[4] = RTE_PTYPE_L3_IPV4_EXT; tbl->ol3table[5] = RTE_PTYPE_L3_IPV6_EXT; - tbl->ol4table[0] = 0; + tbl->ol4table[0] = RTE_PTYPE_UNKNOWN; tbl->ol4table[1] = RTE_PTYPE_TUNNEL_VXLAN; tbl->ol4table[2] = RTE_PTYPE_TUNNEL_NVGRE; } +void +hns3_init_rx_ptype_tble(struct rte_eth_dev *dev) +{ + struct hns3_adapter *hns = dev->data->dev_private; + struct hns3_ptype_table *tbl = &hns->ptype_tbl; + + memset(tbl, 0, sizeof(*tbl)); + + hns3_init_non_tunnel_ptype_tbl(tbl); + hns3_init_tunnel_ptype_tbl(tbl); +} + static inline void hns3_rxd_to_vlan_tci(struct hns3_rx_queue *rxq, struct rte_mbuf *mb, uint32_t l234_info, const struct hns3_desc *rxd) diff --git a/drivers/net/hns3/hns3_rxtx.h b/drivers/net/hns3/hns3_rxtx.h index ae09e94..68497a0 100644 --- a/drivers/net/hns3/hns3_rxtx.h +++ b/drivers/net/hns3/hns3_rxtx.h @@ -580,14 +580,14 @@ static inline uint32_t hns3_rx_calc_ptype(struct hns3_rx_queue *rxq, const uint32_t l234_info, const uint32_t ol_info) { - const struct hns3_ptype_table *const ptype_tbl = rxq->ptype_tbl; + const struct hns3_ptype_table * const ptype_tbl = rxq->ptype_tbl; uint32_t l2id, l3id, l4id; - uint32_t ol3id, ol4id; + uint32_t ol3id, ol4id, ol2id; ol4id = hns3_get_field(ol_info, HNS3_RXD_OL4ID_M, HNS3_RXD_OL4ID_S); ol3id = hns3_get_field(ol_info, HNS3_RXD_OL3ID_M, HNS3_RXD_OL3ID_S); - l2id = hns3_get_field(l234_info, HNS3_RXD_STRP_TAGP_M, - HNS3_RXD_STRP_TAGP_S); + ol2id = hns3_get_field(ol_info, HNS3_RXD_OVLAN_M, HNS3_RXD_OVLAN_S); + l2id = hns3_get_field(l234_info, HNS3_RXD_VLAN_M, HNS3_RXD_VLAN_S); l3id = hns3_get_field(l234_info, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S); l4id = hns3_get_field(l234_info, HNS3_RXD_L4ID_M, HNS3_RXD_L4ID_S); @@ -595,9 +595,10 @@ hns3_rx_calc_ptype(struct hns3_rx_queue *rxq, const uint32_t l234_info, return ptype_tbl->inner_l2table[l2id] | ptype_tbl->inner_l3table[l3id] | ptype_tbl->inner_l4table[l4id] | - ptype_tbl->ol3table[ol3id] | ptype_tbl->ol4table[ol4id]; + ptype_tbl->ol3table[ol3id] | + ptype_tbl->ol4table[ol4id] | ptype_tbl->ol2table[ol2id]; else - return ptype_tbl->l2table[l2id] | ptype_tbl->l3table[l3id] | + return ptype_tbl->l2l3table[l2id][l3id] | ptype_tbl->l4table[l4id]; } From patchwork Thu Oct 29 12:49:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lijun Ou X-Patchwork-Id: 82751 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 655EFA04B5; Thu, 29 Oct 2020 13:48:53 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6850ACB42; Thu, 29 Oct 2020 13:48:51 +0100 (CET) Received: from szxga07-in.huawei.com (szxga07-in.huawei.com [45.249.212.35]) by dpdk.org (Postfix) with ESMTP id 59C4FCB35 for ; Thu, 29 Oct 2020 13:48:48 +0100 (CET) Received: from DGGEMS404-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4CMQH42V5Jz70Lt for ; Thu, 29 Oct 2020 20:48:48 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by DGGEMS404-HUB.china.huawei.com (10.3.19.204) with Microsoft SMTP Server id 14.3.487.0; Thu, 29 Oct 2020 20:48:36 +0800 From: Lijun Ou To: CC: , Date: Thu, 29 Oct 2020 20:49:08 +0800 Message-ID: <1603975751-27955-6-git-send-email-oulijun@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1603975751-27955-1-git-send-email-oulijun@huawei.com> References: <1603973875-8431-1-git-send-email-oulijun@huawei.com> <1603975751-27955-1-git-send-email-oulijun@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected Subject: [dpdk-dev] [PATCH v2 5/8] net/hns3: fix uncheck return value warning X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Hongbo Zheng There are coverity defects related "calling hns3_reset_all_tqps without checking return value in hns3_do_start". This patch fixes the warning by add "void" declaration because here is exception handling, hns3_reset_all_tqps will have the corresponding error message if it is handled incorrectly, so it is not necessary to check hns3_reset_all_tqps return value, here keep ret as the error code causing the exception. Coverity issue: 363048 Fixes: fa29fe45a7b4 ("net/hns3: support queue start and stop") Cc: stable@dpdk.org Signed-off-by: Hongbo Zheng Signed-off-by: Lijun Ou --- drivers/net/hns3/hns3_ethdev.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c index 6342c70..6b4be76 100644 --- a/drivers/net/hns3/hns3_ethdev.c +++ b/drivers/net/hns3/hns3_ethdev.c @@ -4752,7 +4752,13 @@ hns3_do_start(struct hns3_adapter *hns, bool reset_queue) err_config_mac_mode: hns3_dev_release_mbufs(hns); - hns3_reset_all_tqps(hns); + /* + * Here is exception handling, hns3_reset_all_tqps will have the + * corresponding error message if it is handled incorrectly, so it is + * not necessary to check hns3_reset_all_tqps return value, here keep + * ret as the error code causing the exception. + */ + (void)hns3_reset_all_tqps(hns); return ret; } From patchwork Thu Oct 29 12:49:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lijun Ou X-Patchwork-Id: 82752 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id C8E40A04B5; Thu, 29 Oct 2020 13:49:11 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5A5E7CB96; Thu, 29 Oct 2020 13:48:53 +0100 (CET) Received: from szxga07-in.huawei.com (szxga07-in.huawei.com [45.249.212.35]) by dpdk.org (Postfix) with ESMTP id 899C6CB56 for ; Thu, 29 Oct 2020 13:48:49 +0100 (CET) Received: from DGGEMS404-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4CMQH42MdWz70LN for ; Thu, 29 Oct 2020 20:48:48 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by DGGEMS404-HUB.china.huawei.com (10.3.19.204) with Microsoft SMTP Server id 14.3.487.0; Thu, 29 Oct 2020 20:48:37 +0800 From: Lijun Ou To: CC: , Date: Thu, 29 Oct 2020 20:49:09 +0800 Message-ID: <1603975751-27955-7-git-send-email-oulijun@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1603975751-27955-1-git-send-email-oulijun@huawei.com> References: <1603973875-8431-1-git-send-email-oulijun@huawei.com> <1603975751-27955-1-git-send-email-oulijun@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected Subject: [dpdk-dev] [PATCH v2 6/8] net/hns3: fix data type to release fake queue > 255 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Huisong Li Currently, u8 type variable is used to control to release fake queues in hns3_fake_rx/tx_queue_config function. Although there is no case in which more than 256 fake queues are created in hns3 network engine, it is unreasonable to compare u8 variable with u16 variable. Fixes: a951c1ed3ab5 ("net/hns3: support different numbers of Rx and Tx queues") Cc: stable@dpdk.org Signed-off-by: Huisong Li Signed-off-by: Lijun Ou --- drivers/net/hns3/hns3_rxtx.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c index 3d5e465..3386453 100644 --- a/drivers/net/hns3/hns3_rxtx.c +++ b/drivers/net/hns3/hns3_rxtx.c @@ -1378,7 +1378,7 @@ hns3_fake_rx_queue_config(struct hns3_hw *hw, uint16_t nb_queues) { uint16_t old_nb_queues = hw->fkq_data.nb_fake_rx_queues; void **rxq; - uint8_t i; + uint16_t i; if (hw->fkq_data.rx_queues == NULL && nb_queues != 0) { /* first time configuration */ @@ -1425,7 +1425,7 @@ hns3_fake_tx_queue_config(struct hns3_hw *hw, uint16_t nb_queues) { uint16_t old_nb_queues = hw->fkq_data.nb_fake_tx_queues; void **txq; - uint8_t i; + uint16_t i; if (hw->fkq_data.tx_queues == NULL && nb_queues != 0) { /* first time configuration */ From patchwork Thu Oct 29 12:49:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lijun Ou X-Patchwork-Id: 82755 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id B0C17A04B5; Thu, 29 Oct 2020 13:50:32 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 203FFCC48; Thu, 29 Oct 2020 13:49:04 +0100 (CET) Received: from szxga07-in.huawei.com (szxga07-in.huawei.com [45.249.212.35]) by dpdk.org (Postfix) with ESMTP id 7A59ACB79 for ; Thu, 29 Oct 2020 13:48:52 +0100 (CET) Received: from DGGEMS404-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4CMQH41yzdz70Kr for ; Thu, 29 Oct 2020 20:48:48 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by DGGEMS404-HUB.china.huawei.com (10.3.19.204) with Microsoft SMTP Server id 14.3.487.0; Thu, 29 Oct 2020 20:48:37 +0800 From: Lijun Ou To: CC: , Date: Thu, 29 Oct 2020 20:49:10 +0800 Message-ID: <1603975751-27955-8-git-send-email-oulijun@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1603975751-27955-1-git-send-email-oulijun@huawei.com> References: <1603973875-8431-1-git-send-email-oulijun@huawei.com> <1603975751-27955-1-git-send-email-oulijun@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected Subject: [dpdk-dev] [PATCH v2 7/8] net/hns3: fix HW ring not clear after queue stop X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Chengchang Tang Currently, the rx HW ring is not cleared after queue stop. When there are packets remaining in the HW rings and the queues have been stopped, if upper layer user calls the rx_burst function at this time, an illegal memory access will occur due to the sw rings has been released. This patch fix this by reset the sw ring after disable the queue. Fixes: fa29fe45a7b4 ("net/hns3: support queue start and stop") Cc: stable@dpdk.org Signed-off-by: Chengchang Tang Signed-off-by: Lijun Ou --- drivers/net/hns3/hns3_rxtx.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c index 3386453..2988a4b 100644 --- a/drivers/net/hns3/hns3_rxtx.c +++ b/drivers/net/hns3/hns3_rxtx.c @@ -3805,6 +3805,19 @@ hns3_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id) return ret; } +static void +hns3_reset_sw_rxq(struct hns3_rx_queue *rxq) +{ + rxq->next_to_use = 0; + rxq->rx_rearm_start = 0; + rxq->rx_free_hold = 0; + rxq->rx_rearm_nb = 0; + rxq->pkt_first_seg = NULL; + rxq->pkt_last_seg = NULL; + memset(&rxq->rx_ring[0], 0, rxq->nb_rx_desc * sizeof(struct hns3_desc)); + hns3_rxq_vec_setup(rxq); +} + int hns3_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id) { @@ -3815,7 +3828,10 @@ hns3_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id) return -ENOTSUP; hns3_enable_rxq(rxq, false); + hns3_rx_queue_release_mbufs(rxq); + + hns3_reset_sw_rxq(rxq); dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED; return 0; From patchwork Thu Oct 29 12:49:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lijun Ou X-Patchwork-Id: 82754 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 31110A04B5; Thu, 29 Oct 2020 13:50:13 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 98C6ACC19; Thu, 29 Oct 2020 13:49:02 +0100 (CET) Received: from szxga07-in.huawei.com (szxga07-in.huawei.com [45.249.212.35]) by dpdk.org (Postfix) with ESMTP id 08869CB42 for ; Thu, 29 Oct 2020 13:48:50 +0100 (CET) Received: from DGGEMS404-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4CMQH42FBgz70LD for ; Thu, 29 Oct 2020 20:48:48 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by DGGEMS404-HUB.china.huawei.com (10.3.19.204) with Microsoft SMTP Server id 14.3.487.0; Thu, 29 Oct 2020 20:48:37 +0800 From: Lijun Ou To: CC: , Date: Thu, 29 Oct 2020 20:49:11 +0800 Message-ID: <1603975751-27955-9-git-send-email-oulijun@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1603975751-27955-1-git-send-email-oulijun@huawei.com> References: <1603973875-8431-1-git-send-email-oulijun@huawei.com> <1603975751-27955-1-git-send-email-oulijun@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected Subject: [dpdk-dev] [PATCH v2 8/8] net/hns3: fix return value check of setting VF bus X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Hongbo Zheng Currently hns3vf_reinit_dev only judge whether the return value of hns3vf_set_bus_master() is not 0, while hns3vf_set_bus_master() will return a negative when execute failed. Fixes: 243651cb6c8c ("net/hns3: check PCI config space reads") Cc: stable@dpdk.org Signed-off-by: Hongbo Zheng Signed-off-by: Lijun Ou --- V1->V2: -fix checkpatch warning --- drivers/net/hns3/hns3_ethdev_vf.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c index 9fb7941..05a9341 100644 --- a/drivers/net/hns3/hns3_ethdev_vf.c +++ b/drivers/net/hns3/hns3_ethdev_vf.c @@ -2619,7 +2619,7 @@ hns3vf_reinit_dev(struct hns3_adapter *hns) if (hw->reset.level == HNS3_VF_FULL_RESET) { rte_intr_disable(&pci_dev->intr_handle); ret = hns3vf_set_bus_master(pci_dev, true); - if (ret) { + if (ret < 0) { hns3_err(hw, "failed to set pci bus, ret = %d", ret); return ret; }