From patchwork Tue Aug 25 09:31:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ophir Munk X-Patchwork-Id: 75901 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id C8879A04B1; Tue, 25 Aug 2020 11:31:56 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 3D2AD1C1C2; Tue, 25 Aug 2020 11:31:35 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 94D18255 for ; Tue, 25 Aug 2020 11:31:29 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from ophirmu@nvidia.com) with SMTP; 25 Aug 2020 12:31:25 +0300 Received: from nvidia.com (pegasus05.mtr.labs.mlnx [10.210.16.100]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 07P9VPMp030009; Tue, 25 Aug 2020 12:31:25 +0300 From: Ophir Munk To: dev@dpdk.org Cc: Ophir Munk Date: Tue, 25 Aug 2020 09:31:04 +0000 Message-Id: <20200825093116.26538-2-ophirmu@nvidia.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20200825093116.26538-1-ophirmu@nvidia.com> References: <20200820145028.4090-1-ophirmu@nvidia.com> <20200825093116.26538-1-ophirmu@nvidia.com> Subject: [dpdk-dev] [PATCH v2 01/13] common/mlx5: replace strsep with strtok_r X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk strsep() is a non-standardized API (by C or POSIX) and thus it is non-portable between different operating systems. Replace it with strtok_r() which is standardized by the C standard, and hence also by POSIX. The replacement occurs in the code that extracts individual PCI class names (e.g. class=net:vdpa:foo:bar). Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/common/mlx5/mlx5_common_pci.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/common/mlx5/mlx5_common_pci.c b/drivers/common/mlx5/mlx5_common_pci.c index d4ff039..02417c6 100644 --- a/drivers/common/mlx5/mlx5_common_pci.c +++ b/drivers/common/mlx5/mlx5_common_pci.c @@ -72,6 +72,7 @@ bus_cmdline_options_handler(__rte_unused const char *key, int class_val; char *found; char *nstr; + char *refstr = NULL; *ret = 0; nstr = strdup(class_names); @@ -80,21 +81,22 @@ bus_cmdline_options_handler(__rte_unused const char *key, return *ret; } nstr_org = nstr; - while (nstr) { + found = strtok_r(nstr, ":", &refstr); + if (!found) + goto err; + do { /* Extract each individual class name. Multiple * class key,value is supplied as class=net:vdpa:foo:bar. */ - found = strsep(&nstr, ":"); - if (!found) - continue; - /* Check if its a valid class. */ class_val = class_name_to_value(found); + /* Check if its a valid class. */ if (class_val < 0) { *ret = -EINVAL; goto err; } *ret |= class_val; - } + found = strtok_r(NULL, ":", &refstr); + } while (found); err: free(nstr_org); if (*ret < 0) From patchwork Tue Aug 25 09:31:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ophir Munk X-Patchwork-Id: 75900 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 96C35A04B1; Tue, 25 Aug 2020 11:31:46 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 00F6A1C1B9; Tue, 25 Aug 2020 11:31:34 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id A01531C1A8 for ; Tue, 25 Aug 2020 11:31:29 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from ophirmu@nvidia.com) with SMTP; 25 Aug 2020 12:31:25 +0300 Received: from nvidia.com (pegasus05.mtr.labs.mlnx [10.210.16.100]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 07P9VPMq030009; Tue, 25 Aug 2020 12:31:25 +0300 From: Ophir Munk To: dev@dpdk.org Cc: Ophir Munk Date: Tue, 25 Aug 2020 09:31:05 +0000 Message-Id: <20200825093116.26538-3-ophirmu@nvidia.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20200825093116.26538-1-ophirmu@nvidia.com> References: <20200820145028.4090-1-ophirmu@nvidia.com> <20200825093116.26538-1-ophirmu@nvidia.com> Subject: [dpdk-dev] [PATCH v2 02/13] common/mlx5: replace Linux __bexx types with rte X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk Replace Linux specific int types with their corresponding rte typedefs. __be16 ==> rte_be16_t __be32 ==> rte_be32_t __be64 ==> rte_be64_t Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/common/mlx5/mlx5_prm.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index e0ebe12..69511bc 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -608,7 +608,7 @@ typedef uint8_t u8; #define MLX5_SET(typ, p, fld, v) \ do { \ u32 _v = v; \ - *((__be32 *)(p) + __mlx5_dw_off(typ, fld)) = \ + *((rte_be32_t *)(p) + __mlx5_dw_off(typ, fld)) = \ rte_cpu_to_be_32((rte_be_to_cpu_32(*((u32 *)(p) + \ __mlx5_dw_off(typ, fld))) & \ (~__mlx5_dw_mask(typ, fld))) | \ @@ -619,15 +619,15 @@ typedef uint8_t u8; #define MLX5_SET64(typ, p, fld, v) \ do { \ MLX5_ASSERT(__mlx5_bit_sz(typ, fld) == 64); \ - *((__be64 *)(p) + __mlx5_64_off(typ, fld)) = \ + *((rte_be64_t *)(p) + __mlx5_64_off(typ, fld)) = \ rte_cpu_to_be_64(v); \ } while (0) #define MLX5_SET16(typ, p, fld, v) \ do { \ u16 _v = v; \ - *((__be16 *)(p) + __mlx5_16_off(typ, fld)) = \ - rte_cpu_to_be_16((rte_be_to_cpu_16(*((__be16 *)(p) + \ + *((rte_be16_t *)(p) + __mlx5_16_off(typ, fld)) = \ + rte_cpu_to_be_16((rte_be_to_cpu_16(*((rte_be16_t *)(p) + \ __mlx5_16_off(typ, fld))) & \ (~__mlx5_16_mask(typ, fld))) | \ (((_v) & __mlx5_mask16(typ, fld)) << \ @@ -639,14 +639,14 @@ typedef uint8_t u8; __mlx5_dw_off(typ, fld))) >> __mlx5_dw_bit_off(typ, fld)) & \ __mlx5_mask(typ, fld)) #define MLX5_GET(typ, p, fld) \ - ((rte_be_to_cpu_32(*((__be32 *)(p) +\ + ((rte_be_to_cpu_32(*((rte_be32_t *)(p) +\ __mlx5_dw_off(typ, fld))) >> __mlx5_dw_bit_off(typ, fld)) & \ __mlx5_mask(typ, fld)) #define MLX5_GET16(typ, p, fld) \ - ((rte_be_to_cpu_16(*((__be16 *)(p) + \ + ((rte_be_to_cpu_16(*((rte_be16_t *)(p) + \ __mlx5_16_off(typ, fld))) >> __mlx5_16_bit_off(typ, fld)) & \ __mlx5_mask16(typ, fld)) -#define MLX5_GET64(typ, p, fld) rte_be_to_cpu_64(*((__be64 *)(p) + \ +#define MLX5_GET64(typ, p, fld) rte_be_to_cpu_64(*((rte_be64_t *)(p) + \ __mlx5_64_off(typ, fld))) #define MLX5_FLD_SZ_BYTES(typ, fld) (__mlx5_bit_sz(typ, fld) / 8) From patchwork Tue Aug 25 09:31:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ophir Munk X-Patchwork-Id: 75898 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id A16B7A04B1; Tue, 25 Aug 2020 11:31:31 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8595A1C1A4; Tue, 25 Aug 2020 11:31:31 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id A0ADA1C1AB for ; Tue, 25 Aug 2020 11:31:29 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from ophirmu@nvidia.com) with SMTP; 25 Aug 2020 12:31:25 +0300 Received: from nvidia.com (pegasus05.mtr.labs.mlnx [10.210.16.100]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 07P9VPMr030009; Tue, 25 Aug 2020 12:31:25 +0300 From: Ophir Munk To: dev@dpdk.org Cc: Ophir Munk Date: Tue, 25 Aug 2020 09:31:06 +0000 Message-Id: <20200825093116.26538-4-ophirmu@nvidia.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20200825093116.26538-1-ophirmu@nvidia.com> References: <20200820145028.4090-1-ophirmu@nvidia.com> <20200825093116.26538-1-ophirmu@nvidia.com> Subject: [dpdk-dev] [PATCH v2 03/13] net/mlx5: rename mlx5 enumeration REG_NONE X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk Enumerated variable REG_NONE (defined in mlx5_prm.h) is in conflict with Windows definition (winnt.h): #define REG_NONE ( 0ul ) // No value type To enable mlx5 PMD Windows compilation - rename REG_NONE as REG_NON. Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/common/mlx5/mlx5_prm.h | 2 +- drivers/net/mlx5/mlx5_flow.c | 22 +++++++++++----------- drivers/net/mlx5/mlx5_flow_dv.c | 8 ++++---- 3 files changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index 69511bc..563e7c8 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -539,7 +539,7 @@ enum mlx5_modification_field { #define MLX5_MREG_C_NUM (MLX5_MODI_META_REG_C_7 - MLX5_MODI_META_REG_C_0 + 1) enum modify_reg { - REG_NONE = 0, + REG_NON = 0, REG_A, REG_B, REG_C_0, diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index 7150173..9aad24e 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -353,7 +353,7 @@ mlx5_flow_get_reg_id(struct rte_eth_dev *dev, case MLX5_METADATA_FDB: switch (config->dv_xmeta_en) { case MLX5_XMETA_MODE_LEGACY: - return REG_NONE; + return REG_NON; case MLX5_XMETA_MODE_META16: return REG_C_0; case MLX5_XMETA_MODE_META32: @@ -363,7 +363,7 @@ mlx5_flow_get_reg_id(struct rte_eth_dev *dev, case MLX5_FLOW_MARK: switch (config->dv_xmeta_en) { case MLX5_XMETA_MODE_LEGACY: - return REG_NONE; + return REG_NON; case MLX5_XMETA_MODE_META16: return REG_C_1; case MLX5_XMETA_MODE_META32: @@ -381,7 +381,7 @@ mlx5_flow_get_reg_id(struct rte_eth_dev *dev, return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3; case MLX5_MTR_COLOR: - MLX5_ASSERT(priv->mtr_color_reg != REG_NONE); + MLX5_ASSERT(priv->mtr_color_reg != REG_NON); return priv->mtr_color_reg; case MLX5_COPY_MARK: /* @@ -404,7 +404,7 @@ mlx5_flow_get_reg_id(struct rte_eth_dev *dev, return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM, NULL, "invalid tag id"); - if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NONE) + if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON) return rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, NULL, "unsupported tag id"); @@ -421,7 +421,7 @@ mlx5_flow_get_reg_id(struct rte_eth_dev *dev, RTE_FLOW_ERROR_TYPE_ITEM, NULL, "invalid tag id"); if (config->flow_mreg_c - [id + 1 + start_reg - REG_C_0] != REG_NONE) + [id + 1 + start_reg - REG_C_0] != REG_NON) return config->flow_mreg_c [id + 1 + start_reg - REG_C_0]; return rte_flow_error_set(error, ENOTSUP, @@ -459,7 +459,7 @@ mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev) * - reg_c's are preserved across different domain (FDB and NIC) on * packet loopback by flow lookup miss. */ - return config->flow_mreg_c[2] != REG_NONE; + return config->flow_mreg_c[2] != REG_NON; } /** @@ -3011,7 +3011,7 @@ flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id, }; struct mlx5_flow_action_copy_mreg cp_mreg = { .dst = REG_B, - .src = REG_NONE, + .src = REG_NON, }; struct rte_flow_action_jump jump = { .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, @@ -3499,7 +3499,7 @@ flow_hairpin_split(struct rte_eth_dev *dev, actions_rx++; set_tag = (void *)actions_rx; set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL); - MLX5_ASSERT(set_tag->id > REG_NONE); + MLX5_ASSERT(set_tag->id > REG_NON); set_tag->data = *flow_id; tag_action->conf = set_tag; /* Create Tx item list. */ @@ -3511,7 +3511,7 @@ flow_hairpin_split(struct rte_eth_dev *dev, tag_item = (void *)addr; tag_item->data = *flow_id; tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL); - MLX5_ASSERT(set_tag->id > REG_NONE); + MLX5_ASSERT(set_tag->id > REG_NON); item->spec = tag_item; addr += sizeof(struct mlx5_rte_flow_item_tag); tag_item = (void *)addr; @@ -4066,7 +4066,7 @@ flow_create_split_metadata(struct rte_eth_dev *dev, /* Internal PMD action to set register. */ struct mlx5_rte_flow_item_tag q_tag_spec = { .data = qrss_id, - .id = REG_NONE, + .id = REG_NON, }; struct rte_flow_item q_items[] = { { @@ -6236,7 +6236,7 @@ mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev) flow_list_destroy(dev, NULL, flow_idx); } for (; n < MLX5_MREG_C_NUM; ++n) - config->flow_mreg_c[n] = REG_NONE; + config->flow_mreg_c[n] = REG_NON; return 0; } diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index dd35959..58358ce 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -945,7 +945,7 @@ flow_dv_convert_action_modify_tcp_ack } static enum mlx5_modification_field reg_to_field[] = { - [REG_NONE] = MLX5_MODI_OUT_NONE, + [REG_NON] = MLX5_MODI_OUT_NONE, [REG_A] = MLX5_MODI_META_DATA_REG_A, [REG_B] = MLX5_MODI_META_DATA_REG_B, [REG_C_0] = MLX5_MODI_META_REG_C_0, @@ -985,7 +985,7 @@ flow_dv_convert_action_set_reg return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, NULL, "too many items to modify"); - MLX5_ASSERT(conf->id != REG_NONE); + MLX5_ASSERT(conf->id != REG_NON); MLX5_ASSERT(conf->id < RTE_DIM(reg_to_field)); actions[i] = (struct mlx5_modification_cmd) { .action_type = MLX5_MODIFICATION_TYPE_SET, @@ -1035,7 +1035,7 @@ flow_dv_convert_action_set_tag ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error); if (ret < 0) return ret; - MLX5_ASSERT(ret != REG_NONE); + MLX5_ASSERT(ret != REG_NON); MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field)); reg_type = reg_to_field[ret]; MLX5_ASSERT(reg_type > 0); @@ -1558,7 +1558,7 @@ flow_dv_validate_item_tag(struct rte_eth_dev *dev, ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error); if (ret < 0) return ret; - MLX5_ASSERT(ret != REG_NONE); + MLX5_ASSERT(ret != REG_NON); return 0; } From patchwork Tue Aug 25 09:31:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ophir Munk X-Patchwork-Id: 75903 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 18CCDA04B1; Tue, 25 Aug 2020 11:32:21 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 071C61C1DB; Tue, 25 Aug 2020 11:31:38 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id A727D1C1AD for ; Tue, 25 Aug 2020 11:31:29 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from ophirmu@nvidia.com) with SMTP; 25 Aug 2020 12:31:25 +0300 Received: from nvidia.com (pegasus05.mtr.labs.mlnx [10.210.16.100]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 07P9VPMs030009; Tue, 25 Aug 2020 12:31:25 +0300 From: Ophir Munk To: dev@dpdk.org Cc: Ophir Munk Date: Tue, 25 Aug 2020 09:31:07 +0000 Message-Id: <20200825093116.26538-5-ophirmu@nvidia.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20200825093116.26538-1-ophirmu@nvidia.com> References: <20200820145028.4090-1-ophirmu@nvidia.com> <20200825093116.26538-1-ophirmu@nvidia.com> Subject: [dpdk-dev] [PATCH v2 04/13] net/mlx5: move mlx5_get_ifname prototype under Linux X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk mlx5_get_ifname() prototype includes 'IF_NAMESIZE' definition from Linux file net/if.h. Since this API is only used under Linux and to enable compilation under non-Linux OS - move this prototype from shared file mlx5.h to file linux/mlx5_os.h. Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/net/mlx5/linux/mlx5_os.h | 6 ++++++ drivers/net/mlx5/mlx5.c | 1 - drivers/net/mlx5/mlx5.h | 2 -- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/net/mlx5/linux/mlx5_os.h b/drivers/net/mlx5/linux/mlx5_os.h index 31add39..759def2 100644 --- a/drivers/net/mlx5/linux/mlx5_os.h +++ b/drivers/net/mlx5/linux/mlx5_os.h @@ -6,6 +6,8 @@ #ifndef RTE_PMD_MLX5_OS_H_ #define RTE_PMD_MLX5_OS_H_ +#include + /* verb enumerations translations to local enums. */ enum { DEV_SYSFS_NAME_MAX = IBV_SYSFS_NAME_MAX + 1, @@ -15,4 +17,8 @@ enum { #define PCI_DRV_FLAGS (RTE_PCI_DRV_INTR_LSC | \ RTE_PCI_DRV_INTR_RMV | \ RTE_PCI_DRV_PROBE_AGAIN) + +/* mlx5_ethdev_os.c */ + +int mlx5_get_ifname(const struct rte_eth_dev *dev, char (*ifname)[IF_NAMESIZE]); #endif /* RTE_PMD_MLX5_OS_H_ */ diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index 1e4c695..b099b23 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #include diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 1880a82..3aea3b5 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -10,7 +10,6 @@ #include #include #include -#include #include #include @@ -813,7 +812,6 @@ int mlx5_dev_configure_rss_reta(struct rte_eth_dev *dev); /* mlx5_ethdev_os.c */ -int mlx5_get_ifname(const struct rte_eth_dev *dev, char (*ifname)[IF_NAMESIZE]); unsigned int mlx5_ifindex(const struct rte_eth_dev *dev); int mlx5_get_mac(struct rte_eth_dev *dev, uint8_t (*mac)[RTE_ETHER_ADDR_LEN]); int mlx5_get_mtu(struct rte_eth_dev *dev, uint16_t *mtu); From patchwork Tue Aug 25 09:31:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ophir Munk X-Patchwork-Id: 75904 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 63232A04B1; Tue, 25 Aug 2020 11:32:29 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 360481C1E1; Tue, 25 Aug 2020 11:31:39 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id B394B1C1B2 for ; Tue, 25 Aug 2020 11:31:29 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from ophirmu@nvidia.com) with SMTP; 25 Aug 2020 12:31:25 +0300 Received: from nvidia.com (pegasus05.mtr.labs.mlnx [10.210.16.100]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 07P9VPMt030009; Tue, 25 Aug 2020 12:31:25 +0300 From: Ophir Munk To: dev@dpdk.org Cc: Ophir Munk , stable@dpdk.org Date: Tue, 25 Aug 2020 09:31:08 +0000 Message-Id: <20200825093116.26538-6-ophirmu@nvidia.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20200825093116.26538-1-ophirmu@nvidia.com> References: <20200820145028.4090-1-ophirmu@nvidia.com> <20200825093116.26538-1-ophirmu@nvidia.com> Subject: [dpdk-dev] [PATCH v2 05/13] net/mlx5: fix removal of unused inclusion files X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk Remove unused Linux included files: , from file net/mlx5/mlx5_mac.c from file net/mlx5/mlx5.c Fixes: 771fa900b73a ("mlx5: introduce new driver for Mellanox ConnectX-4 adapters") Cc: stable@dpdk.org Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5.c | 1 - drivers/net/mlx5/mlx5_mac.c | 2 -- 2 files changed, 3 deletions(-) diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index b099b23..ca60926 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #include diff --git a/drivers/net/mlx5/mlx5_mac.c b/drivers/net/mlx5/mlx5_mac.c index 88c52b2..bd786fd 100644 --- a/drivers/net/mlx5/mlx5_mac.c +++ b/drivers/net/mlx5/mlx5_mac.c @@ -9,8 +9,6 @@ #include #include #include -#include -#include #include #include From patchwork Tue Aug 25 09:31:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ophir Munk X-Patchwork-Id: 75899 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 449FBA04B1; Tue, 25 Aug 2020 11:31:38 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C66641C1B2; Tue, 25 Aug 2020 11:31:32 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id A76521C1AE for ; Tue, 25 Aug 2020 11:31:29 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from ophirmu@nvidia.com) with SMTP; 25 Aug 2020 12:31:25 +0300 Received: from nvidia.com (pegasus05.mtr.labs.mlnx [10.210.16.100]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 07P9VPMu030009; Tue, 25 Aug 2020 12:31:25 +0300 From: Ophir Munk To: dev@dpdk.org Cc: Ophir Munk Date: Tue, 25 Aug 2020 09:31:09 +0000 Message-Id: <20200825093116.26538-7-ophirmu@nvidia.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20200825093116.26538-1-ophirmu@nvidia.com> References: <20200820145028.4090-1-ophirmu@nvidia.com> <20200825093116.26538-1-ophirmu@nvidia.com> Subject: [dpdk-dev] [PATCH v2 06/13] net/mlx5: remove Netlink dependency in shared code X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk This commit adds Linux implementation of routine mlx5_os_mac_addr_flush as wrapper to Netlink API to avoid direct calls under non-Linux operating systems. Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/net/mlx5/linux/mlx5_os.c | 18 ++++++++++++++++++ drivers/net/mlx5/mlx5.c | 7 ++----- drivers/net/mlx5/mlx5.h | 2 +- 3 files changed, 21 insertions(+), 6 deletions(-) diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c index db955ae..bf1f82b 100644 --- a/drivers/net/mlx5/linux/mlx5_os.c +++ b/drivers/net/mlx5/linux/mlx5_os.c @@ -45,6 +45,7 @@ #include "mlx5_flow.h" #include "rte_pmd_mlx5.h" #include "mlx5_verbs.h" +#include "mlx5_nl.h" #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192 @@ -2332,6 +2333,23 @@ mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable) mlx5_ifindex(dev), !!enable); } +/** + * Flush device MAC addresses + * + * @param dev + * Pointer to Ethernet device structure. + * + */ +void +mlx5_os_mac_addr_flush(struct rte_eth_dev *dev) +{ + struct mlx5_priv *priv = dev->data->dev_private; + + mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev), + dev->data->mac_addrs, + MLX5_MAX_MAC_ADDRESSES, priv->mac_own); +} + const struct eth_dev_ops mlx5_os_dev_ops = { .dev_configure = mlx5_dev_configure, .dev_start = mlx5_dev_start, diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index ca60926..fdda6ff 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #include @@ -1406,9 +1405,7 @@ mlx5_dev_close(struct rte_eth_dev *dev) if (priv->reta_idx != NULL) mlx5_free(priv->reta_idx); if (priv->config.vf) - mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev), - dev->data->mac_addrs, - MLX5_MAX_MAC_ADDRESSES, priv->mac_own); + mlx5_os_mac_addr_flush(dev); if (priv->nl_socket_route >= 0) close(priv->nl_socket_route); if (priv->nl_socket_rdma >= 0) @@ -1446,7 +1443,7 @@ mlx5_dev_close(struct rte_eth_dev *dev) /* * Free the shared context in last turn, because the cleanup * routines above may use some shared fields, like - * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing + * mlx5_os_mac_addr_flush() uses ibdev_path for retrieveing * ifindex if Netlink fails. */ mlx5_free_shared_dev_ctx(priv->sh); diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 3aea3b5..a45bd0b 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -24,7 +24,6 @@ #include #include #include -#include #include #include @@ -1018,6 +1017,7 @@ int mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv, unsigned int iface_idx, int mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable); int mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable); int mlx5_os_set_nonblock_channel_fd(int fd); +void mlx5_os_mac_addr_flush(struct rte_eth_dev *dev); /* mlx5_txpp.c */ From patchwork Tue Aug 25 09:31:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ophir Munk X-Patchwork-Id: 75908 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id EED2FA04B1; Tue, 25 Aug 2020 11:33:07 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 2FB0F1C201; Tue, 25 Aug 2020 11:31:44 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id B41241C1B3 for ; Tue, 25 Aug 2020 11:31:29 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from ophirmu@nvidia.com) with SMTP; 25 Aug 2020 12:31:25 +0300 Received: from nvidia.com (pegasus05.mtr.labs.mlnx [10.210.16.100]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 07P9VPMv030009; Tue, 25 Aug 2020 12:31:25 +0300 From: Ophir Munk To: dev@dpdk.org Cc: Ophir Munk , stable@dpdk.org Date: Tue, 25 Aug 2020 09:31:10 +0000 Message-Id: <20200825093116.26538-8-ophirmu@nvidia.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20200825093116.26538-1-ophirmu@nvidia.com> References: <20200820145028.4090-1-ophirmu@nvidia.com> <20200825093116.26538-1-ophirmu@nvidia.com> Subject: [dpdk-dev] [PATCH v2 07/13] net/mlx5: fix unused utility macros X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk Remove utility macros INFO, WARN, ERROR. They are not in use and conflict with identical definitions when compiled under Windows. Fixes: 80f2d0ed7ff9 ("net/mlx5: add hardware flow debug dump") Cc: stable@dpdk.org Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5_utils.h | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/net/mlx5/mlx5_utils.h b/drivers/net/mlx5/mlx5_utils.h index 97d931f..f078bdc 100644 --- a/drivers/net/mlx5/mlx5_utils.h +++ b/drivers/net/mlx5/mlx5_utils.h @@ -35,10 +35,6 @@ extern int mlx5_logtype; __VA_ARGS__ PMD_DRV_LOG_STRIP PMD_DRV_LOG_OPAREN, \ PMD_DRV_LOG_CPAREN) -#define INFO(...) DRV_LOG(INFO, __VA_ARGS__) -#define WARN(...) DRV_LOG(WARNING, __VA_ARGS__) -#define ERROR(...) DRV_LOG(ERR, __VA_ARGS__) - /* Convenience macros for accessing mbuf fields. */ #define NEXT(m) ((m)->next) #define DATA_LEN(m) ((m)->data_len) From patchwork Tue Aug 25 09:31:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ophir Munk X-Patchwork-Id: 75905 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4085EA04B1; Tue, 25 Aug 2020 11:32:40 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6DE921C1E9; Tue, 25 Aug 2020 11:31:40 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id BC7341C1B6 for ; Tue, 25 Aug 2020 11:31:29 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from ophirmu@nvidia.com) with SMTP; 25 Aug 2020 12:31:25 +0300 Received: from nvidia.com (pegasus05.mtr.labs.mlnx [10.210.16.100]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 07P9VPMw030009; Tue, 25 Aug 2020 12:31:25 +0300 From: Ophir Munk To: dev@dpdk.org Cc: Ophir Munk Date: Tue, 25 Aug 2020 09:31:11 +0000 Message-Id: <20200825093116.26538-9-ophirmu@nvidia.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20200825093116.26538-1-ophirmu@nvidia.com> References: <20200820145028.4090-1-ophirmu@nvidia.com> <20200825093116.26538-1-ophirmu@nvidia.com> Subject: [dpdk-dev] [PATCH v2 08/13] net/mlx5: call meter detach only if DR is supported X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk Flow metering is supported only in direct rules (DR). Currently the APIs of meter actions create and modify are under #ifdef HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER, while detaching the meter action is executed unconditionally. This commit adds the same ifdef to API mlx5_flow_meter_detach(). This commit avoids compilation failure of non-Linux operating systems which do not support DR. Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5_flow_meter.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/net/mlx5/mlx5_flow_meter.c b/drivers/net/mlx5/mlx5_flow_meter.c index bf34687..b36bc7b 100644 --- a/drivers/net/mlx5/mlx5_flow_meter.c +++ b/drivers/net/mlx5/mlx5_flow_meter.c @@ -1221,6 +1221,7 @@ mlx5_flow_meter_attach(struct mlx5_priv *priv, uint32_t meter_id, void mlx5_flow_meter_detach(struct mlx5_flow_meter *fm) { +#ifdef HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER MLX5_ASSERT(fm->ref_cnt); if (--fm->ref_cnt) return; @@ -1230,6 +1231,9 @@ mlx5_flow_meter_detach(struct mlx5_flow_meter *fm) fm->ingress = 0; fm->egress = 0; fm->transfer = 0; +#else + (void)fm; +#endif } /** From patchwork Tue Aug 25 09:31:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ophir Munk X-Patchwork-Id: 75906 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2C57DA04B1; Tue, 25 Aug 2020 11:32:46 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id F26481C1EE; Tue, 25 Aug 2020 11:31:41 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id BD2C31C1B7 for ; Tue, 25 Aug 2020 11:31:29 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from ophirmu@nvidia.com) with SMTP; 25 Aug 2020 12:31:25 +0300 Received: from nvidia.com (pegasus05.mtr.labs.mlnx [10.210.16.100]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 07P9VPMx030009; Tue, 25 Aug 2020 12:31:25 +0300 From: Ophir Munk To: dev@dpdk.org Cc: Ophir Munk Date: Tue, 25 Aug 2020 09:31:12 +0000 Message-Id: <20200825093116.26538-10-ophirmu@nvidia.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20200825093116.26538-1-ophirmu@nvidia.com> References: <20200820145028.4090-1-ophirmu@nvidia.com> <20200825093116.26538-1-ophirmu@nvidia.com> Subject: [dpdk-dev] [PATCH v2 09/13] net/mlx5: add ICMP protocol number definition X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk Some Windows distributions do not include ICMP protocol definitions IPPROTO_ICMP and IPPROTO_ICMPV6. This commit defines them if needed. Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5_flow.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index 9aad24e..4c29898 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -1244,6 +1244,10 @@ mlx5_flow_validate_attributes(struct rte_eth_dev *dev, * @return * 0 on success, a negative errno value otherwise and rte_errno is set. */ + +#ifndef IPPROTO_ICMPV6 +#define IPPROTO_ICMPV6 58 +#endif int mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item, uint64_t item_flags, @@ -1296,6 +1300,9 @@ mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item, * @return * 0 on success, a negative errno value otherwise and rte_errno is set. */ +#ifndef IPPROTO_ICMP +#define IPPROTO_ICMP 1 +#endif int mlx5_flow_validate_item_icmp(const struct rte_flow_item *item, uint64_t item_flags, From patchwork Tue Aug 25 09:31:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ophir Munk X-Patchwork-Id: 75911 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id E6D3DA04B1; Tue, 25 Aug 2020 11:33:42 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 7D3471C21B; Tue, 25 Aug 2020 11:31:47 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id C48A81C1B8 for ; Tue, 25 Aug 2020 11:31:29 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from ophirmu@nvidia.com) with SMTP; 25 Aug 2020 12:31:25 +0300 Received: from nvidia.com (pegasus05.mtr.labs.mlnx [10.210.16.100]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 07P9VPN0030009; Tue, 25 Aug 2020 12:31:25 +0300 From: Ophir Munk To: dev@dpdk.org Cc: Ophir Munk Date: Tue, 25 Aug 2020 09:31:13 +0000 Message-Id: <20200825093116.26538-11-ophirmu@nvidia.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20200825093116.26538-1-ophirmu@nvidia.com> References: <20200820145028.4090-1-ophirmu@nvidia.com> <20200825093116.26538-1-ophirmu@nvidia.com> Subject: [dpdk-dev] [PATCH v2 10/13] net/mlx5: remove more DV dependencies X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk Several DV-based structs of type 'struct mlx5dv_devx_XXX' are replaced with 'void *' to enable compilation under non-Linux operating systems. New getter functions were added to retrieve the specific fields that were previously accessed directly. Replaced structs: 'struct mlx5dv_pp *' 'struct mlx5dv_devx_event_channel *' 'struct mlx5dv_devx_umem *' 'struct mlx5dv_devx_uar *' Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/common/mlx5/linux/mlx5_common_os.h | 111 +++++++++++++++++++++++++++++ drivers/net/mlx5/mlx5.c | 14 ++-- drivers/net/mlx5/mlx5.h | 12 ++-- drivers/net/mlx5/mlx5_rxq.c | 13 ++-- drivers/net/mlx5/mlx5_rxtx.h | 10 +-- drivers/net/mlx5/mlx5_txpp.c | 38 +++++----- drivers/net/mlx5/mlx5_txq.c | 17 +++-- 7 files changed, 172 insertions(+), 43 deletions(-) diff --git a/drivers/common/mlx5/linux/mlx5_common_os.h b/drivers/common/mlx5/linux/mlx5_common_os.h index 55c0902..3420937 100644 --- a/drivers/common/mlx5/linux/mlx5_common_os.h +++ b/drivers/common/mlx5/linux/mlx5_common_os.h @@ -90,4 +90,115 @@ mlx5_os_get_umem_id(void *umem) return 0; return ((struct mlx5dv_devx_umem *)umem)->umem_id; } + +/** + * Get fd. Given a pointer to DevX channel object of type + * 'struct mlx5dv_devx_event_channel*' - return its fd. + * + * @param[in] channel + * Pointer to channel object. + * + * @return + * The fd if channel is valid, 0 otherwise. + */ +static inline int +mlx5_os_get_devx_channel_fd(void *channel) +{ + if (!channel) + return 0; + return ((struct mlx5dv_devx_event_channel *)channel)->fd; +} + +/** + * Get mmap offset. Given a pointer to an DevX UAR object of type + * 'struct mlx5dv_devx_uar *' - return its mmap offset. + * + * @param[in] uar + * Pointer to UAR object. + * + * @return + * The mmap offset if uar is valid, 0 otherwise. + */ +static inline off_t +mlx5_os_get_devx_uar_mmap_offset(void *uar) +{ +#ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET + if (!uar) + return 0; + return ((struct mlx5dv_devx_uar *)uar)->mmap_off; +#else + RTE_SET_USED(uar); + return 0; +#endif +} + +/** + * Get base addr pointer. Given a pointer to an UAR object of type + * 'struct mlx5dv_devx_uar *' - return its base address. + * + * @param[in] uar + * Pointer to an UAR object. + * + * @return + * The base address if UAR is valid, 0 otherwise. + */ +static inline void * +mlx5_os_get_devx_uar_base_addr(void *uar) +{ +#ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET + if (!uar) + return NULL; + return ((struct mlx5dv_devx_uar *)uar)->base_addr; +#else + RTE_SET_USED(uar); + return NULL; +#endif +} + +/** + * Get reg addr pointer. Given a pointer to an UAR object of type + * 'struct mlx5dv_devx_uar *' - return its reg address. + * + * @param[in] uar + * Pointer to an UAR object. + * + * @return + * The reg address if UAR is valid, 0 otherwise. + */ +static inline void * +mlx5_os_get_devx_uar_reg_addr(void *uar) +{ +#ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET + if (!uar) + return NULL; + return ((struct mlx5dv_devx_uar *)uar)->reg_addr; +#else + RTE_SET_USED(uar); + return NULL; +#endif +} + +/** + * Get page id. Given a pointer to an UAR object of type + * 'struct mlx5dv_devx_uar *' - return its page id. + * + * @param[in] uar + * Pointer to an UAR object. + * + * @return + * The page id if UAR is valid, 0 otherwise. + */ +static inline uint32_t +mlx5_os_get_devx_uar_page_id(void *uar) +{ +#ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET + if (!uar) + return 0; + return ((struct mlx5dv_devx_uar *)uar)->page_id; +#else + RTE_SET_USED(uar); + return 0; +#endif +} + #endif /* RTE_PMD_MLX5_COMMON_OS_H_ */ diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index fdda6ff..4a807fb 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -723,6 +723,7 @@ mlx5_alloc_rxtx_uars(struct mlx5_dev_ctx_shared *sh, { uint32_t uar_mapping, retry; int err = 0; + void *base_addr; for (retry = 0; retry < MLX5_ALLOC_UAR_RETRY; ++retry) { #ifdef MLX5DV_UAR_ALLOC_TYPE_NC @@ -781,7 +782,8 @@ mlx5_alloc_rxtx_uars(struct mlx5_dev_ctx_shared *sh, err = ENOMEM; goto exit; } - if (sh->tx_uar->base_addr) + base_addr = mlx5_os_get_devx_uar_base_addr(sh->tx_uar); + if (base_addr) break; /* * The UARs are allocated by rdma_core within the @@ -820,7 +822,8 @@ mlx5_alloc_rxtx_uars(struct mlx5_dev_ctx_shared *sh, err = ENOMEM; goto exit; } - if (sh->devx_rx_uar->base_addr) + base_addr = mlx5_os_get_devx_uar_base_addr(sh->devx_rx_uar); + if (base_addr) break; /* * The UARs are allocated by rdma_core within the @@ -943,8 +946,11 @@ mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn, err = mlx5_alloc_rxtx_uars(sh, config); if (err) goto error; - MLX5_ASSERT(sh->tx_uar && sh->tx_uar->base_addr); - MLX5_ASSERT(sh->devx_rx_uar && sh->devx_rx_uar->base_addr); + MLX5_ASSERT(sh->tx_uar); + MLX5_ASSERT(mlx5_os_get_devx_uar_base_addr(sh->tx_uar)); + + MLX5_ASSERT(sh->devx_rx_uar); + MLX5_ASSERT(mlx5_os_get_devx_uar_base_addr(sh->devx_rx_uar)); } sh->flow_id_pool = mlx5_flow_id_pool_alloc ((1 << HAIRPIN_FLOW_ID_BITS) - 1); diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index a45bd0b..34d7a15 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -527,7 +527,7 @@ struct mlx5_flow_id_pool { struct mlx5_txpp_wq { /* Completion Queue related data.*/ struct mlx5_devx_obj *cq; - struct mlx5dv_devx_umem *cq_umem; + void *cq_umem; union { volatile void *cq_buf; volatile struct mlx5_cqe *cqes; @@ -537,7 +537,7 @@ struct mlx5_txpp_wq { uint32_t arm_sn:2; /* Send Queue related data.*/ struct mlx5_devx_obj *sq; - struct mlx5dv_devx_umem *sq_umem; + void *sq_umem; union { volatile void *sq_buf; volatile struct mlx5_wqe *wqes; @@ -563,10 +563,10 @@ struct mlx5_dev_txpp { int32_t skew; /* Scheduling skew. */ uint32_t eqn; /* Event Queue number. */ struct rte_intr_handle intr_handle; /* Periodic interrupt. */ - struct mlx5dv_devx_event_channel *echan; /* Event Channel. */ + void *echan; /* Event Channel. */ struct mlx5_txpp_wq clock_queue; /* Clock Queue. */ struct mlx5_txpp_wq rearm_queue; /* Clock Queue. */ - struct mlx5dv_pp *pp; /* Packet pacing context. */ + void *pp; /* Packet pacing context. */ uint16_t pp_id; /* Packet pacing context index. */ uint16_t ts_n; /* Number of captured timestamps. */ uint16_t ts_p; /* Pointer to statisticks timestamp. */ @@ -653,10 +653,10 @@ struct mlx5_dev_ctx_shared { struct mlx5_devx_obj *tis; /* TIS object. */ struct mlx5_devx_obj *td; /* Transport domain. */ struct mlx5_flow_id_pool *flow_id_pool; /* Flow ID pool. */ - struct mlx5dv_devx_uar *tx_uar; /* Tx/packer pacing shared UAR. */ + void *tx_uar; /* Tx/packet pacing shared UAR. */ struct mlx5_flex_parser_profiles fp[MLX5_FLEX_PARSER_MAX]; /* Flex parser profiles information. */ - struct mlx5dv_devx_uar *devx_rx_uar; /* DevX UAR for Rx. */ + void *devx_rx_uar; /* DevX UAR for Rx. */ struct mlx5_dev_shared_port port[]; /* per device port data array. */ }; diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index 79eb8f8..92d8876 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -1444,7 +1444,7 @@ mlx5_devx_wq_attr_fill(struct mlx5_priv *priv, struct mlx5_rxq_ctrl *rxq_ctrl, wq_attr->dbr_addr = rxq_ctrl->rq_dbr_offset; wq_attr->dbr_umem_id = rxq_ctrl->rq_dbr_umem_id; wq_attr->dbr_umem_valid = 1; - wq_attr->wq_umem_id = rxq_ctrl->wq_umem->umem_id; + wq_attr->wq_umem_id = mlx5_os_get_umem_id(rxq_ctrl->wq_umem); wq_attr->wq_umem_valid = 1; } @@ -1620,8 +1620,9 @@ mlx5_devx_cq_new(struct rte_eth_dev *dev, unsigned int cqe_n, uint16_t idx, DRV_LOG(ERR, "Failed to register umem for CQ."); goto error; } - cq_attr.uar_page_id = priv->sh->devx_rx_uar->page_id; - cq_attr.q_umem_id = rxq_ctrl->cq_umem->umem_id; + cq_attr.uar_page_id = + mlx5_os_get_devx_uar_page_id(priv->sh->devx_rx_uar); + cq_attr.q_umem_id = mlx5_os_get_umem_id(rxq_ctrl->cq_umem); cq_attr.q_umem_valid = 1; cq_attr.log_cq_size = log_cqe_n; cq_attr.log_page_size = rte_log2_u32(page_size); @@ -1805,7 +1806,8 @@ mlx5_rxq_obj_new(struct rte_eth_dev *dev, uint16_t idx, rte_errno); goto error; } - tmpl->fd = tmpl->devx_channel->fd; + tmpl->fd = + mlx5_os_get_devx_channel_fd(tmpl->devx_channel); } } if (mlx5_rxq_mprq_enabled(rxq_data)) @@ -1897,7 +1899,8 @@ mlx5_rxq_obj_new(struct rte_eth_dev *dev, uint16_t idx, rxq_data->cq_db = (uint32_t *)((uintptr_t)dbr_page->dbrs + (uintptr_t)rxq_ctrl->cq_dbr_offset); - rxq_data->cq_uar = priv->sh->devx_rx_uar->base_addr; + rxq_data->cq_uar = + mlx5_os_get_devx_uar_base_addr(priv->sh->devx_rx_uar); /* Create CQ using DevX API. */ tmpl->devx_cq = mlx5_devx_cq_new(dev, cqe_n, idx, tmpl); if (!tmpl->devx_cq) { diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h index c02a007..0fc7754 100644 --- a/drivers/net/mlx5/mlx5_rxtx.h +++ b/drivers/net/mlx5/mlx5_rxtx.h @@ -185,7 +185,7 @@ struct mlx5_rxq_obj { struct { struct mlx5_devx_obj *rq; /* DevX Rx Queue object. */ struct mlx5_devx_obj *devx_cq; /* DevX CQ object. */ - struct mlx5dv_devx_event_channel *devx_channel; + void *devx_channel; }; }; }; @@ -212,8 +212,8 @@ struct mlx5_rxq_ctrl { uint32_t cq_dbr_umem_id; uint64_t cq_dbr_offset; /* Storing CQ door-bell information, needed when freeing door-bell. */ - struct mlx5dv_devx_umem *wq_umem; /* WQ buffer registration info. */ - struct mlx5dv_devx_umem *cq_umem; /* CQ buffer registration info. */ + void *wq_umem; /* WQ buffer registration info. */ + void *cq_umem; /* CQ buffer registration info. */ struct rte_eth_hairpin_conf hairpin_conf; /* Hairpin configuration. */ }; @@ -361,12 +361,12 @@ struct mlx5_txq_obj { struct { struct rte_eth_dev *dev; struct mlx5_devx_obj *cq_devx; - struct mlx5dv_devx_umem *cq_umem; + void *cq_umem; void *cq_buf; int64_t cq_dbrec_offset; struct mlx5_devx_dbr_page *cq_dbrec_page; struct mlx5_devx_obj *sq_devx; - struct mlx5dv_devx_umem *sq_umem; + void *sq_umem; void *sq_buf; int64_t sq_dbrec_offset; struct mlx5_devx_dbr_page *sq_dbrec_page; diff --git a/drivers/net/mlx5/mlx5_txpp.c b/drivers/net/mlx5/mlx5_txpp.c index 14d4a66..011e479 100644 --- a/drivers/net/mlx5/mlx5_txpp.c +++ b/drivers/net/mlx5/mlx5_txpp.c @@ -113,13 +113,13 @@ mlx5_txpp_alloc_pp_index(struct mlx5_dev_ctx_shared *sh) rte_errno = errno; return -errno; } - if (!sh->txpp.pp->index) { + if (!((struct mlx5dv_pp *)sh->txpp.pp)->index) { DRV_LOG(ERR, "Zero packet pacing index allocated."); mlx5_txpp_free_pp_index(sh); rte_errno = ENOTSUP; return -ENOTSUP; } - sh->txpp.pp_id = sh->txpp.pp->index; + sh->txpp.pp_id = ((struct mlx5dv_pp *)(sh->txpp.pp))->index; return 0; #else RTE_SET_USED(sh); @@ -175,6 +175,7 @@ mlx5_txpp_doorbell_rearm_queue(struct mlx5_dev_ctx_shared *sh, uint16_t ci) uint32_t w32[2]; uint64_t w64; } cs; + void *reg_addr; wq->sq_ci = ci + 1; cs.w32[0] = rte_cpu_to_be_32(rte_be_to_cpu_32 @@ -186,7 +187,8 @@ mlx5_txpp_doorbell_rearm_queue(struct mlx5_dev_ctx_shared *sh, uint16_t ci) /* Make sure the doorbell record is updated. */ rte_wmb(); /* Write to doorbel register to start processing. */ - __mlx5_uar_write64_relaxed(cs.w64, sh->tx_uar->reg_addr, NULL); + reg_addr = mlx5_os_get_devx_uar_reg_addr(sh->tx_uar); + __mlx5_uar_write64_relaxed(cs.w64, reg_addr, NULL); rte_wmb(); } @@ -282,7 +284,7 @@ mlx5_txpp_create_rearm_queue(struct mlx5_dev_ctx_shared *sh) /* Create completion queue object for Rearm Queue. */ cq_attr.cqe_size = (sizeof(struct mlx5_cqe) == 128) ? MLX5_CQE_SIZE_128B : MLX5_CQE_SIZE_64B; - cq_attr.uar_page_id = sh->tx_uar->page_id; + cq_attr.uar_page_id = mlx5_os_get_devx_uar_page_id(sh->tx_uar); cq_attr.eqn = sh->txpp.eqn; cq_attr.q_umem_valid = 1; cq_attr.q_umem_offset = 0; @@ -335,7 +337,7 @@ mlx5_txpp_create_rearm_queue(struct mlx5_dev_ctx_shared *sh) sq_attr.tis_num = sh->tis->id; sq_attr.cqn = wq->cq->id; sq_attr.cd_master = 1; - sq_attr.wq_attr.uar_page = sh->tx_uar->page_id; + sq_attr.wq_attr.uar_page = mlx5_os_get_devx_uar_page_id(sh->tx_uar); sq_attr.wq_attr.wq_type = MLX5_WQ_TYPE_CYCLIC; sq_attr.wq_attr.pd = sh->pdn; sq_attr.wq_attr.log_wq_stride = rte_log2_u32(MLX5_WQE_SIZE); @@ -522,14 +524,14 @@ mlx5_txpp_create_clock_queue(struct mlx5_dev_ctx_shared *sh) MLX5_CQE_SIZE_128B : MLX5_CQE_SIZE_64B; cq_attr.use_first_only = 1; cq_attr.overrun_ignore = 1; - cq_attr.uar_page_id = sh->tx_uar->page_id; + cq_attr.uar_page_id = mlx5_os_get_devx_uar_page_id(sh->tx_uar); cq_attr.eqn = sh->txpp.eqn; cq_attr.q_umem_valid = 1; cq_attr.q_umem_offset = 0; - cq_attr.q_umem_id = wq->cq_umem->umem_id; + cq_attr.q_umem_id = mlx5_os_get_umem_id(wq->cq_umem); cq_attr.db_umem_valid = 1; cq_attr.db_umem_offset = umem_dbrec; - cq_attr.db_umem_id = wq->cq_umem->umem_id; + cq_attr.db_umem_id = mlx5_os_get_umem_id(wq->cq_umem); cq_attr.log_cq_size = rte_log2_u32(MLX5_TXPP_CLKQ_SIZE); cq_attr.log_page_size = rte_log2_u32(page_size); wq->cq = mlx5_devx_cmd_create_cq(sh->ctx, &cq_attr); @@ -587,16 +589,16 @@ mlx5_txpp_create_clock_queue(struct mlx5_dev_ctx_shared *sh) sq_attr.cqn = wq->cq->id; sq_attr.packet_pacing_rate_limit_index = sh->txpp.pp_id; sq_attr.wq_attr.cd_slave = 1; - sq_attr.wq_attr.uar_page = sh->tx_uar->page_id; + sq_attr.wq_attr.uar_page = mlx5_os_get_devx_uar_page_id(sh->tx_uar); sq_attr.wq_attr.wq_type = MLX5_WQ_TYPE_CYCLIC; sq_attr.wq_attr.pd = sh->pdn; sq_attr.wq_attr.log_wq_stride = rte_log2_u32(MLX5_WQE_SIZE); sq_attr.wq_attr.log_wq_sz = rte_log2_u32(wq->sq_size); sq_attr.wq_attr.dbr_umem_valid = 1; sq_attr.wq_attr.dbr_addr = umem_dbrec; - sq_attr.wq_attr.dbr_umem_id = wq->sq_umem->umem_id; + sq_attr.wq_attr.dbr_umem_id = mlx5_os_get_umem_id(wq->sq_umem); sq_attr.wq_attr.wq_umem_valid = 1; - sq_attr.wq_attr.wq_umem_id = wq->sq_umem->umem_id; + sq_attr.wq_attr.wq_umem_id = mlx5_os_get_umem_id(wq->sq_umem); /* umem_offset must be zero for static_sq_wq queue. */ sq_attr.wq_attr.wq_umem_offset = 0; wq->sq = mlx5_devx_cmd_create_sq(sh->ctx, &sq_attr); @@ -630,11 +632,14 @@ mlx5_txpp_create_clock_queue(struct mlx5_dev_ctx_shared *sh) static inline void mlx5_txpp_cq_arm(struct mlx5_dev_ctx_shared *sh) { + void *base_addr; + struct mlx5_txpp_wq *aq = &sh->txpp.rearm_queue; uint32_t arm_sn = aq->arm_sn << MLX5_CQ_SQN_OFFSET; uint32_t db_hi = arm_sn | MLX5_CQ_DBR_CMD_ALL | aq->cq_ci; uint64_t db_be = rte_cpu_to_be_64(((uint64_t)db_hi << 32) | aq->cq->id); - uint32_t *addr = RTE_PTR_ADD(sh->tx_uar->base_addr, MLX5_CQ_DOORBELL); + base_addr = mlx5_os_get_devx_uar_base_addr(sh->tx_uar); + uint32_t *addr = RTE_PTR_ADD(base_addr, MLX5_CQ_DOORBELL); rte_compiler_barrier(); aq->cq_dbrec[MLX5_CQ_ARM_DB] = rte_cpu_to_be_32(db_hi); @@ -881,8 +886,8 @@ static int mlx5_txpp_start_service(struct mlx5_dev_ctx_shared *sh) { uint16_t event_nums[1] = {0}; - int flags; int ret; + int fd; rte_atomic32_set(&sh->txpp.err_miss_int, 0); rte_atomic32_set(&sh->txpp.err_rearm_queue, 0); @@ -890,15 +895,16 @@ mlx5_txpp_start_service(struct mlx5_dev_ctx_shared *sh) rte_atomic32_set(&sh->txpp.err_ts_past, 0); rte_atomic32_set(&sh->txpp.err_ts_future, 0); /* Attach interrupt handler to process Rearm Queue completions. */ - flags = fcntl(sh->txpp.echan->fd, F_GETFL); - ret = fcntl(sh->txpp.echan->fd, F_SETFL, flags | O_NONBLOCK); + fd = mlx5_os_get_devx_channel_fd(sh->txpp.echan); + ret = mlx5_os_set_nonblock_channel_fd(fd); if (ret) { DRV_LOG(ERR, "Failed to change event channel FD."); rte_errno = errno; return -rte_errno; } memset(&sh->txpp.intr_handle, 0, sizeof(sh->txpp.intr_handle)); - sh->txpp.intr_handle.fd = sh->txpp.echan->fd; + fd = mlx5_os_get_devx_channel_fd(sh->txpp.echan); + sh->txpp.intr_handle.fd = fd; sh->txpp.intr_handle.type = RTE_INTR_HANDLE_EXT; if (rte_intr_callback_register(&sh->txpp.intr_handle, mlx5_txpp_interrupt_handler, sh)) { diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c index 21fe16b..fed9d8a 100644 --- a/drivers/net/mlx5/mlx5_txq.c +++ b/drivers/net/mlx5/mlx5_txq.c @@ -907,6 +907,7 @@ mlx5_txq_obj_devx_new(struct rte_eth_dev *dev, uint16_t idx) size_t page_size; struct mlx5_cqe *cqe; uint32_t i, nqe; + void *reg_addr; size_t alignment = (size_t)-1; int ret = 0; @@ -991,11 +992,11 @@ mlx5_txq_obj_devx_new(struct rte_eth_dev *dev, uint16_t idx) /* Create completion queue object with DevX. */ cq_attr.cqe_size = (sizeof(struct mlx5_cqe) == 128) ? MLX5_CQE_SIZE_128B : MLX5_CQE_SIZE_64B; - cq_attr.uar_page_id = sh->tx_uar->page_id; + cq_attr.uar_page_id = mlx5_os_get_devx_uar_page_id(sh->tx_uar); cq_attr.eqn = sh->txpp.eqn; cq_attr.q_umem_valid = 1; cq_attr.q_umem_offset = (uintptr_t)txq_obj->cq_buf % page_size; - cq_attr.q_umem_id = txq_obj->cq_umem->umem_id; + cq_attr.q_umem_id = mlx5_os_get_umem_id(txq_obj->cq_umem); cq_attr.db_umem_valid = 1; cq_attr.db_umem_offset = txq_obj->cq_dbrec_offset; cq_attr.db_umem_id = mlx5_os_get_umem_id(txq_obj->cq_dbrec_page->umem); @@ -1069,7 +1070,7 @@ mlx5_txq_obj_devx_new(struct rte_eth_dev *dev, uint16_t idx) sq_attr.allow_multi_pkt_send_wqe = !!priv->config.mps; sq_attr.allow_swp = !!priv->config.swp; sq_attr.min_wqe_inline_mode = priv->config.hca_attr.vport_inline_mode; - sq_attr.wq_attr.uar_page = sh->tx_uar->page_id; + sq_attr.wq_attr.uar_page = mlx5_os_get_devx_uar_page_id(sh->tx_uar); sq_attr.wq_attr.wq_type = MLX5_WQ_TYPE_CYCLIC; sq_attr.wq_attr.pd = sh->pdn; sq_attr.wq_attr.log_wq_stride = rte_log2_u32(MLX5_WQE_SIZE); @@ -1079,7 +1080,7 @@ mlx5_txq_obj_devx_new(struct rte_eth_dev *dev, uint16_t idx) sq_attr.wq_attr.dbr_umem_id = mlx5_os_get_umem_id(txq_obj->cq_dbrec_page->umem); sq_attr.wq_attr.wq_umem_valid = 1; - sq_attr.wq_attr.wq_umem_id = txq_obj->sq_umem->umem_id; + sq_attr.wq_attr.wq_umem_id = mlx5_os_get_umem_id(txq_obj->sq_umem); sq_attr.wq_attr.wq_umem_offset = (uintptr_t)txq_obj->sq_buf % page_size; txq_obj->sq_devx = mlx5_devx_cmd_create_sq(sh->ctx, &sq_attr); if (!txq_obj->sq_devx) { @@ -1120,9 +1121,11 @@ mlx5_txq_obj_devx_new(struct rte_eth_dev *dev, uint16_t idx) priv->sh->tdn = priv->sh->td->id; #endif MLX5_ASSERT(sh->tx_uar); - MLX5_ASSERT(sh->tx_uar->reg_addr); - txq_ctrl->bf_reg = sh->tx_uar->reg_addr; - txq_ctrl->uar_mmap_offset = sh->tx_uar->mmap_off; + reg_addr = mlx5_os_get_devx_uar_reg_addr(sh->tx_uar); + MLX5_ASSERT(reg_addr); + txq_ctrl->bf_reg = reg_addr; + txq_ctrl->uar_mmap_offset = + mlx5_os_get_devx_uar_mmap_offset(sh->tx_uar); rte_atomic32_set(&txq_obj->refcnt, 1); txq_uar_init(txq_ctrl); LIST_INSERT_HEAD(&priv->txqsobj, txq_obj, next); From patchwork Tue Aug 25 09:31:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ophir Munk X-Patchwork-Id: 75909 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8199CA04B1; Tue, 25 Aug 2020 11:33:21 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 928A11C210; Tue, 25 Aug 2020 11:31:45 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id C97731C1B9 for ; Tue, 25 Aug 2020 11:31:29 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from ophirmu@nvidia.com) with SMTP; 25 Aug 2020 12:31:25 +0300 Received: from nvidia.com (pegasus05.mtr.labs.mlnx [10.210.16.100]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 07P9VPN1030009; Tue, 25 Aug 2020 12:31:25 +0300 From: Ophir Munk To: dev@dpdk.org Cc: Ophir Munk Date: Tue, 25 Aug 2020 09:31:14 +0000 Message-Id: <20200825093116.26538-12-ophirmu@nvidia.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20200825093116.26538-1-ophirmu@nvidia.com> References: <20200820145028.4090-1-ophirmu@nvidia.com> <20200825093116.26538-1-ophirmu@nvidia.com> Subject: [dpdk-dev] [PATCH v2 11/13] net/mlx5: remove ibv_* dependency in Rx/Tx objects X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk Replace pointers to ibv structs with pointers to void (file mlx5_rxtx.h). Specifically the following pointers were replaced: 'struct ibv_cq *', 'struct ibv_wq *', 'struct ibv_comp_channel *', 'struct ibv_rwq_ind_table *a', 'struct ibv_qp *'. Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5_rxq.c | 5 +++-- drivers/net/mlx5/mlx5_rxtx.h | 14 +++++++------- drivers/net/mlx5/mlx5_trigger.c | 3 ++- drivers/net/mlx5/mlx5_txq.c | 2 +- 4 files changed, 13 insertions(+), 11 deletions(-) diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index 92d8876..946f745 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -1790,7 +1790,8 @@ mlx5_rxq_obj_new(struct rte_eth_dev *dev, uint16_t idx, rte_errno = ENOMEM; goto error; } - tmpl->fd = tmpl->ibv_channel->fd; + tmpl->fd = ((struct ibv_comp_channel *) + (tmpl->ibv_channel))->fd; } else if (tmpl->type == MLX5_RXQ_OBJ_TYPE_DEVX_RQ) { int devx_ev_flag = MLX5DV_DEVX_CREATE_EVENT_CHANNEL_FLAGS_OMIT_EV_DATA; @@ -3299,7 +3300,7 @@ mlx5_ind_table_obj_drop_new(struct rte_eth_dev *dev) (priv->sh->ctx, &(struct ibv_rwq_ind_table_init_attr){ .log_ind_tbl_size = 0, - .ind_tbl = &rxq->wq, + .ind_tbl = (struct ibv_wq **)&rxq->wq, .comp_mask = 0, }); if (!tmpl.ind_table) { diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h index 0fc7754..f3fe2e1 100644 --- a/drivers/net/mlx5/mlx5_rxtx.h +++ b/drivers/net/mlx5/mlx5_rxtx.h @@ -178,9 +178,9 @@ struct mlx5_rxq_obj { RTE_STD_C11 union { struct { - struct ibv_wq *wq; /* Work Queue. */ - struct ibv_cq *ibv_cq; /* Completion Queue. */ - struct ibv_comp_channel *ibv_channel; + void *wq; /* Work Queue. */ + void *ibv_cq; /* Completion Queue. */ + void *ibv_channel; }; struct { struct mlx5_devx_obj *rq; /* DevX Rx Queue object. */ @@ -229,7 +229,7 @@ struct mlx5_ind_table_obj { enum mlx5_ind_tbl_type type; RTE_STD_C11 union { - struct ibv_rwq_ind_table *ind_table; /**< Indirection table. */ + void *ind_table; /**< Indirection table. */ struct mlx5_devx_obj *rqt; /* DevX RQT object. */ }; uint32_t queues_n; /**< Number of queues in the list. */ @@ -243,7 +243,7 @@ struct mlx5_hrxq { struct mlx5_ind_table_obj *ind_table; /* Indirection table. */ RTE_STD_C11 union { - struct ibv_qp *qp; /* Verbs queue pair. */ + void *qp; /* Verbs queue pair. */ struct mlx5_devx_obj *tir; /* DevX TIR object. */ }; #ifdef HAVE_IBV_FLOW_DV_SUPPORT @@ -350,8 +350,8 @@ struct mlx5_txq_obj { RTE_STD_C11 union { struct { - struct ibv_cq *cq; /* Completion Queue. */ - struct ibv_qp *qp; /* Queue Pair. */ + void *cq; /* Completion Queue. */ + void *qp; /* Queue Pair. */ }; struct { struct mlx5_devx_obj *sq; diff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c index 6f1e6d4..549af35 100644 --- a/drivers/net/mlx5/mlx5_trigger.c +++ b/drivers/net/mlx5/mlx5_trigger.c @@ -153,7 +153,8 @@ mlx5_rxq_start(struct rte_eth_dev *dev) if (!rxq_ctrl->obj) goto error; if (obj_type == MLX5_RXQ_OBJ_TYPE_IBV) - rxq_ctrl->wqn = rxq_ctrl->obj->wq->wq_num; + rxq_ctrl->wqn = + ((struct ibv_wq *)(rxq_ctrl->obj->wq))->wq_num; else if (obj_type == MLX5_RXQ_OBJ_TYPE_DEVX_RQ) rxq_ctrl->wqn = rxq_ctrl->obj->rq->id; } diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c index fed9d8a..66ad368 100644 --- a/drivers/net/mlx5/mlx5_txq.c +++ b/drivers/net/mlx5/mlx5_txq.c @@ -1317,7 +1317,7 @@ mlx5_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx, txq_data->cqe_n = log2above(cq_info.cqe_cnt); txq_data->cqe_s = 1 << txq_data->cqe_n; txq_data->cqe_m = txq_data->cqe_s - 1; - txq_data->qp_num_8s = tmpl.qp->qp_num << 8; + txq_data->qp_num_8s = ((struct ibv_qp *)tmpl.qp)->qp_num << 8; txq_data->wqes = qp.sq.buf; txq_data->wqe_n = log2above(qp.sq.wqe_cnt); txq_data->wqe_s = 1 << txq_data->wqe_n; From patchwork Tue Aug 25 09:31:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ophir Munk X-Patchwork-Id: 75910 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 357FFA04B1; Tue, 25 Aug 2020 11:33:32 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 886851C217; Tue, 25 Aug 2020 11:31:46 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id D16201C1BA for ; Tue, 25 Aug 2020 11:31:29 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from ophirmu@nvidia.com) with SMTP; 25 Aug 2020 12:31:25 +0300 Received: from nvidia.com (pegasus05.mtr.labs.mlnx [10.210.16.100]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 07P9VPN2030009; Tue, 25 Aug 2020 12:31:25 +0300 From: Ophir Munk To: dev@dpdk.org Cc: Ophir Munk Date: Tue, 25 Aug 2020 09:31:15 +0000 Message-Id: <20200825093116.26538-13-ophirmu@nvidia.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20200825093116.26538-1-ophirmu@nvidia.com> References: <20200820145028.4090-1-ophirmu@nvidia.com> <20200825093116.26538-1-ophirmu@nvidia.com> Subject: [dpdk-dev] [PATCH v2 12/13] net/mlx5: separate VLAN strip modification X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk When updating a queue vlan stripping offload - either the WQ is modified in Verbs or the RQ is modified in DevX. Add a vlan stripping modify callback to 'struct mlx5_obj_ops' and assign it with the specific Verbs and DevX implementations: 'rxq_obj_modify_wq_vlan_strip' and 'rxq_obj_modify_rq_vlan_strip' respectively. Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/net/mlx5/linux/mlx5_verbs.c | 28 ++++++++++++++++++++++ drivers/net/mlx5/mlx5.h | 6 +++++ drivers/net/mlx5/mlx5_devx.c | 48 +++++++++++++++++++++++++++++++++++++ drivers/net/mlx5/mlx5_devx.h | 12 ++++++++++ drivers/net/mlx5/mlx5_vlan.c | 27 ++++----------------- 5 files changed, 98 insertions(+), 23 deletions(-) create mode 100644 drivers/net/mlx5/mlx5_devx.c create mode 100644 drivers/net/mlx5/mlx5_devx.h diff --git a/drivers/net/mlx5/linux/mlx5_verbs.c b/drivers/net/mlx5/linux/mlx5_verbs.c index d41b0fe..6271f0f 100644 --- a/drivers/net/mlx5/linux/mlx5_verbs.c +++ b/drivers/net/mlx5/linux/mlx5_verbs.c @@ -19,6 +19,7 @@ #include #include #include +#include #include /** * Register mr. Given protection domain pointer, pointer to addr and length @@ -61,3 +62,30 @@ const struct mlx5_verbs_ops mlx5_verbs_ops = { .reg_mr = mlx5_reg_mr, .dereg_mr = mlx5_dereg_mr, }; + +/** + * Modify Rx WQ vlan stripping offload + * + * @param rxq_obj + * Rx queue object. + * + * @return 0 on success, non-0 otherwise + */ +static int +mlx5_rxq_obj_modify_wq_vlan_strip(struct mlx5_rxq_obj *rxq_obj, int on) +{ + uint16_t vlan_offloads = + (on ? IBV_WQ_FLAGS_CVLAN_STRIPPING : 0) | + 0; + struct ibv_wq_attr mod; + mod = (struct ibv_wq_attr){ + .attr_mask = IBV_WQ_ATTR_FLAGS, + .flags_mask = IBV_WQ_FLAGS_CVLAN_STRIPPING, + .flags = vlan_offloads, + }; + return mlx5_glue->modify_wq(rxq_obj->wq, &mod); +} + +struct mlx5_obj_ops ibv_obj_ops = { + .rxq_obj_modify_vlan_strip = mlx5_rxq_obj_modify_wq_vlan_strip, +}; diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 34d7a15..431f861 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -676,6 +676,11 @@ TAILQ_HEAD(mlx5_flow_meters, mlx5_flow_meter); #define MLX5_PROC_PRIV(port_id) \ ((struct mlx5_proc_priv *)rte_eth_devices[port_id].process_private) +/* HW objects operations structure. */ +struct mlx5_obj_ops { + int (*rxq_obj_modify_vlan_strip)(struct mlx5_rxq_obj *rxq_obj, int on); +}; + struct mlx5_priv { struct rte_eth_dev_data *dev_data; /* Pointer to device data. */ struct mlx5_dev_ctx_shared *sh; /* Shared device context. */ @@ -719,6 +724,7 @@ struct mlx5_priv { void *rss_desc; /* Intermediate rss description resources. */ int flow_idx; /* Intermediate device flow index. */ int flow_nested_idx; /* Intermediate device flow index, nested. */ + struct mlx5_obj_ops *obj_ops; /* HW objects operations. */ LIST_HEAD(rxq, mlx5_rxq_ctrl) rxqsctrl; /* DPDK Rx queues. */ LIST_HEAD(rxqobj, mlx5_rxq_obj) rxqsobj; /* Verbs/DevX Rx queues. */ uint32_t hrxqs; /* Verbs Hash Rx queues. */ diff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c new file mode 100644 index 0000000..7340412 --- /dev/null +++ b/drivers/net/mlx5/mlx5_devx.c @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright 2020 Mellanox Technologies, Ltd + */ + +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include + +#include "mlx5.h" +#include "mlx5_common_os.h" +#include "mlx5_rxtx.h" +#include "mlx5_utils.h" +#include "mlx5_devx.h" + +/** + * Modify RQ vlan stripping offload + * + * @param rxq_obj + * Rx queue object. + * + * @return 0 on success, non-0 otherwise + */ +static int +mlx5_rxq_obj_modify_rq_vlan_strip(struct mlx5_rxq_obj *rxq_obj, int on) +{ + struct mlx5_devx_modify_rq_attr rq_attr; + + memset(&rq_attr, 0, sizeof(rq_attr)); + rq_attr.rq_state = MLX5_RQC_STATE_RDY; + rq_attr.state = MLX5_RQC_STATE_RDY; + rq_attr.vsd = (on ? 0 : 1); + rq_attr.modify_bitmask = MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD; + return mlx5_devx_cmd_modify_rq(rxq_obj->rq, &rq_attr); +} + +struct mlx5_obj_ops devx_obj_ops = { + .rxq_obj_modify_vlan_strip = mlx5_rxq_obj_modify_rq_vlan_strip, +}; diff --git a/drivers/net/mlx5/mlx5_devx.h b/drivers/net/mlx5/mlx5_devx.h new file mode 100644 index 0000000..844985c --- /dev/null +++ b/drivers/net/mlx5/mlx5_devx.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright 2020 Mellanox Technologies, Ltd + */ + +#ifndef RTE_PMD_MLX5_DEVX_H_ +#define RTE_PMD_MLX5_DEVX_H_ + +#include "mlx5.h" + +extern struct mlx5_obj_ops devx_obj_ops; + +#endif /* RTE_PMD_MLX5_DEVX_H_ */ diff --git a/drivers/net/mlx5/mlx5_vlan.c b/drivers/net/mlx5/mlx5_vlan.c index 89983a4..ea89599 100644 --- a/drivers/net/mlx5/mlx5_vlan.c +++ b/drivers/net/mlx5/mlx5_vlan.c @@ -22,6 +22,7 @@ #include "mlx5_autoconf.h" #include "mlx5_rxtx.h" #include "mlx5_utils.h" +#include "mlx5_devx.h" /** * DPDK callback to configure a VLAN filter. @@ -97,10 +98,6 @@ mlx5_vlan_strip_queue_set(struct rte_eth_dev *dev, uint16_t queue, int on) struct mlx5_rxq_data *rxq = (*priv->rxqs)[queue]; struct mlx5_rxq_ctrl *rxq_ctrl = container_of(rxq, struct mlx5_rxq_ctrl, rxq); - struct ibv_wq_attr mod; - uint16_t vlan_offloads = - (on ? IBV_WQ_FLAGS_CVLAN_STRIPPING : 0) | - 0; int ret = 0; /* Validate hw support */ @@ -115,30 +112,14 @@ mlx5_vlan_strip_queue_set(struct rte_eth_dev *dev, uint16_t queue, int on) dev->data->port_id, queue); return; } - DRV_LOG(DEBUG, "port %u set VLAN offloads 0x%x for port %uqueue %d", - dev->data->port_id, vlan_offloads, rxq->port_id, queue); + DRV_LOG(DEBUG, "port %u set VLAN stripping offloads %d for port %uqueue %d", + dev->data->port_id, on, rxq->port_id, queue); if (!rxq_ctrl->obj) { /* Update related bits in RX queue. */ rxq->vlan_strip = !!on; return; } - if (rxq_ctrl->obj->type == MLX5_RXQ_OBJ_TYPE_IBV) { - mod = (struct ibv_wq_attr){ - .attr_mask = IBV_WQ_ATTR_FLAGS, - .flags_mask = IBV_WQ_FLAGS_CVLAN_STRIPPING, - .flags = vlan_offloads, - }; - ret = mlx5_glue->modify_wq(rxq_ctrl->obj->wq, &mod); - } else if (rxq_ctrl->obj->type == MLX5_RXQ_OBJ_TYPE_DEVX_RQ) { - struct mlx5_devx_modify_rq_attr rq_attr; - - memset(&rq_attr, 0, sizeof(rq_attr)); - rq_attr.rq_state = MLX5_RQC_STATE_RDY; - rq_attr.state = MLX5_RQC_STATE_RDY; - rq_attr.vsd = (on ? 0 : 1); - rq_attr.modify_bitmask = MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD; - ret = mlx5_devx_cmd_modify_rq(rxq_ctrl->obj->rq, &rq_attr); - } + ret = priv->obj_ops->rxq_obj_modify_vlan_strip(rxq_ctrl->obj, on); if (ret) { DRV_LOG(ERR, "port %u failed to modify object %d stripping " "mode: %s", dev->data->port_id, From patchwork Tue Aug 25 09:31:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ophir Munk X-Patchwork-Id: 75907 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5854FA04B1; Tue, 25 Aug 2020 11:32:55 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 570661C1F7; Tue, 25 Aug 2020 11:31:43 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id D2DFD1C1BC for ; Tue, 25 Aug 2020 11:31:29 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from ophirmu@nvidia.com) with SMTP; 25 Aug 2020 12:31:25 +0300 Received: from nvidia.com (pegasus05.mtr.labs.mlnx [10.210.16.100]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 07P9VPN3030009; Tue, 25 Aug 2020 12:31:25 +0300 From: Ophir Munk To: dev@dpdk.org Cc: Ophir Munk Date: Tue, 25 Aug 2020 09:31:16 +0000 Message-Id: <20200825093116.26538-14-ophirmu@nvidia.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20200825093116.26538-1-ophirmu@nvidia.com> References: <20200820145028.4090-1-ophirmu@nvidia.com> <20200825093116.26538-1-ophirmu@nvidia.com> Subject: [dpdk-dev] [PATCH v2 13/13] linux/mlx5: refactor VLAN X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ophir Munk File mlx5_vlan.c contains Netlink APIs (Linux dependent) as part of VM workaround implementation. Move this implementation to file linux/mlx5_vlan_os.c. To remove Netlink dependency in header files change pointer of type 'struct mlx5_nl_vlan_vmwa_context *' to 'void *'. Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/net/mlx5/Makefile | 1 + drivers/net/mlx5/linux/meson.build | 1 + drivers/net/mlx5/linux/mlx5_vlan_os.c | 168 ++++++++++++++++++++++++++++++++++ drivers/net/mlx5/mlx5.h | 8 +- drivers/net/mlx5/mlx5_vlan.c | 134 --------------------------- 5 files changed, 175 insertions(+), 137 deletions(-) create mode 100644 drivers/net/mlx5/linux/mlx5_vlan_os.c diff --git a/drivers/net/mlx5/Makefile b/drivers/net/mlx5/Makefile index 568c772..6097688 100644 --- a/drivers/net/mlx5/Makefile +++ b/drivers/net/mlx5/Makefile @@ -36,6 +36,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_MLX5_PMD) += linux/mlx5_os.c SRCS-$(CONFIG_RTE_LIBRTE_MLX5_PMD) += linux/mlx5_ethdev_os.c SRCS-$(CONFIG_RTE_LIBRTE_MLX5_PMD) += linux/mlx5_verbs.c SRCS-$(CONFIG_RTE_LIBRTE_MLX5_PMD) += linux/mlx5_mp_os.c +SRCS-$(CONFIG_RTE_LIBRTE_MLX5_PMD) += linux/mlx5_vlan_os.c # Basic CFLAGS. CFLAGS += -O3 diff --git a/drivers/net/mlx5/linux/meson.build b/drivers/net/mlx5/linux/meson.build index 2def8e3..6c44021 100644 --- a/drivers/net/mlx5/linux/meson.build +++ b/drivers/net/mlx5/linux/meson.build @@ -8,5 +8,6 @@ sources += files( 'mlx5_ethdev_os.c', 'mlx5_verbs.c', 'mlx5_mp_os.c', + 'mlx5_vlan_os.c', ) diff --git a/drivers/net/mlx5/linux/mlx5_vlan_os.c b/drivers/net/mlx5/linux/mlx5_vlan_os.c new file mode 100644 index 0000000..92fc17d --- /dev/null +++ b/drivers/net/mlx5/linux/mlx5_vlan_os.c @@ -0,0 +1,168 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright 2015 6WIND S.A. + * Copyright 2015 Mellanox Technologies, Ltd + */ + +#include +#include +#include +#include + +/* + * Not needed by this file; included to work around the lack of off_t + * definition for mlx5dv.h with unpatched rdma-core versions. + */ +#include + +#include +#include +#include +#include + +#include +#include +#include + +/* + * Release VLAN network device, created for VM workaround. + * + * @param[in] dev + * Ethernet device object, Netlink context provider. + * @param[in] vlan + * Object representing the network device to release. + */ +void +mlx5_vlan_vmwa_release(struct rte_eth_dev *dev, + struct mlx5_vf_vlan *vlan) +{ + struct mlx5_priv *priv = dev->data->dev_private; + struct mlx5_nl_vlan_vmwa_context *vmwa = priv->vmwa_context; + struct mlx5_nl_vlan_dev *vlan_dev = &vmwa->vlan_dev[0]; + + MLX5_ASSERT(vlan->created); + MLX5_ASSERT(priv->vmwa_context); + if (!vlan->created || !vmwa) + return; + vlan->created = 0; + MLX5_ASSERT(vlan_dev[vlan->tag].refcnt); + if (--vlan_dev[vlan->tag].refcnt == 0 && + vlan_dev[vlan->tag].ifindex) { + mlx5_nl_vlan_vmwa_delete(vmwa, vlan_dev[vlan->tag].ifindex); + vlan_dev[vlan->tag].ifindex = 0; + } +} + +/** + * Acquire VLAN interface with specified tag for VM workaround. + * + * @param[in] dev + * Ethernet device object, Netlink context provider. + * @param[in] vlan + * Object representing the network device to acquire. + */ +void +mlx5_vlan_vmwa_acquire(struct rte_eth_dev *dev, + struct mlx5_vf_vlan *vlan) +{ + struct mlx5_priv *priv = dev->data->dev_private; + struct mlx5_nl_vlan_vmwa_context *vmwa = priv->vmwa_context; + struct mlx5_nl_vlan_dev *vlan_dev = &vmwa->vlan_dev[0]; + + MLX5_ASSERT(!vlan->created); + MLX5_ASSERT(priv->vmwa_context); + if (vlan->created || !vmwa) + return; + if (vlan_dev[vlan->tag].refcnt == 0) { + MLX5_ASSERT(!vlan_dev[vlan->tag].ifindex); + vlan_dev[vlan->tag].ifindex = + mlx5_nl_vlan_vmwa_create(vmwa, vmwa->vf_ifindex, + vlan->tag); + } + if (vlan_dev[vlan->tag].ifindex) { + vlan_dev[vlan->tag].refcnt++; + vlan->created = 1; + } +} + +/* + * Create per ethernet device VLAN VM workaround context + * + * @param dev + * Pointer to Ethernet device structure. + * @param ifindex + * Interface index. + * + * @Return + * Pointer to mlx5_nl_vlan_vmwa_context + */ +void * +mlx5_vlan_vmwa_init(struct rte_eth_dev *dev, uint32_t ifindex) +{ + struct mlx5_priv *priv = dev->data->dev_private; + struct mlx5_dev_config *config = &priv->config; + struct mlx5_nl_vlan_vmwa_context *vmwa; + enum rte_hypervisor hv_type; + + /* Do not engage workaround over PF. */ + if (!config->vf) + return NULL; + /* Check whether there is desired virtual environment */ + hv_type = rte_hypervisor_get(); + switch (hv_type) { + case RTE_HYPERVISOR_UNKNOWN: + case RTE_HYPERVISOR_VMWARE: + /* + * The "white list" of configurations + * to engage the workaround. + */ + break; + default: + /* + * The configuration is not found in the "white list". + * We should not engage the VLAN workaround. + */ + return NULL; + } + vmwa = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*vmwa), sizeof(uint32_t), + SOCKET_ID_ANY); + if (!vmwa) { + DRV_LOG(WARNING, + "Can not allocate memory" + " for VLAN workaround context"); + return NULL; + } + vmwa->nl_socket = mlx5_nl_init(NETLINK_ROUTE); + if (vmwa->nl_socket < 0) { + DRV_LOG(WARNING, + "Can not create Netlink socket" + " for VLAN workaround context"); + mlx5_free(vmwa); + return NULL; + } + vmwa->vf_ifindex = ifindex; + /* Cleanup for existing VLAN devices. */ + return vmwa; +} + +/* + * Destroy per ethernet device VLAN VM workaround context + * + * @param dev + * Pointer to VM context + */ +void +mlx5_vlan_vmwa_exit(void *vmctx) +{ + unsigned int i; + + struct mlx5_nl_vlan_vmwa_context *vmwa = vmctx; + /* Delete all remaining VLAN devices. */ + for (i = 0; i < RTE_DIM(vmwa->vlan_dev); i++) { + if (vmwa->vlan_dev[i].ifindex) + mlx5_nl_vlan_vmwa_delete(vmwa, + vmwa->vlan_dev[i].ifindex); + } + if (vmwa->nl_socket >= 0) + close(vmwa->nl_socket); + mlx5_free(vmwa); +} diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 431f861..f29a12c 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -853,8 +853,6 @@ void mlx5_os_stats_init(struct rte_eth_dev *dev); void mlx5_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index); int mlx5_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac, uint32_t index, uint32_t vmdq); -struct mlx5_nl_vlan_vmwa_context *mlx5_vlan_vmwa_init - (struct rte_eth_dev *dev, uint32_t ifindex); int mlx5_mac_addr_set(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr); int mlx5_set_mc_addr_list(struct rte_eth_dev *dev, struct rte_ether_addr *mc_addr_set, @@ -897,11 +895,15 @@ int mlx5_xstats_get_names(struct rte_eth_dev *dev __rte_unused, int mlx5_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on); void mlx5_vlan_strip_queue_set(struct rte_eth_dev *dev, uint16_t queue, int on); int mlx5_vlan_offload_set(struct rte_eth_dev *dev, int mask); -void mlx5_vlan_vmwa_exit(struct mlx5_nl_vlan_vmwa_context *ctx); + +/* mlx5_vlan_os.c */ + +void mlx5_vlan_vmwa_exit(void *ctx); void mlx5_vlan_vmwa_release(struct rte_eth_dev *dev, struct mlx5_vf_vlan *vf_vlan); void mlx5_vlan_vmwa_acquire(struct rte_eth_dev *dev, struct mlx5_vf_vlan *vf_vlan); +void *mlx5_vlan_vmwa_init(struct rte_eth_dev *dev, uint32_t ifindex); /* mlx5_trigger.c */ diff --git a/drivers/net/mlx5/mlx5_vlan.c b/drivers/net/mlx5/mlx5_vlan.c index ea89599..4bcd3e2 100644 --- a/drivers/net/mlx5/mlx5_vlan.c +++ b/drivers/net/mlx5/mlx5_vlan.c @@ -13,11 +13,6 @@ #include #include -#include -#include -#include -#include - #include "mlx5.h" #include "mlx5_autoconf.h" #include "mlx5_rxtx.h" @@ -162,132 +157,3 @@ mlx5_vlan_offload_set(struct rte_eth_dev *dev, int mask) } return 0; } - -/* - * Release VLAN network device, created for VM workaround. - * - * @param[in] dev - * Ethernet device object, Netlink context provider. - * @param[in] vlan - * Object representing the network device to release. - */ -void mlx5_vlan_vmwa_release(struct rte_eth_dev *dev, - struct mlx5_vf_vlan *vlan) -{ - struct mlx5_priv *priv = dev->data->dev_private; - struct mlx5_nl_vlan_vmwa_context *vmwa = priv->vmwa_context; - struct mlx5_nl_vlan_dev *vlan_dev = &vmwa->vlan_dev[0]; - - MLX5_ASSERT(vlan->created); - MLX5_ASSERT(priv->vmwa_context); - if (!vlan->created || !vmwa) - return; - vlan->created = 0; - MLX5_ASSERT(vlan_dev[vlan->tag].refcnt); - if (--vlan_dev[vlan->tag].refcnt == 0 && - vlan_dev[vlan->tag].ifindex) { - mlx5_nl_vlan_vmwa_delete(vmwa, vlan_dev[vlan->tag].ifindex); - vlan_dev[vlan->tag].ifindex = 0; - } -} - -/** - * Acquire VLAN interface with specified tag for VM workaround. - * - * @param[in] dev - * Ethernet device object, Netlink context provider. - * @param[in] vlan - * Object representing the network device to acquire. - */ -void mlx5_vlan_vmwa_acquire(struct rte_eth_dev *dev, - struct mlx5_vf_vlan *vlan) -{ - struct mlx5_priv *priv = dev->data->dev_private; - struct mlx5_nl_vlan_vmwa_context *vmwa = priv->vmwa_context; - struct mlx5_nl_vlan_dev *vlan_dev = &vmwa->vlan_dev[0]; - - MLX5_ASSERT(!vlan->created); - MLX5_ASSERT(priv->vmwa_context); - if (vlan->created || !vmwa) - return; - if (vlan_dev[vlan->tag].refcnt == 0) { - MLX5_ASSERT(!vlan_dev[vlan->tag].ifindex); - vlan_dev[vlan->tag].ifindex = - mlx5_nl_vlan_vmwa_create(vmwa, vmwa->vf_ifindex, - vlan->tag); - } - if (vlan_dev[vlan->tag].ifindex) { - vlan_dev[vlan->tag].refcnt++; - vlan->created = 1; - } -} - -/* - * Create per ethernet device VLAN VM workaround context - */ -struct mlx5_nl_vlan_vmwa_context * -mlx5_vlan_vmwa_init(struct rte_eth_dev *dev, uint32_t ifindex) -{ - struct mlx5_priv *priv = dev->data->dev_private; - struct mlx5_dev_config *config = &priv->config; - struct mlx5_nl_vlan_vmwa_context *vmwa; - enum rte_hypervisor hv_type; - - /* Do not engage workaround over PF. */ - if (!config->vf) - return NULL; - /* Check whether there is desired virtual environment */ - hv_type = rte_hypervisor_get(); - switch (hv_type) { - case RTE_HYPERVISOR_UNKNOWN: - case RTE_HYPERVISOR_VMWARE: - /* - * The "white list" of configurations - * to engage the workaround. - */ - break; - default: - /* - * The configuration is not found in the "white list". - * We should not engage the VLAN workaround. - */ - return NULL; - } - vmwa = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*vmwa), sizeof(uint32_t), - SOCKET_ID_ANY); - if (!vmwa) { - DRV_LOG(WARNING, - "Can not allocate memory" - " for VLAN workaround context"); - return NULL; - } - vmwa->nl_socket = mlx5_nl_init(NETLINK_ROUTE); - if (vmwa->nl_socket < 0) { - DRV_LOG(WARNING, - "Can not create Netlink socket" - " for VLAN workaround context"); - mlx5_free(vmwa); - return NULL; - } - vmwa->vf_ifindex = ifindex; - /* Cleanup for existing VLAN devices. */ - return vmwa; -} - -/* - * Destroy per ethernet device VLAN VM workaround context - */ -void mlx5_vlan_vmwa_exit(struct mlx5_nl_vlan_vmwa_context *vmwa) -{ - unsigned int i; - - /* Delete all remaining VLAN devices. */ - for (i = 0; i < RTE_DIM(vmwa->vlan_dev); i++) { - if (vmwa->vlan_dev[i].ifindex) - mlx5_nl_vlan_vmwa_delete(vmwa, - vmwa->vlan_dev[i].ifindex); - } - if (vmwa->nl_socket >= 0) - close(vmwa->nl_socket); - mlx5_free(vmwa); -}