From patchwork Fri Aug 21 16:29:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 75826 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 39EA8A04AF; Fri, 21 Aug 2020 18:30:01 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 041581BE7D; Fri, 21 Aug 2020 18:29:55 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id 28CD54CA6 for ; Fri, 21 Aug 2020 18:29:52 +0200 (CEST) IronPort-SDR: 0zCd3lbbehjlMH6bVzS2+1XsVl38/Ay9X7TVlvdrKOy5s8IF6Yg95vOLbKHmg/cNR1IWboBFS9 MkFivQhJNuXw== X-IronPort-AV: E=McAfee;i="6000,8403,9719"; a="143209431" X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="143209431" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Aug 2020 09:29:52 -0700 IronPort-SDR: UIuQQQXHUHfizjcK7G6a6/Mtf5I0pODAYD/DDHEJ/AC30IgRxpeDk+VHofUFSQLWlYMyNe8VMe +GZ8Q4HsUmmg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="297992595" Received: from silpixa00399126.ir.intel.com ([10.237.222.56]) by orsmga006.jf.intel.com with ESMTP; 21 Aug 2020 09:29:50 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: cheng1.jiang@intel.com, patrick.fu@intel.com, ping.yu@intel.com, kevin.laatz@intel.com, Cheng Jiang , Bruce Richardson Date: Fri, 21 Aug 2020 17:29:27 +0100 Message-Id: <20200821162944.29840-2-bruce.richardson@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200821162944.29840-1-bruce.richardson@intel.com> References: <20200721095140.719297-1-bruce.richardson@intel.com> <20200821162944.29840-1-bruce.richardson@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2 01/18] raw/ioat: add a flag to control copying handle parameters X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Cheng Jiang Add a flag which controls whether rte_ioat_enqueue_copy and rte_ioat_completed_copies function should process handle parameters. Not doing so can improve the performance when handle parameters are not necessary. Signed-off-by: Cheng Jiang Signed-off-by: Bruce Richardson --- drivers/raw/ioat/ioat_rawdev.c | 2 ++ drivers/raw/ioat/rte_ioat_rawdev.h | 45 ++++++++++++++++++++++-------- 2 files changed, 36 insertions(+), 11 deletions(-) diff --git a/drivers/raw/ioat/ioat_rawdev.c b/drivers/raw/ioat/ioat_rawdev.c index 7f1a154360..856b55cb6e 100644 --- a/drivers/raw/ioat/ioat_rawdev.c +++ b/drivers/raw/ioat/ioat_rawdev.c @@ -58,6 +58,7 @@ ioat_dev_configure(const struct rte_rawdev *dev, rte_rawdev_obj_t config, return -EINVAL; ioat->ring_size = params->ring_size; + ioat->hdls_disable = params->hdls_disable; if (ioat->desc_ring != NULL) { rte_memzone_free(ioat->desc_mz); ioat->desc_ring = NULL; @@ -122,6 +123,7 @@ ioat_dev_info_get(struct rte_rawdev *dev, rte_rawdev_obj_t dev_info, return -EINVAL; cfg->ring_size = ioat->ring_size; + cfg->hdls_disable = ioat->hdls_disable; return 0; } diff --git a/drivers/raw/ioat/rte_ioat_rawdev.h b/drivers/raw/ioat/rte_ioat_rawdev.h index f765a65571..4bc6491d91 100644 --- a/drivers/raw/ioat/rte_ioat_rawdev.h +++ b/drivers/raw/ioat/rte_ioat_rawdev.h @@ -34,7 +34,8 @@ * an ioat rawdev instance. */ struct rte_ioat_rawdev_config { - unsigned short ring_size; + unsigned short ring_size; /**< size of job submission descriptor ring */ + bool hdls_disable; /**< if set, ignore user-supplied handle params */ }; /** @@ -52,6 +53,7 @@ struct rte_ioat_rawdev { unsigned short ring_size; struct rte_ioat_generic_hw_desc *desc_ring; + bool hdls_disable; __m128i *hdls; /* completion handles for returning to user */ @@ -84,10 +86,14 @@ struct rte_ioat_rawdev { * The length of the data to be copied * @param src_hdl * An opaque handle for the source data, to be returned when this operation - * has been completed and the user polls for the completion details + * has been completed and the user polls for the completion details. + * NOTE: If hdls_disable configuration option for the device is set, this + * parameter is ignored. * @param dst_hdl * An opaque handle for the destination data, to be returned when this - * operation has been completed and the user polls for the completion details + * operation has been completed and the user polls for the completion details. + * NOTE: If hdls_disable configuration option for the device is set, this + * parameter is ignored. * @param fence * A flag parameter indicating that hardware should not begin to perform any * subsequently enqueued copy operations until after this operation has @@ -121,8 +127,10 @@ rte_ioat_enqueue_copy(int dev_id, phys_addr_t src, phys_addr_t dst, desc->u.control_raw = (uint32_t)((!!fence << 4) | (!(write & 0xF)) << 3); desc->src_addr = src; desc->dest_addr = dst; + if (!ioat->hdls_disable) + ioat->hdls[write] = _mm_set_epi64x((int64_t)dst_hdl, + (int64_t)src_hdl); - ioat->hdls[write] = _mm_set_epi64x((int64_t)dst_hdl, (int64_t)src_hdl); rte_prefetch0(&ioat->desc_ring[ioat->next_write & mask]); ioat->enqueued++; @@ -168,19 +176,29 @@ rte_ioat_get_last_completed(struct rte_ioat_rawdev *ioat, int *error) /** * Returns details of copy operations that have been completed * - * Returns to the caller the user-provided "handles" for the copy operations - * which have been completed by the hardware, and not already returned by - * a previous call to this API. + * If the hdls_disable option was not set when the device was configured, + * the function will return to the caller the user-provided "handles" for + * the copy operations which have been completed by the hardware, and not + * already returned by a previous call to this API. + * If the hdls_disable option for the device was set on configure, the + * max_copies, src_hdls and dst_hdls parameters will be ignored, and the + * function returns the number of newly-completed operations. * * @param dev_id * The rawdev device id of the ioat instance * @param max_copies * The number of entries which can fit in the src_hdls and dst_hdls - * arrays, i.e. max number of completed operations to report + * arrays, i.e. max number of completed operations to report. + * NOTE: If hdls_disable configuration option for the device is set, this + * parameter is ignored. * @param src_hdls - * Array to hold the source handle parameters of the completed copies + * Array to hold the source handle parameters of the completed copies. + * NOTE: If hdls_disable configuration option for the device is set, this + * parameter is ignored. * @param dst_hdls - * Array to hold the destination handle parameters of the completed copies + * Array to hold the destination handle parameters of the completed copies. + * NOTE: If hdls_disable configuration option for the device is set, this + * parameter is ignored. * @return * -1 on error, with rte_errno set appropriately. * Otherwise number of completed operations i.e. number of entries written @@ -205,6 +223,11 @@ rte_ioat_completed_copies(int dev_id, uint8_t max_copies, return -1; } + if (ioat->hdls_disable) { + read += count; + goto end; + } + if (count > max_copies) count = max_copies; @@ -222,7 +245,7 @@ rte_ioat_completed_copies(int dev_id, uint8_t max_copies, src_hdls[i] = hdls[0]; dst_hdls[i] = hdls[1]; } - +end: ioat->next_read = read; ioat->completed += count; return count; From patchwork Fri Aug 21 16:29:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 75827 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id E9684A04AF; Fri, 21 Aug 2020 18:30:11 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 17F3C1C0B7; Fri, 21 Aug 2020 18:29:58 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id DC1CA1C0B5 for ; Fri, 21 Aug 2020 18:29:55 +0200 (CEST) IronPort-SDR: qARe6/DlVJGUBn7uL+F/+ikvuIOd09jhIfkXZnZUC2nheGW+qub9BqRFTwWH9vUtLbcv7bkaY1 WB+sE9PZYNfA== X-IronPort-AV: E=McAfee;i="6000,8403,9719"; a="143209439" X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="143209439" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Aug 2020 09:29:55 -0700 IronPort-SDR: JkOoGyPRPYvm2HgYYliORsRuIF+SjZ2XUq+qY36pUAV6KZJIk4zY4sheP+i95yhIL2JhEya2G3 H9128qkUXwKw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="297992607" Received: from silpixa00399126.ir.intel.com ([10.237.222.56]) by orsmga006.jf.intel.com with ESMTP; 21 Aug 2020 09:29:53 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: cheng1.jiang@intel.com, patrick.fu@intel.com, ping.yu@intel.com, kevin.laatz@intel.com, Bruce Richardson Date: Fri, 21 Aug 2020 17:29:28 +0100 Message-Id: <20200821162944.29840-3-bruce.richardson@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200821162944.29840-1-bruce.richardson@intel.com> References: <20200721095140.719297-1-bruce.richardson@intel.com> <20200821162944.29840-1-bruce.richardson@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2 02/18] raw/ioat: split header for readability X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Rather than having a single long complicated header file for general use we can split things so that there is one header with all the publically needed information - data structs and function prototypes - while the rest of the internal details are put separately. This makes it easier to read, understand and use the APIs. Signed-off-by: Bruce Richardson --- There are a couple of checkpatch errors about spacing in this patch, however, it appears that these are false positives. --- drivers/raw/ioat/meson.build | 1 + drivers/raw/ioat/rte_ioat_rawdev.h | 144 +--------------------- drivers/raw/ioat/rte_ioat_rawdev_fns.h | 164 +++++++++++++++++++++++++ 3 files changed, 171 insertions(+), 138 deletions(-) create mode 100644 drivers/raw/ioat/rte_ioat_rawdev_fns.h diff --git a/drivers/raw/ioat/meson.build b/drivers/raw/ioat/meson.build index 0878418aee..f66e9b605e 100644 --- a/drivers/raw/ioat/meson.build +++ b/drivers/raw/ioat/meson.build @@ -8,4 +8,5 @@ sources = files('ioat_rawdev.c', deps += ['rawdev', 'bus_pci', 'mbuf'] install_headers('rte_ioat_rawdev.h', + 'rte_ioat_rawdev_fns.h', 'rte_ioat_spec.h') diff --git a/drivers/raw/ioat/rte_ioat_rawdev.h b/drivers/raw/ioat/rte_ioat_rawdev.h index 4bc6491d91..7ace5c085a 100644 --- a/drivers/raw/ioat/rte_ioat_rawdev.h +++ b/drivers/raw/ioat/rte_ioat_rawdev.h @@ -14,12 +14,7 @@ * @b EXPERIMENTAL: these structures and APIs may change without prior notice */ -#include -#include -#include -#include -#include -#include "rte_ioat_spec.h" +#include /** Name of the device driver */ #define IOAT_PMD_RAWDEV_NAME rawdev_ioat @@ -38,38 +33,6 @@ struct rte_ioat_rawdev_config { bool hdls_disable; /**< if set, ignore user-supplied handle params */ }; -/** - * @internal - * Structure representing a device instance - */ -struct rte_ioat_rawdev { - struct rte_rawdev *rawdev; - const struct rte_memzone *mz; - const struct rte_memzone *desc_mz; - - volatile struct rte_ioat_registers *regs; - phys_addr_t status_addr; - phys_addr_t ring_addr; - - unsigned short ring_size; - struct rte_ioat_generic_hw_desc *desc_ring; - bool hdls_disable; - __m128i *hdls; /* completion handles for returning to user */ - - - unsigned short next_read; - unsigned short next_write; - - /* some statistics for tracking, if added/changed update xstats fns*/ - uint64_t enqueue_failed __rte_cache_aligned; - uint64_t enqueued; - uint64_t started; - uint64_t completed; - - /* to report completions, the device will write status back here */ - volatile uint64_t status __rte_cache_aligned; -}; - /** * Enqueue a copy operation onto the ioat device * @@ -104,38 +67,7 @@ struct rte_ioat_rawdev { static inline int rte_ioat_enqueue_copy(int dev_id, phys_addr_t src, phys_addr_t dst, unsigned int length, uintptr_t src_hdl, uintptr_t dst_hdl, - int fence) -{ - struct rte_ioat_rawdev *ioat = rte_rawdevs[dev_id].dev_private; - unsigned short read = ioat->next_read; - unsigned short write = ioat->next_write; - unsigned short mask = ioat->ring_size - 1; - unsigned short space = mask + read - write; - struct rte_ioat_generic_hw_desc *desc; - - if (space == 0) { - ioat->enqueue_failed++; - return 0; - } - - ioat->next_write = write + 1; - write &= mask; - - desc = &ioat->desc_ring[write]; - desc->size = length; - /* set descriptor write-back every 16th descriptor */ - desc->u.control_raw = (uint32_t)((!!fence << 4) | (!(write & 0xF)) << 3); - desc->src_addr = src; - desc->dest_addr = dst; - if (!ioat->hdls_disable) - ioat->hdls[write] = _mm_set_epi64x((int64_t)dst_hdl, - (int64_t)src_hdl); - - rte_prefetch0(&ioat->desc_ring[ioat->next_write & mask]); - - ioat->enqueued++; - return 1; -} + int fence); /** * Trigger hardware to begin performing enqueued copy operations @@ -147,31 +79,7 @@ rte_ioat_enqueue_copy(int dev_id, phys_addr_t src, phys_addr_t dst, * The rawdev device id of the ioat instance */ static inline void -rte_ioat_do_copies(int dev_id) -{ - struct rte_ioat_rawdev *ioat = rte_rawdevs[dev_id].dev_private; - ioat->desc_ring[(ioat->next_write - 1) & (ioat->ring_size - 1)].u - .control.completion_update = 1; - rte_compiler_barrier(); - ioat->regs->dmacount = ioat->next_write; - ioat->started = ioat->enqueued; -} - -/** - * @internal - * Returns the index of the last completed operation. - */ -static inline int -rte_ioat_get_last_completed(struct rte_ioat_rawdev *ioat, int *error) -{ - uint64_t status = ioat->status; - - /* lower 3 bits indicate "transfer status" : active, idle, halted. - * We can ignore bit 0. - */ - *error = status & (RTE_IOAT_CHANSTS_SUSPENDED | RTE_IOAT_CHANSTS_ARMED); - return (status - ioat->ring_addr) >> 6; -} +rte_ioat_do_copies(int dev_id); /** * Returns details of copy operations that have been completed @@ -206,49 +114,9 @@ rte_ioat_get_last_completed(struct rte_ioat_rawdev *ioat, int *error) */ static inline int rte_ioat_completed_copies(int dev_id, uint8_t max_copies, - uintptr_t *src_hdls, uintptr_t *dst_hdls) -{ - struct rte_ioat_rawdev *ioat = rte_rawdevs[dev_id].dev_private; - unsigned short mask = (ioat->ring_size - 1); - unsigned short read = ioat->next_read; - unsigned short end_read, count; - int error; - int i = 0; - - end_read = (rte_ioat_get_last_completed(ioat, &error) + 1) & mask; - count = (end_read - (read & mask)) & mask; - - if (error) { - rte_errno = EIO; - return -1; - } - - if (ioat->hdls_disable) { - read += count; - goto end; - } - - if (count > max_copies) - count = max_copies; - - for (; i < count - 1; i += 2, read += 2) { - __m128i hdls0 = _mm_load_si128(&ioat->hdls[read & mask]); - __m128i hdls1 = _mm_load_si128(&ioat->hdls[(read + 1) & mask]); + uintptr_t *src_hdls, uintptr_t *dst_hdls); - _mm_storeu_si128((void *)&src_hdls[i], - _mm_unpacklo_epi64(hdls0, hdls1)); - _mm_storeu_si128((void *)&dst_hdls[i], - _mm_unpackhi_epi64(hdls0, hdls1)); - } - for (; i < count; i++, read++) { - uintptr_t *hdls = (void *)&ioat->hdls[read & mask]; - src_hdls[i] = hdls[0]; - dst_hdls[i] = hdls[1]; - } -end: - ioat->next_read = read; - ioat->completed += count; - return count; -} +/* include the implementation details from a separate file */ +#include "rte_ioat_rawdev_fns.h" #endif /* _RTE_IOAT_RAWDEV_H_ */ diff --git a/drivers/raw/ioat/rte_ioat_rawdev_fns.h b/drivers/raw/ioat/rte_ioat_rawdev_fns.h new file mode 100644 index 0000000000..06b4edcbb0 --- /dev/null +++ b/drivers/raw/ioat/rte_ioat_rawdev_fns.h @@ -0,0 +1,164 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2019-2020 Intel Corporation + */ +#ifndef _RTE_IOAT_RAWDEV_FNS_H_ +#define _RTE_IOAT_RAWDEV_FNS_H_ + +#include +#include +#include +#include "rte_ioat_spec.h" + +/** + * @internal + * Structure representing a device instance + */ +struct rte_ioat_rawdev { + struct rte_rawdev *rawdev; + const struct rte_memzone *mz; + const struct rte_memzone *desc_mz; + + volatile struct rte_ioat_registers *regs; + phys_addr_t status_addr; + phys_addr_t ring_addr; + + unsigned short ring_size; + bool hdls_disable; + struct rte_ioat_generic_hw_desc *desc_ring; + __m128i *hdls; /* completion handles for returning to user */ + + + unsigned short next_read; + unsigned short next_write; + + /* some statistics for tracking, if added/changed update xstats fns*/ + uint64_t enqueue_failed __rte_cache_aligned; + uint64_t enqueued; + uint64_t started; + uint64_t completed; + + /* to report completions, the device will write status back here */ + volatile uint64_t status __rte_cache_aligned; +}; + +/** + * Enqueue a copy operation onto the ioat device + */ +static inline int +rte_ioat_enqueue_copy(int dev_id, phys_addr_t src, phys_addr_t dst, + unsigned int length, uintptr_t src_hdl, uintptr_t dst_hdl, + int fence) +{ + struct rte_ioat_rawdev *ioat = rte_rawdevs[dev_id].dev_private; + unsigned short read = ioat->next_read; + unsigned short write = ioat->next_write; + unsigned short mask = ioat->ring_size - 1; + unsigned short space = mask + read - write; + struct rte_ioat_generic_hw_desc *desc; + + if (space == 0) { + ioat->enqueue_failed++; + return 0; + } + + ioat->next_write = write + 1; + write &= mask; + + desc = &ioat->desc_ring[write]; + desc->size = length; + /* set descriptor write-back every 16th descriptor */ + desc->u.control_raw = (uint32_t)((!!fence << 4) | (!(write & 0xF)) << 3); + desc->src_addr = src; + desc->dest_addr = dst; + + if (!ioat->hdls_disable) + ioat->hdls[write] = _mm_set_epi64x((int64_t)dst_hdl, + (int64_t)src_hdl); + rte_prefetch0(&ioat->desc_ring[ioat->next_write & mask]); + + ioat->enqueued++; + return 1; +} + +/** + * Trigger hardware to begin performing enqueued copy operations + */ +static inline void +rte_ioat_do_copies(int dev_id) +{ + struct rte_ioat_rawdev *ioat = rte_rawdevs[dev_id].dev_private; + ioat->desc_ring[(ioat->next_write - 1) & (ioat->ring_size - 1)].u + .control.completion_update = 1; + rte_compiler_barrier(); + ioat->regs->dmacount = ioat->next_write; + ioat->started = ioat->enqueued; +} + +/** + * @internal + * Returns the index of the last completed operation. + */ +static inline int +rte_ioat_get_last_completed(struct rte_ioat_rawdev *ioat, int *error) +{ + uint64_t status = ioat->status; + + /* lower 3 bits indicate "transfer status" : active, idle, halted. + * We can ignore bit 0. + */ + *error = status & (RTE_IOAT_CHANSTS_SUSPENDED | RTE_IOAT_CHANSTS_ARMED); + return (status - ioat->ring_addr) >> 6; +} + +/** + * Returns details of copy operations that have been completed + */ +static inline int +rte_ioat_completed_copies(int dev_id, uint8_t max_copies, + uintptr_t *src_hdls, uintptr_t *dst_hdls) +{ + struct rte_ioat_rawdev *ioat = rte_rawdevs[dev_id].dev_private; + unsigned short mask = (ioat->ring_size - 1); + unsigned short read = ioat->next_read; + unsigned short end_read, count; + int error; + int i = 0; + + end_read = (rte_ioat_get_last_completed(ioat, &error) + 1) & mask; + count = (end_read - (read & mask)) & mask; + + if (error) { + rte_errno = EIO; + return -1; + } + + if (ioat->hdls_disable) { + read += count; + goto end; + } + + if (count > max_copies) + count = max_copies; + + for (; i < count - 1; i += 2, read += 2) { + __m128i hdls0 = _mm_load_si128(&ioat->hdls[read & mask]); + __m128i hdls1 = _mm_load_si128(&ioat->hdls[(read + 1) & mask]); + + _mm_storeu_si128((void *)&src_hdls[i], + _mm_unpacklo_epi64(hdls0, hdls1)); + _mm_storeu_si128((void *)&dst_hdls[i], + _mm_unpackhi_epi64(hdls0, hdls1)); + } + for (; i < count; i++, read++) { + uintptr_t *hdls = (void *)&ioat->hdls[read & mask]; + src_hdls[i] = hdls[0]; + dst_hdls[i] = hdls[1]; + } + +end: + ioat->next_read = read; + ioat->completed += count; + return count; +} + +#endif /* _RTE_IOAT_RAWDEV_FNS_H_ */ From patchwork Fri Aug 21 16:29:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 75828 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 687B6A04AF; Fri, 21 Aug 2020 18:30:23 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 32B921C0C0; Fri, 21 Aug 2020 18:30:01 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id 98B781C0BE for ; Fri, 21 Aug 2020 18:29:58 +0200 (CEST) IronPort-SDR: prPfpiGEY46JqvkJtGIM/4sRyMySD38FnZ7y+zRMT55Q/oMhKk+iBt9siNnzWkwKgXClJ/IA7/ HwXmhop6udng== X-IronPort-AV: E=McAfee;i="6000,8403,9719"; a="143209447" X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="143209447" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Aug 2020 09:29:58 -0700 IronPort-SDR: wLvIJdLx6zNOVdtBRQA8CLOqWqLqFs5BbOtcN46rbbgmz+uWoz6DiCDSAIygQf/LPieHquQj8y QidUAC21htjg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="297992613" Received: from silpixa00399126.ir.intel.com ([10.237.222.56]) by orsmga006.jf.intel.com with ESMTP; 21 Aug 2020 09:29:56 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: cheng1.jiang@intel.com, patrick.fu@intel.com, ping.yu@intel.com, kevin.laatz@intel.com, Bruce Richardson Date: Fri, 21 Aug 2020 17:29:29 +0100 Message-Id: <20200821162944.29840-4-bruce.richardson@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200821162944.29840-1-bruce.richardson@intel.com> References: <20200721095140.719297-1-bruce.richardson@intel.com> <20200821162944.29840-1-bruce.richardson@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2 03/18] raw/ioat: make the HW register spec private X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Only a few definitions from the hardware spec are actually used in the driver runtime, so we can copy over those few and make the rest of the spec a private header in the driver. Signed-off-by: Bruce Richardson --- drivers/raw/ioat/ioat_rawdev.c | 3 ++ .../raw/ioat/{rte_ioat_spec.h => ioat_spec.h} | 26 ----------- drivers/raw/ioat/meson.build | 3 +- drivers/raw/ioat/rte_ioat_rawdev_fns.h | 44 +++++++++++++++++-- 4 files changed, 44 insertions(+), 32 deletions(-) rename drivers/raw/ioat/{rte_ioat_spec.h => ioat_spec.h} (91%) diff --git a/drivers/raw/ioat/ioat_rawdev.c b/drivers/raw/ioat/ioat_rawdev.c index 856b55cb6e..bba072f2a7 100644 --- a/drivers/raw/ioat/ioat_rawdev.c +++ b/drivers/raw/ioat/ioat_rawdev.c @@ -4,10 +4,12 @@ #include #include +#include #include #include #include "rte_ioat_rawdev.h" +#include "ioat_spec.h" static struct rte_pci_driver ioat_pmd_drv; @@ -261,6 +263,7 @@ ioat_rawdev_create(const char *name, struct rte_pci_device *dev) ioat->rawdev = rawdev; ioat->mz = mz; ioat->regs = dev->mem_resource[0].addr; + ioat->doorbell = &ioat->regs->dmacount; ioat->ring_size = 0; ioat->desc_ring = NULL; ioat->status_addr = ioat->mz->iova + diff --git a/drivers/raw/ioat/rte_ioat_spec.h b/drivers/raw/ioat/ioat_spec.h similarity index 91% rename from drivers/raw/ioat/rte_ioat_spec.h rename to drivers/raw/ioat/ioat_spec.h index c6e7929b2c..9645e16d41 100644 --- a/drivers/raw/ioat/rte_ioat_spec.h +++ b/drivers/raw/ioat/ioat_spec.h @@ -86,32 +86,6 @@ struct rte_ioat_registers { #define RTE_IOAT_CHANCMP_ALIGN 8 /* CHANCMP address must be 64-bit aligned */ -struct rte_ioat_generic_hw_desc { - uint32_t size; - union { - uint32_t control_raw; - struct { - uint32_t int_enable: 1; - uint32_t src_snoop_disable: 1; - uint32_t dest_snoop_disable: 1; - uint32_t completion_update: 1; - uint32_t fence: 1; - uint32_t reserved2: 1; - uint32_t src_page_break: 1; - uint32_t dest_page_break: 1; - uint32_t bundle: 1; - uint32_t dest_dca: 1; - uint32_t hint: 1; - uint32_t reserved: 13; - uint32_t op: 8; - } control; - } u; - uint64_t src_addr; - uint64_t dest_addr; - uint64_t next; - uint64_t op_specific[4]; -}; - struct rte_ioat_dma_hw_desc { uint32_t size; union { diff --git a/drivers/raw/ioat/meson.build b/drivers/raw/ioat/meson.build index f66e9b605e..06636f8a9f 100644 --- a/drivers/raw/ioat/meson.build +++ b/drivers/raw/ioat/meson.build @@ -8,5 +8,4 @@ sources = files('ioat_rawdev.c', deps += ['rawdev', 'bus_pci', 'mbuf'] install_headers('rte_ioat_rawdev.h', - 'rte_ioat_rawdev_fns.h', - 'rte_ioat_spec.h') + 'rte_ioat_rawdev_fns.h') diff --git a/drivers/raw/ioat/rte_ioat_rawdev_fns.h b/drivers/raw/ioat/rte_ioat_rawdev_fns.h index 06b4edcbb0..0cee6b1b09 100644 --- a/drivers/raw/ioat/rte_ioat_rawdev_fns.h +++ b/drivers/raw/ioat/rte_ioat_rawdev_fns.h @@ -5,9 +5,37 @@ #define _RTE_IOAT_RAWDEV_FNS_H_ #include -#include #include -#include "rte_ioat_spec.h" + +/** + * @internal + * Structure representing a device descriptor + */ +struct rte_ioat_generic_hw_desc { + uint32_t size; + union { + uint32_t control_raw; + struct { + uint32_t int_enable: 1; + uint32_t src_snoop_disable: 1; + uint32_t dest_snoop_disable: 1; + uint32_t completion_update: 1; + uint32_t fence: 1; + uint32_t reserved2: 1; + uint32_t src_page_break: 1; + uint32_t dest_page_break: 1; + uint32_t bundle: 1; + uint32_t dest_dca: 1; + uint32_t hint: 1; + uint32_t reserved: 13; + uint32_t op: 8; + } control; + } u; + uint64_t src_addr; + uint64_t dest_addr; + uint64_t next; + uint64_t op_specific[4]; +}; /** * @internal @@ -18,7 +46,7 @@ struct rte_ioat_rawdev { const struct rte_memzone *mz; const struct rte_memzone *desc_mz; - volatile struct rte_ioat_registers *regs; + volatile uint16_t *doorbell; phys_addr_t status_addr; phys_addr_t ring_addr; @@ -39,8 +67,16 @@ struct rte_ioat_rawdev { /* to report completions, the device will write status back here */ volatile uint64_t status __rte_cache_aligned; + + /* pointer to the register bar */ + volatile struct rte_ioat_registers *regs; }; +#define RTE_IOAT_CHANSTS_IDLE 0x1 +#define RTE_IOAT_CHANSTS_SUSPENDED 0x2 +#define RTE_IOAT_CHANSTS_HALTED 0x3 +#define RTE_IOAT_CHANSTS_ARMED 0x4 + /** * Enqueue a copy operation onto the ioat device */ @@ -90,7 +126,7 @@ rte_ioat_do_copies(int dev_id) ioat->desc_ring[(ioat->next_write - 1) & (ioat->ring_size - 1)].u .control.completion_update = 1; rte_compiler_barrier(); - ioat->regs->dmacount = ioat->next_write; + *ioat->doorbell = ioat->next_write; ioat->started = ioat->enqueued; } From patchwork Fri Aug 21 16:29:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 75829 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id C9A41A04AF; Fri, 21 Aug 2020 18:30:36 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 74CD61C0CF; Fri, 21 Aug 2020 18:30:03 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id EF19C1B53 for ; Fri, 21 Aug 2020 18:30:00 +0200 (CEST) IronPort-SDR: 2esQ5Cg8kjiDYo2TktlCsc94p9Z8RVVyFK+hr6tx0XCAAbE1TDsIpUBwh4IddCxfpAP+EngHda piCKAiENx51Q== X-IronPort-AV: E=McAfee;i="6000,8403,9719"; a="143209456" X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="143209456" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Aug 2020 09:30:00 -0700 IronPort-SDR: 0Qz+yzG6gUj48YBcpaCFMz458jT7UTdKNRHz+M0F+N9pqReIM5NY4d0tH/uXPbSPwJoGApVFEq bKOJhWT7k06w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="297992623" Received: from silpixa00399126.ir.intel.com ([10.237.222.56]) by orsmga006.jf.intel.com with ESMTP; 21 Aug 2020 09:29:59 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: cheng1.jiang@intel.com, patrick.fu@intel.com, ping.yu@intel.com, kevin.laatz@intel.com, Bruce Richardson Date: Fri, 21 Aug 2020 17:29:30 +0100 Message-Id: <20200821162944.29840-5-bruce.richardson@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200821162944.29840-1-bruce.richardson@intel.com> References: <20200721095140.719297-1-bruce.richardson@intel.com> <20200821162944.29840-1-bruce.richardson@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2 04/18] usertools/dpdk-devbind.py: add support for DSA HW X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kevin Laatz Intel Data Streaming Accelerator (Intel DSA) is a high-performance data copy and transformation accelerator which will be integrated in future Intel processors [1]. Add DSA device support to dpdk-devbind.py script. [1] https://01.org/blogs/2019/introducing-intel-data-streaming-accelerator Signed-off-by: Bruce Richardson Signed-off-by: Kevin Laatz --- usertools/dpdk-devbind.py | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/usertools/dpdk-devbind.py b/usertools/dpdk-devbind.py index 86b6b53c40..35d4384041 100755 --- a/usertools/dpdk-devbind.py +++ b/usertools/dpdk-devbind.py @@ -51,6 +51,8 @@ 'SVendor': None, 'SDevice': None} intel_ioat_icx = {'Class': '08', 'Vendor': '8086', 'Device': '0b00', 'SVendor': None, 'SDevice': None} +intel_idxd_spr = {'Class': '08', 'Vendor': '8086', 'Device': '0b25', + 'SVendor': None, 'SDevice': None} intel_ntb_skx = {'Class': '06', 'Vendor': '8086', 'Device': '201c', 'SVendor': None, 'SDevice': None} @@ -60,7 +62,7 @@ eventdev_devices = [cavium_sso, cavium_tim, octeontx2_sso] mempool_devices = [cavium_fpa, octeontx2_npa] compress_devices = [cavium_zip] -misc_devices = [intel_ioat_bdw, intel_ioat_skx, intel_ioat_icx, intel_ntb_skx, octeontx2_dma] +misc_devices = [intel_ioat_bdw, intel_ioat_skx, intel_ioat_icx, intel_idxd_spr, intel_ntb_skx, octeontx2_dma] # global dict ethernet devices present. Dictionary indexed by PCI address. # Each device within this is itself a dictionary of device properties From patchwork Fri Aug 21 16:29:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 75830 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 86E80A04AF; Fri, 21 Aug 2020 18:30:47 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 7B7471C0D9; Fri, 21 Aug 2020 18:30:06 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id 2A0841C0D7 for ; Fri, 21 Aug 2020 18:30:04 +0200 (CEST) IronPort-SDR: GHXz0OUqFFCqYYloPBWwfYcSG6oSxJJl1WP3ECfnDkMXiTVbCE6XolHoWfdryppdEmnDdyGsmF 8paoW0urV2Sg== X-IronPort-AV: E=McAfee;i="6000,8403,9719"; a="143209468" X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="143209468" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Aug 2020 09:30:03 -0700 IronPort-SDR: K4TA+Y39mPlZceasBiffxaIcBvJQy1ZdoNQSD5qIzg0mRKlhyCYYS+ZKXwc1xYvfunQMMyO+sk nnZAu8hFv3xg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="297992696" Received: from silpixa00399126.ir.intel.com ([10.237.222.56]) by orsmga006.jf.intel.com with ESMTP; 21 Aug 2020 09:30:01 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: cheng1.jiang@intel.com, patrick.fu@intel.com, ping.yu@intel.com, kevin.laatz@intel.com, Bruce Richardson Date: Fri, 21 Aug 2020 17:29:31 +0100 Message-Id: <20200821162944.29840-6-bruce.richardson@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200821162944.29840-1-bruce.richardson@intel.com> References: <20200721095140.719297-1-bruce.richardson@intel.com> <20200821162944.29840-1-bruce.richardson@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2 05/18] raw/ioat: add skeleton for VFIO/UIO based DSA device X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add in the basic probe/remove skeleton code for DSA devices which are bound directly to vfio or uio driver. The kernel module for supporting these uses the "idxd" name, so that name is used as function and file prefix to avoid conflict with existing "ioat" prefixed functions. Since we are adding new files to the driver and there will be common definitions shared between the various files, we create a new internal header file ioat_private.h to hold common macros and function prototypes. Signed-off-by: Bruce Richardson --- doc/guides/rawdevs/ioat.rst | 69 ++++++++++----------------------- drivers/raw/ioat/idxd_pci.c | 56 ++++++++++++++++++++++++++ drivers/raw/ioat/ioat_private.h | 27 +++++++++++++ drivers/raw/ioat/ioat_rawdev.c | 9 +---- drivers/raw/ioat/meson.build | 6 ++- 5 files changed, 108 insertions(+), 59 deletions(-) create mode 100644 drivers/raw/ioat/idxd_pci.c create mode 100644 drivers/raw/ioat/ioat_private.h diff --git a/doc/guides/rawdevs/ioat.rst b/doc/guides/rawdevs/ioat.rst index c46460ff45..b83cf0f7db 100644 --- a/doc/guides/rawdevs/ioat.rst +++ b/doc/guides/rawdevs/ioat.rst @@ -3,10 +3,12 @@ .. include:: -IOAT Rawdev Driver for Intel\ |reg| QuickData Technology -====================================================================== +IOAT Rawdev Driver +=================== The ``ioat`` rawdev driver provides a poll-mode driver (PMD) for Intel\ |reg| +Data Streaming Accelerator `(Intel DSA) +`_ and for Intel\ |reg| QuickData Technology, part of Intel\ |reg| I/O Acceleration Technology `(Intel I/OAT) `_. @@ -17,61 +19,30 @@ be done by software, freeing up CPU cycles for other tasks. Hardware Requirements ---------------------- -On Linux, the presence of an Intel\ |reg| QuickData Technology hardware can -be detected by checking the output of the ``lspci`` command, where the -hardware will be often listed as "Crystal Beach DMA" or "CBDMA". For -example, on a system with Intel\ |reg| Xeon\ |reg| CPU E5-2699 v4 @2.20GHz, -lspci shows: - -.. code-block:: console - - # lspci | grep DMA - 00:04.0 System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Crystal Beach DMA Channel 0 (rev 01) - 00:04.1 System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Crystal Beach DMA Channel 1 (rev 01) - 00:04.2 System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Crystal Beach DMA Channel 2 (rev 01) - 00:04.3 System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Crystal Beach DMA Channel 3 (rev 01) - 00:04.4 System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Crystal Beach DMA Channel 4 (rev 01) - 00:04.5 System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Crystal Beach DMA Channel 5 (rev 01) - 00:04.6 System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Crystal Beach DMA Channel 6 (rev 01) - 00:04.7 System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Crystal Beach DMA Channel 7 (rev 01) - -On a system with Intel\ |reg| Xeon\ |reg| Gold 6154 CPU @ 3.00GHz, lspci -shows: - -.. code-block:: console - - # lspci | grep DMA - 00:04.0 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04) - 00:04.1 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04) - 00:04.2 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04) - 00:04.3 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04) - 00:04.4 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04) - 00:04.5 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04) - 00:04.6 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04) - 00:04.7 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04) - +The ``dpdk-devbind.py`` script, included with DPDK, +can be used to show the presence of supported hardware. +Running ``dpdk-devbind.py --status-dev misc`` will show all the miscellaneous, +or rawdev-based devices on the system. +For Intel\ |reg| QuickData Technology devices, the hardware will be often listed as "Crystal Beach DMA", +or "CBDMA". +For Intel\ |reg| DSA devices, they are currently (at time of writing) appearing as devices with type "0b25", +due to the absence of pci-id database entries for them at this point. Compilation ------------ -For builds done with ``make``, the driver compilation is enabled by the -``CONFIG_RTE_LIBRTE_PMD_IOAT_RAWDEV`` build configuration option. This is -enabled by default in builds for x86 platforms, and disabled in other -configurations. - -For builds using ``meson`` and ``ninja``, the driver will be built when the -target platform is x86-based. +For builds using ``meson`` and ``ninja``, the driver will be built when the target platform is x86-based. +No additional compilation steps are necessary. Device Setup ------------- -The Intel\ |reg| QuickData Technology HW devices will need to be bound to a -user-space IO driver for use. The script ``dpdk-devbind.py`` script -included with DPDK can be used to view the state of the devices and to bind -them to a suitable DPDK-supported kernel driver. When querying the status -of the devices, they will appear under the category of "Misc (rawdev) -devices", i.e. the command ``dpdk-devbind.py --status-dev misc`` can be -used to see the state of those devices alone. +The HW devices to be used will need to be bound to a user-space IO driver for use. +The ``dpdk-devbind.py`` script can be used to view the state of the devices +and to bind them to a suitable DPDK-supported kernel driver, such as ``vfio-pci``. +For example:: + + $ dpdk-devbind.py -b vfio-pci 00:04.0 00:04.1 Device Probing and Initialization ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ diff --git a/drivers/raw/ioat/idxd_pci.c b/drivers/raw/ioat/idxd_pci.c new file mode 100644 index 0000000000..1a30e9c316 --- /dev/null +++ b/drivers/raw/ioat/idxd_pci.c @@ -0,0 +1,56 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2020 Intel Corporation + */ + +#include + +#include "ioat_private.h" + +#define IDXD_VENDOR_ID 0x8086 +#define IDXD_DEVICE_ID_SPR 0x0B25 + +#define IDXD_PMD_RAWDEV_NAME_PCI rawdev_idxd_pci + +const struct rte_pci_id pci_id_idxd_map[] = { + { RTE_PCI_DEVICE(IDXD_VENDOR_ID, IDXD_DEVICE_ID_SPR) }, + { .vendor_id = 0, /* sentinel */ }, +}; + +static int +idxd_rawdev_probe_pci(struct rte_pci_driver *drv, struct rte_pci_device *dev) +{ + int ret = 0; + char name[PCI_PRI_STR_SIZE]; + + rte_pci_device_name(&dev->addr, name, sizeof(name)); + IOAT_PMD_INFO("Init %s on NUMA node %d", name, dev->device.numa_node); + dev->device.driver = &drv->driver; + + return ret; +} + +static int +idxd_rawdev_remove_pci(struct rte_pci_device *dev) +{ + char name[PCI_PRI_STR_SIZE]; + int ret = 0; + + rte_pci_device_name(&dev->addr, name, sizeof(name)); + + IOAT_PMD_INFO("Closing %s on NUMA node %d", + name, dev->device.numa_node); + + return ret; +} + +struct rte_pci_driver idxd_pmd_drv_pci = { + .id_table = pci_id_idxd_map, + .drv_flags = RTE_PCI_DRV_NEED_MAPPING, + .probe = idxd_rawdev_probe_pci, + .remove = idxd_rawdev_remove_pci, +}; + +RTE_PMD_REGISTER_PCI(IDXD_PMD_RAWDEV_NAME_PCI, idxd_pmd_drv_pci); +RTE_PMD_REGISTER_PCI_TABLE(IDXD_PMD_RAWDEV_NAME_PCI, pci_id_idxd_map); +RTE_PMD_REGISTER_KMOD_DEP(IDXD_PMD_RAWDEV_NAME_PCI, + "* igb_uio | uio_pci_generic | vfio-pci"); diff --git a/drivers/raw/ioat/ioat_private.h b/drivers/raw/ioat/ioat_private.h new file mode 100644 index 0000000000..d87d4d055e --- /dev/null +++ b/drivers/raw/ioat/ioat_private.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2020 Intel Corporation + */ + +#ifndef _IOAT_PRIVATE_H_ +#define _IOAT_PRIVATE_H_ + +/** + * @file idxd_private.h + * + * Private data structures for the idxd/DSA part of ioat device driver + * + * @warning + * @b EXPERIMENTAL: these structures and APIs may change without prior notice + */ + +extern int ioat_pmd_logtype; + +#define IOAT_PMD_LOG(level, fmt, args...) rte_log(RTE_LOG_ ## level, \ + ioat_pmd_logtype, "%s(): " fmt "\n", __func__, ##args) + +#define IOAT_PMD_DEBUG(fmt, args...) IOAT_PMD_LOG(DEBUG, fmt, ## args) +#define IOAT_PMD_INFO(fmt, args...) IOAT_PMD_LOG(INFO, fmt, ## args) +#define IOAT_PMD_ERR(fmt, args...) IOAT_PMD_LOG(ERR, fmt, ## args) +#define IOAT_PMD_WARN(fmt, args...) IOAT_PMD_LOG(WARNING, fmt, ## args) + +#endif /* _IOAT_PRIVATE_H_ */ diff --git a/drivers/raw/ioat/ioat_rawdev.c b/drivers/raw/ioat/ioat_rawdev.c index bba072f2a7..20c8b671a6 100644 --- a/drivers/raw/ioat/ioat_rawdev.c +++ b/drivers/raw/ioat/ioat_rawdev.c @@ -10,6 +10,7 @@ #include "rte_ioat_rawdev.h" #include "ioat_spec.h" +#include "ioat_private.h" static struct rte_pci_driver ioat_pmd_drv; @@ -29,14 +30,6 @@ static struct rte_pci_driver ioat_pmd_drv; RTE_LOG_REGISTER(ioat_pmd_logtype, rawdev.ioat, INFO); -#define IOAT_PMD_LOG(level, fmt, args...) rte_log(RTE_LOG_ ## level, \ - ioat_pmd_logtype, "%s(): " fmt "\n", __func__, ##args) - -#define IOAT_PMD_DEBUG(fmt, args...) IOAT_PMD_LOG(DEBUG, fmt, ## args) -#define IOAT_PMD_INFO(fmt, args...) IOAT_PMD_LOG(INFO, fmt, ## args) -#define IOAT_PMD_ERR(fmt, args...) IOAT_PMD_LOG(ERR, fmt, ## args) -#define IOAT_PMD_WARN(fmt, args...) IOAT_PMD_LOG(WARNING, fmt, ## args) - #define DESC_SZ sizeof(struct rte_ioat_generic_hw_desc) #define COMPLETION_SZ sizeof(__m128i) diff --git a/drivers/raw/ioat/meson.build b/drivers/raw/ioat/meson.build index 06636f8a9f..3529635e9c 100644 --- a/drivers/raw/ioat/meson.build +++ b/drivers/raw/ioat/meson.build @@ -3,8 +3,10 @@ build = dpdk_conf.has('RTE_ARCH_X86') reason = 'only supported on x86' -sources = files('ioat_rawdev.c', - 'ioat_rawdev_test.c') +sources = files( + 'idxd_pci.c', + 'ioat_rawdev.c', + 'ioat_rawdev_test.c') deps += ['rawdev', 'bus_pci', 'mbuf'] install_headers('rte_ioat_rawdev.h', From patchwork Fri Aug 21 16:29:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 75831 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8B3EFA04AF; Fri, 21 Aug 2020 18:30:59 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A19BD1C114; Fri, 21 Aug 2020 18:30:09 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id 217231C112 for ; Fri, 21 Aug 2020 18:30:07 +0200 (CEST) IronPort-SDR: 78B49STQcIaDcvXWg82hy9XcETc+CeVK9yYl+x7Vi9x/3MYQHnf+wwhCz8oaOqP3uT0LaCg6gk C9+nbkqCQ8eg== X-IronPort-AV: E=McAfee;i="6000,8403,9719"; a="143209489" X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="143209489" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Aug 2020 09:30:07 -0700 IronPort-SDR: URbeMUSlechKnTs7DmOc2rWLbmKqG9mfpFbnoHaozq1BTaC44FHuuzf1+X/Qg+gdTbODaxB/nV Vdv4KEZjlMRw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="297992725" Received: from silpixa00399126.ir.intel.com ([10.237.222.56]) by orsmga006.jf.intel.com with ESMTP; 21 Aug 2020 09:30:06 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: cheng1.jiang@intel.com, patrick.fu@intel.com, ping.yu@intel.com, kevin.laatz@intel.com, Bruce Richardson Date: Fri, 21 Aug 2020 17:29:32 +0100 Message-Id: <20200821162944.29840-7-bruce.richardson@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200821162944.29840-1-bruce.richardson@intel.com> References: <20200721095140.719297-1-bruce.richardson@intel.com> <20200821162944.29840-1-bruce.richardson@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2 06/18] raw/ioat: add vdev probe for DSA/idxd devices X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kevin Laatz The Intel DSA devices can be exposed to userspace via kernel driver, so can be used without having to bind them to vfio/uio. Therefore we add support for using those kernel-configured devices as vdevs, taking as parameter the individual HW work queue to be used by the vdev. Signed-off-by: Kevin Laatz Signed-off-by: Bruce Richardson --- doc/guides/rawdevs/ioat.rst | 68 +++++++++++++++++-- drivers/raw/ioat/idxd_vdev.c | 123 +++++++++++++++++++++++++++++++++++ drivers/raw/ioat/meson.build | 6 +- 3 files changed, 192 insertions(+), 5 deletions(-) create mode 100644 drivers/raw/ioat/idxd_vdev.c diff --git a/doc/guides/rawdevs/ioat.rst b/doc/guides/rawdevs/ioat.rst index b83cf0f7db..43a69ec4c6 100644 --- a/doc/guides/rawdevs/ioat.rst +++ b/doc/guides/rawdevs/ioat.rst @@ -37,9 +37,62 @@ No additional compilation steps are necessary. Device Setup ------------- +Depending on support provided by the PMD, HW devices can either use the kernel configured driver +or be bound to a user-space IO driver for use. +For example, Intel\ |reg| DSA devices can use the IDXD kernel driver or DPDK-supported drivers, +such as ``vfio-pci``. + +Intel\ |reg| DSA devices using idxd kernel driver +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +To use a Intel\ |reg| DSA device bound to the IDXD kernel driver, the device must first be configured. +The `accel-config `_ utility library can be used for configuration. + +.. note:: + The device configuration can also be done by directly interacting with the sysfs nodes. + +There are some mandatory configuration steps before being able to use a device with an application. +The internal engines, which do the copies or other operations, +and the work-queues, which are used by applications to assign work to the device, +need to be assigned to groups, and the various other configuration options, +such as priority or queue depth, need to be set for each queue. + +To assign an engine to a group:: + + $ accel-config config-engine dsa0/engine0.0 --group-id=0 + $ accel-config config-engine dsa0/engine0.1 --group-id=1 + +To assign work queues to groups for passing descriptors to the engines a similar accel-config command can be used. +However, the work queues also need to be configured depending on the use-case. +Some configuration options include: + +* mode (Dedicated/Shared): Indicates whether a WQ may accept jobs from multiple queues simultaneously. +* priority: WQ priority between 1 and 15. Larger value means higher priority. +* wq-size: the size of the WQ. Sum of all WQ sizes must be less that the total-size defined by the device. +* type: WQ type (kernel/mdev/user). Determines how the device is presented. +* name: identifier given to the WQ. + +Example configuration for a work queue:: + + $ accel-config config-wq dsa0/wq0.0 --group-id=0 \ + --mode=dedicated --priority=10 --wq-size=8 \ + --type=user --name=app1 + +Once the devices have been configured, they need to be enabled:: + + $ accel-config enable-device dsa0 + $ accel-config enable-wq dsa0/wq0.0 + +Check the device configuration:: + + $ accel-config list + +Devices using VFIO/UIO drivers +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + The HW devices to be used will need to be bound to a user-space IO driver for use. The ``dpdk-devbind.py`` script can be used to view the state of the devices -and to bind them to a suitable DPDK-supported kernel driver, such as ``vfio-pci``. +and to bind them to a suitable DPDK-supported driver, such as ``vfio-pci``. For example:: $ dpdk-devbind.py -b vfio-pci 00:04.0 00:04.1 @@ -47,9 +100,16 @@ For example:: Device Probing and Initialization ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -Once bound to a suitable kernel device driver, the HW devices will be found -as part of the PCI scan done at application initialization time. No vdev -parameters need to be passed to create or initialize the device. +For devices bound to a suitable DPDK-supported VFIO/UIO driver, the HW devices will +be found as part of the device scan done at application initialization time without +the need to pass parameters to the application. + +If the device is bound to the IDXD kernel driver (and previously configured with sysfs), +then a specific work queue needs to be passed to the application via a vdev parameter. +This vdev parameter take the driver name and work queue name as parameters. +For example, to use work queue 0 on Intel\ |reg| DSA instance 0:: + + $ dpdk-test --no-pci --vdev=rawdev_idxd,wq=0.0 Once probed successfully, the device will appear as a ``rawdev``, that is a "raw device type" inside DPDK, and can be accessed using APIs from the diff --git a/drivers/raw/ioat/idxd_vdev.c b/drivers/raw/ioat/idxd_vdev.c new file mode 100644 index 0000000000..0509fc0842 --- /dev/null +++ b/drivers/raw/ioat/idxd_vdev.c @@ -0,0 +1,123 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2020 Intel Corporation + */ + +#include +#include +#include +#include + +#include "ioat_private.h" + +/** Name of the device driver */ +#define IDXD_PMD_RAWDEV_NAME rawdev_idxd +/* takes a work queue(WQ) as parameter */ +#define IDXD_ARG_WQ "wq" + +static const char * const valid_args[] = { + IDXD_ARG_WQ, + NULL +}; + +struct idxd_vdev_args { + uint8_t device_id; + uint8_t wq_id; +}; + +static int +idxd_rawdev_parse_wq(const char *key __rte_unused, const char *value, + void *extra_args) +{ + struct idxd_vdev_args *args = (struct idxd_vdev_args *)extra_args; + int dev, wq, bytes = -1; + int read = sscanf(value, "%d.%d%n", &dev, &wq, &bytes); + + if (read != 2 || bytes != (int)strlen(value)) { + IOAT_PMD_ERR("Error parsing work-queue id. Must be in . format"); + return -EINVAL; + } + + if (dev >= UINT8_MAX || wq >= UINT8_MAX) { + IOAT_PMD_ERR("Device or work queue id out of range"); + return -EINVAL; + } + + args->device_id = dev; + args->wq_id = wq; + + return 0; +} + +static int +idxd_vdev_parse_params(struct rte_kvargs *kvlist, struct idxd_vdev_args *args) +{ + if (rte_kvargs_count(kvlist, IDXD_ARG_WQ) == 1) { + if (rte_kvargs_process(kvlist, IDXD_ARG_WQ, + &idxd_rawdev_parse_wq, args) < 0) { + IOAT_PMD_ERR("Error parsing %s", IDXD_ARG_WQ); + goto free; + } + } else { + IOAT_PMD_ERR("%s is a mandatory arg", IDXD_ARG_WQ); + return -EINVAL; + } + + return 0; + +free: + if (kvlist) + rte_kvargs_free(kvlist); + return -EINVAL; +} + +static int +idxd_rawdev_probe_vdev(struct rte_vdev_device *vdev) +{ + struct rte_kvargs *kvlist; + struct idxd_vdev_args vdev_args; + const char *name; + int ret = 0; + + name = rte_vdev_device_name(vdev); + if (name == NULL) + return -EINVAL; + + IOAT_PMD_INFO("Initializing pmd_idxd for %s", name); + + kvlist = rte_kvargs_parse(rte_vdev_device_args(vdev), valid_args); + if (kvlist == NULL) { + IOAT_PMD_ERR("Invalid kvargs key"); + return -EINVAL; + } + + ret = idxd_vdev_parse_params(kvlist, &vdev_args); + if (ret) { + IOAT_PMD_ERR("Failed to parse kvargs"); + return -EINVAL; + } + + return 0; +} + +static int +idxd_rawdev_remove_vdev(struct rte_vdev_device *vdev) +{ + const char *name; + + name = rte_vdev_device_name(vdev); + if (name == NULL) + return -EINVAL; + + IOAT_PMD_INFO("Remove DSA vdev %p", name); + + return 0; +} + +struct rte_vdev_driver idxd_rawdev_drv_vdev = { + .probe = idxd_rawdev_probe_vdev, + .remove = idxd_rawdev_remove_vdev, +}; + +RTE_PMD_REGISTER_VDEV(IDXD_PMD_RAWDEV_NAME, idxd_rawdev_drv_vdev); +RTE_PMD_REGISTER_PARAM_STRING(IDXD_PMD_RAWDEV_NAME, + "wq="); diff --git a/drivers/raw/ioat/meson.build b/drivers/raw/ioat/meson.build index 3529635e9c..b343b7367b 100644 --- a/drivers/raw/ioat/meson.build +++ b/drivers/raw/ioat/meson.build @@ -5,9 +5,13 @@ build = dpdk_conf.has('RTE_ARCH_X86') reason = 'only supported on x86' sources = files( 'idxd_pci.c', + 'idxd_vdev.c', 'ioat_rawdev.c', 'ioat_rawdev_test.c') -deps += ['rawdev', 'bus_pci', 'mbuf'] +deps += ['bus_pci', + 'bus_vdev', + 'mbuf', + 'rawdev'] install_headers('rte_ioat_rawdev.h', 'rte_ioat_rawdev_fns.h') From patchwork Fri Aug 21 16:29:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 75832 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id BD248A04AF; Fri, 21 Aug 2020 18:31:12 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id DB46A1C11A; Fri, 21 Aug 2020 18:30:12 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id 0EF171C119 for ; Fri, 21 Aug 2020 18:30:10 +0200 (CEST) IronPort-SDR: gZAqa8gtcJUk4D4bIdV2DKPKes9V5Uho85m5NOs4QJ8IIJoqxvdHpvHrDGZONsgJoFx0gCB1tx 7ZjyhSFcksQg== X-IronPort-AV: E=McAfee;i="6000,8403,9719"; a="143209509" X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="143209509" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Aug 2020 09:30:10 -0700 IronPort-SDR: QZpMaoQpnmMfdos2w0yA9HAUZKotWAzkSn9Ney2lQdWb0JBKrh7z0U+2ygvMXp+rhwuLJwWJrN R8JHCx1k6YBA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="297992741" Received: from silpixa00399126.ir.intel.com ([10.237.222.56]) by orsmga006.jf.intel.com with ESMTP; 21 Aug 2020 09:30:08 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: cheng1.jiang@intel.com, patrick.fu@intel.com, ping.yu@intel.com, kevin.laatz@intel.com, Bruce Richardson Date: Fri, 21 Aug 2020 17:29:33 +0100 Message-Id: <20200821162944.29840-8-bruce.richardson@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200821162944.29840-1-bruce.richardson@intel.com> References: <20200721095140.719297-1-bruce.richardson@intel.com> <20200821162944.29840-1-bruce.richardson@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2 07/18] raw/ioat: include example configuration script X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Devices managed by the idxd kernel driver must be configured for DPDK use before it can be used by the ioat driver. This example script serves both as a quick way to get the driver set up with a simple configuration, and as the basis for users to modify it and create their own configuration scripts. Signed-off-by: Bruce Richardson --- doc/guides/rawdevs/ioat.rst | 2 + drivers/raw/ioat/dpdk_idxd_cfg.py | 79 +++++++++++++++++++++++++++++++ 2 files changed, 81 insertions(+) create mode 100755 drivers/raw/ioat/dpdk_idxd_cfg.py diff --git a/doc/guides/rawdevs/ioat.rst b/doc/guides/rawdevs/ioat.rst index 43a69ec4c6..8d241d7e77 100644 --- a/doc/guides/rawdevs/ioat.rst +++ b/doc/guides/rawdevs/ioat.rst @@ -50,6 +50,8 @@ The `accel-config `_ utility library can b .. note:: The device configuration can also be done by directly interacting with the sysfs nodes. + An example of how this may be done can be seen in the script ``dpdk_idxd_cfg.py`` + included in the driver source directory. There are some mandatory configuration steps before being able to use a device with an application. The internal engines, which do the copies or other operations, diff --git a/drivers/raw/ioat/dpdk_idxd_cfg.py b/drivers/raw/ioat/dpdk_idxd_cfg.py new file mode 100755 index 0000000000..bce4bb5bd4 --- /dev/null +++ b/drivers/raw/ioat/dpdk_idxd_cfg.py @@ -0,0 +1,79 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2020 Intel Corporation + +""" +Configure an entire Intel DSA instance, using idxd kernel driver, for DPDK use +""" + +import sys +import argparse +import os +import os.path + + +class SysfsDir: + "Used to read/write paths in a sysfs directory" + def __init__(self, path): + self.path = path + + def read_int(self, filename): + "Return a value from sysfs file" + with open(os.path.join(self.path, filename)) as f: + return int(f.readline()) + + def write_values(self, values): + "write dictionary, where key is filename and value is value to write" + for filename, contents in values.items(): + with open(os.path.join(self.path, filename), "w") as f: + f.write(str(contents)) + + +def configure_dsa(dsa_id, queues): + "Configure the DSA instance with appropriate number of queues" + dsa_dir = SysfsDir(f"/sys/bus/dsa/devices/dsa{dsa_id}") + drv_dir = SysfsDir("/sys/bus/dsa/drivers/dsa") + + max_groups = dsa_dir.read_int("max_groups") + max_engines = dsa_dir.read_int("max_engines") + max_queues = dsa_dir.read_int("max_work_queues") + max_tokens = dsa_dir.read_int("max_tokens") + + # we want one engine per group + nb_groups = min(max_engines, max_groups) + for grp in range(nb_groups): + dsa_dir.write_values({f"engine{dsa_id}.{grp}/group_id": grp}) + + nb_queues = min(queues, max_queues) + if queues > nb_queues: + print(f"Setting number of queues to max supported value: {max_queues}") + + # configure each queue + for q in range(nb_queues): + wq_dir = SysfsDir(os.path.join(dsa_dir.path, f"wq{dsa_id}.{q}")) + wq_dir.write_values({"group_id": q % nb_groups, + "type": "user", + "mode": "dedicated", + "name": f"dpdk_wq{dsa_id}.{q}", + "priority": 1, + "size": int(max_tokens / nb_queues)}) + + # enable device and then queues + drv_dir.write_values({"bind": f"dsa{dsa_id}"}) + for q in range(nb_queues): + drv_dir.write_values({"bind": f"wq{dsa_id}.{q}"}) + + +def main(args): + "Main function, does arg parsing and calls config function" + arg_p = argparse.ArgumentParser( + description="Configure whole DSA device instance for DPDK use") + arg_p.add_argument('dsa_id', type=int, help="DSA instance number") + arg_p.add_argument('-q', metavar='queues', type=int, default=255, + help="Number of queues to set up") + parsed_args = arg_p.parse_args(args[1:]) + configure_dsa(parsed_args.dsa_id, parsed_args.q) + + +if __name__ == "__main__": + main(sys.argv) From patchwork Fri Aug 21 16:29:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 75833 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id B33CFA04AF; Fri, 21 Aug 2020 18:31:28 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6B6821C0D7; Fri, 21 Aug 2020 18:30:27 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 019771C0D7 for ; Fri, 21 Aug 2020 18:30:24 +0200 (CEST) IronPort-SDR: io/0UWI0U5M2I1QblaF7mq3vbiAq5m4626IuLebMgT1Jfp4zCF4s1TJsm2cwwhEJD7DqSFU98I jGQmzC/cyWhw== X-IronPort-AV: E=McAfee;i="6000,8403,9719"; a="173615841" X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="173615841" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Aug 2020 09:30:22 -0700 IronPort-SDR: H61ll08BPgHLBKFw98l49x2rfLxPt8tZtZnf9phKq3brN2LyVk280EEBXSAr4cmEGe5s/KbINm +pRG+PfbcALg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="297992809" Received: from silpixa00399126.ir.intel.com ([10.237.222.56]) by orsmga006.jf.intel.com with ESMTP; 21 Aug 2020 09:30:20 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: cheng1.jiang@intel.com, patrick.fu@intel.com, ping.yu@intel.com, kevin.laatz@intel.com, Bruce Richardson Date: Fri, 21 Aug 2020 17:29:34 +0100 Message-Id: <20200821162944.29840-9-bruce.richardson@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200821162944.29840-1-bruce.richardson@intel.com> References: <20200721095140.719297-1-bruce.richardson@intel.com> <20200821162944.29840-1-bruce.richardson@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2 08/18] raw/ioat: create rawdev instances on idxd PCI probe X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When a matching device is found via PCI probe create a rawdev instance for each queue on the hardware. Use empty self-test function for these devices so that the overall rawdev_autotest does not report failures. Signed-off-by: Bruce Richardson --- drivers/raw/ioat/idxd_pci.c | 236 ++++++++++++++++++++++++- drivers/raw/ioat/ioat_common.c | 61 +++++++ drivers/raw/ioat/ioat_private.h | 31 ++++ drivers/raw/ioat/ioat_rawdev_test.c | 7 + drivers/raw/ioat/ioat_spec.h | 64 +++++++ drivers/raw/ioat/meson.build | 1 + drivers/raw/ioat/rte_ioat_rawdev_fns.h | 35 +++- 7 files changed, 432 insertions(+), 3 deletions(-) create mode 100644 drivers/raw/ioat/ioat_common.c diff --git a/drivers/raw/ioat/idxd_pci.c b/drivers/raw/ioat/idxd_pci.c index 1a30e9c316..72f4ecebb7 100644 --- a/drivers/raw/ioat/idxd_pci.c +++ b/drivers/raw/ioat/idxd_pci.c @@ -3,8 +3,10 @@ */ #include +#include #include "ioat_private.h" +#include "ioat_spec.h" #define IDXD_VENDOR_ID 0x8086 #define IDXD_DEVICE_ID_SPR 0x0B25 @@ -16,17 +18,245 @@ const struct rte_pci_id pci_id_idxd_map[] = { { .vendor_id = 0, /* sentinel */ }, }; +static inline int +idxd_pci_dev_command(struct idxd_rawdev *idxd, enum rte_idxd_cmds command) +{ + uint8_t err_code; + uint16_t qid = idxd->qid; + int i = 0; + + if (command >= idxd_disable_wq && command <= idxd_reset_wq) + qid = (1 << qid); + rte_spinlock_lock(&idxd->u.pci->lk); + idxd->u.pci->regs->cmd = (command << IDXD_CMD_SHIFT) | qid; + + do { + rte_pause(); + err_code = idxd->u.pci->regs->cmdstatus; + if (++i >= 1000) { + IOAT_PMD_ERR("Timeout waiting for command response from HW"); + rte_spinlock_unlock(&idxd->u.pci->lk); + return err_code; + } + } while (idxd->u.pci->regs->cmdstatus & CMDSTATUS_ACTIVE_MASK); + rte_spinlock_unlock(&idxd->u.pci->lk); + + return err_code & CMDSTATUS_ERR_MASK; +} + +static int +idxd_is_wq_enabled(struct idxd_rawdev *idxd) +{ + uint32_t state = idxd->u.pci->wq_regs[idxd->qid].wqcfg[WQ_STATE_IDX]; + return ((state >> WQ_STATE_SHIFT) & WQ_STATE_MASK) == 0x1; +} + +static const struct rte_rawdev_ops idxd_pci_ops = { + .dev_selftest = idxd_rawdev_test +}; + +/* each portal uses 4 x 4k pages */ +#define IDXD_PORTAL_SIZE (4096 * 4) + +static int +init_pci_device(struct rte_pci_device *dev, struct idxd_rawdev *idxd) +{ + struct idxd_pci_common *pci; + uint8_t nb_groups, nb_engines, nb_wqs; + uint16_t grp_offset, wq_offset; /* how far into bar0 the regs are */ + uint16_t wq_size, total_wq_size; + uint8_t lg2_max_batch, lg2_max_copy_size; + unsigned int i, err_code; + + pci = malloc(sizeof(*pci)); + if (pci == NULL) { + IOAT_PMD_ERR("%s: Can't allocate memory", __func__); + goto err; + } + rte_spinlock_init(&pci->lk); + + /* assign the bar registers, and then configure device */ + pci->regs = dev->mem_resource[0].addr; + grp_offset = (uint16_t)pci->regs->offsets[0]; + pci->grp_regs = RTE_PTR_ADD(pci->regs, grp_offset * 0x100); + wq_offset = (uint16_t)(pci->regs->offsets[0] >> 16); + pci->wq_regs = RTE_PTR_ADD(pci->regs, wq_offset * 0x100); + pci->portals = dev->mem_resource[2].addr; + + /* sanity check device status */ + if (pci->regs->gensts & GENSTS_DEV_STATE_MASK) { + /* need function-level-reset (FLR) or is enabled */ + IOAT_PMD_ERR("Device status is not disabled, cannot init"); + goto err; + } + if (pci->regs->cmdstatus & CMDSTATUS_ACTIVE_MASK) { + /* command in progress */ + IOAT_PMD_ERR("Device has a command in progress, cannot init"); + goto err; + } + + /* read basic info about the hardware for use when configuring */ + nb_groups = (uint8_t)pci->regs->grpcap; + nb_engines = (uint8_t)pci->regs->engcap; + nb_wqs = (uint8_t)(pci->regs->wqcap >> 16); + total_wq_size = (uint16_t)pci->regs->wqcap; + lg2_max_copy_size = (uint8_t)(pci->regs->gencap >> 16) & 0x1F; + lg2_max_batch = (uint8_t)(pci->regs->gencap >> 21) & 0x0F; + + IOAT_PMD_DEBUG("nb_groups = %u, nb_engines = %u, nb_wqs = %u", + nb_groups, nb_engines, nb_wqs); + + /* zero out any old config */ + for (i = 0; i < nb_groups; i++) { + pci->grp_regs[i].grpengcfg = 0; + pci->grp_regs[i].grpwqcfg[0] = 0; + } + for (i = 0; i < nb_wqs; i++) + pci->wq_regs[i].wqcfg[0] = 0; + + /* put each engine into a separate group to avoid reordering */ + if (nb_groups > nb_engines) + nb_groups = nb_engines; + if (nb_groups < nb_engines) + nb_engines = nb_groups; + + /* assign engines to groups, round-robin style */ + for (i = 0; i < nb_engines; i++) { + IOAT_PMD_DEBUG("Assigning engine %u to group %u", + i, i % nb_groups); + pci->grp_regs[i % nb_groups].grpengcfg |= (1ULL << i); + } + + /* now do the same for queues and give work slots to each queue */ + wq_size = total_wq_size / nb_wqs; + IOAT_PMD_DEBUG("Work queue size = %u, max batch = 2^%u, max copy = 2^%u", + wq_size, lg2_max_batch, lg2_max_copy_size); + for (i = 0; i < nb_wqs; i++) { + /* add engine "i" to a group */ + IOAT_PMD_DEBUG("Assigning work queue %u to group %u", + i, i % nb_groups); + pci->grp_regs[i % nb_groups].grpwqcfg[0] |= (1ULL << i); + /* now configure it, in terms of size, max batch, mode */ + pci->wq_regs[i].wqcfg[WQ_SIZE_IDX] = wq_size; + pci->wq_regs[i].wqcfg[WQ_MODE_IDX] = (1 << WQ_PRIORITY_SHIFT) | + WQ_MODE_DEDICATED; + pci->wq_regs[i].wqcfg[WQ_SIZES_IDX] = lg2_max_copy_size | + (lg2_max_batch << WQ_BATCH_SZ_SHIFT); + } + + /* dump the group configuration to output */ + for (i = 0; i < nb_groups; i++) { + IOAT_PMD_DEBUG("## Group %d", i); + IOAT_PMD_DEBUG(" GRPWQCFG: %"PRIx64, pci->grp_regs[i].grpwqcfg[0]); + IOAT_PMD_DEBUG(" GRPENGCFG: %"PRIx64, pci->grp_regs[i].grpengcfg); + IOAT_PMD_DEBUG(" GRPFLAGS: %"PRIx32, pci->grp_regs[i].grpflags); + } + + idxd->u.pci = pci; + idxd->max_batches = wq_size; + + /* enable the device itself */ + err_code = idxd_pci_dev_command(idxd, idxd_enable_dev); + if (err_code) { + IOAT_PMD_ERR("Error enabling device: code %#x", err_code); + return err_code; + } + IOAT_PMD_DEBUG("IDXD Device enabled OK"); + + return nb_wqs; + +err: + free(pci); + return -1; +} + static int idxd_rawdev_probe_pci(struct rte_pci_driver *drv, struct rte_pci_device *dev) { - int ret = 0; + struct idxd_rawdev idxd = {0}; + uint8_t nb_wqs; + int qid, ret = 0; char name[PCI_PRI_STR_SIZE]; rte_pci_device_name(&dev->addr, name, sizeof(name)); IOAT_PMD_INFO("Init %s on NUMA node %d", name, dev->device.numa_node); dev->device.driver = &drv->driver; - return ret; + ret = init_pci_device(dev, &idxd); + if (ret < 0) { + IOAT_PMD_ERR("Error initializing PCI hardware"); + return ret; + } + nb_wqs = (uint8_t)ret; + + /* set up one device for each queue */ + for (qid = 0; qid < nb_wqs; qid++) { + char qname[32]; + + /* add the queue number to each device name */ + snprintf(qname, sizeof(qname), "%s-q%d", name, qid); + idxd.qid = qid; + idxd.public.portal = RTE_PTR_ADD(idxd.u.pci->portals, + qid * IDXD_PORTAL_SIZE); + if (idxd_is_wq_enabled(&idxd)) + IOAT_PMD_ERR("Error, WQ %u seems enabled", qid); + ret = idxd_rawdev_create(qname, &dev->device, + &idxd, &idxd_pci_ops); + if (ret != 0) { + IOAT_PMD_ERR("Failed to create rawdev %s", name); + if (qid == 0) /* if no devices using this, free pci */ + free(idxd.u.pci); + return ret; + } + } + + return 0; +} + +static int +idxd_rawdev_destroy(const char *name) +{ + int ret; + uint8_t err_code; + struct rte_rawdev *rdev; + struct idxd_rawdev *idxd; + + if (!name) { + IOAT_PMD_ERR("Invalid device name"); + return -EINVAL; + } + + rdev = rte_rawdev_pmd_get_named_dev(name); + if (!rdev) { + IOAT_PMD_ERR("Invalid device name (%s)", name); + return -EINVAL; + } + + idxd = rdev->dev_private; + + /* disable the device */ + err_code = idxd_pci_dev_command(idxd, idxd_disable_dev); + if (err_code) { + IOAT_PMD_ERR("Error disabling device: code %#x", err_code); + return err_code; + } + IOAT_PMD_DEBUG("IDXD Device disabled OK"); + + /* free device memory */ + if (rdev->dev_private != NULL) { + IOAT_PMD_DEBUG("Freeing device driver memory"); + rdev->dev_private = NULL; + rte_free(idxd->public.batch_ring); + rte_free(idxd->public.hdl_ring); + rte_memzone_free(idxd->mz); + } + + /* rte_rawdev_close is called by pmd_release */ + ret = rte_rawdev_pmd_release(rdev); + if (ret) + IOAT_PMD_DEBUG("Device cleanup failed"); + + return 0; } static int @@ -40,6 +270,8 @@ idxd_rawdev_remove_pci(struct rte_pci_device *dev) IOAT_PMD_INFO("Closing %s on NUMA node %d", name, dev->device.numa_node); + ret = idxd_rawdev_destroy(name); + return ret; } diff --git a/drivers/raw/ioat/ioat_common.c b/drivers/raw/ioat/ioat_common.c new file mode 100644 index 0000000000..37a14e514d --- /dev/null +++ b/drivers/raw/ioat/ioat_common.c @@ -0,0 +1,61 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2020 Intel Corporation + */ + +#include +#include + +#include "ioat_private.h" + +int +idxd_rawdev_create(const char *name, struct rte_device *dev, + const struct idxd_rawdev *base_idxd, + const struct rte_rawdev_ops *ops) +{ + struct idxd_rawdev *idxd; + struct rte_rawdev *rawdev = NULL; + const struct rte_memzone *mz = NULL; + char mz_name[RTE_MEMZONE_NAMESIZE]; + int ret = 0; + + if (!name) { + IOAT_PMD_ERR("Invalid name of the device!"); + ret = -EINVAL; + goto cleanup; + } + + /* Allocate device structure */ + rawdev = rte_rawdev_pmd_allocate(name, sizeof(struct idxd_rawdev), + dev->numa_node); + if (rawdev == NULL) { + IOAT_PMD_ERR("Unable to allocate raw device"); + ret = -ENOMEM; + goto cleanup; + } + + snprintf(mz_name, sizeof(mz_name), "rawdev%u_private", rawdev->dev_id); + mz = rte_memzone_reserve(mz_name, sizeof(struct idxd_rawdev), + dev->numa_node, RTE_MEMZONE_IOVA_CONTIG); + if (mz == NULL) { + IOAT_PMD_ERR("Unable to reserve memzone for private data\n"); + ret = -ENOMEM; + goto cleanup; + } + rawdev->dev_private = mz->addr; + rawdev->dev_ops = ops; + rawdev->device = dev; + rawdev->driver_name = IOAT_PMD_RAWDEV_NAME_STR; + + idxd = rawdev->dev_private; + *idxd = *base_idxd; /* copy over the main fields already passed in */ + idxd->rawdev = rawdev; + idxd->mz = mz; + + return 0; + +cleanup: + if (rawdev) + rte_rawdev_pmd_release(rawdev); + + return ret; +} diff --git a/drivers/raw/ioat/ioat_private.h b/drivers/raw/ioat/ioat_private.h index d87d4d055e..32c824536d 100644 --- a/drivers/raw/ioat/ioat_private.h +++ b/drivers/raw/ioat/ioat_private.h @@ -14,6 +14,10 @@ * @b EXPERIMENTAL: these structures and APIs may change without prior notice */ +#include +#include +#include "rte_ioat_rawdev.h" + extern int ioat_pmd_logtype; #define IOAT_PMD_LOG(level, fmt, args...) rte_log(RTE_LOG_ ## level, \ @@ -24,4 +28,31 @@ extern int ioat_pmd_logtype; #define IOAT_PMD_ERR(fmt, args...) IOAT_PMD_LOG(ERR, fmt, ## args) #define IOAT_PMD_WARN(fmt, args...) IOAT_PMD_LOG(WARNING, fmt, ## args) +struct idxd_pci_common { + rte_spinlock_t lk; + volatile struct rte_idxd_bar0 *regs; + volatile struct rte_idxd_wqcfg *wq_regs; + volatile struct rte_idxd_grpcfg *grp_regs; + volatile void *portals; +}; + +struct idxd_rawdev { + struct rte_idxd_rawdev public; /* the public members, must be first */ + + struct rte_rawdev *rawdev; + const struct rte_memzone *mz; + uint8_t qid; + uint16_t max_batches; + + union { + struct idxd_pci_common *pci; + } u; +}; + +extern int idxd_rawdev_create(const char *name, struct rte_device *dev, + const struct idxd_rawdev *idxd, + const struct rte_rawdev_ops *ops); + +extern int idxd_rawdev_test(uint16_t dev_id); + #endif /* _IOAT_PRIVATE_H_ */ diff --git a/drivers/raw/ioat/ioat_rawdev_test.c b/drivers/raw/ioat/ioat_rawdev_test.c index 626794c224..4f14b3d1bd 100644 --- a/drivers/raw/ioat/ioat_rawdev_test.c +++ b/drivers/raw/ioat/ioat_rawdev_test.c @@ -7,6 +7,7 @@ #include #include "rte_rawdev.h" #include "rte_ioat_rawdev.h" +#include "ioat_private.h" #define MAX_SUPPORTED_RAWDEVS 64 #define TEST_SKIPPED 77 @@ -268,3 +269,9 @@ ioat_rawdev_test(uint16_t dev_id) free(ids); return -1; } + +int +idxd_rawdev_test(uint16_t dev_id __rte_unused) +{ + return 0; +} diff --git a/drivers/raw/ioat/ioat_spec.h b/drivers/raw/ioat/ioat_spec.h index 9645e16d41..1aa768b9ae 100644 --- a/drivers/raw/ioat/ioat_spec.h +++ b/drivers/raw/ioat/ioat_spec.h @@ -268,6 +268,70 @@ union rte_ioat_hw_desc { struct rte_ioat_pq_update_hw_desc pq_update; }; +/*** Definitions for Intel(R) Data Streaming Accelerator Follow ***/ + +#define IDXD_CMD_SHIFT 20 +enum rte_idxd_cmds { + idxd_enable_dev = 1, + idxd_disable_dev, + idxd_drain_all, + idxd_abort_all, + idxd_reset_device, + idxd_enable_wq, + idxd_disable_wq, + idxd_drain_wq, + idxd_abort_wq, + idxd_reset_wq, +}; + +/* General bar0 registers */ +struct rte_idxd_bar0 { + uint32_t __rte_cache_aligned version; /* offset 0x00 */ + uint64_t __rte_aligned(0x10) gencap; /* offset 0x10 */ + uint64_t __rte_aligned(0x10) wqcap; /* offset 0x20 */ + uint64_t __rte_aligned(0x10) grpcap; /* offset 0x30 */ + uint64_t __rte_aligned(0x08) engcap; /* offset 0x38 */ + uint64_t __rte_aligned(0x10) opcap; /* offset 0x40 */ + uint64_t __rte_aligned(0x20) offsets[2]; /* offset 0x60 */ + uint32_t __rte_aligned(0x20) gencfg; /* offset 0x80 */ + uint32_t __rte_aligned(0x08) genctrl; /* offset 0x88 */ + uint32_t __rte_aligned(0x10) gensts; /* offset 0x90 */ + uint32_t __rte_aligned(0x08) intcause; /* offset 0x98 */ + uint32_t __rte_aligned(0x10) cmd; /* offset 0xA0 */ + uint32_t __rte_aligned(0x08) cmdstatus; /* offset 0xA8 */ + uint64_t __rte_aligned(0x20) swerror[4]; /* offset 0xC0 */ +}; + +struct rte_idxd_wqcfg { + uint32_t wqcfg[8] __rte_aligned(32); /* 32-byte register */ +}; + +#define WQ_SIZE_IDX 0 /* size is in first 32-bit value */ +#define WQ_THRESHOLD_IDX 1 /* WQ threshold second 32-bits */ +#define WQ_MODE_IDX 2 /* WQ mode and other flags */ +#define WQ_SIZES_IDX 3 /* WQ transfer and batch sizes */ +#define WQ_OCC_INT_IDX 4 /* WQ occupancy interrupt handle */ +#define WQ_OCC_LIMIT_IDX 5 /* WQ occupancy limit */ +#define WQ_STATE_IDX 6 /* WQ state and occupancy state */ + +#define WQ_MODE_SHARED 0 +#define WQ_MODE_DEDICATED 1 +#define WQ_PRIORITY_SHIFT 4 +#define WQ_BATCH_SZ_SHIFT 5 +#define WQ_STATE_SHIFT 30 +#define WQ_STATE_MASK 0x3 + +struct rte_idxd_grpcfg { + uint64_t grpwqcfg[4] __rte_cache_aligned; /* 64-byte register set */ + uint64_t grpengcfg; /* offset 32 */ + uint32_t grpflags; /* offset 40 */ +}; + +#define GENSTS_DEV_STATE_MASK 0x03 +#define CMDSTATUS_ACTIVE_SHIFT 31 +#define CMDSTATUS_ACTIVE_MASK (1 << 31) +#define CMDSTATUS_ERR_MASK 0xFF + #ifdef __cplusplus } #endif diff --git a/drivers/raw/ioat/meson.build b/drivers/raw/ioat/meson.build index b343b7367b..5eff76a1a3 100644 --- a/drivers/raw/ioat/meson.build +++ b/drivers/raw/ioat/meson.build @@ -6,6 +6,7 @@ reason = 'only supported on x86' sources = files( 'idxd_pci.c', 'idxd_vdev.c', + 'ioat_common.c', 'ioat_rawdev.c', 'ioat_rawdev_test.c') deps += ['bus_pci', diff --git a/drivers/raw/ioat/rte_ioat_rawdev_fns.h b/drivers/raw/ioat/rte_ioat_rawdev_fns.h index 0cee6b1b09..db377fbfa7 100644 --- a/drivers/raw/ioat/rte_ioat_rawdev_fns.h +++ b/drivers/raw/ioat/rte_ioat_rawdev_fns.h @@ -39,9 +39,20 @@ struct rte_ioat_generic_hw_desc { /** * @internal - * Structure representing a device instance + * Identify the data path to use. + * Must be first field of rte_ioat_rawdev and rte_idxd_rawdev structs + */ +enum rte_ioat_dev_type { + RTE_IOAT_DEV, + RTE_IDXD_DEV, +}; + +/** + * @internal + * Structure representing an IOAT device instance */ struct rte_ioat_rawdev { + enum rte_ioat_dev_type type; struct rte_rawdev *rawdev; const struct rte_memzone *mz; const struct rte_memzone *desc_mz; @@ -77,6 +88,28 @@ struct rte_ioat_rawdev { #define RTE_IOAT_CHANSTS_HALTED 0x3 #define RTE_IOAT_CHANSTS_ARMED 0x4 +/** + * @internal + * Structure representing an IDXD device instance + */ +struct rte_idxd_rawdev { + enum rte_ioat_dev_type type; + void *portal; /* address to write the batch descriptor */ + + /* counters to track the batches and the individual op handles */ + uint16_t batch_ring_sz; /* size of batch ring */ + uint16_t hdl_ring_sz; /* size of the user hdl ring */ + + uint16_t next_batch; /* where we write descriptor ops */ + uint16_t next_completed; /* batch where we read completions */ + uint16_t next_ret_hdl; /* the next user hdl to return */ + uint16_t last_completed_hdl; /* the last user hdl that has completed */ + uint16_t next_free_hdl; /* where the handle for next op will go */ + + struct rte_idxd_user_hdl *hdl_ring; + struct rte_idxd_desc_batch *batch_ring; +}; + /** * Enqueue a copy operation onto the ioat device */ From patchwork Fri Aug 21 16:29:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 75834 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7C1E0A04AF; Fri, 21 Aug 2020 18:31:43 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 7FC201C129; Fri, 21 Aug 2020 18:30:29 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 2BFDE1C0BE for ; Fri, 21 Aug 2020 18:30:27 +0200 (CEST) IronPort-SDR: WFgCl08+798HQ5bcvng4+8GM4dN5mHszPBXlrnu67NWKDwYZGa28OcMQK09jcN3aNLRSvIasj3 6n42J032cUzA== X-IronPort-AV: E=McAfee;i="6000,8403,9719"; a="173615852" X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="173615852" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Aug 2020 09:30:26 -0700 IronPort-SDR: 83SF7lmLucVDXvV/aeYJzJWDhXd1/aABrWYL57z7cBQvn6uwYQNudoniPdbxpxyKOdEdTD1BWD JZyPT7DUKrtA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="297992824" Received: from silpixa00399126.ir.intel.com ([10.237.222.56]) by orsmga006.jf.intel.com with ESMTP; 21 Aug 2020 09:30:24 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: cheng1.jiang@intel.com, patrick.fu@intel.com, ping.yu@intel.com, kevin.laatz@intel.com, Bruce Richardson Date: Fri, 21 Aug 2020 17:29:35 +0100 Message-Id: <20200821162944.29840-10-bruce.richardson@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200821162944.29840-1-bruce.richardson@intel.com> References: <20200721095140.719297-1-bruce.richardson@intel.com> <20200821162944.29840-1-bruce.richardson@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2 09/18] raw/ioat: create rawdev instances for idxd vdevs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kevin Laatz For each vdev (DSA work queue) instance, create a rawdev instance. Signed-off-by: Kevin Laatz Signed-off-by: Bruce Richardson --- drivers/raw/ioat/idxd_vdev.c | 107 +++++++++++++++++++++++++++++++- drivers/raw/ioat/ioat_private.h | 4 ++ 2 files changed, 110 insertions(+), 1 deletion(-) diff --git a/drivers/raw/ioat/idxd_vdev.c b/drivers/raw/ioat/idxd_vdev.c index 0509fc0842..93c023a6e8 100644 --- a/drivers/raw/ioat/idxd_vdev.c +++ b/drivers/raw/ioat/idxd_vdev.c @@ -2,6 +2,12 @@ * Copyright(c) 2020 Intel Corporation */ +#include +#include +#include +#include + +#include #include #include #include @@ -24,6 +30,35 @@ struct idxd_vdev_args { uint8_t wq_id; }; +static const struct rte_rawdev_ops idxd_vdev_ops = { + .dev_selftest = idxd_rawdev_test, +}; + +static void * +idxd_vdev_mmap_wq(struct idxd_vdev_args *args) +{ + void *addr; + char path[PATH_MAX]; + int fd; + + snprintf(path, sizeof(path), "/dev/dsa/wq%u.%u", + args->device_id, args->wq_id); + fd = open(path, O_RDWR); + if (fd < 0) { + IOAT_PMD_ERR("Failed to open device path"); + return NULL; + } + + addr = mmap(NULL, 0x1000, PROT_WRITE, MAP_SHARED | MAP_POPULATE, fd, 0); + close(fd); + if (addr == MAP_FAILED) { + IOAT_PMD_ERR("Failed to mmap device"); + return NULL; + } + + return addr; +} + static int idxd_rawdev_parse_wq(const char *key __rte_unused, const char *value, void *extra_args) @@ -70,10 +105,34 @@ idxd_vdev_parse_params(struct rte_kvargs *kvlist, struct idxd_vdev_args *args) return -EINVAL; } +static int +idxd_vdev_get_max_batches(struct idxd_vdev_args *args) +{ + char sysfs_path[PATH_MAX]; + FILE *f; + int ret = -1; + + snprintf(sysfs_path, sizeof(sysfs_path), + "/sys/bus/dsa/devices/wq%u.%u/size", + args->device_id, args->wq_id); + f = fopen(sysfs_path, "r"); + if (f == NULL) + return -1; + + fscanf(f, "%d", &ret); + /* if fscanf does not read ret correctly, it will be -1, so no error + * handling is necessary + */ + + fclose(f); + return ret; +} + static int idxd_rawdev_probe_vdev(struct rte_vdev_device *vdev) { struct rte_kvargs *kvlist; + struct idxd_rawdev idxd = {0}; struct idxd_vdev_args vdev_args; const char *name; int ret = 0; @@ -96,13 +155,32 @@ idxd_rawdev_probe_vdev(struct rte_vdev_device *vdev) return -EINVAL; } + idxd.qid = vdev_args.wq_id; + idxd.u.vdev.dsa_id = vdev_args.device_id; + idxd.max_batches = idxd_vdev_get_max_batches(&vdev_args); + + idxd.public.portal = idxd_vdev_mmap_wq(&vdev_args); + if (idxd.public.portal == NULL) { + IOAT_PMD_ERR("WQ mmap failed"); + return -ENOENT; + } + + ret = idxd_rawdev_create(name, &vdev->device, &idxd, &idxd_vdev_ops); + if (ret) { + IOAT_PMD_ERR("Failed to create rawdev %s", name); + return ret; + } + return 0; } static int idxd_rawdev_remove_vdev(struct rte_vdev_device *vdev) { + struct idxd_rawdev *idxd; const char *name; + struct rte_rawdev *rdev; + int ret = 0; name = rte_vdev_device_name(vdev); if (name == NULL) @@ -110,7 +188,34 @@ idxd_rawdev_remove_vdev(struct rte_vdev_device *vdev) IOAT_PMD_INFO("Remove DSA vdev %p", name); - return 0; + rdev = rte_rawdev_pmd_get_named_dev(name); + if (!rdev) { + IOAT_PMD_ERR("Invalid device name (%s)", name); + return -EINVAL; + } + + idxd = rdev->dev_private; + + /* free context and memory */ + if (rdev->dev_private != NULL) { + IOAT_PMD_DEBUG("Freeing device driver memory"); + rdev->dev_private = NULL; + + if (munmap(idxd->public.portal, 0x1000) < 0) { + IOAT_PMD_ERR("Error unmapping portal"); + ret = -errno; + } + + rte_free(idxd->public.batch_ring); + rte_free(idxd->public.hdl_ring); + + rte_memzone_free(idxd->mz); + } + + if (rte_rawdev_pmd_release(rdev)) + IOAT_PMD_ERR("Device cleanup failed"); + + return ret; } struct rte_vdev_driver idxd_rawdev_drv_vdev = { diff --git a/drivers/raw/ioat/ioat_private.h b/drivers/raw/ioat/ioat_private.h index 32c824536d..bd2bef3834 100644 --- a/drivers/raw/ioat/ioat_private.h +++ b/drivers/raw/ioat/ioat_private.h @@ -45,6 +45,10 @@ struct idxd_rawdev { uint16_t max_batches; union { + struct { + unsigned dsa_id; + } vdev; + struct idxd_pci_common *pci; } u; }; From patchwork Fri Aug 21 16:29:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 75835 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id F119BA04AF; Fri, 21 Aug 2020 18:31:54 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 7DA391C131; Fri, 21 Aug 2020 18:30:33 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id F2B1B1C12F for ; Fri, 21 Aug 2020 18:30:30 +0200 (CEST) IronPort-SDR: Kpc6v13rl+2UIUjSJNYU6u/5oZYTvnERTDXSDf1YvbURtx3sJtrbXQbXYCY+JlDtBIc7fqW7dW GVT1Eko6KODA== X-IronPort-AV: E=McAfee;i="6000,8403,9719"; a="173615866" X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="173615866" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Aug 2020 09:30:30 -0700 IronPort-SDR: asjjUn9y6XVlLX4tH6MEAkyk5KhYrEKMaD7oO2fkP2eOf7w8BJZ7VgPdSy5P1j1qoK3mrRuzTl XbiGCZSv/Dhg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="297992851" Received: from silpixa00399126.ir.intel.com ([10.237.222.56]) by orsmga006.jf.intel.com with ESMTP; 21 Aug 2020 09:30:28 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: cheng1.jiang@intel.com, patrick.fu@intel.com, ping.yu@intel.com, kevin.laatz@intel.com, Bruce Richardson Date: Fri, 21 Aug 2020 17:29:36 +0100 Message-Id: <20200821162944.29840-11-bruce.richardson@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200821162944.29840-1-bruce.richardson@intel.com> References: <20200721095140.719297-1-bruce.richardson@intel.com> <20200821162944.29840-1-bruce.richardson@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2 10/18] raw/ioat: add datapath data structures for idxd devices X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add in the relevant data structures for the data path for DSA devices. Also include a device dump function to output the status of each device. Signed-off-by: Bruce Richardson --- drivers/raw/ioat/idxd_pci.c | 3 +- drivers/raw/ioat/idxd_vdev.c | 1 + drivers/raw/ioat/ioat_common.c | 34 +++++++++++ drivers/raw/ioat/ioat_private.h | 2 + drivers/raw/ioat/ioat_rawdev_test.c | 3 +- drivers/raw/ioat/rte_ioat_rawdev_fns.h | 80 ++++++++++++++++++++++++++ 6 files changed, 121 insertions(+), 2 deletions(-) diff --git a/drivers/raw/ioat/idxd_pci.c b/drivers/raw/ioat/idxd_pci.c index 72f4ecebb7..ce238ae04c 100644 --- a/drivers/raw/ioat/idxd_pci.c +++ b/drivers/raw/ioat/idxd_pci.c @@ -52,7 +52,8 @@ idxd_is_wq_enabled(struct idxd_rawdev *idxd) } static const struct rte_rawdev_ops idxd_pci_ops = { - .dev_selftest = idxd_rawdev_test + .dev_selftest = idxd_rawdev_test, + .dump = idxd_dev_dump, }; /* each portal uses 4 x 4k pages */ diff --git a/drivers/raw/ioat/idxd_vdev.c b/drivers/raw/ioat/idxd_vdev.c index 93c023a6e8..0f9aa48e84 100644 --- a/drivers/raw/ioat/idxd_vdev.c +++ b/drivers/raw/ioat/idxd_vdev.c @@ -32,6 +32,7 @@ struct idxd_vdev_args { static const struct rte_rawdev_ops idxd_vdev_ops = { .dev_selftest = idxd_rawdev_test, + .dump = idxd_dev_dump, }; static void * diff --git a/drivers/raw/ioat/ioat_common.c b/drivers/raw/ioat/ioat_common.c index 37a14e514d..fb4f7055de 100644 --- a/drivers/raw/ioat/ioat_common.c +++ b/drivers/raw/ioat/ioat_common.c @@ -7,6 +7,36 @@ #include "ioat_private.h" +int +idxd_dev_dump(struct rte_rawdev *dev, FILE *f) +{ + struct idxd_rawdev *idxd = dev->dev_private; + struct rte_idxd_rawdev *rte_idxd = &idxd->public; + int i; + + fprintf(f, "Raw Device #%d\n", dev->dev_id); + fprintf(f, "Driver: %s\n\n", dev->driver_name); + + fprintf(f, "Portal: %p\n", rte_idxd->portal); + fprintf(f, "Batch Ring size: %u\n", rte_idxd->batch_ring_sz); + fprintf(f, "Comp Handle Ring size: %u\n\n", rte_idxd->hdl_ring_sz); + + fprintf(f, "Next batch: %u\n", rte_idxd->next_batch); + fprintf(f, "Next batch to be completed: %u\n", rte_idxd->next_completed); + for (i = 0; i < rte_idxd->batch_ring_sz; i++) { + struct rte_idxd_desc_batch *b = &rte_idxd->batch_ring[i]; + fprintf(f, "Batch %u @%p: submitted=%u, op_count=%u, hdl_end=%u\n", + i, b, b->submitted, b->op_count, b->hdl_end); + } + + fprintf(f, "\n"); + fprintf(f, "Next free hdl: %u\n", rte_idxd->next_free_hdl); + fprintf(f, "Last completed hdl: %u\n", rte_idxd->last_completed_hdl); + fprintf(f, "Next returned hdl: %u\n", rte_idxd->next_ret_hdl); + + return 0; +} + int idxd_rawdev_create(const char *name, struct rte_device *dev, const struct idxd_rawdev *base_idxd, @@ -18,6 +48,10 @@ idxd_rawdev_create(const char *name, struct rte_device *dev, char mz_name[RTE_MEMZONE_NAMESIZE]; int ret = 0; + RTE_BUILD_BUG_ON(sizeof(struct rte_idxd_hw_desc) != 64); + RTE_BUILD_BUG_ON(offsetof(struct rte_idxd_hw_desc, size) != 32); + RTE_BUILD_BUG_ON(sizeof(struct rte_idxd_completion) != 32); + if (!name) { IOAT_PMD_ERR("Invalid name of the device!"); ret = -EINVAL; diff --git a/drivers/raw/ioat/ioat_private.h b/drivers/raw/ioat/ioat_private.h index bd2bef3834..974eeb0106 100644 --- a/drivers/raw/ioat/ioat_private.h +++ b/drivers/raw/ioat/ioat_private.h @@ -59,4 +59,6 @@ extern int idxd_rawdev_create(const char *name, struct rte_device *dev, extern int idxd_rawdev_test(uint16_t dev_id); +extern int idxd_dev_dump(struct rte_rawdev *dev, FILE *f); + #endif /* _IOAT_PRIVATE_H_ */ diff --git a/drivers/raw/ioat/ioat_rawdev_test.c b/drivers/raw/ioat/ioat_rawdev_test.c index 4f14b3d1bd..082b3091c4 100644 --- a/drivers/raw/ioat/ioat_rawdev_test.c +++ b/drivers/raw/ioat/ioat_rawdev_test.c @@ -271,7 +271,8 @@ ioat_rawdev_test(uint16_t dev_id) } int -idxd_rawdev_test(uint16_t dev_id __rte_unused) +idxd_rawdev_test(uint16_t dev_id) { + rte_rawdev_dump(dev_id, stdout); return 0; } diff --git a/drivers/raw/ioat/rte_ioat_rawdev_fns.h b/drivers/raw/ioat/rte_ioat_rawdev_fns.h index db377fbfa7..d258ad9fd2 100644 --- a/drivers/raw/ioat/rte_ioat_rawdev_fns.h +++ b/drivers/raw/ioat/rte_ioat_rawdev_fns.h @@ -88,6 +88,86 @@ struct rte_ioat_rawdev { #define RTE_IOAT_CHANSTS_HALTED 0x3 #define RTE_IOAT_CHANSTS_ARMED 0x4 +/* + * Defines used in the data path for interacting with hardware. + */ +#define IDXD_CMD_OP_SHIFT 24 +enum rte_idxd_ops { + idxd_op_nop = 0, + idxd_op_batch, + idxd_op_drain, + idxd_op_memmove, + idxd_op_fill +}; + +#define IDXD_FLAG_FENCE (1 << 0) +#define IDXD_FLAG_COMPLETION_ADDR_VALID (1 << 2) +#define IDXD_FLAG_REQUEST_COMPLETION (1 << 3) +#define IDXD_FLAG_CACHE_CONTROL (1 << 8) + +/** + * Hardware descriptor used by DSA hardware, for both bursts and + * for individual operations. + */ +struct rte_idxd_hw_desc { + uint32_t pasid; + uint32_t op_flags; + rte_iova_t completion; + + RTE_STD_C11 + union { + rte_iova_t src; /* source address for copy ops etc. */ + rte_iova_t desc_addr; /* descriptor pointer for batch */ + }; + rte_iova_t dst; + + uint32_t size; /* length of data for op, or batch size */ + + /* 28 bytes of padding here */ +} __rte_aligned(64); + +/** + * Completion record structure written back by DSA + */ +struct rte_idxd_completion { + uint8_t status; + uint8_t result; + /* 16-bits pad here */ + uint32_t completed_size; /* data length, or descriptors for batch */ + + rte_iova_t fault_address; + uint32_t invalid_flags; +} __rte_aligned(32); + +#define BATCH_SIZE 64 + +/** + * Structure used inside the driver for building up and submitting + * a batch of operations to the DSA hardware. + */ +struct rte_idxd_desc_batch { + struct rte_idxd_completion comp; /* the completion record for batch */ + + uint16_t submitted; + uint16_t op_count; + uint16_t hdl_end; + + struct rte_idxd_hw_desc batch_desc; + + /* batches must always have 2 descriptors, so put a null at the start */ + struct rte_idxd_hw_desc null_desc; + struct rte_idxd_hw_desc ops[BATCH_SIZE]; +}; + +/** + * structure used to save the "handles" provided by the user to be + * returned to the user on job completion. + */ +struct rte_idxd_user_hdl { + uint64_t src; + uint64_t dst; +}; + /** * @internal * Structure representing an IDXD device instance From patchwork Fri Aug 21 16:29:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 75836 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6779FA04AF; Fri, 21 Aug 2020 18:32:09 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 17F251C18E; Fri, 21 Aug 2020 18:30:35 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 79D5E1C12F for ; Fri, 21 Aug 2020 18:30:33 +0200 (CEST) IronPort-SDR: LmLrxCqru8JTcGqT/hYim+s5Bzf+NSxzBCeAJHJx0qE5HPhM7J9SRpUx1Oaa/AtYXJz0IET3TW c/r4Dzcb7I/A== X-IronPort-AV: E=McAfee;i="6000,8403,9719"; a="173615882" X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="173615882" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Aug 2020 09:30:33 -0700 IronPort-SDR: GLPnbFhYlVZ4DYf4a5IvTyMEgchBTDU75MPpoLWV45oj4Zua+I7t2On42JAQm0+V8aVoxPN4+Z bjdb/OWGZIQw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="297992872" Received: from silpixa00399126.ir.intel.com ([10.237.222.56]) by orsmga006.jf.intel.com with ESMTP; 21 Aug 2020 09:30:31 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: cheng1.jiang@intel.com, patrick.fu@intel.com, ping.yu@intel.com, kevin.laatz@intel.com, Bruce Richardson Date: Fri, 21 Aug 2020 17:29:37 +0100 Message-Id: <20200821162944.29840-12-bruce.richardson@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200821162944.29840-1-bruce.richardson@intel.com> References: <20200721095140.719297-1-bruce.richardson@intel.com> <20200821162944.29840-1-bruce.richardson@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2 11/18] raw/ioat: add configure function for idxd devices X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add configure function for idxd devices, taking the same parameters as the existing configure function for ioat. The ring_size parameter is used to compute the maximum number of bursts to be supported by the driver, given that the hardware works on individual bursts of descriptors at a time. Signed-off-by: Bruce Richardson --- drivers/raw/ioat/idxd_pci.c | 1 + drivers/raw/ioat/idxd_vdev.c | 1 + drivers/raw/ioat/ioat_common.c | 64 ++++++++++++++++++++++++++ drivers/raw/ioat/ioat_private.h | 3 ++ drivers/raw/ioat/rte_ioat_rawdev_fns.h | 1 + 5 files changed, 70 insertions(+) diff --git a/drivers/raw/ioat/idxd_pci.c b/drivers/raw/ioat/idxd_pci.c index ce238ae04c..98e8668e34 100644 --- a/drivers/raw/ioat/idxd_pci.c +++ b/drivers/raw/ioat/idxd_pci.c @@ -54,6 +54,7 @@ idxd_is_wq_enabled(struct idxd_rawdev *idxd) static const struct rte_rawdev_ops idxd_pci_ops = { .dev_selftest = idxd_rawdev_test, .dump = idxd_dev_dump, + .dev_configure = idxd_dev_configure, }; /* each portal uses 4 x 4k pages */ diff --git a/drivers/raw/ioat/idxd_vdev.c b/drivers/raw/ioat/idxd_vdev.c index 0f9aa48e84..73cb5d938f 100644 --- a/drivers/raw/ioat/idxd_vdev.c +++ b/drivers/raw/ioat/idxd_vdev.c @@ -33,6 +33,7 @@ struct idxd_vdev_args { static const struct rte_rawdev_ops idxd_vdev_ops = { .dev_selftest = idxd_rawdev_test, .dump = idxd_dev_dump, + .dev_configure = idxd_dev_configure, }; static void * diff --git a/drivers/raw/ioat/ioat_common.c b/drivers/raw/ioat/ioat_common.c index fb4f7055de..85b13b0bae 100644 --- a/drivers/raw/ioat/ioat_common.c +++ b/drivers/raw/ioat/ioat_common.c @@ -37,6 +37,70 @@ idxd_dev_dump(struct rte_rawdev *dev, FILE *f) return 0; } +int +idxd_dev_configure(const struct rte_rawdev *dev, + rte_rawdev_obj_t config, size_t config_size) +{ + struct idxd_rawdev *idxd = dev->dev_private; + struct rte_idxd_rawdev *rte_idxd = &idxd->public; + struct rte_ioat_rawdev_config *cfg = config; + uint16_t max_desc = cfg->ring_size; + uint16_t max_batches = max_desc / BATCH_SIZE; + uint16_t i; + + if (config_size != sizeof(*cfg)) + return -EINVAL; + + if (dev->started) { + IOAT_PMD_ERR("%s: Error, device is started.", __func__); + return -EAGAIN; + } + + rte_idxd->hdls_disable = cfg->hdls_disable; + + /* limit the batches to what can be stored in hardware */ + if (max_batches > idxd->max_batches) { + IOAT_PMD_DEBUG("Ring size of %u is too large for this device, need to limit to %u batches of %u", + max_desc, idxd->max_batches, BATCH_SIZE); + max_batches = idxd->max_batches; + max_desc = max_batches * BATCH_SIZE; + } + if (!rte_is_power_of_2(max_desc)) + max_desc = rte_align32pow2(max_desc); + IOAT_PMD_DEBUG("Rawdev %u using %u descriptors in %u batches", + dev->dev_id, max_desc, max_batches); + + /* in case we are reconfiguring a device, free any existing memory */ + rte_free(rte_idxd->batch_ring); + rte_free(rte_idxd->hdl_ring); + + rte_idxd->batch_ring = rte_zmalloc(NULL, + sizeof(*rte_idxd->batch_ring) * max_batches, 0); + if (rte_idxd->batch_ring == NULL) + return -ENOMEM; + + rte_idxd->hdl_ring = rte_zmalloc(NULL, + sizeof(*rte_idxd->hdl_ring) * max_desc, 0); + if (rte_idxd->hdl_ring == NULL) { + rte_free(rte_idxd->batch_ring); + rte_idxd->batch_ring = NULL; + return -ENOMEM; + } + rte_idxd->batch_ring_sz = max_batches; + rte_idxd->hdl_ring_sz = max_desc; + + for (i = 0; i < rte_idxd->batch_ring_sz; i++) { + struct rte_idxd_desc_batch *b = &rte_idxd->batch_ring[i]; + b->batch_desc.completion = rte_mem_virt2iova(&b->comp); + b->batch_desc.desc_addr = rte_mem_virt2iova(&b->null_desc); + b->batch_desc.op_flags = (idxd_op_batch << IDXD_CMD_OP_SHIFT) | + IDXD_FLAG_COMPLETION_ADDR_VALID | + IDXD_FLAG_REQUEST_COMPLETION; + } + + return 0; +} + int idxd_rawdev_create(const char *name, struct rte_device *dev, const struct idxd_rawdev *base_idxd, diff --git a/drivers/raw/ioat/ioat_private.h b/drivers/raw/ioat/ioat_private.h index 974eeb0106..928c9b497c 100644 --- a/drivers/raw/ioat/ioat_private.h +++ b/drivers/raw/ioat/ioat_private.h @@ -57,6 +57,9 @@ extern int idxd_rawdev_create(const char *name, struct rte_device *dev, const struct idxd_rawdev *idxd, const struct rte_rawdev_ops *ops); +extern int idxd_dev_configure(const struct rte_rawdev *dev, + rte_rawdev_obj_t config, size_t config_size); + extern int idxd_rawdev_test(uint16_t dev_id); extern int idxd_dev_dump(struct rte_rawdev *dev, FILE *f); diff --git a/drivers/raw/ioat/rte_ioat_rawdev_fns.h b/drivers/raw/ioat/rte_ioat_rawdev_fns.h index d258ad9fd2..1939437d50 100644 --- a/drivers/raw/ioat/rte_ioat_rawdev_fns.h +++ b/drivers/raw/ioat/rte_ioat_rawdev_fns.h @@ -185,6 +185,7 @@ struct rte_idxd_rawdev { uint16_t next_ret_hdl; /* the next user hdl to return */ uint16_t last_completed_hdl; /* the last user hdl that has completed */ uint16_t next_free_hdl; /* where the handle for next op will go */ + uint16_t hdls_disable; /* disable tracking completion handles */ struct rte_idxd_user_hdl *hdl_ring; struct rte_idxd_desc_batch *batch_ring; From patchwork Fri Aug 21 16:29:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 75837 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id E0B84A04AF; Fri, 21 Aug 2020 18:32:21 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 4BD421C137; Fri, 21 Aug 2020 18:30:38 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 3F5351C198 for ; Fri, 21 Aug 2020 18:30:36 +0200 (CEST) IronPort-SDR: qfSHMi++ssL+7VrmGIXPLM6iYzR1P+XcoQYKV7BqtxzG9YTEObpfPX9i75pyvo0v15D+SyiTv8 Uji/N2rks6cQ== X-IronPort-AV: E=McAfee;i="6000,8403,9719"; a="173615895" X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="173615895" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Aug 2020 09:30:35 -0700 IronPort-SDR: 5y3hpNdygfHWJ/cuMG6fh1U8Kds5vbh4nVBcBa6W9OsKf+aJ5gUbmowda38BPlonSD61i115tJ Afn4uAx8rRtw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="297992905" Received: from silpixa00399126.ir.intel.com ([10.237.222.56]) by orsmga006.jf.intel.com with ESMTP; 21 Aug 2020 09:30:34 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: cheng1.jiang@intel.com, patrick.fu@intel.com, ping.yu@intel.com, kevin.laatz@intel.com, Bruce Richardson Date: Fri, 21 Aug 2020 17:29:38 +0100 Message-Id: <20200821162944.29840-13-bruce.richardson@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200821162944.29840-1-bruce.richardson@intel.com> References: <20200721095140.719297-1-bruce.richardson@intel.com> <20200821162944.29840-1-bruce.richardson@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2 12/18] raw/ioat: add start and stop functions for idxd devices X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add the start and stop functions for DSA hardware devices using the vfio/uio kernel drivers. For vdevs using the idxd kernel driver, the device must be started using sysfs before the device node appears for vdev use - making start/stop functions in the driver unnecessary. Signed-off-by: Bruce Richardson --- drivers/raw/ioat/idxd_pci.c | 50 +++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/drivers/raw/ioat/idxd_pci.c b/drivers/raw/ioat/idxd_pci.c index 98e8668e34..13a0a03211 100644 --- a/drivers/raw/ioat/idxd_pci.c +++ b/drivers/raw/ioat/idxd_pci.c @@ -51,10 +51,60 @@ idxd_is_wq_enabled(struct idxd_rawdev *idxd) return ((state >> WQ_STATE_SHIFT) & WQ_STATE_MASK) == 0x1; } +static void +idxd_pci_dev_stop(struct rte_rawdev *dev) +{ + struct idxd_rawdev *idxd = dev->dev_private; + uint8_t err_code; + + if (!idxd_is_wq_enabled(idxd)) { + IOAT_PMD_ERR("Work queue %d already disabled", idxd->qid); + return; + } + + err_code = idxd_pci_dev_command(idxd, idxd_disable_wq); + if (err_code || idxd_is_wq_enabled(idxd)) { + IOAT_PMD_ERR("Failed disabling work queue %d, error code: %#x", + idxd->qid, err_code); + return; + } + IOAT_PMD_DEBUG("Work queue %d disabled OK", idxd->qid); +} + +static int +idxd_pci_dev_start(struct rte_rawdev *dev) +{ + struct idxd_rawdev *idxd = dev->dev_private; + uint8_t err_code; + + if (idxd_is_wq_enabled(idxd)) { + IOAT_PMD_WARN("WQ %d already enabled", idxd->qid); + return 0; + } + + if (idxd->public.batch_ring == NULL) { + IOAT_PMD_ERR("WQ %d has not been fully configured", idxd->qid); + return -EINVAL; + } + + err_code = idxd_pci_dev_command(idxd, idxd_enable_wq); + if (err_code || !idxd_is_wq_enabled(idxd)) { + IOAT_PMD_ERR("Failed enabling work queue %d, error code: %#x", + idxd->qid, err_code); + return err_code == 0 ? -1 : err_code; + } + + IOAT_PMD_DEBUG("Work queue %d enabled OK", idxd->qid); + + return 0; +} + static const struct rte_rawdev_ops idxd_pci_ops = { .dev_selftest = idxd_rawdev_test, .dump = idxd_dev_dump, .dev_configure = idxd_dev_configure, + .dev_start = idxd_pci_dev_start, + .dev_stop = idxd_pci_dev_stop, }; /* each portal uses 4 x 4k pages */ From patchwork Fri Aug 21 16:29:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 75838 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 220D7A04AF; Fri, 21 Aug 2020 18:32:34 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6EA611C0B6; Fri, 21 Aug 2020 18:30:41 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 139F81C19A for ; Fri, 21 Aug 2020 18:30:38 +0200 (CEST) IronPort-SDR: sbXaPY1mQPW0X8VnwZKAVQVP9wXerV24xpyBafSbJH/pocBTWM/KDmi/c3KhPCUuqKIIn75CVa KPQqvag5eyzA== X-IronPort-AV: E=McAfee;i="6000,8403,9719"; a="173615908" X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="173615908" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Aug 2020 09:30:38 -0700 IronPort-SDR: TuS9mC+BzbU1Te43V/SFBEKugwpvlAqPwKJO23jq3BiqORurEV+s0P3S0KuPmOwJehMgjLy+s4 uq6ivzo8sBrw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="297992929" Received: from silpixa00399126.ir.intel.com ([10.237.222.56]) by orsmga006.jf.intel.com with ESMTP; 21 Aug 2020 09:30:36 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: cheng1.jiang@intel.com, patrick.fu@intel.com, ping.yu@intel.com, kevin.laatz@intel.com, Bruce Richardson Date: Fri, 21 Aug 2020 17:29:39 +0100 Message-Id: <20200821162944.29840-14-bruce.richardson@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200821162944.29840-1-bruce.richardson@intel.com> References: <20200721095140.719297-1-bruce.richardson@intel.com> <20200821162944.29840-1-bruce.richardson@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2 13/18] raw/ioat: add data path for idxd devices X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add support for doing copies using DSA hardware. This is implemented by just switching on the device type field at the start of the inline functions. Since there is no hardware which will have both device types present this branch will always be predictable after the first call, meaning it has little to no perf penalty. Signed-off-by: Bruce Richardson --- drivers/raw/ioat/ioat_common.c | 1 + drivers/raw/ioat/ioat_rawdev.c | 1 + drivers/raw/ioat/rte_ioat_rawdev_fns.h | 164 +++++++++++++++++++++++-- 3 files changed, 157 insertions(+), 9 deletions(-) diff --git a/drivers/raw/ioat/ioat_common.c b/drivers/raw/ioat/ioat_common.c index 85b13b0bae..23a9d71dd3 100644 --- a/drivers/raw/ioat/ioat_common.c +++ b/drivers/raw/ioat/ioat_common.c @@ -146,6 +146,7 @@ idxd_rawdev_create(const char *name, struct rte_device *dev, idxd = rawdev->dev_private; *idxd = *base_idxd; /* copy over the main fields already passed in */ + idxd->public.type = RTE_IDXD_DEV; idxd->rawdev = rawdev; idxd->mz = mz; diff --git a/drivers/raw/ioat/ioat_rawdev.c b/drivers/raw/ioat/ioat_rawdev.c index 20c8b671a6..15133737b9 100644 --- a/drivers/raw/ioat/ioat_rawdev.c +++ b/drivers/raw/ioat/ioat_rawdev.c @@ -253,6 +253,7 @@ ioat_rawdev_create(const char *name, struct rte_pci_device *dev) rawdev->driver_name = dev->device.driver->name; ioat = rawdev->dev_private; + ioat->type = RTE_IOAT_DEV; ioat->rawdev = rawdev; ioat->mz = mz; ioat->regs = dev->mem_resource[0].addr; diff --git a/drivers/raw/ioat/rte_ioat_rawdev_fns.h b/drivers/raw/ioat/rte_ioat_rawdev_fns.h index 1939437d50..19aaaa50c8 100644 --- a/drivers/raw/ioat/rte_ioat_rawdev_fns.h +++ b/drivers/raw/ioat/rte_ioat_rawdev_fns.h @@ -194,8 +194,8 @@ struct rte_idxd_rawdev { /** * Enqueue a copy operation onto the ioat device */ -static inline int -rte_ioat_enqueue_copy(int dev_id, phys_addr_t src, phys_addr_t dst, +static __rte_always_inline int +__ioat_enqueue_copy(int dev_id, phys_addr_t src, phys_addr_t dst, unsigned int length, uintptr_t src_hdl, uintptr_t dst_hdl, int fence) { @@ -233,8 +233,8 @@ rte_ioat_enqueue_copy(int dev_id, phys_addr_t src, phys_addr_t dst, /** * Trigger hardware to begin performing enqueued copy operations */ -static inline void -rte_ioat_do_copies(int dev_id) +static __rte_always_inline void +__ioat_perform_ops(int dev_id) { struct rte_ioat_rawdev *ioat = rte_rawdevs[dev_id].dev_private; ioat->desc_ring[(ioat->next_write - 1) & (ioat->ring_size - 1)].u @@ -248,8 +248,8 @@ rte_ioat_do_copies(int dev_id) * @internal * Returns the index of the last completed operation. */ -static inline int -rte_ioat_get_last_completed(struct rte_ioat_rawdev *ioat, int *error) +static __rte_always_inline int +__ioat_get_last_completed(struct rte_ioat_rawdev *ioat, int *error) { uint64_t status = ioat->status; @@ -263,8 +263,8 @@ rte_ioat_get_last_completed(struct rte_ioat_rawdev *ioat, int *error) /** * Returns details of copy operations that have been completed */ -static inline int -rte_ioat_completed_copies(int dev_id, uint8_t max_copies, +static __rte_always_inline int +__ioat_completed_ops(int dev_id, uint8_t max_copies, uintptr_t *src_hdls, uintptr_t *dst_hdls) { struct rte_ioat_rawdev *ioat = rte_rawdevs[dev_id].dev_private; @@ -274,7 +274,7 @@ rte_ioat_completed_copies(int dev_id, uint8_t max_copies, int error; int i = 0; - end_read = (rte_ioat_get_last_completed(ioat, &error) + 1) & mask; + end_read = (__ioat_get_last_completed(ioat, &error) + 1) & mask; count = (end_read - (read & mask)) & mask; if (error) { @@ -311,4 +311,150 @@ rte_ioat_completed_copies(int dev_id, uint8_t max_copies, return count; } +static __rte_always_inline int +__idxd_enqueue_copy(int dev_id, rte_iova_t src, rte_iova_t dst, + unsigned int length, uintptr_t src_hdl, uintptr_t dst_hdl, + int fence __rte_unused) +{ + struct rte_idxd_rawdev *idxd = rte_rawdevs[dev_id].dev_private; + struct rte_idxd_desc_batch *b = &idxd->batch_ring[idxd->next_batch]; + uint32_t op_flags = (idxd_op_memmove << IDXD_CMD_OP_SHIFT) | + IDXD_FLAG_CACHE_CONTROL; + + /* check for room in the handle ring */ + if (((idxd->next_free_hdl + 1) & (idxd->hdl_ring_sz - 1)) == idxd->next_ret_hdl) { + rte_errno = ENOSPC; + return 0; + } + if (b->op_count >= BATCH_SIZE) { + rte_errno = ENOSPC; + return 0; + } + /* check that we can actually use the current batch */ + if (b->submitted) { + rte_errno = ENOSPC; + return 0; + } + + /* write the descriptor */ + b->ops[b->op_count++] = (struct rte_idxd_hw_desc){ + .op_flags = op_flags, + .src = src, + .dst = dst, + .size = length + }; + + /* store the completion details */ + if (!idxd->hdls_disable) + idxd->hdl_ring[idxd->next_free_hdl] = (struct rte_idxd_user_hdl) { + .src = src_hdl, + .dst = dst_hdl + }; + if (++idxd->next_free_hdl == idxd->hdl_ring_sz) + idxd->next_free_hdl = 0; + + return 1; +} + +static __rte_always_inline void +__idxd_movdir64b(volatile void *dst, const void *src) +{ + asm volatile (".byte 0x66, 0x0f, 0x38, 0xf8, 0x02" + : + : "a" (dst), "d" (src)); +} + +static __rte_always_inline void +__idxd_perform_ops(int dev_id) +{ + struct rte_idxd_rawdev *idxd = rte_rawdevs[dev_id].dev_private; + struct rte_idxd_desc_batch *b = &idxd->batch_ring[idxd->next_batch]; + + if (b->submitted || b->op_count == 0) + return; + b->hdl_end = idxd->next_free_hdl; + b->comp.status = 0; + b->submitted = 1; + b->batch_desc.size = b->op_count + 1; + __idxd_movdir64b(idxd->portal, &b->batch_desc); + + if (++idxd->next_batch == idxd->batch_ring_sz) + idxd->next_batch = 0; +} + +static __rte_always_inline int +__idxd_completed_ops(int dev_id, uint8_t max_ops, + uintptr_t *src_hdls, uintptr_t *dst_hdls) +{ + struct rte_idxd_rawdev *idxd = rte_rawdevs[dev_id].dev_private; + struct rte_idxd_desc_batch *b = &idxd->batch_ring[idxd->next_completed]; + uint16_t h_idx = idxd->next_ret_hdl; + int n = 0; + + while (b->submitted && b->comp.status != 0) { + idxd->last_completed_hdl = b->hdl_end; + b->submitted = 0; + b->op_count = 0; + if (++idxd->next_completed == idxd->batch_ring_sz) + idxd->next_completed = 0; + b = &idxd->batch_ring[idxd->next_completed]; + } + + if (!idxd->hdls_disable) + for (n = 0; n < max_ops && h_idx != idxd->last_completed_hdl; n++) { + src_hdls[n] = idxd->hdl_ring[h_idx].src; + dst_hdls[n] = idxd->hdl_ring[h_idx].dst; + if (++h_idx == idxd->hdl_ring_sz) + h_idx = 0; + } + else + while (h_idx != idxd->last_completed_hdl) { + n++; + if (++h_idx == idxd->hdl_ring_sz) + h_idx = 0; + } + + idxd->next_ret_hdl = h_idx; + + return n; +} + +static inline int +rte_ioat_enqueue_copy(int dev_id, phys_addr_t src, phys_addr_t dst, + unsigned int length, uintptr_t src_hdl, uintptr_t dst_hdl, + int fence) +{ + enum rte_ioat_dev_type *type = rte_rawdevs[dev_id].dev_private; + if (*type == RTE_IDXD_DEV) + return __idxd_enqueue_copy(dev_id, src, dst, length, + src_hdl, dst_hdl, fence); + else + return __ioat_enqueue_copy(dev_id, src, dst, length, + src_hdl, dst_hdl, fence); +} + +static inline void +rte_ioat_do_copies(int dev_id) +{ + enum rte_ioat_dev_type *type = rte_rawdevs[dev_id].dev_private; + if (*type == RTE_IDXD_DEV) + return __idxd_perform_ops(dev_id); + else + return __ioat_perform_ops(dev_id); +} + +static inline int +rte_ioat_completed_copies(int dev_id, uint8_t max_copies, + uintptr_t *src_hdls, uintptr_t *dst_hdls) +{ + enum rte_ioat_dev_type *type = rte_rawdevs[dev_id].dev_private; + if (*type == RTE_IDXD_DEV) + return __idxd_completed_ops(dev_id, max_copies, + src_hdls, dst_hdls); + else + return __ioat_completed_ops(dev_id, max_copies, + src_hdls, dst_hdls); +} + + #endif /* _RTE_IOAT_RAWDEV_FNS_H_ */ From patchwork Fri Aug 21 16:29:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 75839 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id B30BAA04AF; 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21 Aug 2020 09:30:39 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: cheng1.jiang@intel.com, patrick.fu@intel.com, ping.yu@intel.com, kevin.laatz@intel.com, Bruce Richardson Date: Fri, 21 Aug 2020 17:29:40 +0100 Message-Id: <20200821162944.29840-15-bruce.richardson@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200821162944.29840-1-bruce.richardson@intel.com> References: <20200721095140.719297-1-bruce.richardson@intel.com> <20200821162944.29840-1-bruce.richardson@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2 14/18] raw/ioat: add info function for idxd devices X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add the info get function for DSA devices, returning just the ring size info about the device, same as is returned for existing IOAT/CBDMA devices. Signed-off-by: Bruce Richardson --- drivers/raw/ioat/idxd_pci.c | 1 + drivers/raw/ioat/idxd_vdev.c | 1 + drivers/raw/ioat/ioat_common.c | 18 ++++++++++++++++++ drivers/raw/ioat/ioat_private.h | 3 +++ 4 files changed, 23 insertions(+) diff --git a/drivers/raw/ioat/idxd_pci.c b/drivers/raw/ioat/idxd_pci.c index 13a0a03211..1ae20bc04f 100644 --- a/drivers/raw/ioat/idxd_pci.c +++ b/drivers/raw/ioat/idxd_pci.c @@ -105,6 +105,7 @@ static const struct rte_rawdev_ops idxd_pci_ops = { .dev_configure = idxd_dev_configure, .dev_start = idxd_pci_dev_start, .dev_stop = idxd_pci_dev_stop, + .dev_info_get = idxd_dev_info_get, }; /* each portal uses 4 x 4k pages */ diff --git a/drivers/raw/ioat/idxd_vdev.c b/drivers/raw/ioat/idxd_vdev.c index 73cb5d938f..3d6aa31f48 100644 --- a/drivers/raw/ioat/idxd_vdev.c +++ b/drivers/raw/ioat/idxd_vdev.c @@ -34,6 +34,7 @@ static const struct rte_rawdev_ops idxd_vdev_ops = { .dev_selftest = idxd_rawdev_test, .dump = idxd_dev_dump, .dev_configure = idxd_dev_configure, + .dev_info_get = idxd_dev_info_get, }; static void * diff --git a/drivers/raw/ioat/ioat_common.c b/drivers/raw/ioat/ioat_common.c index 23a9d71dd3..4c225762bd 100644 --- a/drivers/raw/ioat/ioat_common.c +++ b/drivers/raw/ioat/ioat_common.c @@ -37,6 +37,24 @@ idxd_dev_dump(struct rte_rawdev *dev, FILE *f) return 0; } +int +idxd_dev_info_get(struct rte_rawdev *dev, rte_rawdev_obj_t dev_info, + size_t info_size) +{ + struct rte_ioat_rawdev_config *cfg = dev_info; + struct idxd_rawdev *idxd = dev->dev_private; + struct rte_idxd_rawdev *rte_idxd = &idxd->public; + + if (info_size != sizeof(*cfg)) + return -EINVAL; + + if (cfg != NULL) { + cfg->ring_size = rte_idxd->hdl_ring_sz; + cfg->hdls_disable = rte_idxd->hdls_disable; + } + return 0; +} + int idxd_dev_configure(const struct rte_rawdev *dev, rte_rawdev_obj_t config, size_t config_size) diff --git a/drivers/raw/ioat/ioat_private.h b/drivers/raw/ioat/ioat_private.h index 928c9b497c..0b17a8646b 100644 --- a/drivers/raw/ioat/ioat_private.h +++ b/drivers/raw/ioat/ioat_private.h @@ -60,6 +60,9 @@ extern int idxd_rawdev_create(const char *name, struct rte_device *dev, extern int idxd_dev_configure(const struct rte_rawdev *dev, rte_rawdev_obj_t config, size_t config_size); +extern int idxd_dev_info_get(struct rte_rawdev *dev, rte_rawdev_obj_t dev_info, + size_t info_size); + extern int idxd_rawdev_test(uint16_t dev_id); extern int idxd_dev_dump(struct rte_rawdev *dev, FILE *f); From patchwork Fri Aug 21 16:29:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 75840 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 552C1A04AF; Fri, 21 Aug 2020 18:32:57 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8F5701C1A4; Fri, 21 Aug 2020 18:30:46 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 692831C1A1 for ; Fri, 21 Aug 2020 18:30:44 +0200 (CEST) IronPort-SDR: pRgM9i1GKjr5qMfKOIdB3P7/44M1ZI8mV8i31wFEMNeuAEck69By5yHQ5dzq3yk5JjVVhG57+J vfB9fO/IYZ6g== X-IronPort-AV: E=McAfee;i="6000,8403,9719"; a="173615938" X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="173615938" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Aug 2020 09:30:43 -0700 IronPort-SDR: nV0x8ptVFLdDreX0SJSeAIJyhJsm9tgdEuXkTrM9igNh/w0jYV4RTnuj/MmZEsJ1+/zgJHM89l AiVcn4nkNo2g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="297992962" Received: from silpixa00399126.ir.intel.com ([10.237.222.56]) by orsmga006.jf.intel.com with ESMTP; 21 Aug 2020 09:30:42 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: cheng1.jiang@intel.com, patrick.fu@intel.com, ping.yu@intel.com, kevin.laatz@intel.com, Bruce Richardson Date: Fri, 21 Aug 2020 17:29:41 +0100 Message-Id: <20200821162944.29840-16-bruce.richardson@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200821162944.29840-1-bruce.richardson@intel.com> References: <20200721095140.719297-1-bruce.richardson@intel.com> <20200821162944.29840-1-bruce.richardson@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2 15/18] raw/ioat: create separate statistics structure X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Rather than having the xstats as fields inside the main driver structure, create a separate structure type for them. As part of the change, when updating the stats functions referring to the stats by the old path, we can simplify them to use the id to directly index into the stats structure, making the code shorter and simpler. Signed-off-by: Bruce Richardson --- drivers/raw/ioat/ioat_rawdev.c | 40 +++++++------------------- drivers/raw/ioat/rte_ioat_rawdev_fns.h | 30 ++++++++++++------- 2 files changed, 29 insertions(+), 41 deletions(-) diff --git a/drivers/raw/ioat/ioat_rawdev.c b/drivers/raw/ioat/ioat_rawdev.c index 15133737b9..064eb839cf 100644 --- a/drivers/raw/ioat/ioat_rawdev.c +++ b/drivers/raw/ioat/ioat_rawdev.c @@ -132,16 +132,14 @@ ioat_xstats_get(const struct rte_rawdev *dev, const unsigned int ids[], uint64_t values[], unsigned int n) { const struct rte_ioat_rawdev *ioat = dev->dev_private; + const uint64_t *stats = (const void *)&ioat->xstats; unsigned int i; for (i = 0; i < n; i++) { - switch (ids[i]) { - case 0: values[i] = ioat->enqueue_failed; break; - case 1: values[i] = ioat->enqueued; break; - case 2: values[i] = ioat->started; break; - case 3: values[i] = ioat->completed; break; - default: values[i] = 0; break; - } + if (ids[i] < sizeof(ioat->xstats)/sizeof(*stats)) + values[i] = stats[ids[i]]; + else + values[i] = 0; } return n; } @@ -167,35 +165,17 @@ static int ioat_xstats_reset(struct rte_rawdev *dev, const uint32_t *ids, uint32_t nb_ids) { struct rte_ioat_rawdev *ioat = dev->dev_private; + uint64_t *stats = (void *)&ioat->xstats; unsigned int i; if (!ids) { - ioat->enqueue_failed = 0; - ioat->enqueued = 0; - ioat->started = 0; - ioat->completed = 0; + memset(&ioat->xstats, 0, sizeof(ioat->xstats)); return 0; } - for (i = 0; i < nb_ids; i++) { - switch (ids[i]) { - case 0: - ioat->enqueue_failed = 0; - break; - case 1: - ioat->enqueued = 0; - break; - case 2: - ioat->started = 0; - break; - case 3: - ioat->completed = 0; - break; - default: - IOAT_PMD_WARN("Invalid xstat id - cannot reset value"); - break; - } - } + for (i = 0; i < nb_ids; i++) + if (ids[i] < sizeof(ioat->xstats)/sizeof(*stats)) + stats[ids[i]] = 0; return 0; } diff --git a/drivers/raw/ioat/rte_ioat_rawdev_fns.h b/drivers/raw/ioat/rte_ioat_rawdev_fns.h index 19aaaa50c8..66e3f1a836 100644 --- a/drivers/raw/ioat/rte_ioat_rawdev_fns.h +++ b/drivers/raw/ioat/rte_ioat_rawdev_fns.h @@ -47,17 +47,31 @@ enum rte_ioat_dev_type { RTE_IDXD_DEV, }; +/** + * @internal + * some statistics for tracking, if added/changed update xstats fns + */ +struct rte_ioat_xstats { + uint64_t enqueue_failed; + uint64_t enqueued; + uint64_t started; + uint64_t completed; +}; + /** * @internal * Structure representing an IOAT device instance */ struct rte_ioat_rawdev { + /* common fields at the top - match those in rte_idxd_rawdev */ enum rte_ioat_dev_type type; + struct rte_ioat_xstats xstats; + struct rte_rawdev *rawdev; const struct rte_memzone *mz; const struct rte_memzone *desc_mz; - volatile uint16_t *doorbell; + volatile uint16_t *doorbell __rte_cache_aligned; phys_addr_t status_addr; phys_addr_t ring_addr; @@ -70,12 +84,6 @@ struct rte_ioat_rawdev { unsigned short next_read; unsigned short next_write; - /* some statistics for tracking, if added/changed update xstats fns*/ - uint64_t enqueue_failed __rte_cache_aligned; - uint64_t enqueued; - uint64_t started; - uint64_t completed; - /* to report completions, the device will write status back here */ volatile uint64_t status __rte_cache_aligned; @@ -207,7 +215,7 @@ __ioat_enqueue_copy(int dev_id, phys_addr_t src, phys_addr_t dst, struct rte_ioat_generic_hw_desc *desc; if (space == 0) { - ioat->enqueue_failed++; + ioat->xstats.enqueue_failed++; return 0; } @@ -226,7 +234,7 @@ __ioat_enqueue_copy(int dev_id, phys_addr_t src, phys_addr_t dst, (int64_t)src_hdl); rte_prefetch0(&ioat->desc_ring[ioat->next_write & mask]); - ioat->enqueued++; + ioat->xstats.enqueued++; return 1; } @@ -241,7 +249,7 @@ __ioat_perform_ops(int dev_id) .control.completion_update = 1; rte_compiler_barrier(); *ioat->doorbell = ioat->next_write; - ioat->started = ioat->enqueued; + ioat->xstats.started = ioat->xstats.enqueued; } /** @@ -307,7 +315,7 @@ __ioat_completed_ops(int dev_id, uint8_t max_copies, end: ioat->next_read = read; - ioat->completed += count; + ioat->xstats.completed += count; return count; } From patchwork Fri Aug 21 16:29:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 75841 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5C3D1A04AF; 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21 Aug 2020 09:30:44 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: cheng1.jiang@intel.com, patrick.fu@intel.com, ping.yu@intel.com, kevin.laatz@intel.com, Bruce Richardson Date: Fri, 21 Aug 2020 17:29:42 +0100 Message-Id: <20200821162944.29840-17-bruce.richardson@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200821162944.29840-1-bruce.richardson@intel.com> References: <20200721095140.719297-1-bruce.richardson@intel.com> <20200821162944.29840-1-bruce.richardson@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2 16/18] raw/ioat: move xstats functions to common file X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The xstats functions can be used by all ioat devices so move them from the ioat_rawdev.c file to ioat_common.c, and add the function prototypes to the internal header file. Signed-off-by: Bruce Richardson --- drivers/raw/ioat/ioat_common.c | 59 +++++++++++++++++++++++++++++++++ drivers/raw/ioat/ioat_private.h | 10 ++++++ drivers/raw/ioat/ioat_rawdev.c | 58 -------------------------------- 3 files changed, 69 insertions(+), 58 deletions(-) diff --git a/drivers/raw/ioat/ioat_common.c b/drivers/raw/ioat/ioat_common.c index 4c225762bd..08ec5a458e 100644 --- a/drivers/raw/ioat/ioat_common.c +++ b/drivers/raw/ioat/ioat_common.c @@ -4,9 +4,68 @@ #include #include +#include #include "ioat_private.h" +static const char * const xstat_names[] = { + "failed_enqueues", "successful_enqueues", + "copies_started", "copies_completed" +}; + +int +ioat_xstats_get(const struct rte_rawdev *dev, const unsigned int ids[], + uint64_t values[], unsigned int n) +{ + const struct rte_ioat_rawdev *ioat = dev->dev_private; + const uint64_t *stats = (const void *)&ioat->xstats; + unsigned int i; + + for (i = 0; i < n; i++) { + if (ids[i] > sizeof(ioat->xstats)/sizeof(*stats)) + values[i] = 0; + else + values[i] = stats[ids[i]]; + } + return n; +} + +int +ioat_xstats_get_names(const struct rte_rawdev *dev, + struct rte_rawdev_xstats_name *names, + unsigned int size) +{ + unsigned int i; + + RTE_SET_USED(dev); + if (size < RTE_DIM(xstat_names)) + return RTE_DIM(xstat_names); + + for (i = 0; i < RTE_DIM(xstat_names); i++) + strlcpy(names[i].name, xstat_names[i], sizeof(names[i])); + + return RTE_DIM(xstat_names); +} + +int +ioat_xstats_reset(struct rte_rawdev *dev, const uint32_t *ids, uint32_t nb_ids) +{ + struct rte_ioat_rawdev *ioat = dev->dev_private; + uint64_t *stats = (void *)&ioat->xstats; + unsigned int i; + + if (!ids) { + memset(&ioat->xstats, 0, sizeof(ioat->xstats)); + return 0; + } + + for (i = 0; i < nb_ids; i++) + if (ids[i] < sizeof(ioat->xstats)/sizeof(*stats)) + stats[ids[i]] = 0; + + return 0; +} + int idxd_dev_dump(struct rte_rawdev *dev, FILE *f) { diff --git a/drivers/raw/ioat/ioat_private.h b/drivers/raw/ioat/ioat_private.h index 0b17a8646b..f4e2982e2b 100644 --- a/drivers/raw/ioat/ioat_private.h +++ b/drivers/raw/ioat/ioat_private.h @@ -53,6 +53,16 @@ struct idxd_rawdev { } u; }; +int ioat_xstats_get(const struct rte_rawdev *dev, const unsigned int ids[], + uint64_t values[], unsigned int n); + +int ioat_xstats_get_names(const struct rte_rawdev *dev, + struct rte_rawdev_xstats_name *names, + unsigned int size); + +int ioat_xstats_reset(struct rte_rawdev *dev, const uint32_t *ids, + uint32_t nb_ids); + extern int idxd_rawdev_create(const char *name, struct rte_device *dev, const struct idxd_rawdev *idxd, const struct rte_rawdev_ops *ops); diff --git a/drivers/raw/ioat/ioat_rawdev.c b/drivers/raw/ioat/ioat_rawdev.c index 064eb839cf..385917db29 100644 --- a/drivers/raw/ioat/ioat_rawdev.c +++ b/drivers/raw/ioat/ioat_rawdev.c @@ -122,64 +122,6 @@ ioat_dev_info_get(struct rte_rawdev *dev, rte_rawdev_obj_t dev_info, return 0; } -static const char * const xstat_names[] = { - "failed_enqueues", "successful_enqueues", - "copies_started", "copies_completed" -}; - -static int -ioat_xstats_get(const struct rte_rawdev *dev, const unsigned int ids[], - uint64_t values[], unsigned int n) -{ - const struct rte_ioat_rawdev *ioat = dev->dev_private; - const uint64_t *stats = (const void *)&ioat->xstats; - unsigned int i; - - for (i = 0; i < n; i++) { - if (ids[i] < sizeof(ioat->xstats)/sizeof(*stats)) - values[i] = stats[ids[i]]; - else - values[i] = 0; - } - return n; -} - -static int -ioat_xstats_get_names(const struct rte_rawdev *dev, - struct rte_rawdev_xstats_name *names, - unsigned int size) -{ - unsigned int i; - - RTE_SET_USED(dev); - if (size < RTE_DIM(xstat_names)) - return RTE_DIM(xstat_names); - - for (i = 0; i < RTE_DIM(xstat_names); i++) - strlcpy(names[i].name, xstat_names[i], sizeof(names[i])); - - return RTE_DIM(xstat_names); -} - -static int -ioat_xstats_reset(struct rte_rawdev *dev, const uint32_t *ids, uint32_t nb_ids) -{ - struct rte_ioat_rawdev *ioat = dev->dev_private; - uint64_t *stats = (void *)&ioat->xstats; - unsigned int i; - - if (!ids) { - memset(&ioat->xstats, 0, sizeof(ioat->xstats)); - return 0; - } - - for (i = 0; i < nb_ids; i++) - if (ids[i] < sizeof(ioat->xstats)/sizeof(*stats)) - stats[ids[i]] = 0; - - return 0; -} - extern int ioat_rawdev_test(uint16_t dev_id); static int From patchwork Fri Aug 21 16:29:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 75842 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 79C5DA04AF; Fri, 21 Aug 2020 18:33:26 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id CA2691C0B7; Fri, 21 Aug 2020 18:30:51 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id D29261C1B6 for ; Fri, 21 Aug 2020 18:30:49 +0200 (CEST) IronPort-SDR: 9rrSl/smJc+YwnvE0xKwGvO21MzHRHVgev1V2PkS88FSc99iMwXwYa00cLI00kfREf8Xtbxbsv VZgQyd4AYOjQ== X-IronPort-AV: E=McAfee;i="6000,8403,9719"; a="173615979" X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="173615979" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Aug 2020 09:30:49 -0700 IronPort-SDR: nNTlLystu8ZESBST3DC0DmDx8siO31oIu1GE8NT533uN1VaZek7skURaV1rl5rWxUtSiMkWv/g 4E4sfY/ixK4Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="297992992" Received: from silpixa00399126.ir.intel.com ([10.237.222.56]) by orsmga006.jf.intel.com with ESMTP; 21 Aug 2020 09:30:47 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: cheng1.jiang@intel.com, patrick.fu@intel.com, ping.yu@intel.com, kevin.laatz@intel.com, Bruce Richardson Date: Fri, 21 Aug 2020 17:29:43 +0100 Message-Id: <20200821162944.29840-18-bruce.richardson@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200821162944.29840-1-bruce.richardson@intel.com> References: <20200721095140.719297-1-bruce.richardson@intel.com> <20200821162944.29840-1-bruce.richardson@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2 17/18] raw/ioat: add xstats tracking for idxd devices X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add update of the relevant stats for the data path functions and point the overall device struct xstats function pointers to the existing ioat functions. At this point, all necessary hooks for supporting the existing unit tests are in place so call them for each device. Signed-off-by: Bruce Richardson --- drivers/raw/ioat/idxd_pci.c | 3 +++ drivers/raw/ioat/idxd_vdev.c | 3 +++ drivers/raw/ioat/ioat_rawdev_test.c | 2 +- drivers/raw/ioat/rte_ioat_rawdev_fns.h | 30 +++++++++++++++----------- 4 files changed, 25 insertions(+), 13 deletions(-) diff --git a/drivers/raw/ioat/idxd_pci.c b/drivers/raw/ioat/idxd_pci.c index 1ae20bc04f..4b97b5b5fd 100644 --- a/drivers/raw/ioat/idxd_pci.c +++ b/drivers/raw/ioat/idxd_pci.c @@ -106,6 +106,9 @@ static const struct rte_rawdev_ops idxd_pci_ops = { .dev_start = idxd_pci_dev_start, .dev_stop = idxd_pci_dev_stop, .dev_info_get = idxd_dev_info_get, + .xstats_get = ioat_xstats_get, + .xstats_get_names = ioat_xstats_get_names, + .xstats_reset = ioat_xstats_reset, }; /* each portal uses 4 x 4k pages */ diff --git a/drivers/raw/ioat/idxd_vdev.c b/drivers/raw/ioat/idxd_vdev.c index 3d6aa31f48..febc5919f4 100644 --- a/drivers/raw/ioat/idxd_vdev.c +++ b/drivers/raw/ioat/idxd_vdev.c @@ -35,6 +35,9 @@ static const struct rte_rawdev_ops idxd_vdev_ops = { .dump = idxd_dev_dump, .dev_configure = idxd_dev_configure, .dev_info_get = idxd_dev_info_get, + .xstats_get = ioat_xstats_get, + .xstats_get_names = ioat_xstats_get_names, + .xstats_reset = ioat_xstats_reset, }; static void * diff --git a/drivers/raw/ioat/ioat_rawdev_test.c b/drivers/raw/ioat/ioat_rawdev_test.c index 082b3091c4..db10178871 100644 --- a/drivers/raw/ioat/ioat_rawdev_test.c +++ b/drivers/raw/ioat/ioat_rawdev_test.c @@ -274,5 +274,5 @@ int idxd_rawdev_test(uint16_t dev_id) { rte_rawdev_dump(dev_id, stdout); - return 0; + return ioat_rawdev_test(dev_id); } diff --git a/drivers/raw/ioat/rte_ioat_rawdev_fns.h b/drivers/raw/ioat/rte_ioat_rawdev_fns.h index 66e3f1a836..db8608fa6b 100644 --- a/drivers/raw/ioat/rte_ioat_rawdev_fns.h +++ b/drivers/raw/ioat/rte_ioat_rawdev_fns.h @@ -182,6 +182,8 @@ struct rte_idxd_user_hdl { */ struct rte_idxd_rawdev { enum rte_ioat_dev_type type; + struct rte_ioat_xstats xstats; + void *portal; /* address to write the batch descriptor */ /* counters to track the batches and the individual op handles */ @@ -330,19 +332,15 @@ __idxd_enqueue_copy(int dev_id, rte_iova_t src, rte_iova_t dst, IDXD_FLAG_CACHE_CONTROL; /* check for room in the handle ring */ - if (((idxd->next_free_hdl + 1) & (idxd->hdl_ring_sz - 1)) == idxd->next_ret_hdl) { - rte_errno = ENOSPC; - return 0; - } - if (b->op_count >= BATCH_SIZE) { - rte_errno = ENOSPC; - return 0; - } + if (((idxd->next_free_hdl + 1) & (idxd->hdl_ring_sz - 1)) == idxd->next_ret_hdl) + goto failed; + + if (b->op_count >= BATCH_SIZE) + goto failed; + /* check that we can actually use the current batch */ - if (b->submitted) { - rte_errno = ENOSPC; - return 0; - } + if (b->submitted) + goto failed; /* write the descriptor */ b->ops[b->op_count++] = (struct rte_idxd_hw_desc){ @@ -361,7 +359,13 @@ __idxd_enqueue_copy(int dev_id, rte_iova_t src, rte_iova_t dst, if (++idxd->next_free_hdl == idxd->hdl_ring_sz) idxd->next_free_hdl = 0; + idxd->xstats.enqueued++; return 1; + +failed: + idxd->xstats.enqueue_failed++; + rte_errno = ENOSPC; + return 0; } static __rte_always_inline void @@ -388,6 +392,7 @@ __idxd_perform_ops(int dev_id) if (++idxd->next_batch == idxd->batch_ring_sz) idxd->next_batch = 0; + idxd->xstats.started = idxd->xstats.enqueued; } static __rte_always_inline int @@ -424,6 +429,7 @@ __idxd_completed_ops(int dev_id, uint8_t max_ops, idxd->next_ret_hdl = h_idx; + idxd->xstats.completed += n; return n; } From patchwork Fri Aug 21 16:29:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Richardson X-Patchwork-Id: 75843 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 378DBA04AF; Fri, 21 Aug 2020 18:33:38 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id E098C1C0B0; Fri, 21 Aug 2020 18:30:54 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id E35A71C1B7 for ; Fri, 21 Aug 2020 18:30:52 +0200 (CEST) IronPort-SDR: RtPvrjZ9EJ6j/ojhi/YttNyb7k7S+aW3em3XV48u1iP1xttBgCXbGKMB8U5conAtXb1Ly925fm 7QYZU14YKUdQ== X-IronPort-AV: E=McAfee;i="6000,8403,9719"; a="173616007" X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="173616007" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Aug 2020 09:30:52 -0700 IronPort-SDR: 30xKWjXypMg5eJMvG8K+JJL995PYQmimPFSahODaR2VcHWTRcknwnUe05Lzd5sS+6s18yz0REJ ejjmsaTtjr9g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,337,1592895600"; d="scan'208";a="297993010" Received: from silpixa00399126.ir.intel.com ([10.237.222.56]) by orsmga006.jf.intel.com with ESMTP; 21 Aug 2020 09:30:50 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: cheng1.jiang@intel.com, patrick.fu@intel.com, ping.yu@intel.com, kevin.laatz@intel.com, Bruce Richardson Date: Fri, 21 Aug 2020 17:29:44 +0100 Message-Id: <20200821162944.29840-19-bruce.richardson@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200821162944.29840-1-bruce.richardson@intel.com> References: <20200721095140.719297-1-bruce.richardson@intel.com> <20200821162944.29840-1-bruce.richardson@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v2 18/18] raw/ioat: clean up use of common test function X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Now that all devices can pass the same set of unit tests, elminate the temporary idxd_rawdev_test function and move the prototype for ioat_rawdev_test to the proper internal header file, to be used by all device instances. Signed-off-by: Bruce Richardson --- drivers/raw/ioat/idxd_pci.c | 2 +- drivers/raw/ioat/idxd_vdev.c | 2 +- drivers/raw/ioat/ioat_private.h | 4 ++-- drivers/raw/ioat/ioat_rawdev.c | 2 -- drivers/raw/ioat/ioat_rawdev_test.c | 7 ------- 5 files changed, 4 insertions(+), 13 deletions(-) diff --git a/drivers/raw/ioat/idxd_pci.c b/drivers/raw/ioat/idxd_pci.c index 4b97b5b5fd..926ca39ca8 100644 --- a/drivers/raw/ioat/idxd_pci.c +++ b/drivers/raw/ioat/idxd_pci.c @@ -100,7 +100,7 @@ idxd_pci_dev_start(struct rte_rawdev *dev) } static const struct rte_rawdev_ops idxd_pci_ops = { - .dev_selftest = idxd_rawdev_test, + .dev_selftest = ioat_rawdev_test, .dump = idxd_dev_dump, .dev_configure = idxd_dev_configure, .dev_start = idxd_pci_dev_start, diff --git a/drivers/raw/ioat/idxd_vdev.c b/drivers/raw/ioat/idxd_vdev.c index febc5919f4..5529760aa2 100644 --- a/drivers/raw/ioat/idxd_vdev.c +++ b/drivers/raw/ioat/idxd_vdev.c @@ -31,7 +31,7 @@ struct idxd_vdev_args { }; static const struct rte_rawdev_ops idxd_vdev_ops = { - .dev_selftest = idxd_rawdev_test, + .dev_selftest = ioat_rawdev_test, .dump = idxd_dev_dump, .dev_configure = idxd_dev_configure, .dev_info_get = idxd_dev_info_get, diff --git a/drivers/raw/ioat/ioat_private.h b/drivers/raw/ioat/ioat_private.h index f4e2982e2b..2925483ffb 100644 --- a/drivers/raw/ioat/ioat_private.h +++ b/drivers/raw/ioat/ioat_private.h @@ -63,6 +63,8 @@ int ioat_xstats_get_names(const struct rte_rawdev *dev, int ioat_xstats_reset(struct rte_rawdev *dev, const uint32_t *ids, uint32_t nb_ids); +extern int ioat_rawdev_test(uint16_t dev_id); + extern int idxd_rawdev_create(const char *name, struct rte_device *dev, const struct idxd_rawdev *idxd, const struct rte_rawdev_ops *ops); @@ -73,8 +75,6 @@ extern int idxd_dev_configure(const struct rte_rawdev *dev, extern int idxd_dev_info_get(struct rte_rawdev *dev, rte_rawdev_obj_t dev_info, size_t info_size); -extern int idxd_rawdev_test(uint16_t dev_id); - extern int idxd_dev_dump(struct rte_rawdev *dev, FILE *f); #endif /* _IOAT_PRIVATE_H_ */ diff --git a/drivers/raw/ioat/ioat_rawdev.c b/drivers/raw/ioat/ioat_rawdev.c index 385917db29..06af235f96 100644 --- a/drivers/raw/ioat/ioat_rawdev.c +++ b/drivers/raw/ioat/ioat_rawdev.c @@ -122,8 +122,6 @@ ioat_dev_info_get(struct rte_rawdev *dev, rte_rawdev_obj_t dev_info, return 0; } -extern int ioat_rawdev_test(uint16_t dev_id); - static int ioat_rawdev_create(const char *name, struct rte_pci_device *dev) { diff --git a/drivers/raw/ioat/ioat_rawdev_test.c b/drivers/raw/ioat/ioat_rawdev_test.c index db10178871..534b07b124 100644 --- a/drivers/raw/ioat/ioat_rawdev_test.c +++ b/drivers/raw/ioat/ioat_rawdev_test.c @@ -269,10 +269,3 @@ ioat_rawdev_test(uint16_t dev_id) free(ids); return -1; } - -int -idxd_rawdev_test(uint16_t dev_id) -{ - rte_rawdev_dump(dev_id, stdout); - return ioat_rawdev_test(dev_id); -}