From patchwork Tue Sep 4 13:59:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Duszynski X-Patchwork-Id: 44253 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5E43F2BF3; Tue, 4 Sep 2018 16:00:02 +0200 (CEST) Received: from mail-lj1-f194.google.com (mail-lj1-f194.google.com [209.85.208.194]) by dpdk.org (Postfix) with ESMTP id 55E505A for ; Tue, 4 Sep 2018 15:59:59 +0200 (CEST) Received: by mail-lj1-f194.google.com with SMTP id m84-v6so3226143lje.10 for ; Tue, 04 Sep 2018 06:59:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=op1YxBqCAdSW2p+8w83gz1Hfg/LQ8C5ITleVbDPp2ok=; b=q2bqhD+aB486PDiaG2jWZr5L3dKVIn7opYgIHvNoT/zci39pQ0BszGU4qAZYtejWj6 7cBPWDStMiUfjkVeG2hbVM+TnNBSEY59fG5uEKARu4Fp+FTciCn1qBXIe6DWKx2LggxQ l14WAMeYOPJ0PdMsHu6E97zKNQVmsR/3zrr/WReRqLSD1c3M1iP7IJEbCxQfmhCIzdoX JLaB2e2e9+shN+GWWbkreQsMaSALDXNRC6IP/xnq7v7PjCRPMv+D/BXhMgTI9Gs69ORn 6gOb90FncVI1p3ADJyh/rEBUgqeWNH7U9W8p7gQs6e3w/y0QKZWPXBBF5us9FStylX22 4YNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=op1YxBqCAdSW2p+8w83gz1Hfg/LQ8C5ITleVbDPp2ok=; b=JXqwpy9XrXEwjEw5ylBInX+mjKrOWOYp4RwQuZcBKa3sw2qXtX6PLNl+qTNcKz+DbH jDv1t2at/oQyJRpP6eLXyMISZtJWZZCZpsuKtPnDAsPLO7thDBaNFUvbFcPMNUsKBo2k X4IlMbgcjpn+M09xqKr7sutcJfVqJSyI8qA0JoskW0fqzcpn18yHj1xKcGkiCUasVxh3 5+oDTXHZO/D9jREgBwbcr+W3OYYfRX11QrUzuKF+GCOrK7ZcGsh4mHRSu/kJi3GHHmxo GF9PMVAdq2WH2hgL9hDNkifKnDxpkg34yvwjwLjdohXvmLasZLGA6x3/CBjZpYKX1mqO rJXA== X-Gm-Message-State: APzg51DWQQaExUaRCGrBJCraeoN5fv890qT92S3N2ZOaWHNlS5KdAerP Q9GbaUV7WRcDohzHY7V9s1SWMsjWsex1Ig== X-Google-Smtp-Source: ANB0VdagANJx0tlZo5YHHc4yvmrZU3JPMq59XFom1uwXN5Sv70LzO9aTRRTo+LPlh6ysM1ogqonrKQ== X-Received: by 2002:a2e:658a:: with SMTP id e10-v6mr18516636ljf.99.1536069598743; Tue, 04 Sep 2018 06:59:58 -0700 (PDT) Received: from sh.semihalf.local (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id c14-v6sm4026309lfi.23.2018.09.04.06.59.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 04 Sep 2018 06:59:57 -0700 (PDT) From: Tomasz Duszynski To: dev@dpdk.org Cc: nsamsono@marvell.com, mw@semihalf.com, Dmitri Epshtein , Tomasz Duszynski Date: Tue, 4 Sep 2018 15:59:48 +0200 Message-Id: <1536069590-2675-2-git-send-email-tdu@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1536069590-2675-1-git-send-email-tdu@semihalf.com> References: <1536069590-2675-1-git-send-email-tdu@semihalf.com> Subject: [dpdk-dev] [PATCH 1/3] doc: update mvsam documentation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Dmitri Epshtein Update mvsam documentation. Signed-off-by: Dmitri Epshtein Signed-off-by: Tomasz Duszynski Signed-off-by: Natalie Samsonov --- doc/guides/cryptodevs/features/mvsam.ini | 10 +++ doc/guides/cryptodevs/mvsam.rst | 147 ++++++++++--------------------- 2 files changed, 57 insertions(+), 100 deletions(-) diff --git a/doc/guides/cryptodevs/features/mvsam.ini b/doc/guides/cryptodevs/features/mvsam.ini index b7c105a..dd17a4c 100644 --- a/doc/guides/cryptodevs/features/mvsam.ini +++ b/doc/guides/cryptodevs/features/mvsam.ini @@ -5,17 +5,22 @@ [Features] Symmetric crypto = Y Sym operation chaining = Y +HW Accelerated = Y ; ; Supported crypto algorithms of a default crypto driver. ; [Cipher] +NULL = Y AES CBC (128) = Y AES CBC (192) = Y AES CBC (256) = Y AES CTR (128) = Y AES CTR (192) = Y AES CTR (256) = Y +AES ECB (128) = Y +AES ECB (192) = Y +AES ECB (256) = Y 3DES CBC = Y 3DES CTR = Y @@ -23,10 +28,13 @@ AES CTR (256) = Y ; Supported authentication algorithms of a default crypto driver. ; [Auth] +NULL = Y MD5 = Y MD5 HMAC = Y SHA1 = Y SHA1 HMAC = Y +SHA224 = Y +SHA224 HMAC = Y SHA256 = Y SHA256 HMAC = Y SHA384 = Y @@ -40,3 +48,5 @@ AES GMAC = Y ; [AEAD] AES GCM (128) = Y +AES GCM (192) = Y +AES GCM (256) = Y diff --git a/doc/guides/cryptodevs/mvsam.rst b/doc/guides/cryptodevs/mvsam.rst index fd418c2..7acae19 100644 --- a/doc/guides/cryptodevs/mvsam.rst +++ b/doc/guides/cryptodevs/mvsam.rst @@ -37,32 +37,50 @@ support by utilizing MUSDK library, which provides cryptographic operations acceleration by using Security Acceleration Engine (EIP197) directly from user-space with minimum overhead and high performance. +Detailed information about SoCs that use MVSAM crypto driver can be obtained here: + +* https://www.marvell.com/embedded-processors/armada-70xx/ +* https://www.marvell.com/embedded-processors/armada-80xx/ +* https://www.marvell.com/embedded-processors/armada-3700/ + + Features -------- MVSAM CRYPTO PMD has support for: -* Symmetric crypto -* Sym operation chaining -* AES CBC (128) -* AES CBC (192) -* AES CBC (256) -* AES CTR (128) -* AES CTR (192) -* AES CTR (256) -* 3DES CBC -* 3DES CTR -* MD5 -* MD5 HMAC -* SHA1 -* SHA1 HMAC -* SHA256 -* SHA256 HMAC -* SHA384 -* SHA384 HMAC -* SHA512 -* SHA512 HMAC -* AES GCM (128) +Cipher algorithms: + +* ``RTE_CRYPTO_CIPHER_NULL`` +* ``RTE_CRYPTO_CIPHER_AES_CBC`` +* ``RTE_CRYPTO_CIPHER_AES_CTR`` +* ``RTE_CRYPTO_CIPHER_AES_ECB`` +* ``RTE_CRYPTO_CIPHER_3DES_CBC`` +* ``RTE_CRYPTO_CIPHER_3DES_CTR`` +* ``RTE_CRYPTO_CIPHER_3DES_ECB`` + +Hash algorithms: + +* ``RTE_CRYPTO_AUTH_NULL`` +* ``RTE_CRYPTO_AUTH_MD5`` +* ``RTE_CRYPTO_AUTH_MD5_HMAC`` +* ``RTE_CRYPTO_AUTH_SHA1`` +* ``RTE_CRYPTO_AUTH_SHA1_HMAC`` +* ``RTE_CRYPTO_AUTH_SHA224`` +* ``RTE_CRYPTO_AUTH_SHA224_HMAC`` +* ``RTE_CRYPTO_AUTH_SHA256`` +* ``RTE_CRYPTO_AUTH_SHA256_HMAC`` +* ``RTE_CRYPTO_AUTH_SHA384`` +* ``RTE_CRYPTO_AUTH_SHA384_HMAC`` +* ``RTE_CRYPTO_AUTH_SHA512`` +* ``RTE_CRYPTO_AUTH_SHA512_HMAC`` +* ``RTE_CRYPTO_AUTH_AES_GMAC`` + +AEAD algorithms: + +* ``RTE_CRYPTO_AEAD_AES_GCM`` + +For supported feature flags please consult :doc:`overview`. Limitations ----------- @@ -77,25 +95,18 @@ MVSAM CRYPTO PMD driver compilation is disabled by default due to external depen Currently there are two driver specific compilation options in ``config/common_base`` available: -- ``CONFIG_RTE_LIBRTE_MVSAM_CRYPTO`` (default ``n``) +- ``CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO`` (default: ``n``) Toggle compilation of the librte_pmd_mvsam driver. -- ``CONFIG_RTE_LIBRTE_MVSAM_CRYPTO_DEBUG`` (default ``n``) - - Toggle display of debugging messages. - -For a list of prerequisites please refer to `Prerequisites` section in -:ref:`MVPP2 Poll Mode Driver ` guide. - MVSAM CRYPTO PMD requires MUSDK built with EIP197 support thus following extra option must be passed to the library configuration script: .. code-block:: console - --enable-sam + --enable-sam [--enable-sam-statistics] [--enable-sam-debug] -For `crypto_safexcel.ko` module build instructions please refer +For instructions how to build required kernel modules please refer to `doc/musdk_get_started.txt`. Initialization @@ -106,17 +117,15 @@ loaded: .. code-block:: console - insmod musdk_uio.ko - insmod mvpp2x_sysfs.ko - insmod mv_pp_uio.ko + insmod musdk_cma.ko + insmod crypto_safexcel.ko rings=0,0 insmod mv_sam_uio.ko - insmod crypto_safexcel.ko The following parameters (all optional) are exported by the driver: -* max_nb_queue_pairs: maximum number of queue pairs in the device (8 by default). -* max_nb_sessions: maximum number of sessions that can be created (2048 by default). -* socket_id: socket on which to allocate the device resources on. +- ``max_nb_queue_pairs``: maximum number of queue pairs in the device (default: 8 - A8K, 4 - A7K/A3K). +- ``max_nb_sessions``: maximum number of sessions that can be created (default: 2048). +- ``socket_id``: socket on which to allocate the device resources on. l2fwd-crypto example application can be used to verify MVSAM CRYPTO PMD operation: @@ -129,65 +138,3 @@ operation: --auth_op GENERATE --auth_algo sha1-hmac \ --auth_key 10:11:12:13:14:15:16:17:18:19:1a:1b:1c:1d:1e:1f -Example output: - -.. code-block:: console - - [...] - AAD: at [0x7f253ceb80], len= - P ID 0 configuration ---- - Port mode : KR - MAC status : disabled - Link status : link up - Port speed : 10G - Port duplex : full - Port: Egress enable tx_port_num=16 qmap=0x1 - PORT: Port0 - link - P ID 0 configuration ---- - Port mode : KR - MAC status : disabled - Link status : link down - Port speed : 10G - Port duplex : full - Port: Egress enable tx_port_num=16 qmap=0x1 - Port 0, MAC address: 00:50:43:02:21:20 - - - Checking link statusdone - Port 0 Link Up - speed 0 Mbps - full-duplex - Lcore 0: RX port 0 - Allocated session pool on socket 0 - eip197: 0:0 registers: paddr: 0xf2880000, vaddr: 0x0x7f56a80000 - DMA buffer (131136 bytes) for CDR #0 allocated: paddr = 0xb0585e00, vaddr = 0x7f09384e00 - DMA buffer (131136 bytes) for RDR #0 allocated: paddr = 0xb05a5f00, vaddr = 0x7f093a4f00 - DMA buffers allocated for 2049 operations. Tokens - 256 bytes - Lcore 0: cryptodev 0 - L2FWD: lcore 1 has nothing to do - L2FWD: lcore 2 has nothing to do - L2FWD: lcore 3 has nothing to do - L2FWD: entering main loop on lcore 0 - L2FWD: -- lcoreid=0 portid=0 - L2FWD: -- lcoreid=0 cryptoid=0 - Options:- - nportmask: ffffffff - ports per lcore: 1 - refresh period : 10000 - single lcore mode: disabled - stats_printing: enabled - sessionless crypto: disabled - - Crypto chain: Input --> Encrypt --> Auth generate --> Output - - ---- Cipher information --- - Algorithm: aes-cbc - Cipher key: at [0x7f56db4e80], len=16 - 00000000: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F | ................ - IV: at [0x7f56db4b80], len=16 - 00000000: 20 F0 63 0E 45 EB 2D 84 72 D4 13 6E 36 B5 AF FE | .c.E.-.r..n6... - - ---- Authentication information --- - Algorithm: sha1-hmac - Auth key: at [0x7f56db4d80], len=16 - 00000000: 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F | ................ - IV: at [0x7f56db4a80], len=0 - AAD: at [0x7f253ceb80], len= From patchwork Tue Sep 4 13:59:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Duszynski X-Patchwork-Id: 44254 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6B3DA326C; Tue, 4 Sep 2018 16:00:04 +0200 (CEST) Received: from mail-lj1-f196.google.com (mail-lj1-f196.google.com [209.85.208.196]) by dpdk.org (Postfix) with ESMTP id 6E3ED29CB for ; Tue, 4 Sep 2018 16:00:00 +0200 (CEST) Received: by mail-lj1-f196.google.com with SMTP id f1-v6so3225778ljc.9 for ; Tue, 04 Sep 2018 07:00:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=bg833EY5qoEEgl5iA4qJy7YiuntbgQk7CT6tWnVf0wc=; b=IqRZtVnydn0+Q1IeWpSv6PmOniPJAFZ8Lucj+8oiJBf1AXijZSsZ2Ybxezu3C2zJob mMAp7vYosP+6YEBQooTkizQK6GXlA2jmbp1+5p3rPz+WEM/Ia2mB6w69NH+8NxBIAg1b 1UOpbrA13u2saJQf87ywCmEuOowF3pXnQcKRESRR9Tops42W80DHdVEHpDQLXemRq1xK 77UhuUBsIpxdNyT59w8FrXQn7jou56QMQ68AXUPufId8IhN81TmGCvCNcIPC20aojWO9 0M28N5CM9U3TwGEeCzPKXuaUXy1HYkrI4jpXL9HFPOMyAzYk1r7jCcgXdhByE40htPwr +nfw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=bg833EY5qoEEgl5iA4qJy7YiuntbgQk7CT6tWnVf0wc=; b=jM7jSnza/kd4hmnHM5hi1nhrko/axIp6hXy4h3gGoPnmFbvcuVT8cfveHMgOrk31UI AGnFtWBBIFIf5up5LiyIFqmYoVKi/BUjpYvVV6ftQZdkpDJSaF5lQRNzUDibYQhxC0+T ZuKrn6dS51blwASIWcb7kBK5IJ+OSgHbYbNv6YR+Coj1BHY94XZPgL5g9XP3b34THvp1 LlMjg0gS7GvnqmlooFPNhW0F04QscGoAHSvggVWZSoIpJTiAIAWqKExLIiZrJUU/LG+V Edy46I2cJjGFnXARL95b9pbQC/XSqDyGRl4tNHVG2+dPVKGdM/qOHIPvbI3rI8BW8B7U cwMQ== X-Gm-Message-State: APzg51BmDGobAJwbqB5gmImGT8IOHNS4OKvHB/CewFT2jdkXOdUzr2Q5 8KC+Ud+MTkyGxn7Et3bOa1lEjQdvJ4dDCw== X-Google-Smtp-Source: ANB0VdbxnQKTcrFqxPGxrphNW22Gjotp1p/8G+3U/8owobujCQ4wyfjjWkE9H3hxF1dtokhr0DHhfA== X-Received: by 2002:a2e:9bc9:: with SMTP id w9-v6mr1906459ljj.33.1536069599838; Tue, 04 Sep 2018 06:59:59 -0700 (PDT) Received: from sh.semihalf.local (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id c14-v6sm4026309lfi.23.2018.09.04.06.59.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 04 Sep 2018 06:59:59 -0700 (PDT) From: Tomasz Duszynski To: dev@dpdk.org Cc: nsamsono@marvell.com, mw@semihalf.com, Tomasz Duszynski Date: Tue, 4 Sep 2018 15:59:49 +0200 Message-Id: <1536069590-2675-3-git-send-email-tdu@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1536069590-2675-1-git-send-email-tdu@semihalf.com> References: <1536069590-2675-1-git-send-email-tdu@semihalf.com> Subject: [dpdk-dev] [PATCH 2/3] crypto/mvsam: update features list X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add following features to the device's features list and update documentation accordingly: * OOP SGL in LB out * OOP LB in LB out Signed-off-by: Tomasz Duszynski --- doc/guides/cryptodevs/features/mvsam.ini | 2 ++ drivers/crypto/mvsam/rte_mrvl_pmd.c | 4 +++- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/doc/guides/cryptodevs/features/mvsam.ini b/doc/guides/cryptodevs/features/mvsam.ini index dd17a4c..0cc90a5 100644 --- a/doc/guides/cryptodevs/features/mvsam.ini +++ b/doc/guides/cryptodevs/features/mvsam.ini @@ -6,6 +6,8 @@ Symmetric crypto = Y Sym operation chaining = Y HW Accelerated = Y +OOP SGL In LB Out = Y +OOP LB In LB Out = Y ; ; Supported crypto algorithms of a default crypto driver. diff --git a/drivers/crypto/mvsam/rte_mrvl_pmd.c b/drivers/crypto/mvsam/rte_mrvl_pmd.c index 73eff75..21c3a95 100644 --- a/drivers/crypto/mvsam/rte_mrvl_pmd.c +++ b/drivers/crypto/mvsam/rte_mrvl_pmd.c @@ -729,7 +729,9 @@ cryptodev_mrvl_crypto_create(const char *name, dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO | RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING | - RTE_CRYPTODEV_FF_HW_ACCELERATED; + RTE_CRYPTODEV_FF_HW_ACCELERATED | + RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT | + RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT; /* Set vector instructions mode supported */ internals = dev->data->dev_private; From patchwork Tue Sep 4 13:59:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Duszynski X-Patchwork-Id: 44255 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id BAB4D4C8D; Tue, 4 Sep 2018 16:00:05 +0200 (CEST) Received: from mail-lj1-f196.google.com (mail-lj1-f196.google.com [209.85.208.196]) by dpdk.org (Postfix) with ESMTP id 718C32BA1 for ; Tue, 4 Sep 2018 16:00:01 +0200 (CEST) Received: by mail-lj1-f196.google.com with SMTP id s12-v6so3268451ljj.0 for ; Tue, 04 Sep 2018 07:00:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=+jqmuA0h/l9ZBHDPyETeMyA2a4uJje0EETrectZZVws=; b=wa6eN2YRZuwkrY5k6WJVvOg8frbO7AClW8e75qqvMlLHWWVSA/cFP6xjJTnozp35Om Mc/sknkrXaANyztUOdlDaivpZQp1I3gQGy5Bi1czC3Ag8sc+a0yjZUvDN0KVUXrProJQ jXpXkbyDrbxPZWEHiNlbiCY01ez4udHbYW1MnkFm0+0He/O0UVRfdHs9iHxD8HyUCtez WNst7j4Ji3UyskOpAxoOgshHOy/dlvt8l4dGkvU0Ro0SMVeKuUW9nnBCS8ayTU9uMX2L fTfdXrqFn/rhop9Vya8Vbockkah+0EymWIDqObxZ89GLIlcgeI0CB5yBT4NtWECb93Ut PWeA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+jqmuA0h/l9ZBHDPyETeMyA2a4uJje0EETrectZZVws=; b=FXU6ZY9S4zSuHJ+QBQoAlhtKI/GuByo2+blm+cgsHzdlqozr3wUEj4PSfzoBhIUG6P knnxbxMc7HGviWfDLf1DdsIE3ZYCHNc+GCNqJ3erK4TZA+xMWIQclUSktug7HJdD1H2b 9BgLzgNjPbbtpaK9AgIAv1Wi6XCDl8inPDuAM0J5rCFu7kWbLTIF8iG2zAFLR1WWCDfe aSqQ26dE1AeGrrIwfyr0Chmg/GWT7ep2htgwBSRqvBf/qH+IAgAJu5M+hSvKci4KRFO6 qLdiTTvt4dEIY/GGijE5EDYO/1dmNHNmlTy71AYs0k8B2Ye70iflg3YU0umUFOMYMpe3 VhWQ== X-Gm-Message-State: APzg51ATk4uaf+9ngWnnNNxqgIZ/hBR68NwRqed8xO5799aoiPzdijrn dqY0jYF4WVlcw8rHVBEyyCGIHnoInZARTg== X-Google-Smtp-Source: ANB0VdbdT+SLMzas66ueZZdp7mAT3bpOcYQIlzUlt/70YRy/s3vdUlgEt2956dT/miIAYfhFbMjQGw== X-Received: by 2002:a2e:6c17:: with SMTP id h23-v6mr19944776ljc.81.1536069600941; Tue, 04 Sep 2018 07:00:00 -0700 (PDT) Received: from sh.semihalf.local (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id c14-v6sm4026309lfi.23.2018.09.04.06.59.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 04 Sep 2018 07:00:00 -0700 (PDT) From: Tomasz Duszynski To: dev@dpdk.org Cc: nsamsono@marvell.com, mw@semihalf.com, Dmitri Epshtein Date: Tue, 4 Sep 2018 15:59:50 +0200 Message-Id: <1536069590-2675-4-git-send-email-tdu@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1536069590-2675-1-git-send-email-tdu@semihalf.com> References: <1536069590-2675-1-git-send-email-tdu@semihalf.com> Subject: [dpdk-dev] [PATCH 3/3] crypto/mvsam: get number of CIOs dynamically X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Dmitri Epshtein MUSDK 18.09 introduced API for getting CIOs number dynamically. Use that instead of predefined constant. Signed-off-by: Dmitri Epshtein Reviewed-by: Natalie Samsonov Tested-by: Natalie Samsonov --- drivers/crypto/mvsam/rte_mrvl_pmd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/mvsam/rte_mrvl_pmd.c b/drivers/crypto/mvsam/rte_mrvl_pmd.c index 21c3a95..9a85fd9 100644 --- a/drivers/crypto/mvsam/rte_mrvl_pmd.c +++ b/drivers/crypto/mvsam/rte_mrvl_pmd.c @@ -866,7 +866,7 @@ cryptodev_mrvl_crypto_init(struct rte_vdev_device *vdev) .private_data_size = sizeof(struct mrvl_crypto_private), .max_nb_queue_pairs = - sam_get_num_inst() * SAM_HW_RING_NUM, + sam_get_num_inst() * sam_get_num_cios(0), .socket_id = rte_socket_id() }, .max_nb_sessions = MRVL_PMD_DEFAULT_MAX_NB_SESSIONS