From patchwork Wed Jul 15 19:53:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chenmin Sun X-Patchwork-Id: 74085 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 30B57A0545; Wed, 15 Jul 2020 12:56:43 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C64761BEDD; Wed, 15 Jul 2020 12:56:38 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 4C4751BED7 for ; Wed, 15 Jul 2020 12:56:36 +0200 (CEST) IronPort-SDR: fOM+/6pSi9CcMaTl7LnWdapalmGjc1HjdREE2tFyqkzRUuAIVvdKIB9hZEgHKOvRLCthuOOtnP dEPNmn0bK0RA== X-IronPort-AV: E=McAfee;i="6000,8403,9682"; a="137249740" X-IronPort-AV: E=Sophos;i="5.75,355,1589266800"; d="scan'208";a="137249740" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jul 2020 03:56:36 -0700 IronPort-SDR: gPnLvR56HmWedPZtlFRXBnhysrcMjBJUX4AgAMtfAMxWyFfX6zy4VdBbfdhuQDmTdWK6zRcqcY rlwVWP3YSVWA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,355,1589266800"; d="scan'208";a="460026042" Received: from npg-dpdk-vpp-scm-1.sh.intel.com ([10.67.118.226]) by orsmga005.jf.intel.com with ESMTP; 15 Jul 2020 03:56:34 -0700 From: chenmin.sun@intel.com To: qi.z.zhang@intel.com, beilei.xing@intel.com, jingjing.wu@intel.com, haiyue.wang@intel.com Cc: dev@dpdk.org, chenmin.sun@intel.com Date: Thu, 16 Jul 2020 03:53:26 +0800 Message-Id: <20200715195329.34699-2-chenmin.sun@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200715195329.34699-1-chenmin.sun@intel.com> References: <20200713222321.2118-1-chenmin.sun@intel.com> <20200715195329.34699-1-chenmin.sun@intel.com> Subject: [dpdk-dev] [PATCH V4 1/4] net/i40e: introducing the fdir space tracking X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Chenmin Sun This patch introduces a fdir flow management for guaranteed/shared space tracking. The fdir space is reported by the i40e_hw_capabilities.fd_filters_guaranteed and fd_filters_best_effort. The fdir space is managed by hardware and now is tracking in software. The management algorithm is controlled by the GLQF_CTL.INVALPRIO. Detailed implementation please check in the datasheet and the description of struct i40e_fdir_info.fdir_invalprio. This patch changes the global register GLQF_CTL. Therefore, when devarg ``support-multi-driver`` is set, the patch will not take effect to avoid affecting the normal behavior of other i40e drivers, e.g., Linux kernel driver. Signed-off-by: Chenmin Sun Reviewed-by: Jingjing Wu --- drivers/net/i40e/i40e_ethdev.c | 41 ++++++++++++++++++++++++++++++++++ drivers/net/i40e/i40e_ethdev.h | 28 +++++++++++++++++++++-- drivers/net/i40e/i40e_fdir.c | 16 +++++++++++++ drivers/net/i40e/i40e_flow.c | 5 +++++ drivers/net/i40e/i40e_rxtx.c | 1 + 5 files changed, 89 insertions(+), 2 deletions(-) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 393b5320f..dca84a1f1 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -26,6 +26,7 @@ #include #include #include +#include #include "i40e_logs.h" #include "base/i40e_prototype.h" @@ -1045,8 +1046,11 @@ static int i40e_init_fdir_filter_list(struct rte_eth_dev *dev) { struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); + struct i40e_hw *hw = I40E_PF_TO_HW(pf); struct i40e_fdir_info *fdir_info = &pf->fdir; char fdir_hash_name[RTE_HASH_NAMESIZE]; + uint32_t alloc = hw->func_caps.fd_filters_guaranteed; + uint32_t best = hw->func_caps.fd_filters_best_effort; int ret; struct rte_hash_parameters fdir_hash_params = { @@ -1067,6 +1071,7 @@ i40e_init_fdir_filter_list(struct rte_eth_dev *dev) PMD_INIT_LOG(ERR, "Failed to create fdir hash table!"); return -EINVAL; } + fdir_info->hash_map = rte_zmalloc("i40e_fdir_hash_map", sizeof(struct i40e_fdir_filter *) * I40E_MAX_FDIR_FILTER_NUM, @@ -1077,6 +1082,15 @@ i40e_init_fdir_filter_list(struct rte_eth_dev *dev) ret = -ENOMEM; goto err_fdir_hash_map_alloc; } + + fdir_info->fdir_space_size = alloc + best; + fdir_info->fdir_actual_cnt = 0; + fdir_info->fdir_guarantee_total_space = alloc; + fdir_info->fdir_guarantee_free_space = + fdir_info->fdir_guarantee_total_space; + + PMD_DRV_LOG(INFO, "FDIR guarantee space: %u, best_effort space %u.", alloc, best); + return 0; err_fdir_hash_map_alloc: @@ -1101,6 +1115,30 @@ i40e_init_customized_info(struct i40e_pf *pf) pf->esp_support = false; } +static void +i40e_init_filter_invalidation(struct i40e_pf *pf) +{ + struct i40e_hw *hw = I40E_PF_TO_HW(pf); + struct i40e_fdir_info *fdir_info = &pf->fdir; + uint32_t glqf_ctl_reg = 0; + + glqf_ctl_reg = i40e_read_rx_ctl(hw, I40E_GLQF_CTL); + if (!pf->support_multi_driver) { + fdir_info->fdir_invalprio = 1; + glqf_ctl_reg |= I40E_GLQF_CTL_INVALPRIO_MASK; + PMD_DRV_LOG(INFO, "FDIR INVALPRIO set to guaranteed first"); + i40e_write_rx_ctl(hw, I40E_GLQF_CTL, glqf_ctl_reg); + } else { + if (glqf_ctl_reg & I40E_GLQF_CTL_INVALPRIO_MASK) { + fdir_info->fdir_invalprio = 1; + PMD_DRV_LOG(INFO, "FDIR INVALPRIO is: guaranteed first"); + } else { + fdir_info->fdir_invalprio = 0; + PMD_DRV_LOG(INFO, "FDIR INVALPRIO is: shared first"); + } + } +} + void i40e_init_queue_region_conf(struct rte_eth_dev *dev) { @@ -1654,6 +1692,9 @@ eth_i40e_dev_init(struct rte_eth_dev *dev, void *init_params __rte_unused) /* Initialize customized information */ i40e_init_customized_info(pf); + /* Initialize the filter invalidation configuration */ + i40e_init_filter_invalidation(pf); + ret = i40e_init_ethtype_filter_list(dev); if (ret < 0) goto err_init_ethtype_filter_list; diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h index 31ca05de9..eb505c799 100644 --- a/drivers/net/i40e/i40e_ethdev.h +++ b/drivers/net/i40e/i40e_ethdev.h @@ -698,6 +698,30 @@ struct i40e_fdir_info { struct i40e_fdir_filter **hash_map; struct rte_hash *hash_table; + /* + * Priority ordering at filter invalidation(destroying a flow) between + * "best effort" space and "guaranteed" space. + * + * 0 = At filter invalidation, the hardware first tries to increment the + * "best effort" space. The "guaranteed" space is incremented only when + * the global "best effort" space is at it max value or the "best effort" + * space of the PF is at its max value. + * 1 = At filter invalidation, the hardware first tries to increment its + * "guaranteed" space. The "best effort" space is incremented only when + * it is already at its max value. + */ + uint32_t fdir_invalprio; + /* the total size of the fdir, this number is the sum of the guaranteed + + * shared space + */ + uint32_t fdir_space_size; + /* the actual number of the fdir rules in hardware, initialized as 0 */ + uint32_t fdir_actual_cnt; + /* the free guaranteed space of the fdir */ + uint32_t fdir_guarantee_free_space; + /* the fdir total guaranteed space */ + uint32_t fdir_guarantee_total_space; + /* Mark if flex pit and mask is set */ bool flex_pit_flag[I40E_MAX_FLXPLD_LAYER]; bool flex_mask_flag[I40E_FILTER_PCTYPE_MAX]; @@ -1335,8 +1359,8 @@ int i40e_add_del_fdir_filter(struct rte_eth_dev *dev, const struct rte_eth_fdir_filter *filter, bool add); int i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev, - const struct i40e_fdir_filter_conf *filter, - bool add); + const struct i40e_fdir_filter_conf *filter, + bool add); int i40e_dev_tunnel_filter_set(struct i40e_pf *pf, struct rte_eth_tunnel_filter_conf *tunnel_filter, uint8_t add); diff --git a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c index 71eb31fb8..c37343f8f 100644 --- a/drivers/net/i40e/i40e_fdir.c +++ b/drivers/net/i40e/i40e_fdir.c @@ -21,6 +21,7 @@ #include #include #include +#include #include "i40e_logs.h" #include "base/i40e_type.h" @@ -244,6 +245,10 @@ i40e_fdir_setup(struct i40e_pf *pf) pf->fdir.dma_addr = mz->iova; pf->fdir.match_counter_index = I40E_COUNTER_INDEX_FDIR(hw->pf_id); + pf->fdir.fdir_actual_cnt = 0; + pf->fdir.fdir_guarantee_free_space = + pf->fdir.fdir_guarantee_total_space; + PMD_DRV_LOG(INFO, "FDIR setup successfully, with programming queue %u.", vsi->base_queue); return I40E_SUCCESS; @@ -1762,6 +1767,11 @@ i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev, } if (add) { + fdir_info->fdir_actual_cnt++; + if (fdir_info->fdir_invalprio == 1 && + fdir_info->fdir_guarantee_free_space > 0) + fdir_info->fdir_guarantee_free_space--; + fdir_filter = rte_zmalloc("fdir_filter", sizeof(*fdir_filter), 0); if (fdir_filter == NULL) { @@ -1774,6 +1784,12 @@ i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev, if (ret < 0) rte_free(fdir_filter); } else { + fdir_info->fdir_actual_cnt--; + if (fdir_info->fdir_invalprio == 1 && + fdir_info->fdir_guarantee_free_space < + fdir_info->fdir_guarantee_total_space) + fdir_info->fdir_guarantee_free_space++; + ret = i40e_sw_fdir_filter_del(pf, &node->fdir.input); } diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c index 7cd537340..1f2da7926 100644 --- a/drivers/net/i40e/i40e_flow.c +++ b/drivers/net/i40e/i40e_flow.c @@ -17,6 +17,7 @@ #include #include #include +#include #include "i40e_logs.h" #include "base/i40e_type.h" @@ -5601,6 +5602,10 @@ i40e_flow_flush_fdir_filter(struct i40e_pf *pf) } } + fdir_info->fdir_actual_cnt = 0; + fdir_info->fdir_guarantee_free_space = + fdir_info->fdir_guarantee_total_space; + for (pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; pctype <= I40E_FILTER_PCTYPE_L2_PAYLOAD; pctype++) pf->fdir.inset_flag[pctype] = 0; diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c index 2d2efb71a..d21fbeaca 100644 --- a/drivers/net/i40e/i40e_rxtx.c +++ b/drivers/net/i40e/i40e_rxtx.c @@ -2989,6 +2989,7 @@ i40e_fdir_setup_tx_resources(struct i40e_pf *pf) txq->tx_ring_phys_addr = tz->iova; txq->tx_ring = (struct i40e_tx_desc *)tz->addr; + /* * don't need to allocate software ring and reset for the fdir * program queue just set the queue has been configured. From patchwork Wed Jul 15 19:53:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chenmin Sun X-Patchwork-Id: 74086 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1BD52A0545; Wed, 15 Jul 2020 12:56:51 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 52D4B1BF3C; Wed, 15 Jul 2020 12:56:41 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 73AA21BED7 for ; Wed, 15 Jul 2020 12:56:38 +0200 (CEST) IronPort-SDR: J51V+Vvc/fite1uqYmEzJNczz5ZKE8u767VL05Sv4MGDu7HGhokbydI9t8SOr6UEyCgb0//3iq IVW8pwZZsXMQ== X-IronPort-AV: E=McAfee;i="6000,8403,9682"; a="137249743" X-IronPort-AV: E=Sophos;i="5.75,355,1589266800"; d="scan'208";a="137249743" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jul 2020 03:56:38 -0700 IronPort-SDR: o+6ptnrCSlOgI4CCToS1gRgo6v8AuP8Sn5Fs31WAoCRj0+3hOtmZt1nSWBN+3g4ST/KLOMp9NF SJU76TJnH6QA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,355,1589266800"; d="scan'208";a="460026048" Received: from npg-dpdk-vpp-scm-1.sh.intel.com ([10.67.118.226]) by orsmga005.jf.intel.com with ESMTP; 15 Jul 2020 03:56:36 -0700 From: chenmin.sun@intel.com To: qi.z.zhang@intel.com, beilei.xing@intel.com, jingjing.wu@intel.com, haiyue.wang@intel.com Cc: dev@dpdk.org, chenmin.sun@intel.com Date: Thu, 16 Jul 2020 03:53:27 +0800 Message-Id: <20200715195329.34699-3-chenmin.sun@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200715195329.34699-1-chenmin.sun@intel.com> References: <20200713222321.2118-1-chenmin.sun@intel.com> <20200715195329.34699-1-chenmin.sun@intel.com> Subject: [dpdk-dev] [PATCH V4 2/4] net/i40e: FDIR flow memory management optimization X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Chenmin Sun This patch allocated some memory pool for flow management to avoid calling rte_zmalloc/rte_free every time. This patch also improves the hash table operation. When adding/removing a flow, the software will directly add/delete it from the hash table. If any error occurs, it then roll back the operation it just done. Signed-off-by: Chenmin Sun Reviewed-by: Jingjing Wu --- drivers/net/i40e/i40e_ethdev.c | 94 +++++++++++++++++++++++-- drivers/net/i40e/i40e_ethdev.h | 43 +++++++++--- drivers/net/i40e/i40e_fdir.c | 121 ++++++++++++++++++++++++--------- drivers/net/i40e/i40e_flow.c | 92 ++++++++++++++++++------- 4 files changed, 280 insertions(+), 70 deletions(-) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index dca84a1f1..690164320 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -1051,6 +1051,10 @@ i40e_init_fdir_filter_list(struct rte_eth_dev *dev) char fdir_hash_name[RTE_HASH_NAMESIZE]; uint32_t alloc = hw->func_caps.fd_filters_guaranteed; uint32_t best = hw->func_caps.fd_filters_best_effort; + struct rte_bitmap *bmp = NULL; + uint32_t bmp_size; + void *mem = NULL; + uint32_t i = 0; int ret; struct rte_hash_parameters fdir_hash_params = { @@ -1083,6 +1087,18 @@ i40e_init_fdir_filter_list(struct rte_eth_dev *dev) goto err_fdir_hash_map_alloc; } + fdir_info->fdir_filter_array = rte_zmalloc("fdir_filter", + sizeof(struct i40e_fdir_filter) * + I40E_MAX_FDIR_FILTER_NUM, + 0); + + if (!fdir_info->fdir_filter_array) { + PMD_INIT_LOG(ERR, + "Failed to allocate memory for fdir filter array!"); + ret = -ENOMEM; + goto err_fdir_filter_array_alloc; + } + fdir_info->fdir_space_size = alloc + best; fdir_info->fdir_actual_cnt = 0; fdir_info->fdir_guarantee_total_space = alloc; @@ -1091,8 +1107,53 @@ i40e_init_fdir_filter_list(struct rte_eth_dev *dev) PMD_DRV_LOG(INFO, "FDIR guarantee space: %u, best_effort space %u.", alloc, best); + fdir_info->fdir_flow_pool.pool = + rte_zmalloc("i40e_fdir_entry", + sizeof(struct i40e_fdir_entry) * + fdir_info->fdir_space_size, + 0); + + if (!fdir_info->fdir_flow_pool.pool) { + PMD_INIT_LOG(ERR, + "Failed to allocate memory for bitmap flow!"); + ret = -ENOMEM; + goto err_fdir_bitmap_flow_alloc; + } + + for (i = 0; i < fdir_info->fdir_space_size; i++) + fdir_info->fdir_flow_pool.pool[i].idx = i; + + bmp_size = + rte_bitmap_get_memory_footprint(fdir_info->fdir_space_size); + mem = rte_zmalloc("fdir_bmap", bmp_size, RTE_CACHE_LINE_SIZE); + if (mem == NULL) { + PMD_INIT_LOG(ERR, + "Failed to allocate memory for fdir bitmap!"); + ret = -ENOMEM; + goto err_fdir_mem_alloc; + } + bmp = rte_bitmap_init(fdir_info->fdir_space_size, mem, bmp_size); + if (bmp == NULL) { + PMD_INIT_LOG(ERR, + "Failed to initialization fdir bitmap!"); + ret = -ENOMEM; + goto err_fdir_bmp_alloc; + } + for (i = 0; i < fdir_info->fdir_space_size; i++) + rte_bitmap_set(bmp, i); + + fdir_info->fdir_flow_pool.bitmap = bmp; + return 0; +err_fdir_bmp_alloc: + rte_free(mem); +err_fdir_mem_alloc: + rte_free(fdir_info->fdir_flow_pool.pool); +err_fdir_bitmap_flow_alloc: + rte_free(fdir_info->fdir_filter_array); +err_fdir_filter_array_alloc: + rte_free(fdir_info->hash_map); err_fdir_hash_map_alloc: rte_hash_free(fdir_info->hash_table); @@ -1790,16 +1851,30 @@ i40e_rm_fdir_filter_list(struct i40e_pf *pf) struct i40e_fdir_info *fdir_info; fdir_info = &pf->fdir; - /* Remove all flow director rules and hash */ + + /* Remove all flow director rules */ + while ((p_fdir = TAILQ_FIRST(&fdir_info->fdir_list))) + TAILQ_REMOVE(&fdir_info->fdir_list, p_fdir, rules); +} + +static void +i40e_fdir_memory_cleanup(struct i40e_pf *pf) +{ + struct i40e_fdir_info *fdir_info; + + fdir_info = &pf->fdir; + + /* flow director memory cleanup */ if (fdir_info->hash_map) rte_free(fdir_info->hash_map); if (fdir_info->hash_table) rte_hash_free(fdir_info->hash_table); - - while ((p_fdir = TAILQ_FIRST(&fdir_info->fdir_list))) { - TAILQ_REMOVE(&fdir_info->fdir_list, p_fdir, rules); - rte_free(p_fdir); - } + if (fdir_info->fdir_flow_pool.bitmap) + rte_bitmap_free(fdir_info->fdir_flow_pool.bitmap); + if (fdir_info->fdir_flow_pool.pool) + rte_free(fdir_info->fdir_flow_pool.pool); + if (fdir_info->fdir_filter_array) + rte_free(fdir_info->fdir_filter_array); } void i40e_flex_payload_reg_set_default(struct i40e_hw *hw) @@ -2659,9 +2734,14 @@ i40e_dev_close(struct rte_eth_dev *dev) /* Remove all flows */ while ((p_flow = TAILQ_FIRST(&pf->flow_list))) { TAILQ_REMOVE(&pf->flow_list, p_flow, node); - rte_free(p_flow); + /* Do not free FDIR flows since they are static allocated */ + if (p_flow->filter_type != RTE_ETH_FILTER_FDIR) + rte_free(p_flow); } + /* release the fdir static allocated memory */ + i40e_fdir_memory_cleanup(pf); + /* Remove all Traffic Manager configuration */ i40e_tm_conf_uninit(dev); diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h index eb505c799..f4f34dad3 100644 --- a/drivers/net/i40e/i40e_ethdev.h +++ b/drivers/net/i40e/i40e_ethdev.h @@ -264,6 +264,15 @@ enum i40e_flxpld_layer_idx { #define I40E_DEFAULT_DCB_APP_NUM 1 #define I40E_DEFAULT_DCB_APP_PRIO 3 +/* + * Struct to store flow created. + */ +struct rte_flow { + TAILQ_ENTRY(rte_flow) node; + enum rte_filter_type filter_type; + void *rule; +}; + /** * The overhead from MTU to max frame size. * Considering QinQ packet, the VLAN tag needs to be counted twice. @@ -674,6 +683,23 @@ struct i40e_fdir_filter { struct i40e_fdir_filter_conf fdir; }; +/* fdir memory pool entry */ +struct i40e_fdir_entry { + struct rte_flow flow; + uint32_t idx; +}; + +/* pre-allocated fdir memory pool */ +struct i40e_fdir_flow_pool { + /* a bitmap to manage the fdir pool */ + struct rte_bitmap *bitmap; + /* the size the pool is pf->fdir->fdir_space_size */ + struct i40e_fdir_entry *pool; +}; + +#define FLOW_TO_FLOW_BITMAP(f) \ + container_of((f), struct i40e_fdir_entry, flow) + TAILQ_HEAD(i40e_fdir_filter_list, i40e_fdir_filter); /* * A structure used to define fields of a FDIR related info. @@ -697,6 +723,8 @@ struct i40e_fdir_info { struct i40e_fdir_filter_list fdir_list; struct i40e_fdir_filter **hash_map; struct rte_hash *hash_table; + /* An array to store the inserted rules input */ + struct i40e_fdir_filter *fdir_filter_array; /* * Priority ordering at filter invalidation(destroying a flow) between @@ -721,6 +749,8 @@ struct i40e_fdir_info { uint32_t fdir_guarantee_free_space; /* the fdir total guaranteed space */ uint32_t fdir_guarantee_total_space; + /* the pre-allocated pool of the rte_flow */ + struct i40e_fdir_flow_pool fdir_flow_pool; /* Mark if flex pit and mask is set */ bool flex_pit_flag[I40E_MAX_FLXPLD_LAYER]; @@ -918,15 +948,6 @@ struct i40e_mirror_rule { TAILQ_HEAD(i40e_mirror_rule_list, i40e_mirror_rule); -/* - * Struct to store flow created. - */ -struct rte_flow { - TAILQ_ENTRY(rte_flow) node; - enum rte_filter_type filter_type; - void *rule; -}; - TAILQ_HEAD(i40e_flow_list, rte_flow); /* Struct to store Traffic Manager shaper profile. */ @@ -1358,6 +1379,10 @@ int i40e_ethertype_filter_set(struct i40e_pf *pf, int i40e_add_del_fdir_filter(struct rte_eth_dev *dev, const struct rte_eth_fdir_filter *filter, bool add); +struct rte_flow * +i40e_fdir_entry_pool_get(struct i40e_fdir_info *fdir_info); +void i40e_fdir_entry_pool_put(struct i40e_fdir_info *fdir_info, + struct rte_flow *flow); int i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev, const struct i40e_fdir_filter_conf *filter, bool add); diff --git a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c index c37343f8f..fb778202f 100644 --- a/drivers/net/i40e/i40e_fdir.c +++ b/drivers/net/i40e/i40e_fdir.c @@ -180,6 +180,7 @@ i40e_fdir_setup(struct i40e_pf *pf) PMD_DRV_LOG(INFO, "FDIR initialization has been done."); return I40E_SUCCESS; } + /* make new FDIR VSI */ vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR, pf->main_vsi, 0); if (!vsi) { @@ -1570,6 +1571,7 @@ static int i40e_sw_fdir_filter_insert(struct i40e_pf *pf, struct i40e_fdir_filter *filter) { struct i40e_fdir_info *fdir_info = &pf->fdir; + struct i40e_fdir_filter *hash_filter; int ret; if (filter->fdir.input.flow_ext.pkt_template) @@ -1585,9 +1587,14 @@ i40e_sw_fdir_filter_insert(struct i40e_pf *pf, struct i40e_fdir_filter *filter) ret); return ret; } - fdir_info->hash_map[ret] = filter; - TAILQ_INSERT_TAIL(&fdir_info->fdir_list, filter, rules); + if (fdir_info->hash_map[ret]) + return -1; + + hash_filter = &fdir_info->fdir_filter_array[ret]; + rte_memcpy(hash_filter, filter, sizeof(*filter)); + fdir_info->hash_map[ret] = hash_filter; + TAILQ_INSERT_TAIL(&fdir_info->fdir_list, hash_filter, rules); return 0; } @@ -1616,11 +1623,57 @@ i40e_sw_fdir_filter_del(struct i40e_pf *pf, struct i40e_fdir_input *input) fdir_info->hash_map[ret] = NULL; TAILQ_REMOVE(&fdir_info->fdir_list, filter, rules); - rte_free(filter); return 0; } +struct rte_flow * +i40e_fdir_entry_pool_get(struct i40e_fdir_info *fdir_info) +{ + struct rte_flow *flow = NULL; + uint64_t slab = 0; + uint32_t pos = 0; + uint32_t i = 0; + int ret; + + if (fdir_info->fdir_actual_cnt >= + fdir_info->fdir_space_size) { + PMD_DRV_LOG(ERR, "Fdir space full"); + return NULL; + } + + ret = rte_bitmap_scan(fdir_info->fdir_flow_pool.bitmap, &pos, + &slab); + + /* normally this won't happen as the fdir_actual_cnt should be + * same with the number of the set bits in fdir_flow_pool, + * but anyway handle this error condition here for safe + */ + if (ret == 0) { + PMD_DRV_LOG(ERR, "fdir_actual_cnt out of sync"); + return NULL; + } + + i = rte_bsf64(slab); + pos += i; + rte_bitmap_clear(fdir_info->fdir_flow_pool.bitmap, pos); + flow = &fdir_info->fdir_flow_pool.pool[pos].flow; + + memset(flow, 0, sizeof(struct rte_flow)); + + return flow; +} + +void +i40e_fdir_entry_pool_put(struct i40e_fdir_info *fdir_info, + struct rte_flow *flow) +{ + struct i40e_fdir_entry *f; + + f = FLOW_TO_FLOW_BITMAP(flow); + rte_bitmap_set(fdir_info->fdir_flow_pool.bitmap, f->idx); +} + /* * i40e_add_del_fdir_filter - add or remove a flow director filter. * @pf: board private structure @@ -1699,7 +1752,7 @@ i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev, unsigned char *pkt = (unsigned char *)pf->fdir.prg_pkt; enum i40e_filter_pctype pctype; struct i40e_fdir_info *fdir_info = &pf->fdir; - struct i40e_fdir_filter *fdir_filter, *node; + struct i40e_fdir_filter *node; struct i40e_fdir_filter check_filter; /* Check if the filter exists */ int ret = 0; @@ -1732,25 +1785,36 @@ i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev, /* Check if there is the filter in SW list */ memset(&check_filter, 0, sizeof(check_filter)); i40e_fdir_filter_convert(filter, &check_filter); - node = i40e_sw_fdir_filter_lookup(fdir_info, &check_filter.fdir.input); - if (add && node) { - PMD_DRV_LOG(ERR, - "Conflict with existing flow director rules!"); - return -EINVAL; - } - if (!add && !node) { - PMD_DRV_LOG(ERR, - "There's no corresponding flow firector filter!"); - return -EINVAL; + if (add) { + ret = i40e_sw_fdir_filter_insert(pf, &check_filter); + if (ret < 0) { + PMD_DRV_LOG(ERR, + "Conflict with existing flow director rules!"); + return -EINVAL; + } + } else { + node = i40e_sw_fdir_filter_lookup(fdir_info, + &check_filter.fdir.input); + if (!node) { + PMD_DRV_LOG(ERR, + "There's no corresponding flow firector filter!"); + return -EINVAL; + } + + ret = i40e_sw_fdir_filter_del(pf, &node->fdir.input); + if (ret < 0) { + PMD_DRV_LOG(ERR, + "Error deleting fdir rule from hash table!"); + return -EINVAL; + } } memset(pkt, 0, I40E_FDIR_PKT_LEN); - ret = i40e_flow_fdir_construct_pkt(pf, &filter->input, pkt); if (ret < 0) { PMD_DRV_LOG(ERR, "construct packet for fdir fails."); - return ret; + goto error_op; } if (hw->mac.type == I40E_MAC_X722) { @@ -1763,7 +1827,7 @@ i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev, if (ret < 0) { PMD_DRV_LOG(ERR, "fdir programming fails for PCTYPE(%u).", pctype); - return ret; + goto error_op; } if (add) { @@ -1771,29 +1835,24 @@ i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev, if (fdir_info->fdir_invalprio == 1 && fdir_info->fdir_guarantee_free_space > 0) fdir_info->fdir_guarantee_free_space--; - - fdir_filter = rte_zmalloc("fdir_filter", - sizeof(*fdir_filter), 0); - if (fdir_filter == NULL) { - PMD_DRV_LOG(ERR, "Failed to alloc memory."); - return -ENOMEM; - } - - rte_memcpy(fdir_filter, &check_filter, sizeof(check_filter)); - ret = i40e_sw_fdir_filter_insert(pf, fdir_filter); - if (ret < 0) - rte_free(fdir_filter); } else { fdir_info->fdir_actual_cnt--; if (fdir_info->fdir_invalprio == 1 && fdir_info->fdir_guarantee_free_space < fdir_info->fdir_guarantee_total_space) fdir_info->fdir_guarantee_free_space++; - - ret = i40e_sw_fdir_filter_del(pf, &node->fdir.input); } return ret; + +error_op: + /* roll back */ + if (add) + i40e_sw_fdir_filter_del(pf, &check_filter.fdir.input); + else + i40e_sw_fdir_filter_insert(pf, &check_filter); + + return ret; } /* diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c index 1f2da7926..8c36f29b9 100644 --- a/drivers/net/i40e/i40e_flow.c +++ b/drivers/net/i40e/i40e_flow.c @@ -145,6 +145,8 @@ const struct rte_flow_ops i40e_flow_ops = { static union i40e_filter_t cons_filter; static enum rte_filter_type cons_filter_type = RTE_ETH_FILTER_NONE; +/* internal pattern w/o VOID items */ +struct rte_flow_item g_items[32]; /* Pattern matched ethertype filter */ static enum rte_flow_item_type pattern_ethertype[] = { @@ -5264,7 +5266,6 @@ i40e_flow_validate(struct rte_eth_dev *dev, NULL, "NULL attribute."); return -rte_errno; } - memset(&cons_filter, 0, sizeof(cons_filter)); /* Get the non-void item of action */ @@ -5286,12 +5287,18 @@ i40e_flow_validate(struct rte_eth_dev *dev, } item_num++; - items = rte_zmalloc("i40e_pattern", - item_num * sizeof(struct rte_flow_item), 0); - if (!items) { - rte_flow_error_set(error, ENOMEM, RTE_FLOW_ERROR_TYPE_ITEM_NUM, - NULL, "No memory for PMD internal items."); - return -ENOMEM; + if (item_num <= ARRAY_SIZE(g_items)) { + items = g_items; + } else { + items = rte_zmalloc("i40e_pattern", + item_num * sizeof(struct rte_flow_item), 0); + if (!items) { + rte_flow_error_set(error, ENOMEM, + RTE_FLOW_ERROR_TYPE_ITEM_NUM, + NULL, + "No memory for PMD internal items."); + return -ENOMEM; + } } i40e_pattern_skip_void_item(items, pattern); @@ -5303,16 +5310,21 @@ i40e_flow_validate(struct rte_eth_dev *dev, rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM, pattern, "Unsupported pattern"); - rte_free(items); + + if (items != g_items) + rte_free(items); return -rte_errno; } + if (parse_filter) ret = parse_filter(dev, attr, items, actions, error, &cons_filter); + flag = true; } while ((ret < 0) && (i < RTE_DIM(i40e_supported_patterns))); - rte_free(items); + if (items != g_items) + rte_free(items); return ret; } @@ -5325,21 +5337,33 @@ i40e_flow_create(struct rte_eth_dev *dev, struct rte_flow_error *error) { struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); - struct rte_flow *flow; + struct rte_flow *flow = NULL; + struct i40e_fdir_info *fdir_info = &pf->fdir; int ret; - flow = rte_zmalloc("i40e_flow", sizeof(struct rte_flow), 0); - if (!flow) { - rte_flow_error_set(error, ENOMEM, - RTE_FLOW_ERROR_TYPE_HANDLE, NULL, - "Failed to allocate memory"); - return flow; - } - ret = i40e_flow_validate(dev, attr, pattern, actions, error); if (ret < 0) return NULL; + if (cons_filter_type == RTE_ETH_FILTER_FDIR) { + flow = i40e_fdir_entry_pool_get(fdir_info); + if (flow == NULL) { + rte_flow_error_set(error, ENOBUFS, + RTE_FLOW_ERROR_TYPE_HANDLE, NULL, + "Fdir space full"); + + return flow; + } + } else { + flow = rte_zmalloc("i40e_flow", sizeof(struct rte_flow), 0); + if (!flow) { + rte_flow_error_set(error, ENOMEM, + RTE_FLOW_ERROR_TYPE_HANDLE, NULL, + "Failed to allocate memory"); + return flow; + } + } + switch (cons_filter_type) { case RTE_ETH_FILTER_ETHERTYPE: ret = i40e_ethertype_filter_set(pf, @@ -5351,7 +5375,7 @@ i40e_flow_create(struct rte_eth_dev *dev, break; case RTE_ETH_FILTER_FDIR: ret = i40e_flow_add_del_fdir_filter(dev, - &cons_filter.fdir_filter, 1); + &cons_filter.fdir_filter, 1); if (ret) goto free_flow; flow->rule = TAILQ_LAST(&pf->fdir.fdir_list, @@ -5385,7 +5409,12 @@ i40e_flow_create(struct rte_eth_dev *dev, rte_flow_error_set(error, -ret, RTE_FLOW_ERROR_TYPE_HANDLE, NULL, "Failed to create flow."); - rte_free(flow); + + if (cons_filter_type != RTE_ETH_FILTER_FDIR) + rte_free(flow); + else + i40e_fdir_entry_pool_put(fdir_info, flow); + return NULL; } @@ -5396,6 +5425,7 @@ i40e_flow_destroy(struct rte_eth_dev *dev, { struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); enum rte_filter_type filter_type = flow->filter_type; + struct i40e_fdir_info *fdir_info = &pf->fdir; int ret = 0; switch (filter_type) { @@ -5409,7 +5439,8 @@ i40e_flow_destroy(struct rte_eth_dev *dev, break; case RTE_ETH_FILTER_FDIR: ret = i40e_flow_add_del_fdir_filter(dev, - &((struct i40e_fdir_filter *)flow->rule)->fdir, 0); + &((struct i40e_fdir_filter *)flow->rule)->fdir, + 0); /* If the last flow is destroyed, disable fdir. */ if (!ret && TAILQ_EMPTY(&pf->fdir.fdir_list)) { @@ -5429,7 +5460,11 @@ i40e_flow_destroy(struct rte_eth_dev *dev, if (!ret) { TAILQ_REMOVE(&pf->flow_list, flow, node); - rte_free(flow); + if (filter_type == RTE_ETH_FILTER_FDIR) + i40e_fdir_entry_pool_put(fdir_info, flow); + else + rte_free(flow); + } else rte_flow_error_set(error, -ret, RTE_FLOW_ERROR_TYPE_HANDLE, NULL, @@ -5583,6 +5618,7 @@ i40e_flow_flush_fdir_filter(struct i40e_pf *pf) struct rte_flow *flow; void *temp; int ret; + uint32_t i = 0; ret = i40e_fdir_flush(dev); if (!ret) { @@ -5598,13 +5634,23 @@ i40e_flow_flush_fdir_filter(struct i40e_pf *pf) TAILQ_FOREACH_SAFE(flow, &pf->flow_list, node, temp) { if (flow->filter_type == RTE_ETH_FILTER_FDIR) { TAILQ_REMOVE(&pf->flow_list, flow, node); - rte_free(flow); } } + /* reset bitmap */ + rte_bitmap_reset(fdir_info->fdir_flow_pool.bitmap); + for (i = 0; i < fdir_info->fdir_space_size; i++) { + fdir_info->fdir_flow_pool.pool[i].idx = i; + rte_bitmap_set(fdir_info->fdir_flow_pool.bitmap, i); + } + fdir_info->fdir_actual_cnt = 0; fdir_info->fdir_guarantee_free_space = fdir_info->fdir_guarantee_total_space; + memset(fdir_info->fdir_filter_array, + 0, + sizeof(struct i40e_fdir_filter) * + I40E_MAX_FDIR_FILTER_NUM); for (pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; pctype <= I40E_FILTER_PCTYPE_L2_PAYLOAD; pctype++) From patchwork Wed Jul 15 19:53:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chenmin Sun X-Patchwork-Id: 74087 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 92CA0A0545; Wed, 15 Jul 2020 12:57:00 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 297CC1BF5D; Wed, 15 Jul 2020 12:56:44 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 5B68F1BEE7 for ; Wed, 15 Jul 2020 12:56:40 +0200 (CEST) IronPort-SDR: Te842sgo/xm0ClcdNOHQ+215bvio8xQRFCER8HHyy/Cve3gN/D0Qfvf6xnC7QoCSYiOMXCUDVc Inx8gOF5BDcQ== X-IronPort-AV: E=McAfee;i="6000,8403,9682"; a="137249754" X-IronPort-AV: E=Sophos;i="5.75,355,1589266800"; d="scan'208";a="137249754" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jul 2020 03:56:40 -0700 IronPort-SDR: +HEe0hpITBqdysqdOXNV0qrIRjDf5deZRTlaAY9Xs4RAGKtP32dBsFZ9xYc6kDY0/WKcvY8kjt OAvYanMcIsPA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,355,1589266800"; d="scan'208";a="460026053" Received: from npg-dpdk-vpp-scm-1.sh.intel.com ([10.67.118.226]) by orsmga005.jf.intel.com with ESMTP; 15 Jul 2020 03:56:38 -0700 From: chenmin.sun@intel.com To: qi.z.zhang@intel.com, beilei.xing@intel.com, jingjing.wu@intel.com, haiyue.wang@intel.com Cc: dev@dpdk.org, chenmin.sun@intel.com Date: Thu, 16 Jul 2020 03:53:28 +0800 Message-Id: <20200715195329.34699-4-chenmin.sun@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200715195329.34699-1-chenmin.sun@intel.com> References: <20200713222321.2118-1-chenmin.sun@intel.com> <20200715195329.34699-1-chenmin.sun@intel.com> Subject: [dpdk-dev] [PATCH V4 3/4] net/i40e: move the i40e_get_outer_vlan to where it real needed X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Chenmin Sun This patch moves the fetching the device tpid to where it really needs, rather than fetching it every time when entered the functions. This is because this operation costs too many cycles and it is used only when matching the ethernet header. Signed-off-by: Chenmin Sun --- drivers/net/i40e/i40e_flow.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c index 8c36f29b9..9a8bca46f 100644 --- a/drivers/net/i40e/i40e_flow.c +++ b/drivers/net/i40e/i40e_flow.c @@ -2047,9 +2047,6 @@ i40e_flow_parse_ethertype_pattern(struct rte_eth_dev *dev, const struct rte_flow_item_eth *eth_spec; const struct rte_flow_item_eth *eth_mask; enum rte_flow_item_type item_type; - uint16_t outer_tpid; - - outer_tpid = i40e_get_outer_vlan(dev); for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { if (item->last) { @@ -2109,7 +2106,7 @@ i40e_flow_parse_ethertype_pattern(struct rte_eth_dev *dev, if (filter->ether_type == RTE_ETHER_TYPE_IPV4 || filter->ether_type == RTE_ETHER_TYPE_IPV6 || filter->ether_type == RTE_ETHER_TYPE_LLDP || - filter->ether_type == outer_tpid) { + filter->ether_type == i40e_get_outer_vlan(dev)) { rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM, item, @@ -2611,7 +2608,6 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev, uint16_t flex_size; bool cfg_flex_pit = true; bool cfg_flex_msk = true; - uint16_t outer_tpid; uint16_t ether_type; uint32_t vtc_flow_cpu; bool outer_ip = true; @@ -2620,7 +2616,6 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev, memset(off_arr, 0, sizeof(off_arr)); memset(len_arr, 0, sizeof(len_arr)); memset(flex_mask, 0, I40E_FDIR_MAX_FLEX_LEN); - outer_tpid = i40e_get_outer_vlan(dev); filter->input.flow_ext.customized_pctype = false; for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { if (item->last) { @@ -2688,7 +2683,7 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev, if (next_type == RTE_FLOW_ITEM_TYPE_VLAN || ether_type == RTE_ETHER_TYPE_IPV4 || ether_type == RTE_ETHER_TYPE_IPV6 || - ether_type == outer_tpid) { + ether_type == i40e_get_outer_vlan(dev)) { rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM, item, @@ -2732,7 +2727,7 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev, if (ether_type == RTE_ETHER_TYPE_IPV4 || ether_type == RTE_ETHER_TYPE_IPV6 || - ether_type == outer_tpid) { + ether_type == i40e_get_outer_vlan(dev)) { rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM, item, From patchwork Wed Jul 15 19:53:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chenmin Sun X-Patchwork-Id: 74088 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 54EA4A0545; Wed, 15 Jul 2020 12:57:09 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 770911BF81; Wed, 15 Jul 2020 12:56:45 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 80B9D1BF5D for ; Wed, 15 Jul 2020 12:56:42 +0200 (CEST) IronPort-SDR: imHEzmAVb54rv9MRw5pTyJ325D1D7Iw1+Mkl80URZyUiSHZJgZugSdgwrEldM+O9sLTwXCDiez XHam0TEw1jbw== X-IronPort-AV: E=McAfee;i="6000,8403,9682"; a="137249757" X-IronPort-AV: E=Sophos;i="5.75,355,1589266800"; d="scan'208";a="137249757" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jul 2020 03:56:42 -0700 IronPort-SDR: mZkkXmffe49NqJBqaYCeqR9ZZ/TpLeJUGa6Y5Qz7ecgk81daAkTQDoj234mLDOzqXxzsvvxtZ4 qJ9OitvcrHPw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,355,1589266800"; d="scan'208";a="460026058" Received: from npg-dpdk-vpp-scm-1.sh.intel.com ([10.67.118.226]) by orsmga005.jf.intel.com with ESMTP; 15 Jul 2020 03:56:40 -0700 From: chenmin.sun@intel.com To: qi.z.zhang@intel.com, beilei.xing@intel.com, jingjing.wu@intel.com, haiyue.wang@intel.com Cc: dev@dpdk.org, chenmin.sun@intel.com Date: Thu, 16 Jul 2020 03:53:29 +0800 Message-Id: <20200715195329.34699-5-chenmin.sun@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200715195329.34699-1-chenmin.sun@intel.com> References: <20200713222321.2118-1-chenmin.sun@intel.com> <20200715195329.34699-1-chenmin.sun@intel.com> Subject: [dpdk-dev] [PATCH V4 4/4] net/i40e: FDIR update rate optimization X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Chenmin Sun This patch optimized the fdir update rate for i40e PF, by tracking whether the fdir rule being inserted into the guaranteed space or shared space. For the flows that are inserted to the guaranteed space, we assume that the insertion will always succeed as the hardware only report the "no enough space left" error. In this case, the software can directly return success and no need to retrieve the result from the hardware. When destroying a flow, we also assume the operation will succeed as the software has checked the flow is indeed in the hardware. See the fdir programming status descriptor format in the datasheet for more details. Signed-off-by: Chenmin Sun --- drivers/net/i40e/i40e_ethdev.h | 14 ++- drivers/net/i40e/i40e_fdir.c | 151 ++++++++++++++++++++++++++------- drivers/net/i40e/i40e_rxtx.c | 6 +- drivers/net/i40e/i40e_rxtx.h | 3 + 4 files changed, 139 insertions(+), 35 deletions(-) diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h index f4f34dad3..96b42b376 100644 --- a/drivers/net/i40e/i40e_ethdev.h +++ b/drivers/net/i40e/i40e_ethdev.h @@ -264,6 +264,8 @@ enum i40e_flxpld_layer_idx { #define I40E_DEFAULT_DCB_APP_NUM 1 #define I40E_DEFAULT_DCB_APP_PRIO 3 +#define I40E_FDIR_PRG_PKT_CNT 128 + /* * Struct to store flow created. */ @@ -705,12 +707,20 @@ TAILQ_HEAD(i40e_fdir_filter_list, i40e_fdir_filter); * A structure used to define fields of a FDIR related info. */ struct i40e_fdir_info { +#define I40E_FDIR_PRG_PKT_CNT 128 + struct i40e_vsi *fdir_vsi; /* pointer to fdir VSI structure */ uint16_t match_counter_index; /* Statistic counter index used for fdir*/ struct i40e_tx_queue *txq; struct i40e_rx_queue *rxq; - void *prg_pkt; /* memory for fdir program packet */ - uint64_t dma_addr; /* physic address of packet memory*/ + void *prg_pkt[I40E_FDIR_PRG_PKT_CNT]; /* memory for fdir program packet */ + uint64_t dma_addr[I40E_FDIR_PRG_PKT_CNT]; /* physic address of packet memory*/ + /* + * txq available buffer counter, indicates how many available buffers + * for fdir programming, initialized as I40E_FDIR_PRG_PKT_CNT + */ + int txq_available_buf_count; + /* input set bits for each pctype */ uint64_t input_set[I40E_FILTER_PCTYPE_MAX]; /* diff --git a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c index fb778202f..c2647224e 100644 --- a/drivers/net/i40e/i40e_fdir.c +++ b/drivers/net/i40e/i40e_fdir.c @@ -100,7 +100,7 @@ static int i40e_flow_fdir_filter_programming(struct i40e_pf *pf, enum i40e_filter_pctype pctype, const struct i40e_fdir_filter_conf *filter, - bool add); + bool add, bool wait_status); static int i40e_fdir_rx_queue_init(struct i40e_rx_queue *rxq) @@ -164,6 +164,7 @@ i40e_fdir_setup(struct i40e_pf *pf) char z_name[RTE_MEMZONE_NAMESIZE]; const struct rte_memzone *mz = NULL; struct rte_eth_dev *eth_dev = pf->adapter->eth_dev; + uint16_t i; if ((pf->flags & I40E_FLAG_FDIR) == 0) { PMD_INIT_LOG(ERR, "HW doesn't support FDIR"); @@ -235,15 +236,21 @@ i40e_fdir_setup(struct i40e_pf *pf) eth_dev->device->driver->name, I40E_FDIR_MZ_NAME, eth_dev->data->port_id); - mz = i40e_memzone_reserve(z_name, I40E_FDIR_PKT_LEN, SOCKET_ID_ANY); + mz = i40e_memzone_reserve(z_name, I40E_FDIR_PKT_LEN * + I40E_FDIR_PRG_PKT_CNT, SOCKET_ID_ANY); if (!mz) { PMD_DRV_LOG(ERR, "Cannot init memzone for " "flow director program packet."); err = I40E_ERR_NO_MEMORY; goto fail_mem; } - pf->fdir.prg_pkt = mz->addr; - pf->fdir.dma_addr = mz->iova; + + for (i = 0; i < I40E_FDIR_PRG_PKT_CNT; i++) { + pf->fdir.prg_pkt[i] = (uint8_t *)mz->addr + + I40E_FDIR_PKT_LEN * i; + pf->fdir.dma_addr[i] = mz->iova + + I40E_FDIR_PKT_LEN * i; + } pf->fdir.match_counter_index = I40E_COUNTER_INDEX_FDIR(hw->pf_id); pf->fdir.fdir_actual_cnt = 0; @@ -1687,7 +1694,7 @@ i40e_add_del_fdir_filter(struct rte_eth_dev *dev, { struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); - unsigned char *pkt = (unsigned char *)pf->fdir.prg_pkt; + unsigned char *pkt = (unsigned char *)pf->fdir.prg_pkt[0]; enum i40e_filter_pctype pctype; int ret = 0; @@ -1736,6 +1743,66 @@ i40e_add_del_fdir_filter(struct rte_eth_dev *dev, return ret; } +static inline unsigned char * +i40e_find_available_buffer(struct rte_eth_dev *dev) +{ + struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); + struct i40e_fdir_info *fdir_info = &pf->fdir; + struct i40e_tx_queue *txq = pf->fdir.txq; + volatile struct i40e_tx_desc *txdp = &txq->tx_ring[txq->tx_tail + 1]; + uint32_t i; + + /* no available buffer + * search for more available buffers from the current + * descriptor, until an unavailable one + */ + if (fdir_info->txq_available_buf_count <= 0) { + uint16_t tmp_tail; + volatile struct i40e_tx_desc *tmp_txdp; + + tmp_tail = txq->tx_tail; + tmp_txdp = &txq->tx_ring[tmp_tail + 1]; + + do { + if ((tmp_txdp->cmd_type_offset_bsz & + rte_cpu_to_le_64(I40E_TXD_QW1_DTYPE_MASK)) == + rte_cpu_to_le_64(I40E_TX_DESC_DTYPE_DESC_DONE)) + fdir_info->txq_available_buf_count++; + else + break; + + tmp_tail += 2; + if (tmp_tail >= txq->nb_tx_desc) + tmp_tail = 0; + } while (tmp_tail != txq->tx_tail); + } + + /* + * if txq_available_buf_count > 0, just use the next one is ok, + * else wait for the next DD until it's set to make sure the data + * had been fetched by hardware + */ + if (fdir_info->txq_available_buf_count > 0) { + fdir_info->txq_available_buf_count--; + } else { + /* wait until the tx descriptor is ready */ + for (i = 0; i < I40E_FDIR_MAX_WAIT_US; i++) { + if ((txdp->cmd_type_offset_bsz & + rte_cpu_to_le_64(I40E_TXD_QW1_DTYPE_MASK)) == + rte_cpu_to_le_64(I40E_TX_DESC_DTYPE_DESC_DONE)) + break; + rte_delay_us(1); + } + if (i >= I40E_FDIR_MAX_WAIT_US) { + PMD_DRV_LOG(ERR, + "Failed to program FDIR filter: time out to get DD on tx queue."); + return NULL; + } + } + + return (unsigned char *)fdir_info->prg_pkt[txq->tx_tail >> 1]; +} + /** * i40e_flow_add_del_fdir_filter - add or remove a flow director filter. * @pf: board private structure @@ -1749,11 +1816,12 @@ i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev, { struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); - unsigned char *pkt = (unsigned char *)pf->fdir.prg_pkt; + unsigned char *pkt = NULL; enum i40e_filter_pctype pctype; struct i40e_fdir_info *fdir_info = &pf->fdir; struct i40e_fdir_filter *node; struct i40e_fdir_filter check_filter; /* Check if the filter exists */ + bool wait_status = true; int ret = 0; if (pf->fdir.fdir_vsi == NULL) { @@ -1793,6 +1861,10 @@ i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev, "Conflict with existing flow director rules!"); return -EINVAL; } + + if (fdir_info->fdir_invalprio == 1 && + fdir_info->fdir_guarantee_free_space > 0) + wait_status = false; } else { node = i40e_sw_fdir_filter_lookup(fdir_info, &check_filter.fdir.input); @@ -1808,8 +1880,16 @@ i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev, "Error deleting fdir rule from hash table!"); return -EINVAL; } + + if (fdir_info->fdir_invalprio == 1) + wait_status = false; } + /* find a buffer to store the pkt */ + pkt = i40e_find_available_buffer(dev); + if (pkt == NULL) + goto error_op; + memset(pkt, 0, I40E_FDIR_PKT_LEN); ret = i40e_flow_fdir_construct_pkt(pf, &filter->input, pkt); if (ret < 0) { @@ -1823,7 +1903,8 @@ i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev, hw, I40E_GLQF_FD_PCTYPES((int)pctype)); } - ret = i40e_flow_fdir_filter_programming(pf, pctype, filter, add); + ret = i40e_flow_fdir_filter_programming(pf, pctype, filter, add, + wait_status); if (ret < 0) { PMD_DRV_LOG(ERR, "fdir programming fails for PCTYPE(%u).", pctype); @@ -1953,7 +2034,7 @@ i40e_fdir_filter_programming(struct i40e_pf *pf, PMD_DRV_LOG(INFO, "filling transmit descriptor."); txdp = &(txq->tx_ring[txq->tx_tail + 1]); - txdp->buffer_addr = rte_cpu_to_le_64(pf->fdir.dma_addr); + txdp->buffer_addr = rte_cpu_to_le_64(pf->fdir.dma_addr[0]); td_cmd = I40E_TX_DESC_CMD_EOP | I40E_TX_DESC_CMD_RS | I40E_TX_DESC_CMD_DUMMY; @@ -2003,7 +2084,7 @@ static int i40e_flow_fdir_filter_programming(struct i40e_pf *pf, enum i40e_filter_pctype pctype, const struct i40e_fdir_filter_conf *filter, - bool add) + bool add, bool wait_status) { struct i40e_tx_queue *txq = pf->fdir.txq; struct i40e_rx_queue *rxq = pf->fdir.rxq; @@ -2011,8 +2092,10 @@ i40e_flow_fdir_filter_programming(struct i40e_pf *pf, volatile struct i40e_tx_desc *txdp; volatile struct i40e_filter_program_desc *fdirdp; uint32_t td_cmd; - uint16_t vsi_id, i; + uint16_t vsi_id; uint8_t dest; + uint32_t i; + uint8_t retry_count = 0; PMD_DRV_LOG(INFO, "filling filter programming descriptor."); fdirdp = (volatile struct i40e_filter_program_desc *) @@ -2087,7 +2170,8 @@ i40e_flow_fdir_filter_programming(struct i40e_pf *pf, PMD_DRV_LOG(INFO, "filling transmit descriptor."); txdp = &txq->tx_ring[txq->tx_tail + 1]; - txdp->buffer_addr = rte_cpu_to_le_64(pf->fdir.dma_addr); + txdp->buffer_addr = rte_cpu_to_le_64(pf->fdir.dma_addr[txq->tx_tail / 2]); + td_cmd = I40E_TX_DESC_CMD_EOP | I40E_TX_DESC_CMD_RS | I40E_TX_DESC_CMD_DUMMY; @@ -2100,25 +2184,34 @@ i40e_flow_fdir_filter_programming(struct i40e_pf *pf, txq->tx_tail = 0; /* Update the tx tail register */ rte_wmb(); + + /* capture the previous error report(if any) from rx ring */ + while ((i40e_check_fdir_programming_status(rxq) < 0) && + (++retry_count < 100)) + PMD_DRV_LOG(INFO, "previous error report captured."); + I40E_PCI_REG_WRITE(txq->qtx_tail, txq->tx_tail); - for (i = 0; i < I40E_FDIR_MAX_WAIT_US; i++) { - if ((txdp->cmd_type_offset_bsz & - rte_cpu_to_le_64(I40E_TXD_QW1_DTYPE_MASK)) == - rte_cpu_to_le_64(I40E_TX_DESC_DTYPE_DESC_DONE)) - break; - rte_delay_us(1); - } - if (i >= I40E_FDIR_MAX_WAIT_US) { - PMD_DRV_LOG(ERR, - "Failed to program FDIR filter: time out to get DD on tx queue."); - return -ETIMEDOUT; - } - /* totally delay 10 ms to check programming status*/ - rte_delay_us(I40E_FDIR_MAX_WAIT_US); - if (i40e_check_fdir_programming_status(rxq) < 0) { - PMD_DRV_LOG(ERR, - "Failed to program FDIR filter: programming status reported."); - return -ETIMEDOUT; + + if (wait_status) { + for (i = 0; i < I40E_FDIR_MAX_WAIT_US; i++) { + if ((txdp->cmd_type_offset_bsz & + rte_cpu_to_le_64(I40E_TXD_QW1_DTYPE_MASK)) == + rte_cpu_to_le_64(I40E_TX_DESC_DTYPE_DESC_DONE)) + break; + rte_delay_us(1); + } + if (i >= I40E_FDIR_MAX_WAIT_US) { + PMD_DRV_LOG(ERR, + "Failed to program FDIR filter: time out to get DD on tx queue."); + return -ETIMEDOUT; + } + /* totally delay 10 ms to check programming status*/ + rte_delay_us(I40E_FDIR_MAX_WAIT_US); + if (i40e_check_fdir_programming_status(rxq) < 0) { + PMD_DRV_LOG(ERR, + "Failed to program FDIR filter: programming status reported."); + return -ETIMEDOUT; + } } return 0; diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c index d21fbeaca..fe7f9200c 100644 --- a/drivers/net/i40e/i40e_rxtx.c +++ b/drivers/net/i40e/i40e_rxtx.c @@ -2940,16 +2940,13 @@ i40e_dev_free_queues(struct rte_eth_dev *dev) } } -#define I40E_FDIR_NUM_TX_DESC I40E_MIN_RING_DESC -#define I40E_FDIR_NUM_RX_DESC I40E_MIN_RING_DESC - enum i40e_status_code i40e_fdir_setup_tx_resources(struct i40e_pf *pf) { struct i40e_tx_queue *txq; const struct rte_memzone *tz = NULL; - uint32_t ring_size; struct rte_eth_dev *dev; + uint32_t ring_size; if (!pf) { PMD_DRV_LOG(ERR, "PF is not available"); @@ -2996,6 +2993,7 @@ i40e_fdir_setup_tx_resources(struct i40e_pf *pf) */ txq->q_set = TRUE; pf->fdir.txq = txq; + pf->fdir.txq_available_buf_count = I40E_FDIR_PRG_PKT_CNT; return I40E_SUCCESS; } diff --git a/drivers/net/i40e/i40e_rxtx.h b/drivers/net/i40e/i40e_rxtx.h index 8f11f011a..b4d00ef08 100644 --- a/drivers/net/i40e/i40e_rxtx.h +++ b/drivers/net/i40e/i40e_rxtx.h @@ -24,6 +24,9 @@ #define I40E_MIN_RING_DESC 64 #define I40E_MAX_RING_DESC 4096 +#define I40E_FDIR_NUM_TX_DESC (I40E_FDIR_PRG_PKT_CNT * 2) +#define I40E_FDIR_NUM_RX_DESC (I40E_FDIR_PRG_PKT_CNT * 2) + #define I40E_MIN_TSO_MSS 256 #define I40E_MAX_TSO_MSS 9674