From patchwork Thu Jul 9 02:06:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 73570 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id BB2A2A0526; Thu, 9 Jul 2020 04:02:48 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id E84AC1DC0B; Thu, 9 Jul 2020 04:02:47 +0200 (CEST) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by dpdk.org (Postfix) with ESMTP id C99BE1DBBC for ; Thu, 9 Jul 2020 04:02:46 +0200 (CEST) IronPort-SDR: uU+vX5KZ9tqkLfBWSeAKnAD5cpkV65ZR3aO0G5mREHq6wLsntM+/ekw/WcD7aWafacwv1cUoA4 3lzbzSIjslzQ== X-IronPort-AV: E=McAfee;i="6000,8403,9676"; a="127995977" X-IronPort-AV: E=Sophos;i="5.75,330,1589266800"; d="scan'208";a="127995977" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jul 2020 19:02:45 -0700 IronPort-SDR: 4YyyLssSd4ab7zfzRNm1CjGwjpzNmBKsntYZnRY9E2UxxtXR59vbMkh1wdc+zF26GlwlcBU/Pe t7Y5YnWPZsPw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,330,1589266800"; d="scan'208";a="314802274" Received: from dpdk51.sh.intel.com ([10.67.111.82]) by orsmga008.jf.intel.com with ESMTP; 08 Jul 2020 19:02:43 -0700 From: Qi Zhang To: thomas@monjalon.net Cc: dev@dpdk.org, ferruh.yigit@intel.com, arybchenko@solarflare.com, Junfeng Guo , Qi Zhang Date: Thu, 9 Jul 2020 10:06:41 +0800 Message-Id: <20200709020643.18415-1-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20200708133703.48945-1-qi.z.zhang@intel.com> References: <20200708133703.48945-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH v6 1/3] ethdev: add new RSS types for IPv6 prefix X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Junfeng Guo This patch defines new RSS offload types for IPv6 prefix with 32, 40, 48, 56, 64, 96 bits of both SRC and DST IPv6 address. Ref https://tools.ietf.org/html/rfc6052. Signed-off-by: Junfeng Guo Signed-off-by: Qi Zhang Reviewed-by: Ferruh Yigit --- v6: - rename to RTE_ETH_RSS_xxx v5: - add 40 56, 96 according to RFC6052 - add more description about the new macros. lib/librte_ethdev/rte_ethdev.h | 109 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 109 insertions(+) diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h index 631b146bd..03356cdb2 100644 --- a/lib/librte_ethdev/rte_ethdev.h +++ b/lib/librte_ethdev/rte_ethdev.h @@ -539,6 +539,19 @@ struct rte_eth_rss_conf { #define ETH_RSS_L2_SRC_ONLY (1ULL << 59) #define ETH_RSS_L2_DST_ONLY (1ULL << 58) +/* + * Only select IPV6 address prefix as RSS input set according to + * https://tools.ietf.org/html/rfc6052 + * Must be combined with ETH_RSS_IPV6, ETH_RSS_NONFRAG_IPV6_UDP, + * ETH_RSS_NONFRAG_IPV6_TCP, ETH_RSS_NONFRAG_IPV6_SCTP. + */ +#define RTE_ETH_RSS_L3_PRE32 (1ULL << 57) +#define RTE_ETH_RSS_L3_PRE40 (1ULL << 56) +#define RTE_ETH_RSS_L3_PRE48 (1ULL << 55) +#define RTE_ETH_RSS_L3_PRE56 (1ULL << 54) +#define RTE_ETH_RSS_L3_PRE64 (1ULL << 53) +#define RTE_ETH_RSS_L3_PRE96 (1ULL << 52) + /** * For input set change of hash filter, if SRC_ONLY and DST_ONLY of * the same level are used simultaneously, it is the same case as @@ -561,6 +574,102 @@ rte_eth_rss_hf_refine(uint64_t rss_hf) return rss_hf; } +#define ETH_RSS_IPV6_PRE32 ( \ + ETH_RSS_IPV6 | \ + RTE_ETH_RSS_L3_PRE32) + +#define ETH_RSS_IPV6_PRE40 ( \ + ETH_RSS_IPV6 | \ + RTE_ETH_RSS_L3_PRE40) + +#define ETH_RSS_IPV6_PRE48 ( \ + ETH_RSS_IPV6 | \ + RTE_ETH_RSS_L3_PRE48) + +#define ETH_RSS_IPV6_PRE56 ( \ + ETH_RSS_IPV6 | \ + RTE_ETH_RSS_L3_PRE56) + +#define ETH_RSS_IPV6_PRE64 ( \ + ETH_RSS_IPV6 | \ + RTE_ETH_RSS_L3_PRE64) + +#define ETH_RSS_IPV6_PRE96 ( \ + ETH_RSS_IPV6 | \ + RTE_ETH_RSS_L3_PRE96) + +#define ETH_RSS_IPV6_PRE32_UDP ( \ + ETH_RSS_NONFRAG_IPV6_UDP | \ + RTE_ETH_RSS_L3_PRE32) + +#define ETH_RSS_IPV6_PRE40_UDP ( \ + ETH_RSS_NONFRAG_IPV6_UDP | \ + RTE_ETH_RSS_L3_PRE40) + +#define ETH_RSS_IPV6_PRE48_UDP ( \ + ETH_RSS_NONFRAG_IPV6_UDP | \ + RTE_ETH_RSS_L3_PRE48) + +#define ETH_RSS_IPV6_PRE56_UDP ( \ + ETH_RSS_NONFRAG_IPV6_UDP | \ + RTE_ETH_RSS_L3_PRE56) + +#define ETH_RSS_IPV6_PRE64_UDP ( \ + ETH_RSS_NONFRAG_IPV6_UDP | \ + RTE_ETH_RSS_L3_PRE64) + +#define ETH_RSS_IPV6_PRE96_UDP ( \ + ETH_RSS_NONFRAG_IPV6_UDP | \ + RTE_ETH_RSS_L3_PRE96) + +#define ETH_RSS_IPV6_PRE32_TCP ( \ + ETH_RSS_NONFRAG_IPV6_TCP | \ + RTE_ETH_RSS_L3_PRE32) + +#define ETH_RSS_IPV6_PRE40_TCP ( \ + ETH_RSS_NONFRAG_IPV6_TCP | \ + RTE_ETH_RSS_L3_PRE40) + +#define ETH_RSS_IPV6_PRE48_TCP ( \ + ETH_RSS_NONFRAG_IPV6_TCP | \ + RTE_ETH_RSS_L3_PRE48) + +#define ETH_RSS_IPV6_PRE56_TCP ( \ + ETH_RSS_NONFRAG_IPV6_TCP | \ + RTE_ETH_RSS_L3_PRE56) + +#define ETH_RSS_IPV6_PRE64_TCP ( \ + ETH_RSS_NONFRAG_IPV6_TCP | \ + RTE_ETH_RSS_L3_PRE64) + +#define ETH_RSS_IPV6_PRE96_TCP ( \ + ETH_RSS_NONFRAG_IPV6_TCP | \ + RTE_ETH_RSS_L3_PRE96) + +#define ETH_RSS_IPV6_PRE32_SCTP ( \ + ETH_RSS_NONFRAG_IPV6_SCTP | \ + RTE_ETH_RSS_L3_PRE32) + +#define ETH_RSS_IPV6_PRE40_SCTP ( \ + ETH_RSS_NONFRAG_IPV6_SCTP | \ + RTE_ETH_RSS_L3_PRE40) + +#define ETH_RSS_IPV6_PRE48_SCTP ( \ + ETH_RSS_NONFRAG_IPV6_SCTP | \ + RTE_ETH_RSS_L3_PRE48) + +#define ETH_RSS_IPV6_PRE56_SCTP ( \ + ETH_RSS_NONFRAG_IPV6_SCTP | \ + RTE_ETH_RSS_L3_PRE56) + +#define ETH_RSS_IPV6_PRE64_SCTP ( \ + ETH_RSS_NONFRAG_IPV6_SCTP | \ + RTE_ETH_RSS_L3_PRE64) + +#define ETH_RSS_IPV6_PRE96_SCTP ( \ + ETH_RSS_NONFRAG_IPV6_SCTP | \ + RTE_ETH_RSS_L3_PRE96) + #define ETH_RSS_IP ( \ ETH_RSS_IPV4 | \ ETH_RSS_FRAG_IPV4 | \ From patchwork Thu Jul 9 02:06:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 73571 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 51DE4A0526; Thu, 9 Jul 2020 04:02:55 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 782CE1DC36; Thu, 9 Jul 2020 04:02:50 +0200 (CEST) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by dpdk.org (Postfix) with ESMTP id C3C511DBBC for ; Thu, 9 Jul 2020 04:02:47 +0200 (CEST) IronPort-SDR: rFyhzEgJUC+48hp2dEJE15Hd/ZzKl6M5mj1aCYF74h4HHsT+zbF9/ZHbFou1QcbWIb2py4J2VV maiQXks73PCw== X-IronPort-AV: E=McAfee;i="6000,8403,9676"; a="127995980" X-IronPort-AV: E=Sophos;i="5.75,330,1589266800"; d="scan'208";a="127995980" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jul 2020 19:02:47 -0700 IronPort-SDR: lcYud8B40NBCRP7cs2lZriABE8K0YZRWKX8JbqVNN3IGX3h8h6lzhVsMi6TFxrIVDy97adtT9g 1bQr86V7K6CQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,330,1589266800"; d="scan'208";a="314802282" Received: from dpdk51.sh.intel.com ([10.67.111.82]) by orsmga008.jf.intel.com with ESMTP; 08 Jul 2020 19:02:45 -0700 From: Qi Zhang To: thomas@monjalon.net Cc: dev@dpdk.org, ferruh.yigit@intel.com, arybchenko@solarflare.com, Junfeng Guo , Qi Zhang Date: Thu, 9 Jul 2020 10:06:42 +0800 Message-Id: <20200709020643.18415-2-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20200709020643.18415-1-qi.z.zhang@intel.com> References: <20200708133703.48945-1-qi.z.zhang@intel.com> <20200709020643.18415-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH v6 2/3] app/testpmd: support extended RSS offload types X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Junfeng Guo This patch adds testpmd cmdline support for IPv6 prefix. Signed-off-by: Junfeng Guo Signed-off-by: Qi Zhang Reviewed-by: Ferruh Yigit --- app/test-pmd/cmdline.c | 12 ++++++++++++ app/test-pmd/config.c | 6 ++++++ 2 files changed, 18 insertions(+) diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c index 39ad93838..4ef23fd86 100644 --- a/app/test-pmd/cmdline.c +++ b/app/test-pmd/cmdline.c @@ -2297,6 +2297,18 @@ cmd_config_rss_parsed(void *parsed_result, rss_conf.rss_hf = ETH_RSS_GENEVE; else if (!strcmp(res->value, "nvgre")) rss_conf.rss_hf = ETH_RSS_NVGRE; + else if (!strcmp(res->value, "l3-pre32")) + rss_conf.rss_hf = RTE_ETH_RSS_L3_PRE32; + else if (!strcmp(res->value, "l3-pre40")) + rss_conf.rss_hf = RTE_ETH_RSS_L3_PRE40; + else if (!strcmp(res->value, "l3-pre48")) + rss_conf.rss_hf = RTE_ETH_RSS_L3_PRE48; + else if (!strcmp(res->value, "l3-pre56")) + rss_conf.rss_hf = RTE_ETH_RSS_L3_PRE56; + else if (!strcmp(res->value, "l3-pre64")) + rss_conf.rss_hf = RTE_ETH_RSS_L3_PRE64; + else if (!strcmp(res->value, "l3-pre96")) + rss_conf.rss_hf = RTE_ETH_RSS_L3_PRE96; else if (!strcmp(res->value, "l3-src-only")) rss_conf.rss_hf = ETH_RSS_L3_SRC_ONLY; else if (!strcmp(res->value, "l3-dst-only")) diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c index 53a9b97d6..3ac7d8f61 100644 --- a/app/test-pmd/config.c +++ b/app/test-pmd/config.c @@ -119,6 +119,12 @@ const struct rss_type_info rss_type_table[] = { { "tcp", ETH_RSS_TCP }, { "sctp", ETH_RSS_SCTP }, { "tunnel", ETH_RSS_TUNNEL }, + { "l3-pre32", RTE_ETH_RSS_L3_PRE32 }, + { "l3-pre40", RTE_ETH_RSS_L3_PRE40 }, + { "l3-pre48", RTE_ETH_RSS_L3_PRE48 }, + { "l3-pre56", RTE_ETH_RSS_L3_PRE56 }, + { "l3-pre64", RTE_ETH_RSS_L3_PRE64 }, + { "l3-pre96", RTE_ETH_RSS_L3_PRE96 }, { "l3-src-only", ETH_RSS_L3_SRC_ONLY }, { "l3-dst-only", ETH_RSS_L3_DST_ONLY }, { "l4-src-only", ETH_RSS_L4_SRC_ONLY }, From patchwork Thu Jul 9 02:06:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 73572 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9790EA0526; Thu, 9 Jul 2020 04:03:04 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 1FB801DC91; Thu, 9 Jul 2020 04:02:53 +0200 (CEST) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by dpdk.org (Postfix) with ESMTP id 126541DC32 for ; Thu, 9 Jul 2020 04:02:49 +0200 (CEST) IronPort-SDR: rfDyJ6TR5ULA6Y8UDvbzEpccWRPpnoYmPb2KYd1e3X2kzRDLGCi+V8QQyXosxU0lsii4jdZEzM RVTWsaQOkBrQ== X-IronPort-AV: E=McAfee;i="6000,8403,9676"; a="127995985" X-IronPort-AV: E=Sophos;i="5.75,330,1589266800"; d="scan'208";a="127995985" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jul 2020 19:02:49 -0700 IronPort-SDR: RsGnmYrJNN/nwicJZSPWIRYeYu1o6bo7C2+LL+tBTzCMp6wYdRewXHyQwvPKSDoMo7M9hII9K0 a8lTtGRN/dTw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,330,1589266800"; d="scan'208";a="314802296" Received: from dpdk51.sh.intel.com ([10.67.111.82]) by orsmga008.jf.intel.com with ESMTP; 08 Jul 2020 19:02:47 -0700 From: Qi Zhang To: thomas@monjalon.net Cc: dev@dpdk.org, ferruh.yigit@intel.com, arybchenko@solarflare.com, Junfeng Guo Date: Thu, 9 Jul 2020 10:06:43 +0800 Message-Id: <20200709020643.18415-3-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20200709020643.18415-1-qi.z.zhang@intel.com> References: <20200708133703.48945-1-qi.z.zhang@intel.com> <20200709020643.18415-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH v6 3/3] net/ice: add RSS support for IPv6 prefix X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Junfeng Guo RSS for IPv6 prefix fields are supported in this patch, so that we can use prefixes instead of full IPv6 address for RSS. These prefixes include the first 32, 48, 64 bits of both SRC and DST IPv6 address. Signed-off-by: Junfeng Guo Acked-by: Qi Zhang --- drivers/net/ice/ice_hash.c | 207 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 207 insertions(+) diff --git a/drivers/net/ice/ice_hash.c b/drivers/net/ice/ice_hash.c index a10734af0..0315c3015 100644 --- a/drivers/net/ice/ice_hash.c +++ b/drivers/net/ice/ice_hash.c @@ -462,6 +462,21 @@ struct ice_hash_match_type ice_hash_type_list[] = { {ETH_RSS_IPV6 | ETH_RSS_L3_DST_ONLY, BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_DA)}, {ETH_RSS_IPV6, ICE_FLOW_HASH_IPV6}, + {ETH_RSS_IPV6_PRE32 | ETH_RSS_L3_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_SA)}, + {ETH_RSS_IPV6_PRE32 | ETH_RSS_L3_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_DA)}, + {ETH_RSS_IPV6_PRE32, ICE_FLOW_HASH_IPV6_PRE32}, + {ETH_RSS_IPV6_PRE48 | ETH_RSS_L3_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_SA)}, + {ETH_RSS_IPV6_PRE48 | ETH_RSS_L3_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_DA)}, + {ETH_RSS_IPV6_PRE48, ICE_FLOW_HASH_IPV6_PRE48}, + {ETH_RSS_IPV6_PRE64 | ETH_RSS_L3_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_SA)}, + {ETH_RSS_IPV6_PRE64 | ETH_RSS_L3_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_DA)}, + {ETH_RSS_IPV6_PRE64, ICE_FLOW_HASH_IPV6_PRE64}, {ETH_RSS_NONFRAG_IPV6_UDP | ETH_RSS_L3_SRC_ONLY | ETH_RSS_L4_SRC_ONLY, BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_SA) | BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PROT) | @@ -493,6 +508,69 @@ struct ice_hash_match_type ice_hash_type_list[] = { {ETH_RSS_NONFRAG_IPV6_UDP, ICE_HASH_UDP_IPV6 | BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PROT)}, + {ETH_RSS_IPV6_PRE32_UDP | ETH_RSS_L3_SRC_ONLY | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_SA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE32_UDP | ETH_RSS_L3_SRC_ONLY | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_SA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_DST_PORT)}, + {ETH_RSS_IPV6_PRE32_UDP | ETH_RSS_L3_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_SA)}, + {ETH_RSS_IPV6_PRE32_UDP | ETH_RSS_L3_DST_ONLY | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_DA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE32_UDP | ETH_RSS_L3_DST_ONLY | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_DA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_DST_PORT)}, + {ETH_RSS_IPV6_PRE32_UDP | ETH_RSS_L3_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_DA)}, + {ETH_RSS_IPV6_PRE32_UDP | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE32_UDP | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_DST_PORT)}, + {ETH_RSS_IPV6_PRE32_UDP, ICE_HASH_UDP_IPV6_PRE32}, + {ETH_RSS_IPV6_PRE48_UDP | ETH_RSS_L3_SRC_ONLY | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_SA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE48_UDP | ETH_RSS_L3_SRC_ONLY | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_SA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_DST_PORT)}, + {ETH_RSS_IPV6_PRE48_UDP | ETH_RSS_L3_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_SA)}, + {ETH_RSS_IPV6_PRE48_UDP | ETH_RSS_L3_DST_ONLY | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_DA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE48_UDP | ETH_RSS_L3_DST_ONLY | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_DA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_DST_PORT)}, + {ETH_RSS_IPV6_PRE48_UDP | ETH_RSS_L3_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_DA)}, + {ETH_RSS_IPV6_PRE48_UDP | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE48_UDP | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_DST_PORT)}, + {ETH_RSS_IPV6_PRE48_UDP, ICE_HASH_UDP_IPV6_PRE48}, + {ETH_RSS_IPV6_PRE64_UDP | ETH_RSS_L3_SRC_ONLY | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_SA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE64_UDP | ETH_RSS_L3_SRC_ONLY | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_SA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_DST_PORT)}, + {ETH_RSS_IPV6_PRE64_UDP | ETH_RSS_L3_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_SA)}, + {ETH_RSS_IPV6_PRE64_UDP | ETH_RSS_L3_DST_ONLY | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_DA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE64_UDP | ETH_RSS_L3_DST_ONLY | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_DA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_DST_PORT)}, + {ETH_RSS_IPV6_PRE64_UDP | ETH_RSS_L3_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_DA)}, + {ETH_RSS_IPV6_PRE64_UDP | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE64_UDP | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_DST_PORT)}, + {ETH_RSS_IPV6_PRE64_UDP, ICE_HASH_UDP_IPV6_PRE64}, {ETH_RSS_NONFRAG_IPV6_TCP | ETH_RSS_L3_SRC_ONLY | ETH_RSS_L4_SRC_ONLY, BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_SA) | BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PROT) | @@ -522,6 +600,69 @@ struct ice_hash_match_type ice_hash_type_list[] = { {ETH_RSS_NONFRAG_IPV6_TCP, ICE_HASH_TCP_IPV6 | BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PROT)}, + {ETH_RSS_IPV6_PRE32_TCP | ETH_RSS_L3_SRC_ONLY | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_SA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE32_TCP | ETH_RSS_L3_SRC_ONLY | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_SA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT)}, + {ETH_RSS_IPV6_PRE32_TCP | ETH_RSS_L3_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_SA)}, + {ETH_RSS_IPV6_PRE32_TCP | ETH_RSS_L3_DST_ONLY | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_DA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE32_TCP | ETH_RSS_L3_DST_ONLY | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_DA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT)}, + {ETH_RSS_IPV6_PRE32_TCP | ETH_RSS_L3_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_DA)}, + {ETH_RSS_IPV6_PRE32_TCP | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE32_TCP | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT)}, + {ETH_RSS_IPV6_PRE32_TCP, ICE_HASH_TCP_IPV6_PRE32}, + {ETH_RSS_IPV6_PRE48_TCP | ETH_RSS_L3_SRC_ONLY | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_SA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE48_TCP | ETH_RSS_L3_SRC_ONLY | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_SA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT)}, + {ETH_RSS_IPV6_PRE48_TCP | ETH_RSS_L3_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_SA)}, + {ETH_RSS_IPV6_PRE48_TCP | ETH_RSS_L3_DST_ONLY | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_DA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE48_TCP | ETH_RSS_L3_DST_ONLY | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_DA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT)}, + {ETH_RSS_IPV6_PRE48_TCP | ETH_RSS_L3_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_DA)}, + {ETH_RSS_IPV6_PRE48_TCP | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE48_TCP | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT)}, + {ETH_RSS_IPV6_PRE48_TCP, ICE_HASH_TCP_IPV6_PRE48}, + {ETH_RSS_IPV6_PRE64_TCP | ETH_RSS_L3_SRC_ONLY | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_SA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE64_TCP | ETH_RSS_L3_SRC_ONLY | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_SA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT)}, + {ETH_RSS_IPV6_PRE64_TCP | ETH_RSS_L3_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_SA)}, + {ETH_RSS_IPV6_PRE64_TCP | ETH_RSS_L3_DST_ONLY | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_DA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE64_TCP | ETH_RSS_L3_DST_ONLY | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_DA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT)}, + {ETH_RSS_IPV6_PRE64_TCP | ETH_RSS_L3_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_DA)}, + {ETH_RSS_IPV6_PRE64_TCP | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE64_TCP | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT)}, + {ETH_RSS_IPV6_PRE64_TCP, ICE_HASH_TCP_IPV6_PRE64}, {ETH_RSS_NONFRAG_IPV6_SCTP | ETH_RSS_L3_SRC_ONLY | ETH_RSS_L4_SRC_ONLY, BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_SA) | BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PROT) | @@ -551,6 +692,69 @@ struct ice_hash_match_type ice_hash_type_list[] = { {ETH_RSS_NONFRAG_IPV6_SCTP, ICE_HASH_SCTP_IPV6 | BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PROT)}, + {ETH_RSS_IPV6_PRE32_SCTP | ETH_RSS_L3_SRC_ONLY | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_SA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE32_SCTP | ETH_RSS_L3_SRC_ONLY | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_SA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_DST_PORT)}, + {ETH_RSS_IPV6_PRE32_SCTP | ETH_RSS_L3_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_SA)}, + {ETH_RSS_IPV6_PRE32_SCTP | ETH_RSS_L3_DST_ONLY | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_DA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE32_SCTP | ETH_RSS_L3_DST_ONLY | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_DA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_DST_PORT)}, + {ETH_RSS_IPV6_PRE32_SCTP | ETH_RSS_L3_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_DA)}, + {ETH_RSS_IPV6_PRE32_SCTP | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE32_SCTP | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_DST_PORT)}, + {ETH_RSS_IPV6_PRE32_SCTP, ICE_HASH_SCTP_IPV6_PRE32}, + {ETH_RSS_IPV6_PRE48_SCTP | ETH_RSS_L3_SRC_ONLY | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_SA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE48_SCTP | ETH_RSS_L3_SRC_ONLY | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_SA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_DST_PORT)}, + {ETH_RSS_IPV6_PRE48_SCTP | ETH_RSS_L3_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_SA)}, + {ETH_RSS_IPV6_PRE48_SCTP | ETH_RSS_L3_DST_ONLY | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_DA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE48_SCTP | ETH_RSS_L3_DST_ONLY | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_DA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_DST_PORT)}, + {ETH_RSS_IPV6_PRE48_SCTP | ETH_RSS_L3_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_DA)}, + {ETH_RSS_IPV6_PRE48_SCTP | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE48_SCTP | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_DST_PORT)}, + {ETH_RSS_IPV6_PRE48_SCTP, ICE_HASH_SCTP_IPV6_PRE48}, + {ETH_RSS_IPV6_PRE64_SCTP | ETH_RSS_L3_SRC_ONLY | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_SA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE64_SCTP | ETH_RSS_L3_SRC_ONLY | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_SA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_DST_PORT)}, + {ETH_RSS_IPV6_PRE64_SCTP | ETH_RSS_L3_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_SA)}, + {ETH_RSS_IPV6_PRE64_SCTP | ETH_RSS_L3_DST_ONLY | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_DA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE64_SCTP | ETH_RSS_L3_DST_ONLY | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_DA) | + BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_DST_PORT)}, + {ETH_RSS_IPV6_PRE64_SCTP | ETH_RSS_L3_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_DA)}, + {ETH_RSS_IPV6_PRE64_SCTP | ETH_RSS_L4_SRC_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT)}, + {ETH_RSS_IPV6_PRE64_SCTP | ETH_RSS_L4_DST_ONLY, + BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_DST_PORT)}, + {ETH_RSS_IPV6_PRE64_SCTP, ICE_HASH_SCTP_IPV6_PRE64}, }; static struct ice_flow_engine ice_hash_engine = { @@ -716,6 +920,9 @@ ice_hash_parse_action(struct ice_pattern_match_item *pattern_match_item, combine_type = ETH_RSS_L2_SRC_ONLY | ETH_RSS_L2_DST_ONLY | + RTE_ETH_RSS_L3_PRE32 | + RTE_ETH_RSS_L3_PRE48 | + RTE_ETH_RSS_L3_PRE64 | ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY | ETH_RSS_L4_SRC_ONLY |