From patchwork Tue Nov 29 06:02:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yogesh Jangra X-Patchwork-Id: 120271 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9DC61A04FD; Tue, 29 Nov 2022 14:26:02 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 986FE40691; Tue, 29 Nov 2022 14:26:02 +0100 (CET) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mails.dpdk.org (Postfix) with ESMTP id AD91D4067E for ; Tue, 29 Nov 2022 14:26:00 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669728360; x=1701264360; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NUp83ro6TOXlsSusA8jmVEwPwXtdtnZIB1+K51gmX2k=; b=MVlWY4URoIvF+E4cdSYt8+z9CwoAvHYv+6+aLKF//tW+GiRbuDNzu9PN WieqRZ2E8lAptlOFIIuWsEAcusVqK4ekbAFrG5nqh8RpIK3/A31OoQ2Zn gh4zEHBSCnXAHDZayDq8H+w0rByciBCRG4pdo+yjOq0/cu5H2edJUhYWd xBb8Z4P4u1DKgGAyKzKuiaSGRzMTMN9ZL3oPYSS2aW9xWjTi8x/1ejJRx ajfZkB3gWPkhm8DoSc0ZSP/UWpgPpZNjlQMi4fSACRnDbI9eDtMLBq04t +uapO8GHN61oyvFkVfITnW1J/hl1JWICs+LlMzo+UIf3jQ5hFhH46at6P g==; X-IronPort-AV: E=McAfee;i="6500,9779,10545"; a="401396794" X-IronPort-AV: E=Sophos;i="5.96,203,1665471600"; d="scan'208";a="401396794" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2022 05:26:00 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10545"; a="594258052" X-IronPort-AV: E=Sophos;i="5.96,203,1665471600"; d="scan'208";a="594258052" Received: from ena4.iind.intel.com ([10.190.200.193]) by orsmga003.jf.intel.com with ESMTP; 29 Nov 2022 05:25:57 -0800 From: Yogesh Jangra To: dts@dpdk.org Cc: cristian.dumitrescu@intel.com, kamalakannan.r@intel.com, harshad.suresh.narayane@intel.com, yogesh.jangra@intel.com Subject: [PATCH 1/2] dep/pipeline: added dependencies for validate_002 test case Date: Tue, 29 Nov 2022 06:02:40 +0000 Message-Id: <20221129060241.901035-2-yogesh.jangra@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221129060241.901035-1-yogesh.jangra@intel.com> References: <20221129060241.901035-1-yogesh.jangra@intel.com> MIME-Version: 1.0 X-BeenThere: dts@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: test suite reviews and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dts-bounces@dpdk.org Added dependencies for the validate_002 test case. Signed-off-by: Yogesh Jangra --- dep/pipeline/validate_002/ethdev.io | 27 ++++++ dep/pipeline/validate_002/pcap_files/in_1.txt | 16 ++++ .../validate_002/pcap_files/out_1.txt | 12 +++ dep/pipeline/validate_002/readme.md | 12 +++ dep/pipeline/validate_002/table.txt | 1 + dep/pipeline/validate_002/validate_002.cli | 22 +++++ dep/pipeline/validate_002/validate_002.spec | 82 +++++++++++++++++++ 7 files changed, 172 insertions(+) create mode 100644 dep/pipeline/validate_002/ethdev.io create mode 100644 dep/pipeline/validate_002/pcap_files/in_1.txt create mode 100644 dep/pipeline/validate_002/pcap_files/out_1.txt create mode 100644 dep/pipeline/validate_002/readme.md create mode 100644 dep/pipeline/validate_002/table.txt create mode 100644 dep/pipeline/validate_002/validate_002.cli create mode 100644 dep/pipeline/validate_002/validate_002.spec diff --git a/dep/pipeline/validate_002/ethdev.io b/dep/pipeline/validate_002/ethdev.io new file mode 100644 index 00000000..4e31f499 --- /dev/null +++ b/dep/pipeline/validate_002/ethdev.io @@ -0,0 +1,27 @@ +; SPDX-License-Identifier: BSD-3-Clause +; Copyright(c) 2022 Intel Corporation + +; +; Pipeline packet mirroring. +; +mirroring slots 4 sessions 64 + +; +; Pipeline input ports. +; +; Note: Customize the parameters below to match your setup. +; +port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1 +port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1 +port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1 +port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1 + +; +; Pipeline output ports. +; +; Note: Customize the parameters below to match your setup. +; +port out 0 ethdev 0000:00:04.0 txq 0 bsz 1 +port out 1 ethdev 0000:00:05.0 txq 0 bsz 1 +port out 2 ethdev 0000:00:06.0 txq 0 bsz 1 +port out 3 ethdev 0000:00:07.0 txq 0 bsz 1 diff --git a/dep/pipeline/validate_002/pcap_files/in_1.txt b/dep/pipeline/validate_002/pcap_files/in_1.txt new file mode 100644 index 00000000..bab3ce5c --- /dev/null +++ b/dep/pipeline/validate_002/pcap_files/in_1.txt @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2020 Intel Corporation +# + +# text to pcap: text2pcap packet.txt packet.pcap +# pcap to text: tcpdump -r packet.pcap -xx + +# Packet 0 +000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00 +000010 00 2e 00 01 00 00 00 06 4e b5 64 00 00 0a c8 00 +000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc df 50 02 +000030 20 00 59 93 00 00 58 58 58 58 58 58 +# Packet 1 +000000 52 54 00 12 44 57 52 54 00 12 34 56 81 00 00 02 +000010 08 00 45 00 00 1a 00 01 00 00 40 00 b2 d8 64 00 +000020 00 01 64 00 00 0a 58 58 58 58 58 58 \ No newline at end of file diff --git a/dep/pipeline/validate_002/pcap_files/out_1.txt b/dep/pipeline/validate_002/pcap_files/out_1.txt new file mode 100644 index 00000000..9e448bda --- /dev/null +++ b/dep/pipeline/validate_002/pcap_files/out_1.txt @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2020 Intel Corporation +# + +# text to pcap: text2pcap packet.txt packet.pcap +# pcap to text: tcpdump -r packet.pcap -xx + +# Packet 0 +000000 52 54 00 12 44 57 ff ee dd cc bb aa 81 00 00 02 +000010 81 00 52 54 00 12 44 57 52 54 00 12 34 56 81 00 +000020 00 02 08 00 45 00 00 1a 00 01 00 00 40 00 b2 d8 +000030 64 00 00 01 64 00 00 0a 58 58 58 58 58 58 \ No newline at end of file diff --git a/dep/pipeline/validate_002/readme.md b/dep/pipeline/validate_002/readme.md new file mode 100644 index 00000000..2f49d703 --- /dev/null +++ b/dep/pipeline/validate_002/readme.md @@ -0,0 +1,12 @@ +Test Case: validate_002 +----------------------- + + Instructions being tested: + validate h.header + + Description: + For the received packet, if its ether type is 8100 then add a new ethernet header + on the top of the packet. Otherwise drop the packet. + + Verification: + The packet with ether type 0806 should be received with a new header on top. diff --git a/dep/pipeline/validate_002/table.txt b/dep/pipeline/validate_002/table.txt new file mode 100644 index 00000000..955de4d2 --- /dev/null +++ b/dep/pipeline/validate_002/table.txt @@ -0,0 +1 @@ +match 0x8100 action validate_002_action ethernet_src_addr 0xffeeddccbbaa diff --git a/dep/pipeline/validate_002/validate_002.cli b/dep/pipeline/validate_002/validate_002.cli new file mode 100644 index 00000000..fe778cdf --- /dev/null +++ b/dep/pipeline/validate_002/validate_002.cli @@ -0,0 +1,22 @@ +; SPDX-License-Identifier: BSD-3-Clause +; Copyright(c) 2010-2020 Intel Corporation + +; +; Pipeline code generation & shared object library build +; +pipeline codegen /tmp/pipeline/validate_002/validate_002.spec /tmp/pipeline/validate_002/validate_002.c +pipeline libbuild /tmp/pipeline/validate_002/validate_002.c /tmp/pipeline/validate_002/validate_002.so + +mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0 + +ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on +ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on +ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on +ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on + + +pipeline PIPELINE0 build lib /tmp/pipeline/validate_002/validate_002.so io /tmp/pipeline/validate_002/ethdev.io numa 0 +pipeline PIPELINE0 table validate_002 add /tmp/pipeline/validate_002/table.txt +pipeline PIPELINE0 commit + +thread 1 pipeline PIPELINE0 enable diff --git a/dep/pipeline/validate_002/validate_002.spec b/dep/pipeline/validate_002/validate_002.spec new file mode 100644 index 00000000..f29f30e1 --- /dev/null +++ b/dep/pipeline/validate_002/validate_002.spec @@ -0,0 +1,82 @@ +; SPDX-License-Identifier: BSD-3-Clause +; Copyright(c) 2020 Intel Corporation + +// +// Packet headers. +// +struct ethernet_h { + bit<48> dst_addr + bit<48> src_addr + bit<16> ether_type +} + +struct vlan_h { + bit<16> pcp_cfi_vid + bit<16> ether_type +} + +header ethernet instanceof ethernet_h +header outer_ethernet instanceof ethernet_h +header vlan instanceof vlan_h + +// +// Packet meta-data. +// +struct metadata_t { + bit<32> port +} + +metadata instanceof metadata_t + +// +// Actions +// +struct validate_002_args_t { + bit<48> ethernet_src_addr +} + +action validate_002_action args instanceof validate_002_args_t { + validate h.outer_ethernet + mov h.outer_ethernet.dst_addr h.ethernet.dst_addr + mov h.outer_ethernet.src_addr t.ethernet_src_addr + mov h.outer_ethernet.ether_type 0x8100 + validate h.vlan + mov h.vlan.ether_type h.ethernet.ether_type + mov h.vlan.pcp_cfi_vid 2 + + return +} + +action drop args none { + drop +} + +// +// Tables. +// +table validate_002 { + key { + h.ethernet.ether_type exact + } + + actions { + validate_002_action + drop + } + + default_action drop args none + size 1048576 +} + +// +// Pipeline. +// +apply { + rx m.port + extract h.ethernet + table validate_002 + emit h.outer_ethernet + emit h.vlan + emit h.ethernet + tx m.port +}