From patchwork Sun Feb 6 03:58:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Weiguo Li X-Patchwork-Id: 106910 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3B01AA034E; Sun, 6 Feb 2022 04:59:33 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A0AF84115D; Sun, 6 Feb 2022 04:59:07 +0100 (CET) Received: from out203-205-221-231.mail.qq.com (out203-205-221-231.mail.qq.com [203.205.221.231]) by mails.dpdk.org (Postfix) with ESMTP id D051F410F7 for ; Sun, 6 Feb 2022 04:59:02 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foxmail.com; s=s201512; t=1644119941; bh=y9xSXLBkYp99kTiE4LeqqOraQ/bG3ey24id23RGvmfQ=; h=From:To:Subject:Date:In-Reply-To:References; b=tZjplc5ePX9MDqs+jyNBerImH+W5cZReFUp0loaKdMYf89BX9aEBpbcPJggXh/O9S PO66/f8C2Q9GzDfE9yVsqOSO9Qhb6lZUihnHLdCXUsAYDfnMBmm5RCmJqPlCiLfXaH mmBYBTh1eKp3j43xJqGbG6yWmy6KQclXw4at66jM= Received: from liwg-ubuntu.lan ([111.193.130.237]) by newxmesmtplogicsvrszc10.qq.com (NewEsmtp) with SMTP id EAE16474; Sun, 06 Feb 2022 11:58:46 +0800 X-QQ-mid: xmsmtpt1644119940tn3eivwq0 Message-ID: X-QQ-XMAILINFO: M6pu7iUFdKTlE9JoTxb1P/yrfVuQa47pC7B12KnPmuDuYsQLrzmcI+BXJw6jOH o8OcMi9GLctCtbtGLlSNym/N1/zEnCojlUT59WypCL8rU6uEvwSKrKoYjs2jHHTLZeSYdMaRfqvn 27cI+aR8sweURs+90QmljSGVldSH118rMSzpcQoSS0dI5FVOYjUwBNLhpyxZN+FvsE9mM8AOWzzF wSEBXe/0CTmZQbdNi6b52g5KEEz98B7HRJfTuJrCZ95qOM09XzQ4jmv40oPT5XTFNhVdREDeLmLc j9FmLCEq+5TYSrvXBsHGtmGouz9OSgAUQe5ZA6SNvjEII1N4jURySZNsIWlNHUJIhUy6l0vIo5w0 XksTIQDYvyY5KT6CiixohxS9JhcHSNdSloiMlRUkt2o/O3U9jEMN8Fw1XLzXg/vDSDBzmCW1OgI2 cfheI8eIB2S9HtpogH4UpIOenGTacoj1+dbZiJIwiwbbHm02jOTlow8fGh9Da4nmXO+969sDv48E z/kgXZOaRmaIWW9VxOJEaa5WDlhUpPBB7K35TlPVSiZAPBgbwvnO5l6fkEM1SrtZilWGnFs1V2lz SbhfZJssJreG5jzPfgzgwmpT1NAL7KlKZNjYBkZFjujkqdz7iSn3JFboGQI2FSB8el3MnszVSGLG yxPivKTFaEPMlvvdFslBx4JXeH97r3o8kZbRBCUjWlSWSiHGWvopVNnibDgVqyJbEolzE4YDjzZV WePAVqDLm8JE/o8YreVgGTTGiuyG45hMlAdJK5wtc+imzqvccoGRMEcsZRndrZemzCBoMNCGDlky BFqzQFSx7uspEG7g5on6sSISd2PRXkuQXjFFsfsgWRbkn189/NMGAxxVDdYD4J9loinWwPAvYz1I 6p/7dmFPpQJAFyHx4UXtU= From: Weiguo Li To: dev@dpdk.org Subject: [PATCH 07/16] net/qede: add define guards to avoid multi-inclusion Date: Sun, 6 Feb 2022 11:58:37 +0800 X-OQ-MSGID: <20220206035846.2840462-7-liwg06@foxmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220206035846.2840462-1-liwg06@foxmail.com> References: <20220206035846.2840462-1-liwg06@foxmail.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Supplement define guards to prevent multiple inclusion. Signed-off-by: Weiguo Li --- drivers/net/qede/base/reg_addr.h | 5 +++++ drivers/net/qede/qede_sriov.h | 5 +++++ 2 files changed, 10 insertions(+) diff --git a/drivers/net/qede/base/reg_addr.h b/drivers/net/qede/base/reg_addr.h index c84d3865f4..d8435f468e 100644 --- a/drivers/net/qede/base/reg_addr.h +++ b/drivers/net/qede/base/reg_addr.h @@ -4,6 +4,9 @@ * www.cavium.com */ +#ifndef _QEDE_REG_ADDR_H_ +#define _QEDE_REG_ADDR_H_ + #define CDU_REG_CID_ADDR_PARAMS_CONTEXT_SIZE_SHIFT \ 0 @@ -2091,3 +2094,5 @@ #define MISC_REG_AEU_GENERAL_MASK_AEU_SYS_KILL_MASK_SHIFT 2 #define MISC_REG_AEU_GENERAL_MASK_AEU_GLB_UNC_ERR_MASK (0x1UL << 3) #define MISC_REG_AEU_GENERAL_MASK_AEU_GLB_UNC_ERR_MASK_SHIFT 3 + +#endif /* _QEDE_REG_ADDR_H_ */ diff --git a/drivers/net/qede/qede_sriov.h b/drivers/net/qede/qede_sriov.h index e58ecc2a51..e95bee9415 100644 --- a/drivers/net/qede/qede_sriov.h +++ b/drivers/net/qede/qede_sriov.h @@ -4,6 +4,9 @@ * www.marvell.com */ +#ifndef _QEDE_SRIOV_H_ +#define _QEDE_SRIOV_H_ + void qed_sriov_configure(struct ecore_dev *edev, int num_vfs_param); enum qed_iov_wq_flag { @@ -20,3 +23,5 @@ enum qed_iov_wq_flag { void qed_inform_vf_link_state(struct ecore_hwfn *hwfn); int qed_schedule_iov(struct ecore_hwfn *p_hwfn, enum qed_iov_wq_flag flag); void qed_iov_pf_task(void *arg); + +#endif /* _QEDE_SRIOV_H_ */