From patchwork Wed Sep 11 16:00:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Herbelot X-Patchwork-Id: 59118 X-Patchwork-Delegate: xiaolong.ye@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 442961E89F; Wed, 11 Sep 2019 18:01:37 +0200 (CEST) Received: from mail-wr1-f68.google.com (mail-wr1-f68.google.com [209.85.221.68]) by dpdk.org (Postfix) with ESMTP id B11511C28F for ; Wed, 11 Sep 2019 18:01:35 +0200 (CEST) Received: by mail-wr1-f68.google.com with SMTP id t16so25205264wra.6 for ; Wed, 11 Sep 2019 09:01:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=d+RGAS4oMBRcwvFK4POaspkQAkCsQmJPp8Ia9+msq8o=; b=JY0GBEQuKP91rFmvnPtUj6d+ATTx5okF3k13b5lxwgcFvJMtNtVgcXTNRzz3Gst+x4 yqx+UP2TIuf3TehnONJ5ibbJVmjqK2dFFm1nJhUjm4ipTMAEtib0DmZgvIOcxUFtffgN BWb1lM9vZ1CLa6wbkUIGQG+s97L184b/Abc8/fN8/zx8+ie4zlspuEAaDgD+sgtPHrcA 2RNC8yZHLzkLlJxTxb+n2q1ki8SVRVE4lrsTrEq+EtnazRIE9CoVEYeTp5QrQrBv/ZpL iQ/xlOFWB5sa5wtf7xatPowSxbsNXMjToDJBvaRPJrHwxGiVBnfZ3xcwP+MX5t6mBrdQ FEoQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=d+RGAS4oMBRcwvFK4POaspkQAkCsQmJPp8Ia9+msq8o=; b=khdlZ0YMV0/Bu3qAKoo4WlDRC94wOw1LyGkJGTl9nh9J0eh9yUAaJusosXVGMJFFAF mm4SlGbQhDkA/8dJEc7AqmNnU9vnWgVB2tLJTqmXe/EjI1wQO4bVQu31/Rog+7uojZmA Yj9WudYlmjXHXJ40IU5qGSi9vhWODgoPxJW9yKkvJpj40STgXJGftEc+f0kOuIQRWeeH VjBr2hFnBRWSwe2DW8da8R5tUgDtKD1zZIB3LfpotTrQ5OdSMCd9kyCUSY3avNcqi22w VnHrdQYIHEKBYlYPtgdB7+bMsDTb3pEs2zW/LyQmpwrNAihl9fIHFGmyh9rSA2yVtSc9 jIxQ== X-Gm-Message-State: APjAAAVcNhGsG/kHEamoNgwEyiol8SO3KbgwxETPz7f2glduVbeZPQOJ Qz0y8rDjU2IDj8Z385a2BSjnyBDu8vy8 X-Google-Smtp-Source: APXvYqzg5lZJyWyQCHcOcSiQBovXNijoxY4fcDfzur40uIY/k2jwMA/xiR1uMMLae3DuQUpYL3Aaiw== X-Received: by 2002:adf:f282:: with SMTP id k2mr30804745wro.38.1568217694828; Wed, 11 Sep 2019 09:01:34 -0700 (PDT) Received: from ascain.dev.6wind.com. (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id 33sm24098367wra.41.2019.09.11.09.01.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Sep 2019 09:01:34 -0700 (PDT) From: Thierry Herbelot To: dev@dpdk.org Cc: Guo Fengtian , Thomas Monjalon , stable@dpdk.org, wenzhuo.lu@intel.com, konstantin.ananyev@intel.com Date: Wed, 11 Sep 2019 18:00:58 +0200 Message-Id: X-Mailer: git-send-email 2.20.1 In-Reply-To: References: MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH 1/1] net/ixgbevf: fix stats update after a PF reset X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Guo Fengtian When PF is set down, in VF, the value of stats register is zero. So only increase stats when it's non zero. Fixes: af75078fece3 ('first public release') Cc: stable@dpdk.org Cc: wenzhuo.lu@intel.com Cc: konstantin.ananyev@intel.com Signed-off-by: Guo Fengtian --- drivers/net/ixgbe/ixgbe_ethdev.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c index 7eb3d0567b58..27c540f60563 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.c +++ b/drivers/net/ixgbe/ixgbe_ethdev.c @@ -385,7 +385,8 @@ static void ixgbe_l2_tunnel_conf(struct rte_eth_dev *dev); #define UPDATE_VF_STAT(reg, last, cur) \ { \ uint32_t latest = IXGBE_READ_REG(hw, reg); \ - cur += (latest - last) & UINT_MAX; \ + if (latest) \ + cur += (latest - last) & UINT_MAX; \ last = latest; \ } @@ -394,7 +395,8 @@ static void ixgbe_l2_tunnel_conf(struct rte_eth_dev *dev); u64 new_lsb = IXGBE_READ_REG(hw, lsb); \ u64 new_msb = IXGBE_READ_REG(hw, msb); \ u64 latest = ((new_msb << 32) | new_lsb); \ - cur += (0x1000000000LL + latest - last) & 0xFFFFFFFFFLL; \ + if (latest) \ + cur += (0x1000000000LL + latest - last) & 0xFFFFFFFFFLL;\ last = latest; \ }